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authorMagnus Damm <magnus.damm@gmail.com>2008-02-08 03:31:24 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-02-14 00:22:10 -0500
commit9109a30e5a548b39463b5a777943cf103da507af (patch)
tree30c9e05311a3a76acef42ebcc6f00f08cdacd605 /drivers
parentd847afe7d4966d35eb7a6fe6f196a0d7e5633f35 (diff)
sh: add support for sh7366 processor
This patch adds sh7366 cpu supports. Just the most basic things like interrupt controller, clocks and serial port are included at this point. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/sh-sci.c2
-rw-r--r--drivers/serial/sh-sci.h8
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index ddf639144538..9ce12cb2cebc 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -393,7 +393,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
393 if (cflag & CRTSCTS) { 393 if (cflag & CRTSCTS) {
394 fcr_val |= SCFCR_MCE; 394 fcr_val |= SCFCR_MCE;
395 } else { 395 } else {
396#ifdef CONFIG_CPU_SUBTYPE_SH7343 396#if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
397 /* Nothing */ 397 /* Nothing */
398#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 398#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
399 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 399 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index f5764ebcfe07..57aaa09811ea 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -97,6 +97,12 @@
97# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 97# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
98# define SCIF_ONLY 98# define SCIF_ONLY
99# define PORT_PSCR 0xA405011E 99# define PORT_PSCR 0xA405011E
100#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
101# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
102# define SCSPTR0 SCPDR0
103# define SCIF_ORER 0x0001 /* overrun error bit */
104# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
105# define SCIF_ONLY
100#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 106#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
101# define SCSPTR2 0xffe80020 /* 16 bit SCIF */ 107# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
102# define SCIF_ORER 0x0001 /* overrun error bit */ 108# define SCIF_ORER 0x0001 /* overrun error bit */
@@ -577,7 +583,7 @@ static inline int sci_rxd_in(struct uart_port *port)
577 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 583 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
578 return 1; 584 return 1;
579} 585}
580#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 586#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
581static inline int sci_rxd_in(struct uart_port *port) 587static inline int sci_rxd_in(struct uart_port *port)
582{ 588{
583 if (port->mapbase == 0xffe00000) 589 if (port->mapbase == 0xffe00000)