diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-05 00:28:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-04-05 00:28:36 -0400 |
commit | 8e0c0832348c7fda1c85d67697cfe4adf077344c (patch) | |
tree | cef1ffd1be7399d171edafc65f52661e81405068 /drivers | |
parent | 05b1332eafba8eb250da2d2c4c52ed436a127f90 (diff) | |
parent | 13ba0ad4490c3dd08b15c430a7a01c6fb45d5bce (diff) |
Merge tag 'fbdev-main-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux
Pull fbdev changes from Tomi Valkeinen:
"Various fbdev fixes and improvements, but nothing big"
* tag 'fbdev-main-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (38 commits)
fbdev: Make the switch from generic to native driver less alarming
Video: atmel: avoid the id of fix screen info is overwritten
video: imxfb: Add DT default contrast control register property.
video: atmel_lcdfb: ensure the hardware is initialized with the correct mode
fbdev: vesafb: add dev->remove() callback
fbdev: efifb: add dev->remove() callback
video: pxa3xx-gcu: switch to devres functions
video: pxa3xx-gcu: provide an empty .open call
video: pxa3xx-gcu: pass around struct device *
video: pxa3xx-gcu: rename some symbols
sisfb: fix 1280x720 resolution support
video: fbdev: uvesafb: Remove impossible code path in uvesafb_init_info
video: fbdev: uvesafb: Remove redundant NULL check in uvesafb_remove
fbdev: FB_OPENCORES should depend on HAS_DMA
OMAPDSS: convert pixel clock to common videomode style
OMAPDSS: Remove unused get_context_loss_count support
OMAPDSS: use DISPC register to detect context loss
video: da8xx-fb: Use "SIMPLE_DEV_PM_OPS" macro
video: imxfb: Convert to SIMPLE_DEV_PM_OPS
video: imxfb: Resolve mismatch between backlight/contrast
...
Diffstat (limited to 'drivers')
46 files changed, 638 insertions, 822 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index 912759daf562..86f4ead0441d 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c | |||
@@ -37,7 +37,7 @@ struct omap_connector { | |||
37 | void copy_timings_omap_to_drm(struct drm_display_mode *mode, | 37 | void copy_timings_omap_to_drm(struct drm_display_mode *mode, |
38 | struct omap_video_timings *timings) | 38 | struct omap_video_timings *timings) |
39 | { | 39 | { |
40 | mode->clock = timings->pixel_clock; | 40 | mode->clock = timings->pixelclock / 1000; |
41 | 41 | ||
42 | mode->hdisplay = timings->x_res; | 42 | mode->hdisplay = timings->x_res; |
43 | mode->hsync_start = mode->hdisplay + timings->hfp; | 43 | mode->hsync_start = mode->hdisplay + timings->hfp; |
@@ -68,7 +68,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode, | |||
68 | void copy_timings_drm_to_omap(struct omap_video_timings *timings, | 68 | void copy_timings_drm_to_omap(struct omap_video_timings *timings, |
69 | struct drm_display_mode *mode) | 69 | struct drm_display_mode *mode) |
70 | { | 70 | { |
71 | timings->pixel_clock = mode->clock; | 71 | timings->pixelclock = mode->clock * 1000; |
72 | 72 | ||
73 | timings->x_res = mode->hdisplay; | 73 | timings->x_res = mode->hdisplay; |
74 | timings->hfp = mode->hsync_start - mode->hdisplay; | 74 | timings->hfp = mode->hsync_start - mode->hdisplay; |
@@ -220,7 +220,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector, | |||
220 | if (!r) { | 220 | if (!r) { |
221 | /* check if vrefresh is still valid */ | 221 | /* check if vrefresh is still valid */ |
222 | new_mode = drm_mode_duplicate(dev, mode); | 222 | new_mode = drm_mode_duplicate(dev, mode); |
223 | new_mode->clock = timings.pixel_clock; | 223 | new_mode->clock = timings.pixelclock / 1000; |
224 | new_mode->vrefresh = 0; | 224 | new_mode->vrefresh = 0; |
225 | if (mode->vrefresh == drm_mode_vrefresh(new_mode)) | 225 | if (mode->vrefresh == drm_mode_vrefresh(new_mode)) |
226 | ret = MODE_OK; | 226 | ret = MODE_OK; |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index b4b209ce8029..6c793bc683d9 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -967,7 +967,7 @@ config FB_PVR2 | |||
967 | 967 | ||
968 | config FB_OPENCORES | 968 | config FB_OPENCORES |
969 | tristate "OpenCores VGA/LCD core 2.0 framebuffer support" | 969 | tristate "OpenCores VGA/LCD core 2.0 framebuffer support" |
970 | depends on FB | 970 | depends on FB && HAS_DMA |
971 | select FB_CFB_FILLRECT | 971 | select FB_CFB_FILLRECT |
972 | select FB_CFB_COPYAREA | 972 | select FB_CFB_COPYAREA |
973 | select FB_CFB_IMAGEBLIT | 973 | select FB_CFB_IMAGEBLIT |
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index cd961622f9c1..e683b6ef9594 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c | |||
@@ -1190,12 +1190,12 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) | |||
1190 | if (!sinfo->config) | 1190 | if (!sinfo->config) |
1191 | goto free_info; | 1191 | goto free_info; |
1192 | 1192 | ||
1193 | strcpy(info->fix.id, sinfo->pdev->name); | ||
1194 | info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; | 1193 | info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; |
1195 | info->pseudo_palette = sinfo->pseudo_palette; | 1194 | info->pseudo_palette = sinfo->pseudo_palette; |
1196 | info->fbops = &atmel_lcdfb_ops; | 1195 | info->fbops = &atmel_lcdfb_ops; |
1197 | 1196 | ||
1198 | info->fix = atmel_lcdfb_fix; | 1197 | info->fix = atmel_lcdfb_fix; |
1198 | strcpy(info->fix.id, sinfo->pdev->name); | ||
1199 | 1199 | ||
1200 | /* Enable LCDC Clocks */ | 1200 | /* Enable LCDC Clocks */ |
1201 | sinfo->bus_clk = clk_get(dev, "hclk"); | 1201 | sinfo->bus_clk = clk_get(dev, "hclk"); |
@@ -1298,6 +1298,12 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) | |||
1298 | goto unregister_irqs; | 1298 | goto unregister_irqs; |
1299 | } | 1299 | } |
1300 | 1300 | ||
1301 | ret = atmel_lcdfb_set_par(info); | ||
1302 | if (ret < 0) { | ||
1303 | dev_err(dev, "set par failed: %d\n", ret); | ||
1304 | goto unregister_irqs; | ||
1305 | } | ||
1306 | |||
1301 | dev_set_drvdata(dev, info); | 1307 | dev_set_drvdata(dev, info); |
1302 | 1308 | ||
1303 | /* | 1309 | /* |
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c index 28fafbf864a5..c3d0074a32db 100644 --- a/drivers/video/aty/atyfb_base.c +++ b/drivers/video/aty/atyfb_base.c | |||
@@ -862,8 +862,8 @@ static int aty_var_to_crtc(const struct fb_info *info, | |||
862 | h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; | 862 | h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; |
863 | v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; | 863 | v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; |
864 | 864 | ||
865 | if ((xres > 1600) || (yres > 1200)) { | 865 | if ((xres > 1920) || (yres > 1200)) { |
866 | FAIL("MACH64 chips are designed for max 1600x1200\n" | 866 | FAIL("MACH64 chips are designed for max 1920x1200\n" |
867 | "select another resolution."); | 867 | "select another resolution."); |
868 | } | 868 | } |
869 | h_sync_strt = h_disp + var->right_margin; | 869 | h_sync_strt = h_disp + var->right_margin; |
@@ -2653,7 +2653,8 @@ static int aty_init(struct fb_info *info) | |||
2653 | FBINFO_HWACCEL_IMAGEBLIT | | 2653 | FBINFO_HWACCEL_IMAGEBLIT | |
2654 | FBINFO_HWACCEL_FILLRECT | | 2654 | FBINFO_HWACCEL_FILLRECT | |
2655 | FBINFO_HWACCEL_COPYAREA | | 2655 | FBINFO_HWACCEL_COPYAREA | |
2656 | FBINFO_HWACCEL_YPAN; | 2656 | FBINFO_HWACCEL_YPAN | |
2657 | FBINFO_READS_FAST; | ||
2657 | 2658 | ||
2658 | #ifdef CONFIG_PMAC_BACKLIGHT | 2659 | #ifdef CONFIG_PMAC_BACKLIGHT |
2659 | if (M64_HAS(G3_PB_1_1) && of_machine_is_compatible("PowerBook1,1")) { | 2660 | if (M64_HAS(G3_PB_1_1) && of_machine_is_compatible("PowerBook1,1")) { |
diff --git a/drivers/video/aty/mach64_accel.c b/drivers/video/aty/mach64_accel.c index e45833ce975b..182bd680141f 100644 --- a/drivers/video/aty/mach64_accel.c +++ b/drivers/video/aty/mach64_accel.c | |||
@@ -4,6 +4,7 @@ | |||
4 | */ | 4 | */ |
5 | 5 | ||
6 | #include <linux/delay.h> | 6 | #include <linux/delay.h> |
7 | #include <asm/unaligned.h> | ||
7 | #include <linux/fb.h> | 8 | #include <linux/fb.h> |
8 | #include <video/mach64.h> | 9 | #include <video/mach64.h> |
9 | #include "atyfb.h" | 10 | #include "atyfb.h" |
@@ -419,7 +420,7 @@ void atyfb_imageblit(struct fb_info *info, const struct fb_image *image) | |||
419 | u32 *pbitmap, dwords = (src_bytes + 3) / 4; | 420 | u32 *pbitmap, dwords = (src_bytes + 3) / 4; |
420 | for (pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) { | 421 | for (pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) { |
421 | wait_for_fifo(1, par); | 422 | wait_for_fifo(1, par); |
422 | aty_st_le32(HOST_DATA0, le32_to_cpup(pbitmap), par); | 423 | aty_st_le32(HOST_DATA0, get_unaligned_le32(pbitmap), par); |
423 | } | 424 | } |
424 | } | 425 | } |
425 | 426 | ||
diff --git a/drivers/video/aty/mach64_cursor.c b/drivers/video/aty/mach64_cursor.c index 95ec042ddbf8..0fe02e22d9a4 100644 --- a/drivers/video/aty/mach64_cursor.c +++ b/drivers/video/aty/mach64_cursor.c | |||
@@ -5,6 +5,7 @@ | |||
5 | #include <linux/fb.h> | 5 | #include <linux/fb.h> |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/string.h> | 7 | #include <linux/string.h> |
8 | #include "../fb_draw.h" | ||
8 | 9 | ||
9 | #include <asm/io.h> | 10 | #include <asm/io.h> |
10 | 11 | ||
@@ -157,24 +158,33 @@ static int atyfb_cursor(struct fb_info *info, struct fb_cursor *cursor) | |||
157 | 158 | ||
158 | for (i = 0; i < height; i++) { | 159 | for (i = 0; i < height; i++) { |
159 | for (j = 0; j < width; j++) { | 160 | for (j = 0; j < width; j++) { |
161 | u16 l = 0xaaaa; | ||
160 | b = *src++; | 162 | b = *src++; |
161 | m = *msk++; | 163 | m = *msk++; |
162 | switch (cursor->rop) { | 164 | switch (cursor->rop) { |
163 | case ROP_XOR: | 165 | case ROP_XOR: |
164 | // Upper 4 bits of mask data | 166 | // Upper 4 bits of mask data |
165 | fb_writeb(cursor_bits_lookup[(b ^ m) >> 4], dst++); | 167 | l = cursor_bits_lookup[(b ^ m) >> 4] | |
166 | // Lower 4 bits of mask | 168 | // Lower 4 bits of mask |
167 | fb_writeb(cursor_bits_lookup[(b ^ m) & 0x0f], | 169 | (cursor_bits_lookup[(b ^ m) & 0x0f] << 8); |
168 | dst++); | ||
169 | break; | 170 | break; |
170 | case ROP_COPY: | 171 | case ROP_COPY: |
171 | // Upper 4 bits of mask data | 172 | // Upper 4 bits of mask data |
172 | fb_writeb(cursor_bits_lookup[(b & m) >> 4], dst++); | 173 | l = cursor_bits_lookup[(b & m) >> 4] | |
173 | // Lower 4 bits of mask | 174 | // Lower 4 bits of mask |
174 | fb_writeb(cursor_bits_lookup[(b & m) & 0x0f], | 175 | (cursor_bits_lookup[(b & m) & 0x0f] << 8); |
175 | dst++); | ||
176 | break; | 176 | break; |
177 | } | 177 | } |
178 | /* | ||
179 | * If cursor size is not a multiple of 8 characters | ||
180 | * we must pad it with transparent pattern (0xaaaa). | ||
181 | */ | ||
182 | if ((j + 1) * 8 > cursor->image.width) { | ||
183 | l = comp(l, 0xaaaa, | ||
184 | (1 << ((cursor->image.width & 7) * 2)) - 1); | ||
185 | } | ||
186 | fb_writeb(l & 0xff, dst++); | ||
187 | fb_writeb(l >> 8, dst++); | ||
178 | } | 188 | } |
179 | dst += offset; | 189 | dst += offset; |
180 | } | 190 | } |
diff --git a/drivers/video/cfbcopyarea.c b/drivers/video/cfbcopyarea.c index bb5a96b1645d..bcb57235fcc7 100644 --- a/drivers/video/cfbcopyarea.c +++ b/drivers/video/cfbcopyarea.c | |||
@@ -43,13 +43,22 @@ | |||
43 | */ | 43 | */ |
44 | 44 | ||
45 | static void | 45 | static void |
46 | bitcpy(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | 46 | bitcpy(struct fb_info *p, unsigned long __iomem *dst, unsigned dst_idx, |
47 | const unsigned long __iomem *src, int src_idx, int bits, | 47 | const unsigned long __iomem *src, unsigned src_idx, int bits, |
48 | unsigned n, u32 bswapmask) | 48 | unsigned n, u32 bswapmask) |
49 | { | 49 | { |
50 | unsigned long first, last; | 50 | unsigned long first, last; |
51 | int const shift = dst_idx-src_idx; | 51 | int const shift = dst_idx-src_idx; |
52 | int left, right; | 52 | |
53 | #if 0 | ||
54 | /* | ||
55 | * If you suspect bug in this function, compare it with this simple | ||
56 | * memmove implementation. | ||
57 | */ | ||
58 | fb_memmove((char *)dst + ((dst_idx & (bits - 1))) / 8, | ||
59 | (char *)src + ((src_idx & (bits - 1))) / 8, n / 8); | ||
60 | return; | ||
61 | #endif | ||
53 | 62 | ||
54 | first = fb_shifted_pixels_mask_long(p, dst_idx, bswapmask); | 63 | first = fb_shifted_pixels_mask_long(p, dst_idx, bswapmask); |
55 | last = ~fb_shifted_pixels_mask_long(p, (dst_idx+n) % bits, bswapmask); | 64 | last = ~fb_shifted_pixels_mask_long(p, (dst_idx+n) % bits, bswapmask); |
@@ -98,9 +107,8 @@ bitcpy(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
98 | unsigned long d0, d1; | 107 | unsigned long d0, d1; |
99 | int m; | 108 | int m; |
100 | 109 | ||
101 | right = shift & (bits - 1); | 110 | int const left = shift & (bits - 1); |
102 | left = -shift & (bits - 1); | 111 | int const right = -shift & (bits - 1); |
103 | bswapmask &= shift; | ||
104 | 112 | ||
105 | if (dst_idx+n <= bits) { | 113 | if (dst_idx+n <= bits) { |
106 | // Single destination word | 114 | // Single destination word |
@@ -110,15 +118,15 @@ bitcpy(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
110 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 118 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
111 | if (shift > 0) { | 119 | if (shift > 0) { |
112 | // Single source word | 120 | // Single source word |
113 | d0 >>= right; | 121 | d0 <<= left; |
114 | } else if (src_idx+n <= bits) { | 122 | } else if (src_idx+n <= bits) { |
115 | // Single source word | 123 | // Single source word |
116 | d0 <<= left; | 124 | d0 >>= right; |
117 | } else { | 125 | } else { |
118 | // 2 source words | 126 | // 2 source words |
119 | d1 = FB_READL(src + 1); | 127 | d1 = FB_READL(src + 1); |
120 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 128 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
121 | d0 = d0<<left | d1>>right; | 129 | d0 = d0 >> right | d1 << left; |
122 | } | 130 | } |
123 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 131 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
124 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); | 132 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); |
@@ -135,60 +143,59 @@ bitcpy(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
135 | if (shift > 0) { | 143 | if (shift > 0) { |
136 | // Single source word | 144 | // Single source word |
137 | d1 = d0; | 145 | d1 = d0; |
138 | d0 >>= right; | 146 | d0 <<= left; |
139 | dst++; | ||
140 | n -= bits - dst_idx; | 147 | n -= bits - dst_idx; |
141 | } else { | 148 | } else { |
142 | // 2 source words | 149 | // 2 source words |
143 | d1 = FB_READL(src++); | 150 | d1 = FB_READL(src++); |
144 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 151 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
145 | 152 | ||
146 | d0 = d0<<left | d1>>right; | 153 | d0 = d0 >> right | d1 << left; |
147 | dst++; | ||
148 | n -= bits - dst_idx; | 154 | n -= bits - dst_idx; |
149 | } | 155 | } |
150 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 156 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
151 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); | 157 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); |
152 | d0 = d1; | 158 | d0 = d1; |
159 | dst++; | ||
153 | 160 | ||
154 | // Main chunk | 161 | // Main chunk |
155 | m = n % bits; | 162 | m = n % bits; |
156 | n /= bits; | 163 | n /= bits; |
157 | while ((n >= 4) && !bswapmask) { | 164 | while ((n >= 4) && !bswapmask) { |
158 | d1 = FB_READL(src++); | 165 | d1 = FB_READL(src++); |
159 | FB_WRITEL(d0 << left | d1 >> right, dst++); | 166 | FB_WRITEL(d0 >> right | d1 << left, dst++); |
160 | d0 = d1; | 167 | d0 = d1; |
161 | d1 = FB_READL(src++); | 168 | d1 = FB_READL(src++); |
162 | FB_WRITEL(d0 << left | d1 >> right, dst++); | 169 | FB_WRITEL(d0 >> right | d1 << left, dst++); |
163 | d0 = d1; | 170 | d0 = d1; |
164 | d1 = FB_READL(src++); | 171 | d1 = FB_READL(src++); |
165 | FB_WRITEL(d0 << left | d1 >> right, dst++); | 172 | FB_WRITEL(d0 >> right | d1 << left, dst++); |
166 | d0 = d1; | 173 | d0 = d1; |
167 | d1 = FB_READL(src++); | 174 | d1 = FB_READL(src++); |
168 | FB_WRITEL(d0 << left | d1 >> right, dst++); | 175 | FB_WRITEL(d0 >> right | d1 << left, dst++); |
169 | d0 = d1; | 176 | d0 = d1; |
170 | n -= 4; | 177 | n -= 4; |
171 | } | 178 | } |
172 | while (n--) { | 179 | while (n--) { |
173 | d1 = FB_READL(src++); | 180 | d1 = FB_READL(src++); |
174 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 181 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
175 | d0 = d0 << left | d1 >> right; | 182 | d0 = d0 >> right | d1 << left; |
176 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 183 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
177 | FB_WRITEL(d0, dst++); | 184 | FB_WRITEL(d0, dst++); |
178 | d0 = d1; | 185 | d0 = d1; |
179 | } | 186 | } |
180 | 187 | ||
181 | // Trailing bits | 188 | // Trailing bits |
182 | if (last) { | 189 | if (m) { |
183 | if (m <= right) { | 190 | if (m <= bits - right) { |
184 | // Single source word | 191 | // Single source word |
185 | d0 <<= left; | 192 | d0 >>= right; |
186 | } else { | 193 | } else { |
187 | // 2 source words | 194 | // 2 source words |
188 | d1 = FB_READL(src); | 195 | d1 = FB_READL(src); |
189 | d1 = fb_rev_pixels_in_long(d1, | 196 | d1 = fb_rev_pixels_in_long(d1, |
190 | bswapmask); | 197 | bswapmask); |
191 | d0 = d0<<left | d1>>right; | 198 | d0 = d0 >> right | d1 << left; |
192 | } | 199 | } |
193 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 200 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
194 | FB_WRITEL(comp(d0, FB_READL(dst), last), dst); | 201 | FB_WRITEL(comp(d0, FB_READL(dst), last), dst); |
@@ -202,43 +209,46 @@ bitcpy(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
202 | */ | 209 | */ |
203 | 210 | ||
204 | static void | 211 | static void |
205 | bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | 212 | bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, unsigned dst_idx, |
206 | const unsigned long __iomem *src, int src_idx, int bits, | 213 | const unsigned long __iomem *src, unsigned src_idx, int bits, |
207 | unsigned n, u32 bswapmask) | 214 | unsigned n, u32 bswapmask) |
208 | { | 215 | { |
209 | unsigned long first, last; | 216 | unsigned long first, last; |
210 | int shift; | 217 | int shift; |
211 | 218 | ||
212 | dst += (n-1)/bits; | 219 | #if 0 |
213 | src += (n-1)/bits; | 220 | /* |
214 | if ((n-1) % bits) { | 221 | * If you suspect bug in this function, compare it with this simple |
215 | dst_idx += (n-1) % bits; | 222 | * memmove implementation. |
216 | dst += dst_idx >> (ffs(bits) - 1); | 223 | */ |
217 | dst_idx &= bits - 1; | 224 | fb_memmove((char *)dst + ((dst_idx & (bits - 1))) / 8, |
218 | src_idx += (n-1) % bits; | 225 | (char *)src + ((src_idx & (bits - 1))) / 8, n / 8); |
219 | src += src_idx >> (ffs(bits) - 1); | 226 | return; |
220 | src_idx &= bits - 1; | 227 | #endif |
221 | } | 228 | |
229 | dst += (dst_idx + n - 1) / bits; | ||
230 | src += (src_idx + n - 1) / bits; | ||
231 | dst_idx = (dst_idx + n - 1) % bits; | ||
232 | src_idx = (src_idx + n - 1) % bits; | ||
222 | 233 | ||
223 | shift = dst_idx-src_idx; | 234 | shift = dst_idx-src_idx; |
224 | 235 | ||
225 | first = fb_shifted_pixels_mask_long(p, bits - 1 - dst_idx, bswapmask); | 236 | first = ~fb_shifted_pixels_mask_long(p, (dst_idx + 1) % bits, bswapmask); |
226 | last = ~fb_shifted_pixels_mask_long(p, bits - 1 - ((dst_idx-n) % bits), | 237 | last = fb_shifted_pixels_mask_long(p, (bits + dst_idx + 1 - n) % bits, bswapmask); |
227 | bswapmask); | ||
228 | 238 | ||
229 | if (!shift) { | 239 | if (!shift) { |
230 | // Same alignment for source and dest | 240 | // Same alignment for source and dest |
231 | 241 | ||
232 | if ((unsigned long)dst_idx+1 >= n) { | 242 | if ((unsigned long)dst_idx+1 >= n) { |
233 | // Single word | 243 | // Single word |
234 | if (last) | 244 | if (first) |
235 | first &= last; | 245 | last &= first; |
236 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), first), dst); | 246 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), last), dst); |
237 | } else { | 247 | } else { |
238 | // Multiple destination words | 248 | // Multiple destination words |
239 | 249 | ||
240 | // Leading bits | 250 | // Leading bits |
241 | if (first != ~0UL) { | 251 | if (first) { |
242 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), first), dst); | 252 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), first), dst); |
243 | dst--; | 253 | dst--; |
244 | src--; | 254 | src--; |
@@ -262,7 +272,7 @@ bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
262 | FB_WRITEL(FB_READL(src--), dst--); | 272 | FB_WRITEL(FB_READL(src--), dst--); |
263 | 273 | ||
264 | // Trailing bits | 274 | // Trailing bits |
265 | if (last) | 275 | if (last != -1UL) |
266 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), last), dst); | 276 | FB_WRITEL( comp( FB_READL(src), FB_READL(dst), last), dst); |
267 | } | 277 | } |
268 | } else { | 278 | } else { |
@@ -270,29 +280,28 @@ bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
270 | unsigned long d0, d1; | 280 | unsigned long d0, d1; |
271 | int m; | 281 | int m; |
272 | 282 | ||
273 | int const left = -shift & (bits-1); | 283 | int const left = shift & (bits-1); |
274 | int const right = shift & (bits-1); | 284 | int const right = -shift & (bits-1); |
275 | bswapmask &= shift; | ||
276 | 285 | ||
277 | if ((unsigned long)dst_idx+1 >= n) { | 286 | if ((unsigned long)dst_idx+1 >= n) { |
278 | // Single destination word | 287 | // Single destination word |
279 | if (last) | 288 | if (first) |
280 | first &= last; | 289 | last &= first; |
281 | d0 = FB_READL(src); | 290 | d0 = FB_READL(src); |
282 | if (shift < 0) { | 291 | if (shift < 0) { |
283 | // Single source word | 292 | // Single source word |
284 | d0 <<= left; | 293 | d0 >>= right; |
285 | } else if (1+(unsigned long)src_idx >= n) { | 294 | } else if (1+(unsigned long)src_idx >= n) { |
286 | // Single source word | 295 | // Single source word |
287 | d0 >>= right; | 296 | d0 <<= left; |
288 | } else { | 297 | } else { |
289 | // 2 source words | 298 | // 2 source words |
290 | d1 = FB_READL(src - 1); | 299 | d1 = FB_READL(src - 1); |
291 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 300 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
292 | d0 = d0>>right | d1<<left; | 301 | d0 = d0 << left | d1 >> right; |
293 | } | 302 | } |
294 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 303 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
295 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); | 304 | FB_WRITEL(comp(d0, FB_READL(dst), last), dst); |
296 | } else { | 305 | } else { |
297 | // Multiple destination words | 306 | // Multiple destination words |
298 | /** We must always remember the last value read, because in case | 307 | /** We must always remember the last value read, because in case |
@@ -307,12 +316,12 @@ bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
307 | if (shift < 0) { | 316 | if (shift < 0) { |
308 | // Single source word | 317 | // Single source word |
309 | d1 = d0; | 318 | d1 = d0; |
310 | d0 <<= left; | 319 | d0 >>= right; |
311 | } else { | 320 | } else { |
312 | // 2 source words | 321 | // 2 source words |
313 | d1 = FB_READL(src--); | 322 | d1 = FB_READL(src--); |
314 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 323 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
315 | d0 = d0>>right | d1<<left; | 324 | d0 = d0 << left | d1 >> right; |
316 | } | 325 | } |
317 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 326 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
318 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); | 327 | FB_WRITEL(comp(d0, FB_READL(dst), first), dst); |
@@ -325,39 +334,39 @@ bitcpy_rev(struct fb_info *p, unsigned long __iomem *dst, int dst_idx, | |||
325 | n /= bits; | 334 | n /= bits; |
326 | while ((n >= 4) && !bswapmask) { | 335 | while ((n >= 4) && !bswapmask) { |
327 | d1 = FB_READL(src--); | 336 | d1 = FB_READL(src--); |
328 | FB_WRITEL(d0 >> right | d1 << left, dst--); | 337 | FB_WRITEL(d0 << left | d1 >> right, dst--); |
329 | d0 = d1; | 338 | d0 = d1; |
330 | d1 = FB_READL(src--); | 339 | d1 = FB_READL(src--); |
331 | FB_WRITEL(d0 >> right | d1 << left, dst--); | 340 | FB_WRITEL(d0 << left | d1 >> right, dst--); |
332 | d0 = d1; | 341 | d0 = d1; |
333 | d1 = FB_READL(src--); | 342 | d1 = FB_READL(src--); |
334 | FB_WRITEL(d0 >> right | d1 << left, dst--); | 343 | FB_WRITEL(d0 << left | d1 >> right, dst--); |
335 | d0 = d1; | 344 | d0 = d1; |
336 | d1 = FB_READL(src--); | 345 | d1 = FB_READL(src--); |
337 | FB_WRITEL(d0 >> right | d1 << left, dst--); | 346 | FB_WRITEL(d0 << left | d1 >> right, dst--); |
338 | d0 = d1; | 347 | d0 = d1; |
339 | n -= 4; | 348 | n -= 4; |
340 | } | 349 | } |
341 | while (n--) { | 350 | while (n--) { |
342 | d1 = FB_READL(src--); | 351 | d1 = FB_READL(src--); |
343 | d1 = fb_rev_pixels_in_long(d1, bswapmask); | 352 | d1 = fb_rev_pixels_in_long(d1, bswapmask); |
344 | d0 = d0 >> right | d1 << left; | 353 | d0 = d0 << left | d1 >> right; |
345 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 354 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
346 | FB_WRITEL(d0, dst--); | 355 | FB_WRITEL(d0, dst--); |
347 | d0 = d1; | 356 | d0 = d1; |
348 | } | 357 | } |
349 | 358 | ||
350 | // Trailing bits | 359 | // Trailing bits |
351 | if (last) { | 360 | if (m) { |
352 | if (m <= left) { | 361 | if (m <= bits - left) { |
353 | // Single source word | 362 | // Single source word |
354 | d0 >>= right; | 363 | d0 <<= left; |
355 | } else { | 364 | } else { |
356 | // 2 source words | 365 | // 2 source words |
357 | d1 = FB_READL(src); | 366 | d1 = FB_READL(src); |
358 | d1 = fb_rev_pixels_in_long(d1, | 367 | d1 = fb_rev_pixels_in_long(d1, |
359 | bswapmask); | 368 | bswapmask); |
360 | d0 = d0>>right | d1<<left; | 369 | d0 = d0 << left | d1 >> right; |
361 | } | 370 | } |
362 | d0 = fb_rev_pixels_in_long(d0, bswapmask); | 371 | d0 = fb_rev_pixels_in_long(d0, bswapmask); |
363 | FB_WRITEL(comp(d0, FB_READL(dst), last), dst); | 372 | FB_WRITEL(comp(d0, FB_READL(dst), last), dst); |
@@ -371,9 +380,9 @@ void cfb_copyarea(struct fb_info *p, const struct fb_copyarea *area) | |||
371 | u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy; | 380 | u32 dx = area->dx, dy = area->dy, sx = area->sx, sy = area->sy; |
372 | u32 height = area->height, width = area->width; | 381 | u32 height = area->height, width = area->width; |
373 | unsigned long const bits_per_line = p->fix.line_length*8u; | 382 | unsigned long const bits_per_line = p->fix.line_length*8u; |
374 | unsigned long __iomem *dst = NULL, *src = NULL; | 383 | unsigned long __iomem *base = NULL; |
375 | int bits = BITS_PER_LONG, bytes = bits >> 3; | 384 | int bits = BITS_PER_LONG, bytes = bits >> 3; |
376 | int dst_idx = 0, src_idx = 0, rev_copy = 0; | 385 | unsigned dst_idx = 0, src_idx = 0, rev_copy = 0; |
377 | u32 bswapmask = fb_compute_bswapmask(p); | 386 | u32 bswapmask = fb_compute_bswapmask(p); |
378 | 387 | ||
379 | if (p->state != FBINFO_STATE_RUNNING) | 388 | if (p->state != FBINFO_STATE_RUNNING) |
@@ -389,7 +398,7 @@ void cfb_copyarea(struct fb_info *p, const struct fb_copyarea *area) | |||
389 | 398 | ||
390 | // split the base of the framebuffer into a long-aligned address and the | 399 | // split the base of the framebuffer into a long-aligned address and the |
391 | // index of the first bit | 400 | // index of the first bit |
392 | dst = src = (unsigned long __iomem *)((unsigned long)p->screen_base & ~(bytes-1)); | 401 | base = (unsigned long __iomem *)((unsigned long)p->screen_base & ~(bytes-1)); |
393 | dst_idx = src_idx = 8*((unsigned long)p->screen_base & (bytes-1)); | 402 | dst_idx = src_idx = 8*((unsigned long)p->screen_base & (bytes-1)); |
394 | // add offset of source and target area | 403 | // add offset of source and target area |
395 | dst_idx += dy*bits_per_line + dx*p->var.bits_per_pixel; | 404 | dst_idx += dy*bits_per_line + dx*p->var.bits_per_pixel; |
@@ -402,20 +411,14 @@ void cfb_copyarea(struct fb_info *p, const struct fb_copyarea *area) | |||
402 | while (height--) { | 411 | while (height--) { |
403 | dst_idx -= bits_per_line; | 412 | dst_idx -= bits_per_line; |
404 | src_idx -= bits_per_line; | 413 | src_idx -= bits_per_line; |
405 | dst += dst_idx >> (ffs(bits) - 1); | 414 | bitcpy_rev(p, base + (dst_idx / bits), dst_idx % bits, |
406 | dst_idx &= (bytes - 1); | 415 | base + (src_idx / bits), src_idx % bits, bits, |
407 | src += src_idx >> (ffs(bits) - 1); | ||
408 | src_idx &= (bytes - 1); | ||
409 | bitcpy_rev(p, dst, dst_idx, src, src_idx, bits, | ||
410 | width*p->var.bits_per_pixel, bswapmask); | 416 | width*p->var.bits_per_pixel, bswapmask); |
411 | } | 417 | } |
412 | } else { | 418 | } else { |
413 | while (height--) { | 419 | while (height--) { |
414 | dst += dst_idx >> (ffs(bits) - 1); | 420 | bitcpy(p, base + (dst_idx / bits), dst_idx % bits, |
415 | dst_idx &= (bytes - 1); | 421 | base + (src_idx / bits), src_idx % bits, bits, |
416 | src += src_idx >> (ffs(bits) - 1); | ||
417 | src_idx &= (bytes - 1); | ||
418 | bitcpy(p, dst, dst_idx, src, src_idx, bits, | ||
419 | width*p->var.bits_per_pixel, bswapmask); | 422 | width*p->var.bits_per_pixel, bswapmask); |
420 | dst_idx += bits_per_line; | 423 | dst_idx += bits_per_line; |
421 | src_idx += bits_per_line; | 424 | src_idx += bits_per_line; |
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 4e39291ac8b4..f447734b09b4 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c | |||
@@ -759,7 +759,7 @@ static int con2fb_release_oldinfo(struct vc_data *vc, struct fb_info *oldinfo, | |||
759 | newinfo in an undefined state. Thus, a call to | 759 | newinfo in an undefined state. Thus, a call to |
760 | fb_set_par() may be needed for the newinfo. | 760 | fb_set_par() may be needed for the newinfo. |
761 | */ | 761 | */ |
762 | if (newinfo->fbops->fb_set_par) { | 762 | if (newinfo && newinfo->fbops->fb_set_par) { |
763 | ret = newinfo->fbops->fb_set_par(newinfo); | 763 | ret = newinfo->fbops->fb_set_par(newinfo); |
764 | 764 | ||
765 | if (ret) | 765 | if (ret) |
@@ -3028,8 +3028,31 @@ static int fbcon_fb_unbind(int idx) | |||
3028 | if (con2fb_map[i] == idx) | 3028 | if (con2fb_map[i] == idx) |
3029 | set_con2fb_map(i, new_idx, 0); | 3029 | set_con2fb_map(i, new_idx, 0); |
3030 | } | 3030 | } |
3031 | } else | 3031 | } else { |
3032 | struct fb_info *info = registered_fb[idx]; | ||
3033 | |||
3034 | /* This is sort of like set_con2fb_map, except it maps | ||
3035 | * the consoles to no device and then releases the | ||
3036 | * oldinfo to free memory and cancel the cursor blink | ||
3037 | * timer. I can imagine this just becoming part of | ||
3038 | * set_con2fb_map where new_idx is -1 | ||
3039 | */ | ||
3040 | for (i = first_fb_vc; i <= last_fb_vc; i++) { | ||
3041 | if (con2fb_map[i] == idx) { | ||
3042 | con2fb_map[i] = -1; | ||
3043 | if (!search_fb_in_map(idx)) { | ||
3044 | ret = con2fb_release_oldinfo(vc_cons[i].d, | ||
3045 | info, NULL, i, | ||
3046 | idx, 0); | ||
3047 | if (ret) { | ||
3048 | con2fb_map[i] = idx; | ||
3049 | return ret; | ||
3050 | } | ||
3051 | } | ||
3052 | } | ||
3053 | } | ||
3032 | ret = fbcon_unbind(); | 3054 | ret = fbcon_unbind(); |
3055 | } | ||
3033 | 3056 | ||
3034 | return ret; | 3057 | return ret; |
3035 | } | 3058 | } |
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index a1d74dd11988..0c0ba920ea48 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c | |||
@@ -1546,7 +1546,7 @@ err_pm_runtime_disable: | |||
1546 | return ret; | 1546 | return ret; |
1547 | } | 1547 | } |
1548 | 1548 | ||
1549 | #ifdef CONFIG_PM | 1549 | #ifdef CONFIG_PM_SLEEP |
1550 | static struct lcdc_context { | 1550 | static struct lcdc_context { |
1551 | u32 clk_enable; | 1551 | u32 clk_enable; |
1552 | u32 ctrl; | 1552 | u32 ctrl; |
@@ -1610,9 +1610,9 @@ static void lcd_context_restore(void) | |||
1610 | return; | 1610 | return; |
1611 | } | 1611 | } |
1612 | 1612 | ||
1613 | static int fb_suspend(struct platform_device *dev, pm_message_t state) | 1613 | static int fb_suspend(struct device *dev) |
1614 | { | 1614 | { |
1615 | struct fb_info *info = platform_get_drvdata(dev); | 1615 | struct fb_info *info = dev_get_drvdata(dev); |
1616 | struct da8xx_fb_par *par = info->par; | 1616 | struct da8xx_fb_par *par = info->par; |
1617 | 1617 | ||
1618 | console_lock(); | 1618 | console_lock(); |
@@ -1622,18 +1622,18 @@ static int fb_suspend(struct platform_device *dev, pm_message_t state) | |||
1622 | fb_set_suspend(info, 1); | 1622 | fb_set_suspend(info, 1); |
1623 | lcd_disable_raster(DA8XX_FRAME_WAIT); | 1623 | lcd_disable_raster(DA8XX_FRAME_WAIT); |
1624 | lcd_context_save(); | 1624 | lcd_context_save(); |
1625 | pm_runtime_put_sync(&dev->dev); | 1625 | pm_runtime_put_sync(dev); |
1626 | console_unlock(); | 1626 | console_unlock(); |
1627 | 1627 | ||
1628 | return 0; | 1628 | return 0; |
1629 | } | 1629 | } |
1630 | static int fb_resume(struct platform_device *dev) | 1630 | static int fb_resume(struct device *dev) |
1631 | { | 1631 | { |
1632 | struct fb_info *info = platform_get_drvdata(dev); | 1632 | struct fb_info *info = dev_get_drvdata(dev); |
1633 | struct da8xx_fb_par *par = info->par; | 1633 | struct da8xx_fb_par *par = info->par; |
1634 | 1634 | ||
1635 | console_lock(); | 1635 | console_lock(); |
1636 | pm_runtime_get_sync(&dev->dev); | 1636 | pm_runtime_get_sync(dev); |
1637 | lcd_context_restore(); | 1637 | lcd_context_restore(); |
1638 | if (par->blank == FB_BLANK_UNBLANK) { | 1638 | if (par->blank == FB_BLANK_UNBLANK) { |
1639 | lcd_enable_raster(); | 1639 | lcd_enable_raster(); |
@@ -1647,19 +1647,17 @@ static int fb_resume(struct platform_device *dev) | |||
1647 | 1647 | ||
1648 | return 0; | 1648 | return 0; |
1649 | } | 1649 | } |
1650 | #else | ||
1651 | #define fb_suspend NULL | ||
1652 | #define fb_resume NULL | ||
1653 | #endif | 1650 | #endif |
1654 | 1651 | ||
1652 | static SIMPLE_DEV_PM_OPS(fb_pm_ops, fb_suspend, fb_resume); | ||
1653 | |||
1655 | static struct platform_driver da8xx_fb_driver = { | 1654 | static struct platform_driver da8xx_fb_driver = { |
1656 | .probe = fb_probe, | 1655 | .probe = fb_probe, |
1657 | .remove = fb_remove, | 1656 | .remove = fb_remove, |
1658 | .suspend = fb_suspend, | ||
1659 | .resume = fb_resume, | ||
1660 | .driver = { | 1657 | .driver = { |
1661 | .name = DRIVER_NAME, | 1658 | .name = DRIVER_NAME, |
1662 | .owner = THIS_MODULE, | 1659 | .owner = THIS_MODULE, |
1660 | .pm = &fb_pm_ops, | ||
1663 | }, | 1661 | }, |
1664 | }; | 1662 | }; |
1665 | module_platform_driver(da8xx_fb_driver); | 1663 | module_platform_driver(da8xx_fb_driver); |
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c index cd7c0df9f24b..ae9618ff6735 100644 --- a/drivers/video/efifb.c +++ b/drivers/video/efifb.c | |||
@@ -73,7 +73,6 @@ static void efifb_destroy(struct fb_info *info) | |||
73 | release_mem_region(info->apertures->ranges[0].base, | 73 | release_mem_region(info->apertures->ranges[0].base, |
74 | info->apertures->ranges[0].size); | 74 | info->apertures->ranges[0].size); |
75 | fb_dealloc_cmap(&info->cmap); | 75 | fb_dealloc_cmap(&info->cmap); |
76 | framebuffer_release(info); | ||
77 | } | 76 | } |
78 | 77 | ||
79 | static struct fb_ops efifb_ops = { | 78 | static struct fb_ops efifb_ops = { |
@@ -244,6 +243,7 @@ static int efifb_probe(struct platform_device *dev) | |||
244 | err = -ENOMEM; | 243 | err = -ENOMEM; |
245 | goto err_release_mem; | 244 | goto err_release_mem; |
246 | } | 245 | } |
246 | platform_set_drvdata(dev, info); | ||
247 | info->pseudo_palette = info->par; | 247 | info->pseudo_palette = info->par; |
248 | info->par = NULL; | 248 | info->par = NULL; |
249 | 249 | ||
@@ -337,12 +337,23 @@ err_release_mem: | |||
337 | return err; | 337 | return err; |
338 | } | 338 | } |
339 | 339 | ||
340 | static int efifb_remove(struct platform_device *pdev) | ||
341 | { | ||
342 | struct fb_info *info = platform_get_drvdata(pdev); | ||
343 | |||
344 | unregister_framebuffer(info); | ||
345 | framebuffer_release(info); | ||
346 | |||
347 | return 0; | ||
348 | } | ||
349 | |||
340 | static struct platform_driver efifb_driver = { | 350 | static struct platform_driver efifb_driver = { |
341 | .driver = { | 351 | .driver = { |
342 | .name = "efi-framebuffer", | 352 | .name = "efi-framebuffer", |
343 | .owner = THIS_MODULE, | 353 | .owner = THIS_MODULE, |
344 | }, | 354 | }, |
345 | .probe = efifb_probe, | 355 | .probe = efifb_probe, |
356 | .remove = efifb_remove, | ||
346 | }; | 357 | }; |
347 | 358 | ||
348 | module_platform_driver(efifb_driver); | 359 | module_platform_driver(efifb_driver); |
diff --git a/drivers/video/exynos/Kconfig b/drivers/video/exynos/Kconfig index 75c8a8e7efc0..eb6f2b059821 100644 --- a/drivers/video/exynos/Kconfig +++ b/drivers/video/exynos/Kconfig | |||
@@ -31,7 +31,7 @@ config EXYNOS_LCD_S6E8AX0 | |||
31 | 31 | ||
32 | config EXYNOS_DP | 32 | config EXYNOS_DP |
33 | bool "EXYNOS DP driver support" | 33 | bool "EXYNOS DP driver support" |
34 | depends on OF && ARCH_EXYNOS | 34 | depends on ARCH_EXYNOS |
35 | default n | 35 | default n |
36 | help | 36 | help |
37 | This enables support for DP device. | 37 | This enables support for DP device. |
diff --git a/drivers/video/exynos/s6e8ax0.c b/drivers/video/exynos/s6e8ax0.c index ca2602413aa4..29e70ed3f154 100644 --- a/drivers/video/exynos/s6e8ax0.c +++ b/drivers/video/exynos/s6e8ax0.c | |||
@@ -794,19 +794,18 @@ static int s6e8ax0_probe(struct mipi_dsim_lcd_device *dsim_dev) | |||
794 | return ret; | 794 | return ret; |
795 | } | 795 | } |
796 | 796 | ||
797 | lcd->ld = lcd_device_register("s6e8ax0", lcd->dev, lcd, | 797 | lcd->ld = devm_lcd_device_register(lcd->dev, "s6e8ax0", lcd->dev, lcd, |
798 | &s6e8ax0_lcd_ops); | 798 | &s6e8ax0_lcd_ops); |
799 | if (IS_ERR(lcd->ld)) { | 799 | if (IS_ERR(lcd->ld)) { |
800 | dev_err(lcd->dev, "failed to register lcd ops.\n"); | 800 | dev_err(lcd->dev, "failed to register lcd ops.\n"); |
801 | return PTR_ERR(lcd->ld); | 801 | return PTR_ERR(lcd->ld); |
802 | } | 802 | } |
803 | 803 | ||
804 | lcd->bd = backlight_device_register("s6e8ax0-bl", lcd->dev, lcd, | 804 | lcd->bd = devm_backlight_device_register(lcd->dev, "s6e8ax0-bl", |
805 | &s6e8ax0_backlight_ops, NULL); | 805 | lcd->dev, lcd, &s6e8ax0_backlight_ops, NULL); |
806 | if (IS_ERR(lcd->bd)) { | 806 | if (IS_ERR(lcd->bd)) { |
807 | dev_err(lcd->dev, "failed to register backlight ops.\n"); | 807 | dev_err(lcd->dev, "failed to register backlight ops.\n"); |
808 | ret = PTR_ERR(lcd->bd); | 808 | return PTR_ERR(lcd->bd); |
809 | goto err_backlight_register; | ||
810 | } | 809 | } |
811 | 810 | ||
812 | lcd->bd->props.max_brightness = MAX_BRIGHTNESS; | 811 | lcd->bd->props.max_brightness = MAX_BRIGHTNESS; |
@@ -834,10 +833,6 @@ static int s6e8ax0_probe(struct mipi_dsim_lcd_device *dsim_dev) | |||
834 | dev_dbg(lcd->dev, "probed s6e8ax0 panel driver.\n"); | 833 | dev_dbg(lcd->dev, "probed s6e8ax0 panel driver.\n"); |
835 | 834 | ||
836 | return 0; | 835 | return 0; |
837 | |||
838 | err_backlight_register: | ||
839 | lcd_device_unregister(lcd->ld); | ||
840 | return ret; | ||
841 | } | 836 | } |
842 | 837 | ||
843 | #ifdef CONFIG_PM | 838 | #ifdef CONFIG_PM |
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 7309ac704e26..b6d5008f361f 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c | |||
@@ -1596,8 +1596,7 @@ static int do_remove_conflicting_framebuffers(struct apertures_struct *a, | |||
1596 | (primary && gen_aper && gen_aper->count && | 1596 | (primary && gen_aper && gen_aper->count && |
1597 | gen_aper->ranges[0].base == VGA_FB_PHYS)) { | 1597 | gen_aper->ranges[0].base == VGA_FB_PHYS)) { |
1598 | 1598 | ||
1599 | printk(KERN_INFO "fb: conflicting fb hw usage " | 1599 | printk(KERN_INFO "fb: switching to %s from %s\n", |
1600 | "%s vs %s - removing generic driver\n", | ||
1601 | name, registered_fb[i]->fix.id); | 1600 | name, registered_fb[i]->fix.id); |
1602 | ret = do_unregister_framebuffer(registered_fb[i]); | 1601 | ret = do_unregister_framebuffer(registered_fb[i]); |
1603 | if (ret) | 1602 | if (ret) |
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index 44ee678481d5..f6e621684953 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -30,10 +30,13 @@ | |||
30 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
31 | #include <linux/dma-mapping.h> | 31 | #include <linux/dma-mapping.h> |
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | #include <linux/lcd.h> | ||
33 | #include <linux/math64.h> | 34 | #include <linux/math64.h> |
34 | #include <linux/of.h> | 35 | #include <linux/of.h> |
35 | #include <linux/of_device.h> | 36 | #include <linux/of_device.h> |
36 | 37 | ||
38 | #include <linux/regulator/consumer.h> | ||
39 | |||
37 | #include <video/of_display_timing.h> | 40 | #include <video/of_display_timing.h> |
38 | #include <video/of_videomode.h> | 41 | #include <video/of_videomode.h> |
39 | #include <video/videomode.h> | 42 | #include <video/videomode.h> |
@@ -45,12 +48,6 @@ | |||
45 | */ | 48 | */ |
46 | #define DEBUG_VAR 1 | 49 | #define DEBUG_VAR 1 |
47 | 50 | ||
48 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \ | ||
49 | (defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \ | ||
50 | defined(CONFIG_FB_IMX_MODULE)) | ||
51 | #define PWMR_BACKLIGHT_AVAILABLE | ||
52 | #endif | ||
53 | |||
54 | #define DRIVER_NAME "imx-fb" | 51 | #define DRIVER_NAME "imx-fb" |
55 | 52 | ||
56 | #define LCDC_SSA 0x00 | 53 | #define LCDC_SSA 0x00 |
@@ -153,11 +150,8 @@ struct imxfb_info { | |||
153 | * the framebuffer memory region to. | 150 | * the framebuffer memory region to. |
154 | */ | 151 | */ |
155 | dma_addr_t map_dma; | 152 | dma_addr_t map_dma; |
156 | u_char *map_cpu; | ||
157 | u_int map_size; | 153 | u_int map_size; |
158 | 154 | ||
159 | u_char *screen_cpu; | ||
160 | dma_addr_t screen_dma; | ||
161 | u_int palette_size; | 155 | u_int palette_size; |
162 | 156 | ||
163 | dma_addr_t dbar1; | 157 | dma_addr_t dbar1; |
@@ -167,18 +161,13 @@ struct imxfb_info { | |||
167 | u_int pwmr; | 161 | u_int pwmr; |
168 | u_int lscr1; | 162 | u_int lscr1; |
169 | u_int dmacr; | 163 | u_int dmacr; |
170 | u_int cmap_inverse:1, | 164 | bool cmap_inverse; |
171 | cmap_static:1, | 165 | bool cmap_static; |
172 | unused:30; | ||
173 | 166 | ||
174 | struct imx_fb_videomode *mode; | 167 | struct imx_fb_videomode *mode; |
175 | int num_modes; | 168 | int num_modes; |
176 | #ifdef PWMR_BACKLIGHT_AVAILABLE | ||
177 | struct backlight_device *bl; | ||
178 | #endif | ||
179 | 169 | ||
180 | void (*lcd_power)(int); | 170 | struct regulator *lcd_pwr; |
181 | void (*backlight_power)(int); | ||
182 | }; | 171 | }; |
183 | 172 | ||
184 | static struct platform_device_id imxfb_devtype[] = { | 173 | static struct platform_device_id imxfb_devtype[] = { |
@@ -484,83 +473,6 @@ static int imxfb_set_par(struct fb_info *info) | |||
484 | return 0; | 473 | return 0; |
485 | } | 474 | } |
486 | 475 | ||
487 | #ifdef PWMR_BACKLIGHT_AVAILABLE | ||
488 | static int imxfb_bl_get_brightness(struct backlight_device *bl) | ||
489 | { | ||
490 | struct imxfb_info *fbi = bl_get_data(bl); | ||
491 | |||
492 | return readl(fbi->regs + LCDC_PWMR) & 0xFF; | ||
493 | } | ||
494 | |||
495 | static int imxfb_bl_update_status(struct backlight_device *bl) | ||
496 | { | ||
497 | struct imxfb_info *fbi = bl_get_data(bl); | ||
498 | int brightness = bl->props.brightness; | ||
499 | |||
500 | if (!fbi->pwmr) | ||
501 | return 0; | ||
502 | |||
503 | if (bl->props.power != FB_BLANK_UNBLANK) | ||
504 | brightness = 0; | ||
505 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
506 | brightness = 0; | ||
507 | |||
508 | fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; | ||
509 | |||
510 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) { | ||
511 | clk_prepare_enable(fbi->clk_ipg); | ||
512 | clk_prepare_enable(fbi->clk_ahb); | ||
513 | clk_prepare_enable(fbi->clk_per); | ||
514 | } | ||
515 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
516 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) { | ||
517 | clk_disable_unprepare(fbi->clk_per); | ||
518 | clk_disable_unprepare(fbi->clk_ahb); | ||
519 | clk_disable_unprepare(fbi->clk_ipg); | ||
520 | } | ||
521 | |||
522 | return 0; | ||
523 | } | ||
524 | |||
525 | static const struct backlight_ops imxfb_lcdc_bl_ops = { | ||
526 | .update_status = imxfb_bl_update_status, | ||
527 | .get_brightness = imxfb_bl_get_brightness, | ||
528 | }; | ||
529 | |||
530 | static void imxfb_init_backlight(struct imxfb_info *fbi) | ||
531 | { | ||
532 | struct backlight_properties props; | ||
533 | struct backlight_device *bl; | ||
534 | |||
535 | if (fbi->bl) | ||
536 | return; | ||
537 | |||
538 | memset(&props, 0, sizeof(struct backlight_properties)); | ||
539 | props.max_brightness = 0xff; | ||
540 | props.type = BACKLIGHT_RAW; | ||
541 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
542 | |||
543 | bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi, | ||
544 | &imxfb_lcdc_bl_ops, &props); | ||
545 | if (IS_ERR(bl)) { | ||
546 | dev_err(&fbi->pdev->dev, "error %ld on backlight register\n", | ||
547 | PTR_ERR(bl)); | ||
548 | return; | ||
549 | } | ||
550 | |||
551 | fbi->bl = bl; | ||
552 | bl->props.power = FB_BLANK_UNBLANK; | ||
553 | bl->props.fb_blank = FB_BLANK_UNBLANK; | ||
554 | bl->props.brightness = imxfb_bl_get_brightness(bl); | ||
555 | } | ||
556 | |||
557 | static void imxfb_exit_backlight(struct imxfb_info *fbi) | ||
558 | { | ||
559 | if (fbi->bl) | ||
560 | backlight_device_unregister(fbi->bl); | ||
561 | } | ||
562 | #endif | ||
563 | |||
564 | static void imxfb_enable_controller(struct imxfb_info *fbi) | 476 | static void imxfb_enable_controller(struct imxfb_info *fbi) |
565 | { | 477 | { |
566 | 478 | ||
@@ -569,7 +481,7 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) | |||
569 | 481 | ||
570 | pr_debug("Enabling LCD controller\n"); | 482 | pr_debug("Enabling LCD controller\n"); |
571 | 483 | ||
572 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); | 484 | writel(fbi->map_dma, fbi->regs + LCDC_SSA); |
573 | 485 | ||
574 | /* panning offset 0 (0 pixel offset) */ | 486 | /* panning offset 0 (0 pixel offset) */ |
575 | writel(0x00000000, fbi->regs + LCDC_POS); | 487 | writel(0x00000000, fbi->regs + LCDC_POS); |
@@ -588,11 +500,6 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) | |||
588 | clk_prepare_enable(fbi->clk_ahb); | 500 | clk_prepare_enable(fbi->clk_ahb); |
589 | clk_prepare_enable(fbi->clk_per); | 501 | clk_prepare_enable(fbi->clk_per); |
590 | fbi->enabled = true; | 502 | fbi->enabled = true; |
591 | |||
592 | if (fbi->backlight_power) | ||
593 | fbi->backlight_power(1); | ||
594 | if (fbi->lcd_power) | ||
595 | fbi->lcd_power(1); | ||
596 | } | 503 | } |
597 | 504 | ||
598 | static void imxfb_disable_controller(struct imxfb_info *fbi) | 505 | static void imxfb_disable_controller(struct imxfb_info *fbi) |
@@ -602,11 +509,6 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) | |||
602 | 509 | ||
603 | pr_debug("Disabling LCD controller\n"); | 510 | pr_debug("Disabling LCD controller\n"); |
604 | 511 | ||
605 | if (fbi->backlight_power) | ||
606 | fbi->backlight_power(0); | ||
607 | if (fbi->lcd_power) | ||
608 | fbi->lcd_power(0); | ||
609 | |||
610 | clk_disable_unprepare(fbi->clk_per); | 512 | clk_disable_unprepare(fbi->clk_per); |
611 | clk_disable_unprepare(fbi->clk_ipg); | 513 | clk_disable_unprepare(fbi->clk_ipg); |
612 | clk_disable_unprepare(fbi->clk_ahb); | 514 | clk_disable_unprepare(fbi->clk_ahb); |
@@ -709,10 +611,8 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
709 | fbi->regs + LCDC_SIZE); | 611 | fbi->regs + LCDC_SIZE); |
710 | 612 | ||
711 | writel(fbi->pcr, fbi->regs + LCDC_PCR); | 613 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
712 | #ifndef PWMR_BACKLIGHT_AVAILABLE | ||
713 | if (fbi->pwmr) | 614 | if (fbi->pwmr) |
714 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | 615 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
715 | #endif | ||
716 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); | 616 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
717 | 617 | ||
718 | /* dmacr = 0 is no valid value, as we need DMA control marks. */ | 618 | /* dmacr = 0 is no valid value, as we need DMA control marks. */ |
@@ -722,37 +622,6 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
722 | return 0; | 622 | return 0; |
723 | } | 623 | } |
724 | 624 | ||
725 | #ifdef CONFIG_PM | ||
726 | /* | ||
727 | * Power management hooks. Note that we won't be called from IRQ context, | ||
728 | * unlike the blank functions above, so we may sleep. | ||
729 | */ | ||
730 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) | ||
731 | { | ||
732 | struct fb_info *info = platform_get_drvdata(dev); | ||
733 | struct imxfb_info *fbi = info->par; | ||
734 | |||
735 | pr_debug("%s\n", __func__); | ||
736 | |||
737 | imxfb_disable_controller(fbi); | ||
738 | return 0; | ||
739 | } | ||
740 | |||
741 | static int imxfb_resume(struct platform_device *dev) | ||
742 | { | ||
743 | struct fb_info *info = platform_get_drvdata(dev); | ||
744 | struct imxfb_info *fbi = info->par; | ||
745 | |||
746 | pr_debug("%s\n", __func__); | ||
747 | |||
748 | imxfb_enable_controller(fbi); | ||
749 | return 0; | ||
750 | } | ||
751 | #else | ||
752 | #define imxfb_suspend NULL | ||
753 | #define imxfb_resume NULL | ||
754 | #endif | ||
755 | |||
756 | static int imxfb_init_fbinfo(struct platform_device *pdev) | 625 | static int imxfb_init_fbinfo(struct platform_device *pdev) |
757 | { | 626 | { |
758 | struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev); | 627 | struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev); |
@@ -790,14 +659,9 @@ static int imxfb_init_fbinfo(struct platform_device *pdev) | |||
790 | info->flags = FBINFO_FLAG_DEFAULT | | 659 | info->flags = FBINFO_FLAG_DEFAULT | |
791 | FBINFO_READS_FAST; | 660 | FBINFO_READS_FAST; |
792 | if (pdata) { | 661 | if (pdata) { |
793 | info->var.grayscale = pdata->cmap_greyscale; | ||
794 | fbi->cmap_inverse = pdata->cmap_inverse; | ||
795 | fbi->cmap_static = pdata->cmap_static; | ||
796 | fbi->lscr1 = pdata->lscr1; | 662 | fbi->lscr1 = pdata->lscr1; |
797 | fbi->dmacr = pdata->dmacr; | 663 | fbi->dmacr = pdata->dmacr; |
798 | fbi->pwmr = pdata->pwmr; | 664 | fbi->pwmr = pdata->pwmr; |
799 | fbi->lcd_power = pdata->lcd_power; | ||
800 | fbi->backlight_power = pdata->backlight_power; | ||
801 | } else { | 665 | } else { |
802 | np = pdev->dev.of_node; | 666 | np = pdev->dev.of_node; |
803 | info->var.grayscale = of_property_read_bool(np, | 667 | info->var.grayscale = of_property_read_bool(np, |
@@ -806,14 +670,12 @@ static int imxfb_init_fbinfo(struct platform_device *pdev) | |||
806 | fbi->cmap_static = of_property_read_bool(np, "cmap-static"); | 670 | fbi->cmap_static = of_property_read_bool(np, "cmap-static"); |
807 | 671 | ||
808 | fbi->lscr1 = IMXFB_LSCR1_DEFAULT; | 672 | fbi->lscr1 = IMXFB_LSCR1_DEFAULT; |
673 | |||
674 | of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr); | ||
675 | |||
809 | of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1); | 676 | of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1); |
810 | 677 | ||
811 | of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); | 678 | of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); |
812 | |||
813 | /* These two function pointers could be used by some specific | ||
814 | * platforms. */ | ||
815 | fbi->lcd_power = NULL; | ||
816 | fbi->backlight_power = NULL; | ||
817 | } | 679 | } |
818 | 680 | ||
819 | return 0; | 681 | return 0; |
@@ -856,9 +718,98 @@ static int imxfb_of_read_mode(struct device *dev, struct device_node *np, | |||
856 | return 0; | 718 | return 0; |
857 | } | 719 | } |
858 | 720 | ||
721 | static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi) | ||
722 | { | ||
723 | struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); | ||
724 | |||
725 | if (!fi || fi->par == fbi) | ||
726 | return 1; | ||
727 | |||
728 | return 0; | ||
729 | } | ||
730 | |||
731 | static int imxfb_lcd_get_contrast(struct lcd_device *lcddev) | ||
732 | { | ||
733 | struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); | ||
734 | |||
735 | return fbi->pwmr & 0xff; | ||
736 | } | ||
737 | |||
738 | static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast) | ||
739 | { | ||
740 | struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); | ||
741 | |||
742 | if (fbi->pwmr && fbi->enabled) { | ||
743 | if (contrast > 255) | ||
744 | contrast = 255; | ||
745 | else if (contrast < 0) | ||
746 | contrast = 0; | ||
747 | |||
748 | fbi->pwmr &= ~0xff; | ||
749 | fbi->pwmr |= contrast; | ||
750 | |||
751 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
752 | } | ||
753 | |||
754 | return 0; | ||
755 | } | ||
756 | |||
757 | static int imxfb_lcd_get_power(struct lcd_device *lcddev) | ||
758 | { | ||
759 | struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); | ||
760 | |||
761 | if (!IS_ERR(fbi->lcd_pwr)) | ||
762 | return regulator_is_enabled(fbi->lcd_pwr); | ||
763 | |||
764 | return 1; | ||
765 | } | ||
766 | |||
767 | static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power) | ||
768 | { | ||
769 | struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev); | ||
770 | |||
771 | if (!IS_ERR(fbi->lcd_pwr)) { | ||
772 | if (power) | ||
773 | return regulator_enable(fbi->lcd_pwr); | ||
774 | else | ||
775 | return regulator_disable(fbi->lcd_pwr); | ||
776 | } | ||
777 | |||
778 | return 0; | ||
779 | } | ||
780 | |||
781 | static struct lcd_ops imxfb_lcd_ops = { | ||
782 | .check_fb = imxfb_lcd_check_fb, | ||
783 | .get_contrast = imxfb_lcd_get_contrast, | ||
784 | .set_contrast = imxfb_lcd_set_contrast, | ||
785 | .get_power = imxfb_lcd_get_power, | ||
786 | .set_power = imxfb_lcd_set_power, | ||
787 | }; | ||
788 | |||
789 | static int imxfb_setup(void) | ||
790 | { | ||
791 | char *opt, *options = NULL; | ||
792 | |||
793 | if (fb_get_options("imxfb", &options)) | ||
794 | return -ENODEV; | ||
795 | |||
796 | if (!options || !*options) | ||
797 | return 0; | ||
798 | |||
799 | while ((opt = strsep(&options, ",")) != NULL) { | ||
800 | if (!*opt) | ||
801 | continue; | ||
802 | else | ||
803 | fb_mode = opt; | ||
804 | } | ||
805 | |||
806 | return 0; | ||
807 | } | ||
808 | |||
859 | static int imxfb_probe(struct platform_device *pdev) | 809 | static int imxfb_probe(struct platform_device *pdev) |
860 | { | 810 | { |
861 | struct imxfb_info *fbi; | 811 | struct imxfb_info *fbi; |
812 | struct lcd_device *lcd; | ||
862 | struct fb_info *info; | 813 | struct fb_info *info; |
863 | struct imx_fb_platform_data *pdata; | 814 | struct imx_fb_platform_data *pdata; |
864 | struct resource *res; | 815 | struct resource *res; |
@@ -869,6 +820,10 @@ static int imxfb_probe(struct platform_device *pdev) | |||
869 | 820 | ||
870 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); | 821 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
871 | 822 | ||
823 | ret = imxfb_setup(); | ||
824 | if (ret < 0) | ||
825 | return ret; | ||
826 | |||
872 | of_id = of_match_device(imxfb_of_dev_id, &pdev->dev); | 827 | of_id = of_match_device(imxfb_of_dev_id, &pdev->dev); |
873 | if (of_id) | 828 | if (of_id) |
874 | pdev->id_entry = of_id->data; | 829 | pdev->id_entry = of_id->data; |
@@ -966,32 +921,18 @@ static int imxfb_probe(struct platform_device *pdev) | |||
966 | goto failed_ioremap; | 921 | goto failed_ioremap; |
967 | } | 922 | } |
968 | 923 | ||
969 | /* Seems not being used by anyone, so no support for oftree */ | 924 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
970 | if (!pdata || !pdata->fixed_screen_cpu) { | 925 | info->screen_base = dma_alloc_writecombine(&pdev->dev, fbi->map_size, |
971 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); | 926 | &fbi->map_dma, GFP_KERNEL); |
972 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | ||
973 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | ||
974 | 927 | ||
975 | if (!fbi->map_cpu) { | 928 | if (!info->screen_base) { |
976 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); | 929 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
977 | ret = -ENOMEM; | 930 | ret = -ENOMEM; |
978 | goto failed_map; | 931 | goto failed_map; |
979 | } | ||
980 | |||
981 | info->screen_base = fbi->map_cpu; | ||
982 | fbi->screen_cpu = fbi->map_cpu; | ||
983 | fbi->screen_dma = fbi->map_dma; | ||
984 | info->fix.smem_start = fbi->screen_dma; | ||
985 | } else { | ||
986 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | ||
987 | fbi->map_cpu = pdata->fixed_screen_cpu; | ||
988 | fbi->map_dma = pdata->fixed_screen_dma; | ||
989 | info->screen_base = fbi->map_cpu; | ||
990 | fbi->screen_cpu = fbi->map_cpu; | ||
991 | fbi->screen_dma = fbi->map_dma; | ||
992 | info->fix.smem_start = fbi->screen_dma; | ||
993 | } | 932 | } |
994 | 933 | ||
934 | info->fix.smem_start = fbi->map_dma; | ||
935 | |||
995 | if (pdata && pdata->init) { | 936 | if (pdata && pdata->init) { |
996 | ret = pdata->init(fbi->pdev); | 937 | ret = pdata->init(fbi->pdev); |
997 | if (ret) | 938 | if (ret) |
@@ -1020,23 +961,37 @@ static int imxfb_probe(struct platform_device *pdev) | |||
1020 | goto failed_register; | 961 | goto failed_register; |
1021 | } | 962 | } |
1022 | 963 | ||
964 | fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd"); | ||
965 | if (IS_ERR(fbi->lcd_pwr) && (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER)) { | ||
966 | ret = -EPROBE_DEFER; | ||
967 | goto failed_lcd; | ||
968 | } | ||
969 | |||
970 | lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi, | ||
971 | &imxfb_lcd_ops); | ||
972 | if (IS_ERR(lcd)) { | ||
973 | ret = PTR_ERR(lcd); | ||
974 | goto failed_lcd; | ||
975 | } | ||
976 | |||
977 | lcd->props.max_contrast = 0xff; | ||
978 | |||
1023 | imxfb_enable_controller(fbi); | 979 | imxfb_enable_controller(fbi); |
1024 | fbi->pdev = pdev; | 980 | fbi->pdev = pdev; |
1025 | #ifdef PWMR_BACKLIGHT_AVAILABLE | ||
1026 | imxfb_init_backlight(fbi); | ||
1027 | #endif | ||
1028 | 981 | ||
1029 | return 0; | 982 | return 0; |
1030 | 983 | ||
984 | failed_lcd: | ||
985 | unregister_framebuffer(info); | ||
986 | |||
1031 | failed_register: | 987 | failed_register: |
1032 | fb_dealloc_cmap(&info->cmap); | 988 | fb_dealloc_cmap(&info->cmap); |
1033 | failed_cmap: | 989 | failed_cmap: |
1034 | if (pdata && pdata->exit) | 990 | if (pdata && pdata->exit) |
1035 | pdata->exit(fbi->pdev); | 991 | pdata->exit(fbi->pdev); |
1036 | failed_platform_init: | 992 | failed_platform_init: |
1037 | if (pdata && !pdata->fixed_screen_cpu) | 993 | dma_free_writecombine(&pdev->dev, fbi->map_size, info->screen_base, |
1038 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, | 994 | fbi->map_dma); |
1039 | fbi->map_dma); | ||
1040 | failed_map: | 995 | failed_map: |
1041 | iounmap(fbi->regs); | 996 | iounmap(fbi->regs); |
1042 | failed_ioremap: | 997 | failed_ioremap: |
@@ -1061,9 +1016,6 @@ static int imxfb_remove(struct platform_device *pdev) | |||
1061 | 1016 | ||
1062 | imxfb_disable_controller(fbi); | 1017 | imxfb_disable_controller(fbi); |
1063 | 1018 | ||
1064 | #ifdef PWMR_BACKLIGHT_AVAILABLE | ||
1065 | imxfb_exit_backlight(fbi); | ||
1066 | #endif | ||
1067 | unregister_framebuffer(info); | 1019 | unregister_framebuffer(info); |
1068 | 1020 | ||
1069 | pdata = dev_get_platdata(&pdev->dev); | 1021 | pdata = dev_get_platdata(&pdev->dev); |
@@ -1074,69 +1026,49 @@ static int imxfb_remove(struct platform_device *pdev) | |||
1074 | kfree(info->pseudo_palette); | 1026 | kfree(info->pseudo_palette); |
1075 | framebuffer_release(info); | 1027 | framebuffer_release(info); |
1076 | 1028 | ||
1029 | dma_free_writecombine(&pdev->dev, fbi->map_size, info->screen_base, | ||
1030 | fbi->map_dma); | ||
1031 | |||
1077 | iounmap(fbi->regs); | 1032 | iounmap(fbi->regs); |
1078 | release_mem_region(res->start, resource_size(res)); | 1033 | release_mem_region(res->start, resource_size(res)); |
1079 | 1034 | ||
1080 | return 0; | 1035 | return 0; |
1081 | } | 1036 | } |
1082 | 1037 | ||
1083 | static void imxfb_shutdown(struct platform_device *dev) | 1038 | static int __maybe_unused imxfb_suspend(struct device *dev) |
1084 | { | 1039 | { |
1085 | struct fb_info *info = platform_get_drvdata(dev); | 1040 | struct fb_info *info = dev_get_drvdata(dev); |
1086 | struct imxfb_info *fbi = info->par; | 1041 | struct imxfb_info *fbi = info->par; |
1087 | imxfb_disable_controller(fbi); | ||
1088 | } | ||
1089 | |||
1090 | static struct platform_driver imxfb_driver = { | ||
1091 | .suspend = imxfb_suspend, | ||
1092 | .resume = imxfb_resume, | ||
1093 | .remove = imxfb_remove, | ||
1094 | .shutdown = imxfb_shutdown, | ||
1095 | .driver = { | ||
1096 | .name = DRIVER_NAME, | ||
1097 | .of_match_table = imxfb_of_dev_id, | ||
1098 | }, | ||
1099 | .id_table = imxfb_devtype, | ||
1100 | }; | ||
1101 | |||
1102 | static int imxfb_setup(void) | ||
1103 | { | ||
1104 | #ifndef MODULE | ||
1105 | char *opt, *options = NULL; | ||
1106 | 1042 | ||
1107 | if (fb_get_options("imxfb", &options)) | 1043 | imxfb_disable_controller(fbi); |
1108 | return -ENODEV; | ||
1109 | |||
1110 | if (!options || !*options) | ||
1111 | return 0; | ||
1112 | 1044 | ||
1113 | while ((opt = strsep(&options, ",")) != NULL) { | ||
1114 | if (!*opt) | ||
1115 | continue; | ||
1116 | else | ||
1117 | fb_mode = opt; | ||
1118 | } | ||
1119 | #endif | ||
1120 | return 0; | 1045 | return 0; |
1121 | } | 1046 | } |
1122 | 1047 | ||
1123 | static int __init imxfb_init(void) | 1048 | static int __maybe_unused imxfb_resume(struct device *dev) |
1124 | { | 1049 | { |
1125 | int ret = imxfb_setup(); | 1050 | struct fb_info *info = dev_get_drvdata(dev); |
1051 | struct imxfb_info *fbi = info->par; | ||
1126 | 1052 | ||
1127 | if (ret < 0) | 1053 | imxfb_enable_controller(fbi); |
1128 | return ret; | ||
1129 | 1054 | ||
1130 | return platform_driver_probe(&imxfb_driver, imxfb_probe); | 1055 | return 0; |
1131 | } | 1056 | } |
1132 | 1057 | ||
1133 | static void __exit imxfb_cleanup(void) | 1058 | static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume); |
1134 | { | ||
1135 | platform_driver_unregister(&imxfb_driver); | ||
1136 | } | ||
1137 | 1059 | ||
1138 | module_init(imxfb_init); | 1060 | static struct platform_driver imxfb_driver = { |
1139 | module_exit(imxfb_cleanup); | 1061 | .driver = { |
1062 | .name = DRIVER_NAME, | ||
1063 | .of_match_table = imxfb_of_dev_id, | ||
1064 | .owner = THIS_MODULE, | ||
1065 | .pm = &imxfb_pm_ops, | ||
1066 | }, | ||
1067 | .probe = imxfb_probe, | ||
1068 | .remove = imxfb_remove, | ||
1069 | .id_table = imxfb_devtype, | ||
1070 | }; | ||
1071 | module_platform_driver(imxfb_driver); | ||
1140 | 1072 | ||
1141 | MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); | 1073 | MODULE_DESCRIPTION("Freescale i.MX framebuffer driver"); |
1142 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | 1074 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
diff --git a/drivers/video/matrox/matroxfb_accel.c b/drivers/video/matrox/matroxfb_accel.c index 8335a6fe303e..0d5cb85d071a 100644 --- a/drivers/video/matrox/matroxfb_accel.c +++ b/drivers/video/matrox/matroxfb_accel.c | |||
@@ -192,10 +192,18 @@ void matrox_cfbX_init(struct matrox_fb_info *minfo) | |||
192 | minfo->accel.m_dwg_rect = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO; | 192 | minfo->accel.m_dwg_rect = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZERO; |
193 | if (isMilleniumII(minfo)) minfo->accel.m_dwg_rect |= M_DWG_TRANSC; | 193 | if (isMilleniumII(minfo)) minfo->accel.m_dwg_rect |= M_DWG_TRANSC; |
194 | minfo->accel.m_opmode = mopmode; | 194 | minfo->accel.m_opmode = mopmode; |
195 | minfo->accel.m_access = maccess; | ||
196 | minfo->accel.m_pitch = mpitch; | ||
195 | } | 197 | } |
196 | 198 | ||
197 | EXPORT_SYMBOL(matrox_cfbX_init); | 199 | EXPORT_SYMBOL(matrox_cfbX_init); |
198 | 200 | ||
201 | static void matrox_accel_restore_maccess(struct matrox_fb_info *minfo) | ||
202 | { | ||
203 | mga_outl(M_MACCESS, minfo->accel.m_access); | ||
204 | mga_outl(M_PITCH, minfo->accel.m_pitch); | ||
205 | } | ||
206 | |||
199 | static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy, | 207 | static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy, |
200 | int sx, int dy, int dx, int height, int width) | 208 | int sx, int dy, int dx, int height, int width) |
201 | { | 209 | { |
@@ -207,7 +215,8 @@ static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy, | |||
207 | CRITBEGIN | 215 | CRITBEGIN |
208 | 216 | ||
209 | if ((dy < sy) || ((dy == sy) && (dx <= sx))) { | 217 | if ((dy < sy) || ((dy == sy) && (dx <= sx))) { |
210 | mga_fifo(2); | 218 | mga_fifo(4); |
219 | matrox_accel_restore_maccess(minfo); | ||
211 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO | | 220 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO | |
212 | M_DWG_BFCOL | M_DWG_REPLACE); | 221 | M_DWG_BFCOL | M_DWG_REPLACE); |
213 | mga_outl(M_AR5, vxres); | 222 | mga_outl(M_AR5, vxres); |
@@ -215,7 +224,8 @@ static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy, | |||
215 | start = sy*vxres+sx+curr_ydstorg(minfo); | 224 | start = sy*vxres+sx+curr_ydstorg(minfo); |
216 | end = start+width; | 225 | end = start+width; |
217 | } else { | 226 | } else { |
218 | mga_fifo(3); | 227 | mga_fifo(5); |
228 | matrox_accel_restore_maccess(minfo); | ||
219 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE); | 229 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE); |
220 | mga_outl(M_SGN, 5); | 230 | mga_outl(M_SGN, 5); |
221 | mga_outl(M_AR5, -vxres); | 231 | mga_outl(M_AR5, -vxres); |
@@ -224,7 +234,8 @@ static void matrox_accel_bmove(struct matrox_fb_info *minfo, int vxres, int sy, | |||
224 | start = end+width; | 234 | start = end+width; |
225 | dy += height-1; | 235 | dy += height-1; |
226 | } | 236 | } |
227 | mga_fifo(4); | 237 | mga_fifo(6); |
238 | matrox_accel_restore_maccess(minfo); | ||
228 | mga_outl(M_AR0, end); | 239 | mga_outl(M_AR0, end); |
229 | mga_outl(M_AR3, start); | 240 | mga_outl(M_AR3, start); |
230 | mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx); | 241 | mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx); |
@@ -246,7 +257,8 @@ static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres, | |||
246 | CRITBEGIN | 257 | CRITBEGIN |
247 | 258 | ||
248 | if ((dy < sy) || ((dy == sy) && (dx <= sx))) { | 259 | if ((dy < sy) || ((dy == sy) && (dx <= sx))) { |
249 | mga_fifo(2); | 260 | mga_fifo(4); |
261 | matrox_accel_restore_maccess(minfo); | ||
250 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO | | 262 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_SGNZERO | |
251 | M_DWG_BFCOL | M_DWG_REPLACE); | 263 | M_DWG_BFCOL | M_DWG_REPLACE); |
252 | mga_outl(M_AR5, vxres); | 264 | mga_outl(M_AR5, vxres); |
@@ -254,7 +266,8 @@ static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres, | |||
254 | start = sy*vxres+sx+curr_ydstorg(minfo); | 266 | start = sy*vxres+sx+curr_ydstorg(minfo); |
255 | end = start+width; | 267 | end = start+width; |
256 | } else { | 268 | } else { |
257 | mga_fifo(3); | 269 | mga_fifo(5); |
270 | matrox_accel_restore_maccess(minfo); | ||
258 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE); | 271 | mga_outl(M_DWGCTL, M_DWG_BITBLT | M_DWG_SHIFTZERO | M_DWG_BFCOL | M_DWG_REPLACE); |
259 | mga_outl(M_SGN, 5); | 272 | mga_outl(M_SGN, 5); |
260 | mga_outl(M_AR5, -vxres); | 273 | mga_outl(M_AR5, -vxres); |
@@ -263,7 +276,8 @@ static void matrox_accel_bmove_lin(struct matrox_fb_info *minfo, int vxres, | |||
263 | start = end+width; | 276 | start = end+width; |
264 | dy += height-1; | 277 | dy += height-1; |
265 | } | 278 | } |
266 | mga_fifo(5); | 279 | mga_fifo(7); |
280 | matrox_accel_restore_maccess(minfo); | ||
267 | mga_outl(M_AR0, end); | 281 | mga_outl(M_AR0, end); |
268 | mga_outl(M_AR3, start); | 282 | mga_outl(M_AR3, start); |
269 | mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx); | 283 | mga_outl(M_FXBNDRY, ((dx+width)<<16) | dx); |
@@ -298,7 +312,8 @@ static void matroxfb_accel_clear(struct matrox_fb_info *minfo, u_int32_t color, | |||
298 | 312 | ||
299 | CRITBEGIN | 313 | CRITBEGIN |
300 | 314 | ||
301 | mga_fifo(5); | 315 | mga_fifo(7); |
316 | matrox_accel_restore_maccess(minfo); | ||
302 | mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE); | 317 | mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE); |
303 | mga_outl(M_FCOL, color); | 318 | mga_outl(M_FCOL, color); |
304 | mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx); | 319 | mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx); |
@@ -341,7 +356,8 @@ static void matroxfb_cfb4_clear(struct matrox_fb_info *minfo, u_int32_t bgx, | |||
341 | width >>= 1; | 356 | width >>= 1; |
342 | sx >>= 1; | 357 | sx >>= 1; |
343 | if (width) { | 358 | if (width) { |
344 | mga_fifo(5); | 359 | mga_fifo(7); |
360 | matrox_accel_restore_maccess(minfo); | ||
345 | mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE2); | 361 | mga_outl(M_DWGCTL, minfo->accel.m_dwg_rect | M_DWG_REPLACE2); |
346 | mga_outl(M_FCOL, bgx); | 362 | mga_outl(M_FCOL, bgx); |
347 | mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx); | 363 | mga_outl(M_FXBNDRY, ((sx + width) << 16) | sx); |
@@ -415,7 +431,8 @@ static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx, | |||
415 | 431 | ||
416 | CRITBEGIN | 432 | CRITBEGIN |
417 | 433 | ||
418 | mga_fifo(3); | 434 | mga_fifo(5); |
435 | matrox_accel_restore_maccess(minfo); | ||
419 | if (easy) | 436 | if (easy) |
420 | mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_LINEAR | M_DWG_REPLACE); | 437 | mga_outl(M_DWGCTL, M_DWG_ILOAD | M_DWG_SGNZERO | M_DWG_SHIFTZERO | M_DWG_BMONOWF | M_DWG_LINEAR | M_DWG_REPLACE); |
421 | else | 438 | else |
@@ -425,7 +442,8 @@ static void matroxfb_1bpp_imageblit(struct matrox_fb_info *minfo, u_int32_t fgx, | |||
425 | fxbndry = ((xx + width - 1) << 16) | xx; | 442 | fxbndry = ((xx + width - 1) << 16) | xx; |
426 | mmio = minfo->mmio.vbase; | 443 | mmio = minfo->mmio.vbase; |
427 | 444 | ||
428 | mga_fifo(6); | 445 | mga_fifo(8); |
446 | matrox_accel_restore_maccess(minfo); | ||
429 | mga_writel(mmio, M_FXBNDRY, fxbndry); | 447 | mga_writel(mmio, M_FXBNDRY, fxbndry); |
430 | mga_writel(mmio, M_AR0, ar0); | 448 | mga_writel(mmio, M_AR0, ar0); |
431 | mga_writel(mmio, M_AR3, 0); | 449 | mga_writel(mmio, M_AR3, 0); |
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c index 87c64ff4546c..7116c5309c7d 100644 --- a/drivers/video/matrox/matroxfb_base.c +++ b/drivers/video/matrox/matroxfb_base.c | |||
@@ -1773,7 +1773,8 @@ static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) | |||
1773 | FBINFO_HWACCEL_FILLRECT | /* And fillrect */ | 1773 | FBINFO_HWACCEL_FILLRECT | /* And fillrect */ |
1774 | FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ | 1774 | FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ |
1775 | FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ | 1775 | FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ |
1776 | FBINFO_HWACCEL_YPAN; /* And vertical panning */ | 1776 | FBINFO_HWACCEL_YPAN | /* And vertical panning */ |
1777 | FBINFO_READS_FAST; | ||
1777 | minfo->video.len_usable &= PAGE_MASK; | 1778 | minfo->video.len_usable &= PAGE_MASK; |
1778 | fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1); | 1779 | fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1); |
1779 | 1780 | ||
diff --git a/drivers/video/matrox/matroxfb_base.h b/drivers/video/matrox/matroxfb_base.h index 11ed57bb704e..556d96ce40bf 100644 --- a/drivers/video/matrox/matroxfb_base.h +++ b/drivers/video/matrox/matroxfb_base.h | |||
@@ -307,6 +307,8 @@ struct matrox_accel_data { | |||
307 | #endif | 307 | #endif |
308 | u_int32_t m_dwg_rect; | 308 | u_int32_t m_dwg_rect; |
309 | u_int32_t m_opmode; | 309 | u_int32_t m_opmode; |
310 | u_int32_t m_access; | ||
311 | u_int32_t m_pitch; | ||
310 | }; | 312 | }; |
311 | 313 | ||
312 | struct v4l2_queryctrl; | 314 | struct v4l2_queryctrl; |
diff --git a/drivers/video/omap2/displays-new/connector-analog-tv.c b/drivers/video/omap2/displays-new/connector-analog-tv.c index ccd9073f706f..27f33ef8fca1 100644 --- a/drivers/video/omap2/displays-new/connector-analog-tv.c +++ b/drivers/video/omap2/displays-new/connector-analog-tv.c | |||
@@ -31,7 +31,7 @@ struct panel_drv_data { | |||
31 | static const struct omap_video_timings tvc_pal_timings = { | 31 | static const struct omap_video_timings tvc_pal_timings = { |
32 | .x_res = 720, | 32 | .x_res = 720, |
33 | .y_res = 574, | 33 | .y_res = 574, |
34 | .pixel_clock = 13500, | 34 | .pixelclock = 13500000, |
35 | .hsw = 64, | 35 | .hsw = 64, |
36 | .hfp = 12, | 36 | .hfp = 12, |
37 | .hbp = 68, | 37 | .hbp = 68, |
diff --git a/drivers/video/omap2/displays-new/connector-dvi.c b/drivers/video/omap2/displays-new/connector-dvi.c index b6c50904038e..d18e4b8c0731 100644 --- a/drivers/video/omap2/displays-new/connector-dvi.c +++ b/drivers/video/omap2/displays-new/connector-dvi.c | |||
@@ -23,7 +23,7 @@ static const struct omap_video_timings dvic_default_timings = { | |||
23 | .x_res = 640, | 23 | .x_res = 640, |
24 | .y_res = 480, | 24 | .y_res = 480, |
25 | 25 | ||
26 | .pixel_clock = 23500, | 26 | .pixelclock = 23500000, |
27 | 27 | ||
28 | .hfp = 48, | 28 | .hfp = 48, |
29 | .hsw = 32, | 29 | .hsw = 32, |
diff --git a/drivers/video/omap2/displays-new/connector-hdmi.c b/drivers/video/omap2/displays-new/connector-hdmi.c index 9abe2c039ae9..9393e2d6473d 100644 --- a/drivers/video/omap2/displays-new/connector-hdmi.c +++ b/drivers/video/omap2/displays-new/connector-hdmi.c | |||
@@ -21,7 +21,7 @@ | |||
21 | static const struct omap_video_timings hdmic_default_timings = { | 21 | static const struct omap_video_timings hdmic_default_timings = { |
22 | .x_res = 640, | 22 | .x_res = 640, |
23 | .y_res = 480, | 23 | .y_res = 480, |
24 | .pixel_clock = 25175, | 24 | .pixelclock = 25175000, |
25 | .hsw = 96, | 25 | .hsw = 96, |
26 | .hfp = 16, | 26 | .hfp = 16, |
27 | .hbp = 48, | 27 | .hbp = 48, |
diff --git a/drivers/video/omap2/displays-new/panel-dsi-cm.c b/drivers/video/omap2/displays-new/panel-dsi-cm.c index b7baafe83aa3..f317c878a259 100644 --- a/drivers/video/omap2/displays-new/panel-dsi-cm.c +++ b/drivers/video/omap2/displays-new/panel-dsi-cm.c | |||
@@ -1184,7 +1184,7 @@ static int dsicm_probe(struct platform_device *pdev) | |||
1184 | 1184 | ||
1185 | ddata->timings.x_res = 864; | 1185 | ddata->timings.x_res = 864; |
1186 | ddata->timings.y_res = 480; | 1186 | ddata->timings.y_res = 480; |
1187 | ddata->timings.pixel_clock = DIV_ROUND_UP(864 * 480 * 60, 1000); | 1187 | ddata->timings.pixelclock = 864 * 480 * 60; |
1188 | 1188 | ||
1189 | dssdev = &ddata->dssdev; | 1189 | dssdev = &ddata->dssdev; |
1190 | dssdev->dev = dev; | 1190 | dssdev->dev = dev; |
diff --git a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c b/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c index 6e8977b18950..2e6b513222d9 100644 --- a/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c +++ b/drivers/video/omap2/displays-new/panel-lgphilips-lb035q02.c | |||
@@ -23,7 +23,7 @@ static struct omap_video_timings lb035q02_timings = { | |||
23 | .x_res = 320, | 23 | .x_res = 320, |
24 | .y_res = 240, | 24 | .y_res = 240, |
25 | 25 | ||
26 | .pixel_clock = 6500, | 26 | .pixelclock = 6500000, |
27 | 27 | ||
28 | .hsw = 2, | 28 | .hsw = 2, |
29 | .hfp = 20, | 29 | .hfp = 20, |
diff --git a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c b/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c index bb217da65c5f..996fa004b48c 100644 --- a/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c +++ b/drivers/video/omap2/displays-new/panel-nec-nl8048hl11.c | |||
@@ -40,7 +40,7 @@ struct panel_drv_data { | |||
40 | * NEC PIX Clock Ratings | 40 | * NEC PIX Clock Ratings |
41 | * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz | 41 | * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz |
42 | */ | 42 | */ |
43 | #define LCD_PIXEL_CLOCK 23800 | 43 | #define LCD_PIXEL_CLOCK 23800000 |
44 | 44 | ||
45 | static const struct { | 45 | static const struct { |
46 | unsigned char addr; | 46 | unsigned char addr; |
@@ -69,7 +69,7 @@ static const struct { | |||
69 | static const struct omap_video_timings nec_8048_panel_timings = { | 69 | static const struct omap_video_timings nec_8048_panel_timings = { |
70 | .x_res = LCD_XRES, | 70 | .x_res = LCD_XRES, |
71 | .y_res = LCD_YRES, | 71 | .y_res = LCD_YRES, |
72 | .pixel_clock = LCD_PIXEL_CLOCK, | 72 | .pixelclock = LCD_PIXEL_CLOCK, |
73 | .hfp = 6, | 73 | .hfp = 6, |
74 | .hsw = 1, | 74 | .hsw = 1, |
75 | .hbp = 4, | 75 | .hbp = 4, |
diff --git a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c b/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c index 72a4fb5aa6b1..b2f710be565d 100644 --- a/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c +++ b/drivers/video/omap2/displays-new/panel-sharp-ls037v7dw01.c | |||
@@ -37,7 +37,7 @@ static const struct omap_video_timings sharp_ls_timings = { | |||
37 | .x_res = 480, | 37 | .x_res = 480, |
38 | .y_res = 640, | 38 | .y_res = 640, |
39 | 39 | ||
40 | .pixel_clock = 19200, | 40 | .pixelclock = 19200000, |
41 | 41 | ||
42 | .hsw = 2, | 42 | .hsw = 2, |
43 | .hfp = 1, | 43 | .hfp = 1, |
diff --git a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/omap2/displays-new/panel-sony-acx565akm.c index 8e97d06921ff..27f60ad6b2ab 100644 --- a/drivers/video/omap2/displays-new/panel-sony-acx565akm.c +++ b/drivers/video/omap2/displays-new/panel-sony-acx565akm.c | |||
@@ -93,7 +93,7 @@ struct panel_drv_data { | |||
93 | static const struct omap_video_timings acx565akm_panel_timings = { | 93 | static const struct omap_video_timings acx565akm_panel_timings = { |
94 | .x_res = 800, | 94 | .x_res = 800, |
95 | .y_res = 480, | 95 | .y_res = 480, |
96 | .pixel_clock = 24000, | 96 | .pixelclock = 24000000, |
97 | .hfp = 28, | 97 | .hfp = 28, |
98 | .hsw = 4, | 98 | .hsw = 4, |
99 | .hbp = 24, | 99 | .hbp = 24, |
diff --git a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c index 9a08908fe998..fae6adc005a7 100644 --- a/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c +++ b/drivers/video/omap2/displays-new/panel-tpo-td028ttec1.c | |||
@@ -45,7 +45,7 @@ struct panel_drv_data { | |||
45 | static struct omap_video_timings td028ttec1_panel_timings = { | 45 | static struct omap_video_timings td028ttec1_panel_timings = { |
46 | .x_res = 480, | 46 | .x_res = 480, |
47 | .y_res = 640, | 47 | .y_res = 640, |
48 | .pixel_clock = 22153, | 48 | .pixelclock = 22153000, |
49 | .hfp = 24, | 49 | .hfp = 24, |
50 | .hsw = 8, | 50 | .hsw = 8, |
51 | .hbp = 8, | 51 | .hbp = 8, |
diff --git a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c index eadc6529fa3d..875b40263b33 100644 --- a/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c +++ b/drivers/video/omap2/displays-new/panel-tpo-td043mtea1.c | |||
@@ -76,7 +76,7 @@ static const struct omap_video_timings tpo_td043_timings = { | |||
76 | .x_res = 800, | 76 | .x_res = 800, |
77 | .y_res = 480, | 77 | .y_res = 480, |
78 | 78 | ||
79 | .pixel_clock = 36000, | 79 | .pixelclock = 36000000, |
80 | 80 | ||
81 | .hsw = 1, | 81 | .hsw = 1, |
82 | .hfp = 68, | 82 | .hfp = 68, |
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 77d6221618f4..aaecbf347748 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -100,8 +100,6 @@ static struct { | |||
100 | struct platform_device *pdev; | 100 | struct platform_device *pdev; |
101 | void __iomem *base; | 101 | void __iomem *base; |
102 | 102 | ||
103 | int ctx_loss_cnt; | ||
104 | |||
105 | int irq; | 103 | int irq; |
106 | 104 | ||
107 | unsigned long core_clk_rate; | 105 | unsigned long core_clk_rate; |
@@ -357,29 +355,20 @@ static void dispc_save_context(void) | |||
357 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) | 355 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) |
358 | SR(DIVISOR); | 356 | SR(DIVISOR); |
359 | 357 | ||
360 | dispc.ctx_loss_cnt = dss_get_ctx_loss_count(); | ||
361 | dispc.ctx_valid = true; | 358 | dispc.ctx_valid = true; |
362 | 359 | ||
363 | DSSDBG("context saved, ctx_loss_count %d\n", dispc.ctx_loss_cnt); | 360 | DSSDBG("context saved\n"); |
364 | } | 361 | } |
365 | 362 | ||
366 | static void dispc_restore_context(void) | 363 | static void dispc_restore_context(void) |
367 | { | 364 | { |
368 | int i, j, ctx; | 365 | int i, j; |
369 | 366 | ||
370 | DSSDBG("dispc_restore_context\n"); | 367 | DSSDBG("dispc_restore_context\n"); |
371 | 368 | ||
372 | if (!dispc.ctx_valid) | 369 | if (!dispc.ctx_valid) |
373 | return; | 370 | return; |
374 | 371 | ||
375 | ctx = dss_get_ctx_loss_count(); | ||
376 | |||
377 | if (ctx >= 0 && ctx == dispc.ctx_loss_cnt) | ||
378 | return; | ||
379 | |||
380 | DSSDBG("ctx_loss_count: saved %d, current %d\n", | ||
381 | dispc.ctx_loss_cnt, ctx); | ||
382 | |||
383 | /*RR(IRQENABLE);*/ | 372 | /*RR(IRQENABLE);*/ |
384 | /*RR(CONTROL);*/ | 373 | /*RR(CONTROL);*/ |
385 | RR(CONFIG); | 374 | RR(CONFIG); |
@@ -2884,7 +2873,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel, | |||
2884 | 2873 | ||
2885 | timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res); | 2874 | timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res); |
2886 | 2875 | ||
2887 | timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixel_clock * 1000); | 2876 | timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixelclock); |
2888 | 2877 | ||
2889 | if (dss_mgr_is_lcd(channel)) { | 2878 | if (dss_mgr_is_lcd(channel)) { |
2890 | timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp, | 2879 | timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp, |
@@ -2979,10 +2968,10 @@ void dispc_mgr_set_timings(enum omap_channel channel, | |||
2979 | xtot = t.x_res + t.hfp + t.hsw + t.hbp; | 2968 | xtot = t.x_res + t.hfp + t.hsw + t.hbp; |
2980 | ytot = t.y_res + t.vfp + t.vsw + t.vbp; | 2969 | ytot = t.y_res + t.vfp + t.vsw + t.vbp; |
2981 | 2970 | ||
2982 | ht = (timings->pixel_clock * 1000) / xtot; | 2971 | ht = timings->pixelclock / xtot; |
2983 | vt = (timings->pixel_clock * 1000) / xtot / ytot; | 2972 | vt = timings->pixelclock / xtot / ytot; |
2984 | 2973 | ||
2985 | DSSDBG("pck %u\n", timings->pixel_clock); | 2974 | DSSDBG("pck %u\n", timings->pixelclock); |
2986 | DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", | 2975 | DSSDBG("hsw %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", |
2987 | t.hsw, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); | 2976 | t.hsw, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); |
2988 | DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", | 2977 | DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", |
@@ -3768,6 +3757,15 @@ static int dispc_runtime_suspend(struct device *dev) | |||
3768 | 3757 | ||
3769 | static int dispc_runtime_resume(struct device *dev) | 3758 | static int dispc_runtime_resume(struct device *dev) |
3770 | { | 3759 | { |
3760 | /* | ||
3761 | * The reset value for load mode is 0 (OMAP_DSS_LOAD_CLUT_AND_FRAME) | ||
3762 | * but we always initialize it to 2 (OMAP_DSS_LOAD_FRAME_ONLY) in | ||
3763 | * _omap_dispc_initial_config(). We can thus use it to detect if | ||
3764 | * we have lost register context. | ||
3765 | */ | ||
3766 | if (REG_GET(DISPC_CONFIG, 2, 1) == OMAP_DSS_LOAD_FRAME_ONLY) | ||
3767 | return 0; | ||
3768 | |||
3771 | _omap_dispc_initial_config(); | 3769 | _omap_dispc_initial_config(); |
3772 | 3770 | ||
3773 | dispc_restore_context(); | 3771 | dispc_restore_context(); |
diff --git a/drivers/video/omap2/dss/display-sysfs.c b/drivers/video/omap2/dss/display-sysfs.c index f7b5f9561041..5a2095a98ed8 100644 --- a/drivers/video/omap2/dss/display-sysfs.c +++ b/drivers/video/omap2/dss/display-sysfs.c | |||
@@ -132,7 +132,7 @@ static ssize_t display_timings_show(struct device *dev, | |||
132 | dssdev->driver->get_timings(dssdev, &t); | 132 | dssdev->driver->get_timings(dssdev, &t); |
133 | 133 | ||
134 | return snprintf(buf, PAGE_SIZE, "%u,%u/%u/%u/%u,%u/%u/%u/%u\n", | 134 | return snprintf(buf, PAGE_SIZE, "%u,%u/%u/%u/%u,%u/%u/%u/%u\n", |
135 | t.pixel_clock, | 135 | t.pixelclock, |
136 | t.x_res, t.hfp, t.hbp, t.hsw, | 136 | t.x_res, t.hfp, t.hbp, t.hsw, |
137 | t.y_res, t.vfp, t.vbp, t.vsw); | 137 | t.y_res, t.vfp, t.vbp, t.vsw); |
138 | } | 138 | } |
@@ -158,7 +158,7 @@ static ssize_t display_timings_store(struct device *dev, | |||
158 | } | 158 | } |
159 | #endif | 159 | #endif |
160 | if (!found && sscanf(buf, "%u,%hu/%hu/%hu/%hu,%hu/%hu/%hu/%hu", | 160 | if (!found && sscanf(buf, "%u,%hu/%hu/%hu/%hu,%hu/%hu/%hu/%hu", |
161 | &t.pixel_clock, | 161 | &t.pixelclock, |
162 | &t.x_res, &t.hfp, &t.hbp, &t.hsw, | 162 | &t.x_res, &t.hfp, &t.hbp, &t.hsw, |
163 | &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) | 163 | &t.y_res, &t.vfp, &t.vbp, &t.vsw) != 9) |
164 | return -EINVAL; | 164 | return -EINVAL; |
diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/omap2/dss/display.c index 669a81fdf58e..9f19ae22944c 100644 --- a/drivers/video/omap2/dss/display.c +++ b/drivers/video/omap2/dss/display.c | |||
@@ -248,7 +248,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, | |||
248 | { | 248 | { |
249 | memset(ovt, 0, sizeof(*ovt)); | 249 | memset(ovt, 0, sizeof(*ovt)); |
250 | 250 | ||
251 | ovt->pixel_clock = vm->pixelclock / 1000; | 251 | ovt->pixelclock = vm->pixelclock; |
252 | ovt->x_res = vm->hactive; | 252 | ovt->x_res = vm->hactive; |
253 | ovt->hbp = vm->hback_porch; | 253 | ovt->hbp = vm->hback_porch; |
254 | ovt->hfp = vm->hfront_porch; | 254 | ovt->hfp = vm->hfront_porch; |
@@ -280,7 +280,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt, | |||
280 | { | 280 | { |
281 | memset(vm, 0, sizeof(*vm)); | 281 | memset(vm, 0, sizeof(*vm)); |
282 | 282 | ||
283 | vm->pixelclock = ovt->pixel_clock * 1000; | 283 | vm->pixelclock = ovt->pixelclock; |
284 | 284 | ||
285 | vm->hactive = ovt->x_res; | 285 | vm->hactive = ovt->x_res; |
286 | vm->hback_porch = ovt->hbp; | 286 | vm->hback_porch = ovt->hbp; |
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c index 23ef21ffc2c4..6c0bb099b7bf 100644 --- a/drivers/video/omap2/dss/dpi.c +++ b/drivers/video/omap2/dss/dpi.c | |||
@@ -307,22 +307,21 @@ static int dpi_set_mode(struct omap_overlay_manager *mgr) | |||
307 | int r = 0; | 307 | int r = 0; |
308 | 308 | ||
309 | if (dpi.dsidev) | 309 | if (dpi.dsidev) |
310 | r = dpi_set_dsi_clk(mgr->id, t->pixel_clock * 1000, &fck, | 310 | r = dpi_set_dsi_clk(mgr->id, t->pixelclock, &fck, |
311 | &lck_div, &pck_div); | 311 | &lck_div, &pck_div); |
312 | else | 312 | else |
313 | r = dpi_set_dispc_clk(t->pixel_clock * 1000, &fck, | 313 | r = dpi_set_dispc_clk(t->pixelclock, &fck, |
314 | &lck_div, &pck_div); | 314 | &lck_div, &pck_div); |
315 | if (r) | 315 | if (r) |
316 | return r; | 316 | return r; |
317 | 317 | ||
318 | pck = fck / lck_div / pck_div / 1000; | 318 | pck = fck / lck_div / pck_div; |
319 | 319 | ||
320 | if (pck != t->pixel_clock) { | 320 | if (pck != t->pixelclock) { |
321 | DSSWARN("Could not find exact pixel clock. " | 321 | DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", |
322 | "Requested %d kHz, got %lu kHz\n", | 322 | t->pixelclock, pck); |
323 | t->pixel_clock, pck); | ||
324 | 323 | ||
325 | t->pixel_clock = pck; | 324 | t->pixelclock = pck; |
326 | } | 325 | } |
327 | 326 | ||
328 | dss_mgr_set_timings(mgr, t); | 327 | dss_mgr_set_timings(mgr, t); |
@@ -480,17 +479,17 @@ static int dpi_check_timings(struct omap_dss_device *dssdev, | |||
480 | if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) | 479 | if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) |
481 | return -EINVAL; | 480 | return -EINVAL; |
482 | 481 | ||
483 | if (timings->pixel_clock == 0) | 482 | if (timings->pixelclock == 0) |
484 | return -EINVAL; | 483 | return -EINVAL; |
485 | 484 | ||
486 | if (dpi.dsidev) { | 485 | if (dpi.dsidev) { |
487 | ok = dpi_dsi_clk_calc(timings->pixel_clock * 1000, &ctx); | 486 | ok = dpi_dsi_clk_calc(timings->pixelclock, &ctx); |
488 | if (!ok) | 487 | if (!ok) |
489 | return -EINVAL; | 488 | return -EINVAL; |
490 | 489 | ||
491 | fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk; | 490 | fck = ctx.dsi_cinfo.dsi_pll_hsdiv_dispc_clk; |
492 | } else { | 491 | } else { |
493 | ok = dpi_dss_clk_calc(timings->pixel_clock * 1000, &ctx); | 492 | ok = dpi_dss_clk_calc(timings->pixelclock, &ctx); |
494 | if (!ok) | 493 | if (!ok) |
495 | return -EINVAL; | 494 | return -EINVAL; |
496 | 495 | ||
@@ -500,9 +499,9 @@ static int dpi_check_timings(struct omap_dss_device *dssdev, | |||
500 | lck_div = ctx.dispc_cinfo.lck_div; | 499 | lck_div = ctx.dispc_cinfo.lck_div; |
501 | pck_div = ctx.dispc_cinfo.pck_div; | 500 | pck_div = ctx.dispc_cinfo.pck_div; |
502 | 501 | ||
503 | pck = fck / lck_div / pck_div / 1000; | 502 | pck = fck / lck_div / pck_div; |
504 | 503 | ||
505 | timings->pixel_clock = pck; | 504 | timings->pixelclock = pck; |
506 | 505 | ||
507 | return 0; | 506 | return 0; |
508 | } | 507 | } |
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index a820c37e323e..0d82f731d2f0 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -4616,7 +4616,7 @@ static void print_dsi_vm(const char *str, | |||
4616 | 4616 | ||
4617 | static void print_dispc_vm(const char *str, const struct omap_video_timings *t) | 4617 | static void print_dispc_vm(const char *str, const struct omap_video_timings *t) |
4618 | { | 4618 | { |
4619 | unsigned long pck = t->pixel_clock * 1000; | 4619 | unsigned long pck = t->pixelclock; |
4620 | int hact, bl, tot; | 4620 | int hact, bl, tot; |
4621 | 4621 | ||
4622 | hact = t->x_res; | 4622 | hact = t->x_res; |
@@ -4656,7 +4656,7 @@ static void print_dsi_dispc_vm(const char *str, | |||
4656 | dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); | 4656 | dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(t->hact * t->bitspp, 8) + 6, t->ndl); |
4657 | dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; | 4657 | dsi_htot = t->hss + t->hsa + t->hse + t->hbp + dsi_hact + t->hfp; |
4658 | 4658 | ||
4659 | vm.pixel_clock = pck / 1000; | 4659 | vm.pixelclock = pck; |
4660 | vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); | 4660 | vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk); |
4661 | vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); | 4661 | vm.hbp = div64_u64((u64)t->hbp * pck, byteclk); |
4662 | vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); | 4662 | vm.hfp = div64_u64((u64)t->hfp * pck, byteclk); |
@@ -4678,7 +4678,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck, | |||
4678 | ctx->dispc_cinfo.pck = pck; | 4678 | ctx->dispc_cinfo.pck = pck; |
4679 | 4679 | ||
4680 | *t = *ctx->config->timings; | 4680 | *t = *ctx->config->timings; |
4681 | t->pixel_clock = pck / 1000; | 4681 | t->pixelclock = pck; |
4682 | t->x_res = ctx->config->timings->x_res; | 4682 | t->x_res = ctx->config->timings->x_res; |
4683 | t->y_res = ctx->config->timings->y_res; | 4683 | t->y_res = ctx->config->timings->y_res; |
4684 | t->hsw = t->hfp = t->hbp = t->vsw = 1; | 4684 | t->hsw = t->hfp = t->hbp = t->vsw = 1; |
@@ -4732,7 +4732,7 @@ static bool dsi_cm_calc(struct dsi_data *dsi, | |||
4732 | * especially as we go to LP between each pixel packet due to HW | 4732 | * especially as we go to LP between each pixel packet due to HW |
4733 | * "feature". So let's just estimate very roughly and multiply by 1.5. | 4733 | * "feature". So let's just estimate very roughly and multiply by 1.5. |
4734 | */ | 4734 | */ |
4735 | pck = cfg->timings->pixel_clock * 1000; | 4735 | pck = cfg->timings->pixelclock; |
4736 | pck = pck * 3 / 2; | 4736 | pck = pck * 3 / 2; |
4737 | txbyteclk = pck * bitspp / 8 / ndl; | 4737 | txbyteclk = pck * bitspp / 8 / ndl; |
4738 | 4738 | ||
@@ -4909,7 +4909,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx) | |||
4909 | 4909 | ||
4910 | dispc_vm = &ctx->dispc_vm; | 4910 | dispc_vm = &ctx->dispc_vm; |
4911 | *dispc_vm = *req_vm; | 4911 | *dispc_vm = *req_vm; |
4912 | dispc_vm->pixel_clock = dispc_pck / 1000; | 4912 | dispc_vm->pixelclock = dispc_pck; |
4913 | 4913 | ||
4914 | if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { | 4914 | if (cfg->trans_mode == OMAP_DSS_DSI_PULSE_MODE) { |
4915 | hsa = div64_u64((u64)req_vm->hsw * dispc_pck, | 4915 | hsa = div64_u64((u64)req_vm->hsw * dispc_pck, |
@@ -5031,9 +5031,9 @@ static bool dsi_vm_calc(struct dsi_data *dsi, | |||
5031 | ctx->dsi_cinfo.clkin = clkin; | 5031 | ctx->dsi_cinfo.clkin = clkin; |
5032 | 5032 | ||
5033 | /* these limits should come from the panel driver */ | 5033 | /* these limits should come from the panel driver */ |
5034 | ctx->req_pck_min = t->pixel_clock * 1000 - 1000; | 5034 | ctx->req_pck_min = t->pixelclock - 1000; |
5035 | ctx->req_pck_nom = t->pixel_clock * 1000; | 5035 | ctx->req_pck_nom = t->pixelclock; |
5036 | ctx->req_pck_max = t->pixel_clock * 1000 + 1000; | 5036 | ctx->req_pck_max = t->pixelclock + 1000; |
5037 | 5037 | ||
5038 | byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); | 5038 | byteclk_min = div64_u64((u64)ctx->req_pck_min * bitspp, ndl * 8); |
5039 | pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); | 5039 | pll_min = max(cfg->hs_clk_min * 4, byteclk_min * 4 * 4); |
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 9a145da35ad3..96e400c51001 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -154,22 +154,6 @@ static void dss_restore_context(void) | |||
154 | #undef SR | 154 | #undef SR |
155 | #undef RR | 155 | #undef RR |
156 | 156 | ||
157 | int dss_get_ctx_loss_count(void) | ||
158 | { | ||
159 | struct platform_device *core_pdev = dss_get_core_pdev(); | ||
160 | struct omap_dss_board_info *board_data = core_pdev->dev.platform_data; | ||
161 | int cnt; | ||
162 | |||
163 | if (!board_data->get_context_loss_count) | ||
164 | return -ENOENT; | ||
165 | |||
166 | cnt = board_data->get_context_loss_count(&dss.pdev->dev); | ||
167 | |||
168 | WARN_ONCE(cnt < 0, "get_context_loss_count failed: %d\n", cnt); | ||
169 | |||
170 | return cnt; | ||
171 | } | ||
172 | |||
173 | void dss_sdi_init(int datapairs) | 157 | void dss_sdi_init(int datapairs) |
174 | { | 158 | { |
175 | u32 l; | 159 | u32 l; |
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 057f24c8a332..570f7ed2bcbc 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h | |||
@@ -225,8 +225,6 @@ void dss_dump_clocks(struct seq_file *s); | |||
225 | void dss_debug_dump_clocks(struct seq_file *s); | 225 | void dss_debug_dump_clocks(struct seq_file *s); |
226 | #endif | 226 | #endif |
227 | 227 | ||
228 | int dss_get_ctx_loss_count(void); | ||
229 | |||
230 | void dss_sdi_init(int datapairs); | 228 | void dss_sdi_init(int datapairs); |
231 | int dss_sdi_enable(void); | 229 | int dss_sdi_enable(void); |
232 | void dss_sdi_disable(void); | 230 | void dss_sdi_disable(void); |
diff --git a/drivers/video/omap2/dss/hdmi4.c b/drivers/video/omap2/dss/hdmi4.c index 4a74538f9ea5..895c252ae0a8 100644 --- a/drivers/video/omap2/dss/hdmi4.c +++ b/drivers/video/omap2/dss/hdmi4.c | |||
@@ -153,7 +153,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev) | |||
153 | 153 | ||
154 | DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); | 154 | DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); |
155 | 155 | ||
156 | phy = p->pixel_clock; | 156 | /* the functions below use kHz pixel clock. TODO: change to Hz */ |
157 | phy = p->pixelclock / 1000; | ||
157 | 158 | ||
158 | hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy); | 159 | hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy); |
159 | 160 | ||
@@ -238,13 +239,13 @@ static void hdmi_display_set_timing(struct omap_dss_device *dssdev, | |||
238 | if (t != NULL) { | 239 | if (t != NULL) { |
239 | hdmi.cfg = *t; | 240 | hdmi.cfg = *t; |
240 | 241 | ||
241 | dispc_set_tv_pclk(t->timings.pixel_clock * 1000); | 242 | dispc_set_tv_pclk(t->timings.pixelclock); |
242 | } else { | 243 | } else { |
243 | hdmi.cfg.timings = *timings; | 244 | hdmi.cfg.timings = *timings; |
244 | hdmi.cfg.cm.code = 0; | 245 | hdmi.cfg.cm.code = 0; |
245 | hdmi.cfg.cm.mode = HDMI_DVI; | 246 | hdmi.cfg.cm.mode = HDMI_DVI; |
246 | 247 | ||
247 | dispc_set_tv_pclk(timings->pixel_clock * 1000); | 248 | dispc_set_tv_pclk(timings->pixelclock); |
248 | } | 249 | } |
249 | 250 | ||
250 | DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ? | 251 | DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ? |
@@ -509,7 +510,7 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev, | |||
509 | struct omap_dss_audio *audio) | 510 | struct omap_dss_audio *audio) |
510 | { | 511 | { |
511 | int r; | 512 | int r; |
512 | u32 pclk = hdmi.cfg.timings.pixel_clock; | 513 | u32 pclk = hdmi.cfg.timings.pixelclock; |
513 | 514 | ||
514 | mutex_lock(&hdmi.lock); | 515 | mutex_lock(&hdmi.lock); |
515 | 516 | ||
diff --git a/drivers/video/omap2/dss/hdmi_common.c b/drivers/video/omap2/dss/hdmi_common.c index 0614922902dd..b11afac8e068 100644 --- a/drivers/video/omap2/dss/hdmi_common.c +++ b/drivers/video/omap2/dss/hdmi_common.c | |||
@@ -23,91 +23,91 @@ | |||
23 | 23 | ||
24 | static const struct hdmi_config cea_timings[] = { | 24 | static const struct hdmi_config cea_timings[] = { |
25 | { | 25 | { |
26 | { 640, 480, 25200, 96, 16, 48, 2, 10, 33, | 26 | { 640, 480, 25200000, 96, 16, 48, 2, 10, 33, |
27 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 27 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
28 | false, }, | 28 | false, }, |
29 | { 1, HDMI_HDMI }, | 29 | { 1, HDMI_HDMI }, |
30 | }, | 30 | }, |
31 | { | 31 | { |
32 | { 720, 480, 27027, 62, 16, 60, 6, 9, 30, | 32 | { 720, 480, 27027000, 62, 16, 60, 6, 9, 30, |
33 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 33 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
34 | false, }, | 34 | false, }, |
35 | { 2, HDMI_HDMI }, | 35 | { 2, HDMI_HDMI }, |
36 | }, | 36 | }, |
37 | { | 37 | { |
38 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, | 38 | { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20, |
39 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 39 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
40 | false, }, | 40 | false, }, |
41 | { 4, HDMI_HDMI }, | 41 | { 4, HDMI_HDMI }, |
42 | }, | 42 | }, |
43 | { | 43 | { |
44 | { 1920, 540, 74250, 44, 88, 148, 5, 2, 15, | 44 | { 1920, 540, 74250000, 44, 88, 148, 5, 2, 15, |
45 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 45 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
46 | true, }, | 46 | true, }, |
47 | { 5, HDMI_HDMI }, | 47 | { 5, HDMI_HDMI }, |
48 | }, | 48 | }, |
49 | { | 49 | { |
50 | { 1440, 240, 27027, 124, 38, 114, 3, 4, 15, | 50 | { 1440, 240, 27027000, 124, 38, 114, 3, 4, 15, |
51 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 51 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
52 | true, }, | 52 | true, }, |
53 | { 6, HDMI_HDMI }, | 53 | { 6, HDMI_HDMI }, |
54 | }, | 54 | }, |
55 | { | 55 | { |
56 | { 1920, 1080, 148500, 44, 88, 148, 5, 4, 36, | 56 | { 1920, 1080, 148500000, 44, 88, 148, 5, 4, 36, |
57 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 57 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
58 | false, }, | 58 | false, }, |
59 | { 16, HDMI_HDMI }, | 59 | { 16, HDMI_HDMI }, |
60 | }, | 60 | }, |
61 | { | 61 | { |
62 | { 720, 576, 27000, 64, 12, 68, 5, 5, 39, | 62 | { 720, 576, 27000000, 64, 12, 68, 5, 5, 39, |
63 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 63 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
64 | false, }, | 64 | false, }, |
65 | { 17, HDMI_HDMI }, | 65 | { 17, HDMI_HDMI }, |
66 | }, | 66 | }, |
67 | { | 67 | { |
68 | { 1280, 720, 74250, 40, 440, 220, 5, 5, 20, | 68 | { 1280, 720, 74250000, 40, 440, 220, 5, 5, 20, |
69 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 69 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
70 | false, }, | 70 | false, }, |
71 | { 19, HDMI_HDMI }, | 71 | { 19, HDMI_HDMI }, |
72 | }, | 72 | }, |
73 | { | 73 | { |
74 | { 1920, 540, 74250, 44, 528, 148, 5, 2, 15, | 74 | { 1920, 540, 74250000, 44, 528, 148, 5, 2, 15, |
75 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 75 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
76 | true, }, | 76 | true, }, |
77 | { 20, HDMI_HDMI }, | 77 | { 20, HDMI_HDMI }, |
78 | }, | 78 | }, |
79 | { | 79 | { |
80 | { 1440, 288, 27000, 126, 24, 138, 3, 2, 19, | 80 | { 1440, 288, 27000000, 126, 24, 138, 3, 2, 19, |
81 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 81 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
82 | true, }, | 82 | true, }, |
83 | { 21, HDMI_HDMI }, | 83 | { 21, HDMI_HDMI }, |
84 | }, | 84 | }, |
85 | { | 85 | { |
86 | { 1440, 576, 54000, 128, 24, 136, 5, 5, 39, | 86 | { 1440, 576, 54000000, 128, 24, 136, 5, 5, 39, |
87 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 87 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
88 | false, }, | 88 | false, }, |
89 | { 29, HDMI_HDMI }, | 89 | { 29, HDMI_HDMI }, |
90 | }, | 90 | }, |
91 | { | 91 | { |
92 | { 1920, 1080, 148500, 44, 528, 148, 5, 4, 36, | 92 | { 1920, 1080, 148500000, 44, 528, 148, 5, 4, 36, |
93 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 93 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
94 | false, }, | 94 | false, }, |
95 | { 31, HDMI_HDMI }, | 95 | { 31, HDMI_HDMI }, |
96 | }, | 96 | }, |
97 | { | 97 | { |
98 | { 1920, 1080, 74250, 44, 638, 148, 5, 4, 36, | 98 | { 1920, 1080, 74250000, 44, 638, 148, 5, 4, 36, |
99 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 99 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
100 | false, }, | 100 | false, }, |
101 | { 32, HDMI_HDMI }, | 101 | { 32, HDMI_HDMI }, |
102 | }, | 102 | }, |
103 | { | 103 | { |
104 | { 2880, 480, 108108, 248, 64, 240, 6, 9, 30, | 104 | { 2880, 480, 108108000, 248, 64, 240, 6, 9, 30, |
105 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 105 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
106 | false, }, | 106 | false, }, |
107 | { 35, HDMI_HDMI }, | 107 | { 35, HDMI_HDMI }, |
108 | }, | 108 | }, |
109 | { | 109 | { |
110 | { 2880, 576, 108000, 256, 48, 272, 5, 5, 39, | 110 | { 2880, 576, 108000000, 256, 48, 272, 5, 5, 39, |
111 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 111 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
112 | false, }, | 112 | false, }, |
113 | { 37, HDMI_HDMI }, | 113 | { 37, HDMI_HDMI }, |
@@ -117,121 +117,121 @@ static const struct hdmi_config cea_timings[] = { | |||
117 | static const struct hdmi_config vesa_timings[] = { | 117 | static const struct hdmi_config vesa_timings[] = { |
118 | /* VESA From Here */ | 118 | /* VESA From Here */ |
119 | { | 119 | { |
120 | { 640, 480, 25175, 96, 16, 48, 2, 11, 31, | 120 | { 640, 480, 25175000, 96, 16, 48, 2, 11, 31, |
121 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 121 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
122 | false, }, | 122 | false, }, |
123 | { 4, HDMI_DVI }, | 123 | { 4, HDMI_DVI }, |
124 | }, | 124 | }, |
125 | { | 125 | { |
126 | { 800, 600, 40000, 128, 40, 88, 4, 1, 23, | 126 | { 800, 600, 40000000, 128, 40, 88, 4, 1, 23, |
127 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 127 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
128 | false, }, | 128 | false, }, |
129 | { 9, HDMI_DVI }, | 129 | { 9, HDMI_DVI }, |
130 | }, | 130 | }, |
131 | { | 131 | { |
132 | { 848, 480, 33750, 112, 16, 112, 8, 6, 23, | 132 | { 848, 480, 33750000, 112, 16, 112, 8, 6, 23, |
133 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 133 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
134 | false, }, | 134 | false, }, |
135 | { 0xE, HDMI_DVI }, | 135 | { 0xE, HDMI_DVI }, |
136 | }, | 136 | }, |
137 | { | 137 | { |
138 | { 1280, 768, 79500, 128, 64, 192, 7, 3, 20, | 138 | { 1280, 768, 79500000, 128, 64, 192, 7, 3, 20, |
139 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | 139 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
140 | false, }, | 140 | false, }, |
141 | { 0x17, HDMI_DVI }, | 141 | { 0x17, HDMI_DVI }, |
142 | }, | 142 | }, |
143 | { | 143 | { |
144 | { 1280, 800, 83500, 128, 72, 200, 6, 3, 22, | 144 | { 1280, 800, 83500000, 128, 72, 200, 6, 3, 22, |
145 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | 145 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
146 | false, }, | 146 | false, }, |
147 | { 0x1C, HDMI_DVI }, | 147 | { 0x1C, HDMI_DVI }, |
148 | }, | 148 | }, |
149 | { | 149 | { |
150 | { 1360, 768, 85500, 112, 64, 256, 6, 3, 18, | 150 | { 1360, 768, 85500000, 112, 64, 256, 6, 3, 18, |
151 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 151 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
152 | false, }, | 152 | false, }, |
153 | { 0x27, HDMI_DVI }, | 153 | { 0x27, HDMI_DVI }, |
154 | }, | 154 | }, |
155 | { | 155 | { |
156 | { 1280, 960, 108000, 112, 96, 312, 3, 1, 36, | 156 | { 1280, 960, 108000000, 112, 96, 312, 3, 1, 36, |
157 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 157 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
158 | false, }, | 158 | false, }, |
159 | { 0x20, HDMI_DVI }, | 159 | { 0x20, HDMI_DVI }, |
160 | }, | 160 | }, |
161 | { | 161 | { |
162 | { 1280, 1024, 108000, 112, 48, 248, 3, 1, 38, | 162 | { 1280, 1024, 108000000, 112, 48, 248, 3, 1, 38, |
163 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 163 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
164 | false, }, | 164 | false, }, |
165 | { 0x23, HDMI_DVI }, | 165 | { 0x23, HDMI_DVI }, |
166 | }, | 166 | }, |
167 | { | 167 | { |
168 | { 1024, 768, 65000, 136, 24, 160, 6, 3, 29, | 168 | { 1024, 768, 65000000, 136, 24, 160, 6, 3, 29, |
169 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, | 169 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW, |
170 | false, }, | 170 | false, }, |
171 | { 0x10, HDMI_DVI }, | 171 | { 0x10, HDMI_DVI }, |
172 | }, | 172 | }, |
173 | { | 173 | { |
174 | { 1400, 1050, 121750, 144, 88, 232, 4, 3, 32, | 174 | { 1400, 1050, 121750000, 144, 88, 232, 4, 3, 32, |
175 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | 175 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
176 | false, }, | 176 | false, }, |
177 | { 0x2A, HDMI_DVI }, | 177 | { 0x2A, HDMI_DVI }, |
178 | }, | 178 | }, |
179 | { | 179 | { |
180 | { 1440, 900, 106500, 152, 80, 232, 6, 3, 25, | 180 | { 1440, 900, 106500000, 152, 80, 232, 6, 3, 25, |
181 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | 181 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
182 | false, }, | 182 | false, }, |
183 | { 0x2F, HDMI_DVI }, | 183 | { 0x2F, HDMI_DVI }, |
184 | }, | 184 | }, |
185 | { | 185 | { |
186 | { 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, | 186 | { 1680, 1050, 146250000, 176 , 104, 280, 6, 3, 30, |
187 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, | 187 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW, |
188 | false, }, | 188 | false, }, |
189 | { 0x3A, HDMI_DVI }, | 189 | { 0x3A, HDMI_DVI }, |
190 | }, | 190 | }, |
191 | { | 191 | { |
192 | { 1366, 768, 85500, 143, 70, 213, 3, 3, 24, | 192 | { 1366, 768, 85500000, 143, 70, 213, 3, 3, 24, |
193 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 193 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
194 | false, }, | 194 | false, }, |
195 | { 0x51, HDMI_DVI }, | 195 | { 0x51, HDMI_DVI }, |
196 | }, | 196 | }, |
197 | { | 197 | { |
198 | { 1920, 1080, 148500, 44, 148, 80, 5, 4, 36, | 198 | { 1920, 1080, 148500000, 44, 148, 80, 5, 4, 36, |
199 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 199 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
200 | false, }, | 200 | false, }, |
201 | { 0x52, HDMI_DVI }, | 201 | { 0x52, HDMI_DVI }, |
202 | }, | 202 | }, |
203 | { | 203 | { |
204 | { 1280, 768, 68250, 32, 48, 80, 7, 3, 12, | 204 | { 1280, 768, 68250000, 32, 48, 80, 7, 3, 12, |
205 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | 205 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
206 | false, }, | 206 | false, }, |
207 | { 0x16, HDMI_DVI }, | 207 | { 0x16, HDMI_DVI }, |
208 | }, | 208 | }, |
209 | { | 209 | { |
210 | { 1400, 1050, 101000, 32, 48, 80, 4, 3, 23, | 210 | { 1400, 1050, 101000000, 32, 48, 80, 4, 3, 23, |
211 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | 211 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
212 | false, }, | 212 | false, }, |
213 | { 0x29, HDMI_DVI }, | 213 | { 0x29, HDMI_DVI }, |
214 | }, | 214 | }, |
215 | { | 215 | { |
216 | { 1680, 1050, 119000, 32, 48, 80, 6, 3, 21, | 216 | { 1680, 1050, 119000000, 32, 48, 80, 6, 3, 21, |
217 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | 217 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
218 | false, }, | 218 | false, }, |
219 | { 0x39, HDMI_DVI }, | 219 | { 0x39, HDMI_DVI }, |
220 | }, | 220 | }, |
221 | { | 221 | { |
222 | { 1280, 800, 79500, 32, 48, 80, 6, 3, 14, | 222 | { 1280, 800, 79500000, 32, 48, 80, 6, 3, 14, |
223 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | 223 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
224 | false, }, | 224 | false, }, |
225 | { 0x1B, HDMI_DVI }, | 225 | { 0x1B, HDMI_DVI }, |
226 | }, | 226 | }, |
227 | { | 227 | { |
228 | { 1280, 720, 74250, 40, 110, 220, 5, 5, 20, | 228 | { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20, |
229 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, | 229 | OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH, |
230 | false, }, | 230 | false, }, |
231 | { 0x55, HDMI_DVI }, | 231 | { 0x55, HDMI_DVI }, |
232 | }, | 232 | }, |
233 | { | 233 | { |
234 | { 1920, 1200, 154000, 32, 48, 80, 6, 3, 26, | 234 | { 1920, 1200, 154000000, 32, 48, 80, 6, 3, 26, |
235 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, | 235 | OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, |
236 | false, }, | 236 | false, }, |
237 | { 0x44, HDMI_DVI }, | 237 | { 0x44, HDMI_DVI }, |
@@ -277,8 +277,8 @@ static bool hdmi_timings_compare(struct omap_video_timings *timing1, | |||
277 | { | 277 | { |
278 | int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; | 278 | int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync; |
279 | 279 | ||
280 | if ((DIV_ROUND_CLOSEST(timing2->pixel_clock, 1000) == | 280 | if ((DIV_ROUND_CLOSEST(timing2->pixelclock, 1000000) == |
281 | DIV_ROUND_CLOSEST(timing1->pixel_clock, 1000)) && | 281 | DIV_ROUND_CLOSEST(timing1->pixelclock, 1000000)) && |
282 | (timing2->x_res == timing1->x_res) && | 282 | (timing2->x_res == timing1->x_res) && |
283 | (timing2->y_res == timing1->y_res)) { | 283 | (timing2->y_res == timing1->y_res)) { |
284 | 284 | ||
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c index ba806c9e7f54..b679e33adf2d 100644 --- a/drivers/video/omap2/dss/sdi.c +++ b/drivers/video/omap2/dss/sdi.c | |||
@@ -149,20 +149,19 @@ static int sdi_display_enable(struct omap_dss_device *dssdev) | |||
149 | t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; | 149 | t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; |
150 | t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; | 150 | t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; |
151 | 151 | ||
152 | r = sdi_calc_clock_div(t->pixel_clock * 1000, &fck, &dispc_cinfo); | 152 | r = sdi_calc_clock_div(t->pixelclock, &fck, &dispc_cinfo); |
153 | if (r) | 153 | if (r) |
154 | goto err_calc_clock_div; | 154 | goto err_calc_clock_div; |
155 | 155 | ||
156 | sdi.mgr_config.clock_info = dispc_cinfo; | 156 | sdi.mgr_config.clock_info = dispc_cinfo; |
157 | 157 | ||
158 | pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000; | 158 | pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div; |
159 | 159 | ||
160 | if (pck != t->pixel_clock) { | 160 | if (pck != t->pixelclock) { |
161 | DSSWARN("Could not find exact pixel clock. Requested %d kHz, " | 161 | DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", |
162 | "got %lu kHz\n", | 162 | t->pixelclock, pck); |
163 | t->pixel_clock, pck); | ||
164 | 163 | ||
165 | t->pixel_clock = pck; | 164 | t->pixelclock = pck; |
166 | } | 165 | } |
167 | 166 | ||
168 | 167 | ||
@@ -244,7 +243,7 @@ static int sdi_check_timings(struct omap_dss_device *dssdev, | |||
244 | if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) | 243 | if (mgr && !dispc_mgr_timings_ok(mgr->id, timings)) |
245 | return -EINVAL; | 244 | return -EINVAL; |
246 | 245 | ||
247 | if (timings->pixel_clock == 0) | 246 | if (timings->pixelclock == 0) |
248 | return -EINVAL; | 247 | return -EINVAL; |
249 | 248 | ||
250 | return 0; | 249 | return 0; |
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 2cd7f7e42105..59ade34bd536 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c | |||
@@ -264,7 +264,7 @@ static const struct venc_config venc_config_pal_bdghi = { | |||
264 | const struct omap_video_timings omap_dss_pal_timings = { | 264 | const struct omap_video_timings omap_dss_pal_timings = { |
265 | .x_res = 720, | 265 | .x_res = 720, |
266 | .y_res = 574, | 266 | .y_res = 574, |
267 | .pixel_clock = 13500, | 267 | .pixelclock = 13500000, |
268 | .hsw = 64, | 268 | .hsw = 64, |
269 | .hfp = 12, | 269 | .hfp = 12, |
270 | .hbp = 68, | 270 | .hbp = 68, |
@@ -279,7 +279,7 @@ EXPORT_SYMBOL(omap_dss_pal_timings); | |||
279 | const struct omap_video_timings omap_dss_ntsc_timings = { | 279 | const struct omap_video_timings omap_dss_ntsc_timings = { |
280 | .x_res = 720, | 280 | .x_res = 720, |
281 | .y_res = 482, | 281 | .y_res = 482, |
282 | .pixel_clock = 13500, | 282 | .pixelclock = 13500000, |
283 | .hsw = 64, | 283 | .hsw = 64, |
284 | .hfp = 16, | 284 | .hfp = 16, |
285 | .hbp = 58, | 285 | .hbp = 58, |
diff --git a/drivers/video/omap2/dss/venc_panel.c b/drivers/video/omap2/dss/venc_panel.c index f7d92c57bd73..af68cd444d7e 100644 --- a/drivers/video/omap2/dss/venc_panel.c +++ b/drivers/video/omap2/dss/venc_panel.c | |||
@@ -89,7 +89,7 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) | |||
89 | const struct omap_video_timings default_timings = { | 89 | const struct omap_video_timings default_timings = { |
90 | .x_res = 720, | 90 | .x_res = 720, |
91 | .y_res = 574, | 91 | .y_res = 574, |
92 | .pixel_clock = 13500, | 92 | .pixelclock = 13500000, |
93 | .hsw = 64, | 93 | .hsw = 64, |
94 | .hfp = 12, | 94 | .hfp = 12, |
95 | .hbp = 68, | 95 | .hbp = 68, |
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c index fcb9e932d00c..8d02f164c8c6 100644 --- a/drivers/video/omap2/omapfb/omapfb-main.c +++ b/drivers/video/omap2/omapfb/omapfb-main.c | |||
@@ -723,8 +723,8 @@ int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) | |||
723 | display->driver->get_timings(display, &timings); | 723 | display->driver->get_timings(display, &timings); |
724 | 724 | ||
725 | /* pixclock in ps, the rest in pixclock */ | 725 | /* pixclock in ps, the rest in pixclock */ |
726 | var->pixclock = timings.pixel_clock != 0 ? | 726 | var->pixclock = timings.pixelclock != 0 ? |
727 | KHZ2PICOS(timings.pixel_clock) : | 727 | KHZ2PICOS(timings.pixelclock / 1000) : |
728 | 0; | 728 | 0; |
729 | var->left_margin = timings.hbp; | 729 | var->left_margin = timings.hbp; |
730 | var->right_margin = timings.hfp; | 730 | var->right_margin = timings.hfp; |
@@ -2077,7 +2077,7 @@ static int omapfb_mode_to_timings(const char *mode_str, | |||
2077 | timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; | 2077 | timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; |
2078 | } | 2078 | } |
2079 | 2079 | ||
2080 | timings->pixel_clock = PICOS2KHZ(var->pixclock); | 2080 | timings->pixelclock = PICOS2KHZ(var->pixclock) * 1000; |
2081 | timings->hbp = var->left_margin; | 2081 | timings->hbp = var->left_margin; |
2082 | timings->hfp = var->right_margin; | 2082 | timings->hfp = var->right_margin; |
2083 | timings->vbp = var->upper_margin; | 2083 | timings->vbp = var->upper_margin; |
@@ -2229,7 +2229,7 @@ static void fb_videomode_to_omap_timings(struct fb_videomode *m, | |||
2229 | 2229 | ||
2230 | t->x_res = m->xres; | 2230 | t->x_res = m->xres; |
2231 | t->y_res = m->yres; | 2231 | t->y_res = m->yres; |
2232 | t->pixel_clock = PICOS2KHZ(m->pixclock); | 2232 | t->pixelclock = PICOS2KHZ(m->pixclock) * 1000; |
2233 | t->hsw = m->hsync_len; | 2233 | t->hsw = m->hsync_len; |
2234 | t->hfp = m->right_margin; | 2234 | t->hfp = m->right_margin; |
2235 | t->hbp = m->left_margin; | 2235 | t->hbp = m->left_margin; |
diff --git a/drivers/video/pxa3xx-gcu.c b/drivers/video/pxa3xx-gcu.c index ad382b3396cd..417f9a27eb7d 100644 --- a/drivers/video/pxa3xx-gcu.c +++ b/drivers/video/pxa3xx-gcu.c | |||
@@ -107,7 +107,6 @@ struct pxa3xx_gcu_priv { | |||
107 | struct timeval base_time; | 107 | struct timeval base_time; |
108 | 108 | ||
109 | struct pxa3xx_gcu_batch *free; | 109 | struct pxa3xx_gcu_batch *free; |
110 | |||
111 | struct pxa3xx_gcu_batch *ready; | 110 | struct pxa3xx_gcu_batch *ready; |
112 | struct pxa3xx_gcu_batch *ready_last; | 111 | struct pxa3xx_gcu_batch *ready_last; |
113 | struct pxa3xx_gcu_batch *running; | 112 | struct pxa3xx_gcu_batch *running; |
@@ -368,27 +367,35 @@ pxa3xx_gcu_wait_free(struct pxa3xx_gcu_priv *priv) | |||
368 | 367 | ||
369 | /* Misc device layer */ | 368 | /* Misc device layer */ |
370 | 369 | ||
371 | static inline struct pxa3xx_gcu_priv *file_dev(struct file *file) | 370 | static inline struct pxa3xx_gcu_priv *to_pxa3xx_gcu_priv(struct file *file) |
372 | { | 371 | { |
373 | struct miscdevice *dev = file->private_data; | 372 | struct miscdevice *dev = file->private_data; |
374 | return container_of(dev, struct pxa3xx_gcu_priv, misc_dev); | 373 | return container_of(dev, struct pxa3xx_gcu_priv, misc_dev); |
375 | } | 374 | } |
376 | 375 | ||
376 | /* | ||
377 | * provide an empty .open callback, so the core sets file->private_data | ||
378 | * for us. | ||
379 | */ | ||
380 | static int pxa3xx_gcu_open(struct inode *inode, struct file *file) | ||
381 | { | ||
382 | return 0; | ||
383 | } | ||
384 | |||
377 | static ssize_t | 385 | static ssize_t |
378 | pxa3xx_gcu_misc_write(struct file *file, const char *buff, | 386 | pxa3xx_gcu_write(struct file *file, const char *buff, |
379 | size_t count, loff_t *offp) | 387 | size_t count, loff_t *offp) |
380 | { | 388 | { |
381 | int ret; | 389 | int ret; |
382 | unsigned long flags; | 390 | unsigned long flags; |
383 | struct pxa3xx_gcu_batch *buffer; | 391 | struct pxa3xx_gcu_batch *buffer; |
384 | struct pxa3xx_gcu_priv *priv = file_dev(file); | 392 | struct pxa3xx_gcu_priv *priv = to_pxa3xx_gcu_priv(file); |
385 | 393 | ||
386 | int words = count / 4; | 394 | int words = count / 4; |
387 | 395 | ||
388 | /* Does not need to be atomic. There's a lock in user space, | 396 | /* Does not need to be atomic. There's a lock in user space, |
389 | * but anyhow, this is just for statistics. */ | 397 | * but anyhow, this is just for statistics. */ |
390 | priv->shared->num_writes++; | 398 | priv->shared->num_writes++; |
391 | |||
392 | priv->shared->num_words += words; | 399 | priv->shared->num_words += words; |
393 | 400 | ||
394 | /* Last word reserved for batch buffer end command */ | 401 | /* Last word reserved for batch buffer end command */ |
@@ -406,10 +413,8 @@ pxa3xx_gcu_misc_write(struct file *file, const char *buff, | |||
406 | * Get buffer from free list | 413 | * Get buffer from free list |
407 | */ | 414 | */ |
408 | spin_lock_irqsave(&priv->spinlock, flags); | 415 | spin_lock_irqsave(&priv->spinlock, flags); |
409 | |||
410 | buffer = priv->free; | 416 | buffer = priv->free; |
411 | priv->free = buffer->next; | 417 | priv->free = buffer->next; |
412 | |||
413 | spin_unlock_irqrestore(&priv->spinlock, flags); | 418 | spin_unlock_irqrestore(&priv->spinlock, flags); |
414 | 419 | ||
415 | 420 | ||
@@ -454,10 +459,10 @@ pxa3xx_gcu_misc_write(struct file *file, const char *buff, | |||
454 | 459 | ||
455 | 460 | ||
456 | static long | 461 | static long |
457 | pxa3xx_gcu_misc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | 462 | pxa3xx_gcu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
458 | { | 463 | { |
459 | unsigned long flags; | 464 | unsigned long flags; |
460 | struct pxa3xx_gcu_priv *priv = file_dev(file); | 465 | struct pxa3xx_gcu_priv *priv = to_pxa3xx_gcu_priv(file); |
461 | 466 | ||
462 | switch (cmd) { | 467 | switch (cmd) { |
463 | case PXA3XX_GCU_IOCTL_RESET: | 468 | case PXA3XX_GCU_IOCTL_RESET: |
@@ -474,10 +479,10 @@ pxa3xx_gcu_misc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
474 | } | 479 | } |
475 | 480 | ||
476 | static int | 481 | static int |
477 | pxa3xx_gcu_misc_mmap(struct file *file, struct vm_area_struct *vma) | 482 | pxa3xx_gcu_mmap(struct file *file, struct vm_area_struct *vma) |
478 | { | 483 | { |
479 | unsigned int size = vma->vm_end - vma->vm_start; | 484 | unsigned int size = vma->vm_end - vma->vm_start; |
480 | struct pxa3xx_gcu_priv *priv = file_dev(file); | 485 | struct pxa3xx_gcu_priv *priv = to_pxa3xx_gcu_priv(file); |
481 | 486 | ||
482 | switch (vma->vm_pgoff) { | 487 | switch (vma->vm_pgoff) { |
483 | case 0: | 488 | case 0: |
@@ -532,8 +537,8 @@ static inline void pxa3xx_gcu_init_debug_timer(void) {} | |||
532 | #endif | 537 | #endif |
533 | 538 | ||
534 | static int | 539 | static int |
535 | add_buffer(struct platform_device *dev, | 540 | pxa3xx_gcu_add_buffer(struct device *dev, |
536 | struct pxa3xx_gcu_priv *priv) | 541 | struct pxa3xx_gcu_priv *priv) |
537 | { | 542 | { |
538 | struct pxa3xx_gcu_batch *buffer; | 543 | struct pxa3xx_gcu_batch *buffer; |
539 | 544 | ||
@@ -541,7 +546,7 @@ add_buffer(struct platform_device *dev, | |||
541 | if (!buffer) | 546 | if (!buffer) |
542 | return -ENOMEM; | 547 | return -ENOMEM; |
543 | 548 | ||
544 | buffer->ptr = dma_alloc_coherent(&dev->dev, PXA3XX_GCU_BATCH_WORDS * 4, | 549 | buffer->ptr = dma_alloc_coherent(dev, PXA3XX_GCU_BATCH_WORDS * 4, |
545 | &buffer->phys, GFP_KERNEL); | 550 | &buffer->phys, GFP_KERNEL); |
546 | if (!buffer->ptr) { | 551 | if (!buffer->ptr) { |
547 | kfree(buffer); | 552 | kfree(buffer); |
@@ -549,57 +554,49 @@ add_buffer(struct platform_device *dev, | |||
549 | } | 554 | } |
550 | 555 | ||
551 | buffer->next = priv->free; | 556 | buffer->next = priv->free; |
552 | |||
553 | priv->free = buffer; | 557 | priv->free = buffer; |
554 | 558 | ||
555 | return 0; | 559 | return 0; |
556 | } | 560 | } |
557 | 561 | ||
558 | static void | 562 | static void |
559 | free_buffers(struct platform_device *dev, | 563 | pxa3xx_gcu_free_buffers(struct device *dev, |
560 | struct pxa3xx_gcu_priv *priv) | 564 | struct pxa3xx_gcu_priv *priv) |
561 | { | 565 | { |
562 | struct pxa3xx_gcu_batch *next, *buffer = priv->free; | 566 | struct pxa3xx_gcu_batch *next, *buffer = priv->free; |
563 | 567 | ||
564 | while (buffer) { | 568 | while (buffer) { |
565 | next = buffer->next; | 569 | next = buffer->next; |
566 | 570 | ||
567 | dma_free_coherent(&dev->dev, PXA3XX_GCU_BATCH_WORDS * 4, | 571 | dma_free_coherent(dev, PXA3XX_GCU_BATCH_WORDS * 4, |
568 | buffer->ptr, buffer->phys); | 572 | buffer->ptr, buffer->phys); |
569 | 573 | ||
570 | kfree(buffer); | 574 | kfree(buffer); |
571 | |||
572 | buffer = next; | 575 | buffer = next; |
573 | } | 576 | } |
574 | 577 | ||
575 | priv->free = NULL; | 578 | priv->free = NULL; |
576 | } | 579 | } |
577 | 580 | ||
578 | static const struct file_operations misc_fops = { | 581 | static const struct file_operations pxa3xx_gcu_miscdev_fops = { |
579 | .owner = THIS_MODULE, | 582 | .owner = THIS_MODULE, |
580 | .write = pxa3xx_gcu_misc_write, | 583 | .open = pxa3xx_gcu_open, |
581 | .unlocked_ioctl = pxa3xx_gcu_misc_ioctl, | 584 | .write = pxa3xx_gcu_write, |
582 | .mmap = pxa3xx_gcu_misc_mmap | 585 | .unlocked_ioctl = pxa3xx_gcu_ioctl, |
586 | .mmap = pxa3xx_gcu_mmap, | ||
583 | }; | 587 | }; |
584 | 588 | ||
585 | static int pxa3xx_gcu_probe(struct platform_device *dev) | 589 | static int pxa3xx_gcu_probe(struct platform_device *pdev) |
586 | { | 590 | { |
587 | int i, ret, irq; | 591 | int i, ret, irq; |
588 | struct resource *r; | 592 | struct resource *r; |
589 | struct pxa3xx_gcu_priv *priv; | 593 | struct pxa3xx_gcu_priv *priv; |
594 | struct device *dev = &pdev->dev; | ||
590 | 595 | ||
591 | priv = kzalloc(sizeof(struct pxa3xx_gcu_priv), GFP_KERNEL); | 596 | priv = devm_kzalloc(dev, sizeof(struct pxa3xx_gcu_priv), GFP_KERNEL); |
592 | if (!priv) | 597 | if (!priv) |
593 | return -ENOMEM; | 598 | return -ENOMEM; |
594 | 599 | ||
595 | for (i = 0; i < 8; i++) { | ||
596 | ret = add_buffer(dev, priv); | ||
597 | if (ret) { | ||
598 | dev_err(&dev->dev, "failed to allocate DMA memory\n"); | ||
599 | goto err_free_priv; | ||
600 | } | ||
601 | } | ||
602 | |||
603 | init_waitqueue_head(&priv->wait_idle); | 600 | init_waitqueue_head(&priv->wait_idle); |
604 | init_waitqueue_head(&priv->wait_free); | 601 | init_waitqueue_head(&priv->wait_free); |
605 | spin_lock_init(&priv->spinlock); | 602 | spin_lock_init(&priv->spinlock); |
@@ -611,125 +608,99 @@ static int pxa3xx_gcu_probe(struct platform_device *dev) | |||
611 | 608 | ||
612 | priv->misc_dev.minor = MISCDEV_MINOR, | 609 | priv->misc_dev.minor = MISCDEV_MINOR, |
613 | priv->misc_dev.name = DRV_NAME, | 610 | priv->misc_dev.name = DRV_NAME, |
614 | priv->misc_dev.fops = &misc_fops, | 611 | priv->misc_dev.fops = &pxa3xx_gcu_miscdev_fops; |
615 | 612 | ||
616 | /* register misc device */ | 613 | /* handle IO resources */ |
617 | ret = misc_register(&priv->misc_dev); | 614 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
618 | if (ret < 0) { | 615 | priv->mmio_base = devm_request_and_ioremap(dev, r); |
619 | dev_err(&dev->dev, "misc_register() for minor %d failed\n", | 616 | if (IS_ERR(priv->mmio_base)) { |
620 | MISCDEV_MINOR); | 617 | dev_err(dev, "failed to map I/O memory\n"); |
621 | goto err_free_priv; | 618 | return PTR_ERR(priv->mmio_base); |
622 | } | 619 | } |
623 | 620 | ||
624 | /* handle IO resources */ | 621 | /* enable the clock */ |
625 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); | 622 | priv->clk = devm_clk_get(dev, NULL); |
626 | if (r == NULL) { | 623 | if (IS_ERR(priv->clk)) { |
627 | dev_err(&dev->dev, "no I/O memory resource defined\n"); | 624 | dev_err(dev, "failed to get clock\n"); |
628 | ret = -ENODEV; | 625 | return PTR_ERR(priv->clk); |
629 | goto err_misc_deregister; | ||
630 | } | 626 | } |
631 | 627 | ||
632 | if (!request_mem_region(r->start, resource_size(r), dev->name)) { | 628 | /* request the IRQ */ |
633 | dev_err(&dev->dev, "failed to request I/O memory\n"); | 629 | irq = platform_get_irq(pdev, 0); |
634 | ret = -EBUSY; | 630 | if (irq < 0) { |
635 | goto err_misc_deregister; | 631 | dev_err(dev, "no IRQ defined\n"); |
632 | return -ENODEV; | ||
636 | } | 633 | } |
637 | 634 | ||
638 | priv->mmio_base = ioremap_nocache(r->start, resource_size(r)); | 635 | ret = devm_request_irq(dev, irq, pxa3xx_gcu_handle_irq, |
639 | if (!priv->mmio_base) { | 636 | 0, DRV_NAME, priv); |
640 | dev_err(&dev->dev, "failed to map I/O memory\n"); | 637 | if (ret < 0) { |
641 | ret = -EBUSY; | 638 | dev_err(dev, "request_irq failed\n"); |
642 | goto err_free_mem_region; | 639 | return ret; |
643 | } | 640 | } |
644 | 641 | ||
645 | /* allocate dma memory */ | 642 | /* allocate dma memory */ |
646 | priv->shared = dma_alloc_coherent(&dev->dev, SHARED_SIZE, | 643 | priv->shared = dma_alloc_coherent(dev, SHARED_SIZE, |
647 | &priv->shared_phys, GFP_KERNEL); | 644 | &priv->shared_phys, GFP_KERNEL); |
648 | |||
649 | if (!priv->shared) { | 645 | if (!priv->shared) { |
650 | dev_err(&dev->dev, "failed to allocate DMA memory\n"); | 646 | dev_err(dev, "failed to allocate DMA memory\n"); |
651 | ret = -ENOMEM; | 647 | return -ENOMEM; |
652 | goto err_free_io; | ||
653 | } | 648 | } |
654 | 649 | ||
655 | /* enable the clock */ | 650 | /* register misc device */ |
656 | priv->clk = clk_get(&dev->dev, NULL); | 651 | ret = misc_register(&priv->misc_dev); |
657 | if (IS_ERR(priv->clk)) { | 652 | if (ret < 0) { |
658 | dev_err(&dev->dev, "failed to get clock\n"); | 653 | dev_err(dev, "misc_register() for minor %d failed\n", |
659 | ret = -ENODEV; | 654 | MISCDEV_MINOR); |
660 | goto err_free_dma; | 655 | goto err_free_dma; |
661 | } | 656 | } |
662 | 657 | ||
663 | ret = clk_enable(priv->clk); | 658 | ret = clk_enable(priv->clk); |
664 | if (ret < 0) { | 659 | if (ret < 0) { |
665 | dev_err(&dev->dev, "failed to enable clock\n"); | 660 | dev_err(dev, "failed to enable clock\n"); |
666 | goto err_put_clk; | 661 | goto err_misc_deregister; |
667 | } | ||
668 | |||
669 | /* request the IRQ */ | ||
670 | irq = platform_get_irq(dev, 0); | ||
671 | if (irq < 0) { | ||
672 | dev_err(&dev->dev, "no IRQ defined\n"); | ||
673 | ret = -ENODEV; | ||
674 | goto err_put_clk; | ||
675 | } | 662 | } |
676 | 663 | ||
677 | ret = request_irq(irq, pxa3xx_gcu_handle_irq, | 664 | for (i = 0; i < 8; i++) { |
678 | 0, DRV_NAME, priv); | 665 | ret = pxa3xx_gcu_add_buffer(dev, priv); |
679 | if (ret) { | 666 | if (ret) { |
680 | dev_err(&dev->dev, "request_irq failed\n"); | 667 | dev_err(dev, "failed to allocate DMA memory\n"); |
681 | ret = -EBUSY; | 668 | goto err_disable_clk; |
682 | goto err_put_clk; | 669 | } |
683 | } | 670 | } |
684 | 671 | ||
685 | platform_set_drvdata(dev, priv); | 672 | platform_set_drvdata(pdev, priv); |
686 | priv->resource_mem = r; | 673 | priv->resource_mem = r; |
687 | pxa3xx_gcu_reset(priv); | 674 | pxa3xx_gcu_reset(priv); |
688 | pxa3xx_gcu_init_debug_timer(); | 675 | pxa3xx_gcu_init_debug_timer(); |
689 | 676 | ||
690 | dev_info(&dev->dev, "registered @0x%p, DMA 0x%p (%d bytes), IRQ %d\n", | 677 | dev_info(dev, "registered @0x%p, DMA 0x%p (%d bytes), IRQ %d\n", |
691 | (void *) r->start, (void *) priv->shared_phys, | 678 | (void *) r->start, (void *) priv->shared_phys, |
692 | SHARED_SIZE, irq); | 679 | SHARED_SIZE, irq); |
693 | return 0; | 680 | return 0; |
694 | 681 | ||
695 | err_put_clk: | ||
696 | clk_disable(priv->clk); | ||
697 | clk_put(priv->clk); | ||
698 | |||
699 | err_free_dma: | 682 | err_free_dma: |
700 | dma_free_coherent(&dev->dev, SHARED_SIZE, | 683 | dma_free_coherent(dev, SHARED_SIZE, |
701 | priv->shared, priv->shared_phys); | 684 | priv->shared, priv->shared_phys); |
702 | 685 | ||
703 | err_free_io: | ||
704 | iounmap(priv->mmio_base); | ||
705 | |||
706 | err_free_mem_region: | ||
707 | release_mem_region(r->start, resource_size(r)); | ||
708 | |||
709 | err_misc_deregister: | 686 | err_misc_deregister: |
710 | misc_deregister(&priv->misc_dev); | 687 | misc_deregister(&priv->misc_dev); |
711 | 688 | ||
712 | err_free_priv: | 689 | err_disable_clk: |
713 | free_buffers(dev, priv); | 690 | clk_disable(priv->clk); |
714 | kfree(priv); | 691 | |
715 | return ret; | 692 | return ret; |
716 | } | 693 | } |
717 | 694 | ||
718 | static int pxa3xx_gcu_remove(struct platform_device *dev) | 695 | static int pxa3xx_gcu_remove(struct platform_device *pdev) |
719 | { | 696 | { |
720 | struct pxa3xx_gcu_priv *priv = platform_get_drvdata(dev); | 697 | struct pxa3xx_gcu_priv *priv = platform_get_drvdata(pdev); |
721 | struct resource *r = priv->resource_mem; | 698 | struct device *dev = &pdev->dev; |
722 | 699 | ||
723 | pxa3xx_gcu_wait_idle(priv); | 700 | pxa3xx_gcu_wait_idle(priv); |
724 | |||
725 | misc_deregister(&priv->misc_dev); | 701 | misc_deregister(&priv->misc_dev); |
726 | dma_free_coherent(&dev->dev, SHARED_SIZE, | 702 | dma_free_coherent(dev, SHARED_SIZE, priv->shared, priv->shared_phys); |
727 | priv->shared, priv->shared_phys); | 703 | pxa3xx_gcu_free_buffers(dev, priv); |
728 | iounmap(priv->mmio_base); | ||
729 | release_mem_region(r->start, resource_size(r)); | ||
730 | clk_disable(priv->clk); | ||
731 | free_buffers(dev, priv); | ||
732 | kfree(priv); | ||
733 | 704 | ||
734 | return 0; | 705 | return 0; |
735 | } | 706 | } |
diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c index 4f26bc28e60b..bd40f5ecd901 100644 --- a/drivers/video/sis/init.c +++ b/drivers/video/sis/init.c | |||
@@ -651,6 +651,7 @@ SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDispla | |||
651 | switch(VDisplay) { | 651 | switch(VDisplay) { |
652 | case 720: | 652 | case 720: |
653 | ModeIndex = ModeIndex_1280x720[Depth]; | 653 | ModeIndex = ModeIndex_1280x720[Depth]; |
654 | break; | ||
654 | case 768: | 655 | case 768: |
655 | if(VGAEngine == SIS_300_VGA) { | 656 | if(VGAEngine == SIS_300_VGA) { |
656 | ModeIndex = ModeIndex_300_1280x768[Depth]; | 657 | ModeIndex = ModeIndex_300_1280x768[Depth]; |
diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c index 07c7df9ee77b..65ba9921506e 100644 --- a/drivers/video/tgafb.c +++ b/drivers/video/tgafb.c | |||
@@ -182,6 +182,8 @@ tgafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
182 | 182 | ||
183 | if (var->xres_virtual != var->xres || var->yres_virtual != var->yres) | 183 | if (var->xres_virtual != var->xres || var->yres_virtual != var->yres) |
184 | return -EINVAL; | 184 | return -EINVAL; |
185 | if (var->xres * var->yres * (var->bits_per_pixel >> 3) > info->fix.smem_len) | ||
186 | return -EINVAL; | ||
185 | if (var->nonstd) | 187 | if (var->nonstd) |
186 | return -EINVAL; | 188 | return -EINVAL; |
187 | if (1000000000 / var->pixclock > TGA_PLL_MAX_FREQ) | 189 | if (1000000000 / var->pixclock > TGA_PLL_MAX_FREQ) |
@@ -190,8 +192,8 @@ tgafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
190 | return -EINVAL; | 192 | return -EINVAL; |
191 | 193 | ||
192 | /* Some of the acceleration routines assume the line width is | 194 | /* Some of the acceleration routines assume the line width is |
193 | a multiple of 64 bytes. */ | 195 | a multiple of 8 bytes. */ |
194 | if (var->xres * (par->tga_type == TGA_TYPE_8PLANE ? 1 : 4) % 64) | 196 | if (var->xres * (par->tga_type == TGA_TYPE_8PLANE ? 1 : 4) % 8) |
195 | return -EINVAL; | 197 | return -EINVAL; |
196 | 198 | ||
197 | return 0; | 199 | return 0; |
@@ -262,6 +264,7 @@ tgafb_set_par(struct fb_info *info) | |||
262 | par->yres = info->var.yres; | 264 | par->yres = info->var.yres; |
263 | par->pll_freq = pll_freq = 1000000000 / info->var.pixclock; | 265 | par->pll_freq = pll_freq = 1000000000 / info->var.pixclock; |
264 | par->bits_per_pixel = info->var.bits_per_pixel; | 266 | par->bits_per_pixel = info->var.bits_per_pixel; |
267 | info->fix.line_length = par->xres * (par->bits_per_pixel >> 3); | ||
265 | 268 | ||
266 | tga_type = par->tga_type; | 269 | tga_type = par->tga_type; |
267 | 270 | ||
@@ -1136,222 +1139,57 @@ copyarea_line_32bpp(struct fb_info *info, u32 dy, u32 sy, | |||
1136 | __raw_writel(TGA_MODE_SBM_24BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); | 1139 | __raw_writel(TGA_MODE_SBM_24BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); |
1137 | } | 1140 | } |
1138 | 1141 | ||
1139 | /* The general case of forward copy in 8bpp mode. */ | 1142 | /* The (almost) general case of backward copy in 8bpp mode. */ |
1140 | static inline void | 1143 | static inline void |
1141 | copyarea_foreward_8bpp(struct fb_info *info, u32 dx, u32 dy, u32 sx, u32 sy, | 1144 | copyarea_8bpp(struct fb_info *info, u32 dx, u32 dy, u32 sx, u32 sy, |
1142 | u32 height, u32 width, u32 line_length) | 1145 | u32 height, u32 width, u32 line_length, |
1146 | const struct fb_copyarea *area) | ||
1143 | { | 1147 | { |
1144 | struct tga_par *par = (struct tga_par *) info->par; | 1148 | struct tga_par *par = (struct tga_par *) info->par; |
1145 | unsigned long i, copied, left; | 1149 | unsigned i, yincr; |
1146 | unsigned long dpos, spos, dalign, salign, yincr; | 1150 | int depos, sepos, backward, last_step, step; |
1147 | u32 smask_first, dmask_first, dmask_last; | 1151 | u32 mask_last; |
1148 | int pixel_shift, need_prime, need_second; | 1152 | unsigned n32; |
1149 | unsigned long n64, n32, xincr_first; | ||
1150 | void __iomem *tga_regs; | 1153 | void __iomem *tga_regs; |
1151 | void __iomem *tga_fb; | 1154 | void __iomem *tga_fb; |
1152 | 1155 | ||
1153 | yincr = line_length; | 1156 | /* Do acceleration only if we are aligned on 8 pixels */ |
1154 | if (dy > sy) { | 1157 | if ((dx | sx | width) & 7) { |
1155 | dy += height - 1; | 1158 | cfb_copyarea(info, area); |
1156 | sy += height - 1; | 1159 | return; |
1157 | yincr = -yincr; | ||
1158 | } | ||
1159 | |||
1160 | /* Compute the offsets and alignments in the frame buffer. | ||
1161 | More than anything else, these control how we do copies. */ | ||
1162 | dpos = dy * line_length + dx; | ||
1163 | spos = sy * line_length + sx; | ||
1164 | dalign = dpos & 7; | ||
1165 | salign = spos & 7; | ||
1166 | dpos &= -8; | ||
1167 | spos &= -8; | ||
1168 | |||
1169 | /* Compute the value for the PIXELSHIFT register. This controls | ||
1170 | both non-co-aligned source and destination and copy direction. */ | ||
1171 | if (dalign >= salign) | ||
1172 | pixel_shift = dalign - salign; | ||
1173 | else | ||
1174 | pixel_shift = 8 - (salign - dalign); | ||
1175 | |||
1176 | /* Figure out if we need an additional priming step for the | ||
1177 | residue register. */ | ||
1178 | need_prime = (salign > dalign); | ||
1179 | if (need_prime) | ||
1180 | dpos -= 8; | ||
1181 | |||
1182 | /* Begin by copying the leading unaligned destination. Copy enough | ||
1183 | to make the next destination address 32-byte aligned. */ | ||
1184 | copied = 32 - (dalign + (dpos & 31)); | ||
1185 | if (copied == 32) | ||
1186 | copied = 0; | ||
1187 | xincr_first = (copied + 7) & -8; | ||
1188 | smask_first = dmask_first = (1ul << copied) - 1; | ||
1189 | smask_first <<= salign; | ||
1190 | dmask_first <<= dalign + need_prime*8; | ||
1191 | if (need_prime && copied > 24) | ||
1192 | copied -= 8; | ||
1193 | left = width - copied; | ||
1194 | |||
1195 | /* Care for small copies. */ | ||
1196 | if (copied > width) { | ||
1197 | u32 t; | ||
1198 | t = (1ul << width) - 1; | ||
1199 | t <<= dalign + need_prime*8; | ||
1200 | dmask_first &= t; | ||
1201 | left = 0; | ||
1202 | } | ||
1203 | |||
1204 | /* Attempt to use 64-byte copies. This is only possible if the | ||
1205 | source and destination are co-aligned at 64 bytes. */ | ||
1206 | n64 = need_second = 0; | ||
1207 | if ((dpos & 63) == (spos & 63) | ||
1208 | && (height == 1 || line_length % 64 == 0)) { | ||
1209 | /* We may need a 32-byte copy to ensure 64 byte alignment. */ | ||
1210 | need_second = (dpos + xincr_first) & 63; | ||
1211 | if ((need_second & 32) != need_second) | ||
1212 | printk(KERN_ERR "tgafb: need_second wrong\n"); | ||
1213 | if (left >= need_second + 64) { | ||
1214 | left -= need_second; | ||
1215 | n64 = left / 64; | ||
1216 | left %= 64; | ||
1217 | } else | ||
1218 | need_second = 0; | ||
1219 | } | ||
1220 | |||
1221 | /* Copy trailing full 32-byte sections. This will be the main | ||
1222 | loop if the 64 byte loop can't be used. */ | ||
1223 | n32 = left / 32; | ||
1224 | left %= 32; | ||
1225 | |||
1226 | /* Copy the trailing unaligned destination. */ | ||
1227 | dmask_last = (1ul << left) - 1; | ||
1228 | |||
1229 | tga_regs = par->tga_regs_base; | ||
1230 | tga_fb = par->tga_fb_base; | ||
1231 | |||
1232 | /* Set up the MODE and PIXELSHIFT registers. */ | ||
1233 | __raw_writel(TGA_MODE_SBM_8BPP|TGA_MODE_COPY, tga_regs+TGA_MODE_REG); | ||
1234 | __raw_writel(pixel_shift, tga_regs+TGA_PIXELSHIFT_REG); | ||
1235 | wmb(); | ||
1236 | |||
1237 | for (i = 0; i < height; ++i) { | ||
1238 | unsigned long j; | ||
1239 | void __iomem *sfb; | ||
1240 | void __iomem *dfb; | ||
1241 | |||
1242 | sfb = tga_fb + spos; | ||
1243 | dfb = tga_fb + dpos; | ||
1244 | if (dmask_first) { | ||
1245 | __raw_writel(smask_first, sfb); | ||
1246 | wmb(); | ||
1247 | __raw_writel(dmask_first, dfb); | ||
1248 | wmb(); | ||
1249 | sfb += xincr_first; | ||
1250 | dfb += xincr_first; | ||
1251 | } | ||
1252 | |||
1253 | if (need_second) { | ||
1254 | __raw_writel(0xffffffff, sfb); | ||
1255 | wmb(); | ||
1256 | __raw_writel(0xffffffff, dfb); | ||
1257 | wmb(); | ||
1258 | sfb += 32; | ||
1259 | dfb += 32; | ||
1260 | } | ||
1261 | |||
1262 | if (n64 && (((unsigned long)sfb | (unsigned long)dfb) & 63)) | ||
1263 | printk(KERN_ERR | ||
1264 | "tgafb: misaligned copy64 (s:%p, d:%p)\n", | ||
1265 | sfb, dfb); | ||
1266 | |||
1267 | for (j = 0; j < n64; ++j) { | ||
1268 | __raw_writel(sfb - tga_fb, tga_regs+TGA_COPY64_SRC); | ||
1269 | wmb(); | ||
1270 | __raw_writel(dfb - tga_fb, tga_regs+TGA_COPY64_DST); | ||
1271 | wmb(); | ||
1272 | sfb += 64; | ||
1273 | dfb += 64; | ||
1274 | } | ||
1275 | |||
1276 | for (j = 0; j < n32; ++j) { | ||
1277 | __raw_writel(0xffffffff, sfb); | ||
1278 | wmb(); | ||
1279 | __raw_writel(0xffffffff, dfb); | ||
1280 | wmb(); | ||
1281 | sfb += 32; | ||
1282 | dfb += 32; | ||
1283 | } | ||
1284 | |||
1285 | if (dmask_last) { | ||
1286 | __raw_writel(0xffffffff, sfb); | ||
1287 | wmb(); | ||
1288 | __raw_writel(dmask_last, dfb); | ||
1289 | wmb(); | ||
1290 | } | ||
1291 | |||
1292 | spos += yincr; | ||
1293 | dpos += yincr; | ||
1294 | } | 1160 | } |
1295 | 1161 | ||
1296 | /* Reset the MODE register to normal. */ | ||
1297 | __raw_writel(TGA_MODE_SBM_8BPP|TGA_MODE_SIMPLE, tga_regs+TGA_MODE_REG); | ||
1298 | } | ||
1299 | |||
1300 | /* The (almost) general case of backward copy in 8bpp mode. */ | ||
1301 | static inline void | ||
1302 | copyarea_backward_8bpp(struct fb_info *info, u32 dx, u32 dy, u32 sx, u32 sy, | ||
1303 | u32 height, u32 width, u32 line_length, | ||
1304 | const struct fb_copyarea *area) | ||
1305 | { | ||
1306 | struct tga_par *par = (struct tga_par *) info->par; | ||
1307 | unsigned long i, left, yincr; | ||
1308 | unsigned long depos, sepos, dealign, sealign; | ||
1309 | u32 mask_first, mask_last; | ||
1310 | unsigned long n32; | ||
1311 | void __iomem *tga_regs; | ||
1312 | void __iomem *tga_fb; | ||
1313 | |||
1314 | yincr = line_length; | 1162 | yincr = line_length; |
1315 | if (dy > sy) { | 1163 | if (dy > sy) { |
1316 | dy += height - 1; | 1164 | dy += height - 1; |
1317 | sy += height - 1; | 1165 | sy += height - 1; |
1318 | yincr = -yincr; | 1166 | yincr = -yincr; |
1319 | } | 1167 | } |
1168 | backward = dy == sy && dx > sx && dx < sx + width; | ||
1320 | 1169 | ||
1321 | /* Compute the offsets and alignments in the frame buffer. | 1170 | /* Compute the offsets and alignments in the frame buffer. |
1322 | More than anything else, these control how we do copies. */ | 1171 | More than anything else, these control how we do copies. */ |
1323 | depos = dy * line_length + dx + width; | 1172 | depos = dy * line_length + dx; |
1324 | sepos = sy * line_length + sx + width; | 1173 | sepos = sy * line_length + sx; |
1325 | dealign = depos & 7; | 1174 | if (backward) |
1326 | sealign = sepos & 7; | 1175 | depos += width, sepos += width; |
1327 | |||
1328 | /* ??? The documentation appears to be incorrect (or very | ||
1329 | misleading) wrt how pixel shifting works in backward copy | ||
1330 | mode, i.e. when PIXELSHIFT is negative. I give up for now. | ||
1331 | Do handle the common case of co-aligned backward copies, | ||
1332 | but frob everything else back on generic code. */ | ||
1333 | if (dealign != sealign) { | ||
1334 | cfb_copyarea(info, area); | ||
1335 | return; | ||
1336 | } | ||
1337 | |||
1338 | /* We begin the copy with the trailing pixels of the | ||
1339 | unaligned destination. */ | ||
1340 | mask_first = (1ul << dealign) - 1; | ||
1341 | left = width - dealign; | ||
1342 | |||
1343 | /* Care for small copies. */ | ||
1344 | if (dealign > width) { | ||
1345 | mask_first ^= (1ul << (dealign - width)) - 1; | ||
1346 | left = 0; | ||
1347 | } | ||
1348 | 1176 | ||
1349 | /* Next copy full words at a time. */ | 1177 | /* Next copy full words at a time. */ |
1350 | n32 = left / 32; | 1178 | n32 = width / 32; |
1351 | left %= 32; | 1179 | last_step = width % 32; |
1352 | 1180 | ||
1353 | /* Finally copy the unaligned head of the span. */ | 1181 | /* Finally copy the unaligned head of the span. */ |
1354 | mask_last = -1 << (32 - left); | 1182 | mask_last = (1ul << last_step) - 1; |
1183 | |||
1184 | if (!backward) { | ||
1185 | step = 32; | ||
1186 | last_step = 32; | ||
1187 | } else { | ||
1188 | step = -32; | ||
1189 | last_step = -last_step; | ||
1190 | sepos -= 32; | ||
1191 | depos -= 32; | ||
1192 | } | ||
1355 | 1193 | ||
1356 | tga_regs = par->tga_regs_base; | 1194 | tga_regs = par->tga_regs_base; |
1357 | tga_fb = par->tga_fb_base; | 1195 | tga_fb = par->tga_fb_base; |
@@ -1368,25 +1206,33 @@ copyarea_backward_8bpp(struct fb_info *info, u32 dx, u32 dy, u32 sx, u32 sy, | |||
1368 | 1206 | ||
1369 | sfb = tga_fb + sepos; | 1207 | sfb = tga_fb + sepos; |
1370 | dfb = tga_fb + depos; | 1208 | dfb = tga_fb + depos; |
1371 | if (mask_first) { | ||
1372 | __raw_writel(mask_first, sfb); | ||
1373 | wmb(); | ||
1374 | __raw_writel(mask_first, dfb); | ||
1375 | wmb(); | ||
1376 | } | ||
1377 | 1209 | ||
1378 | for (j = 0; j < n32; ++j) { | 1210 | for (j = 0; j < n32; j++) { |
1379 | sfb -= 32; | 1211 | if (j < 2 && j + 1 < n32 && !backward && |
1380 | dfb -= 32; | 1212 | !(((unsigned long)sfb | (unsigned long)dfb) & 63)) { |
1213 | do { | ||
1214 | __raw_writel(sfb - tga_fb, tga_regs+TGA_COPY64_SRC); | ||
1215 | wmb(); | ||
1216 | __raw_writel(dfb - tga_fb, tga_regs+TGA_COPY64_DST); | ||
1217 | wmb(); | ||
1218 | sfb += 64; | ||
1219 | dfb += 64; | ||
1220 | j += 2; | ||
1221 | } while (j + 1 < n32); | ||
1222 | j--; | ||
1223 | continue; | ||
1224 | } | ||
1381 | __raw_writel(0xffffffff, sfb); | 1225 | __raw_writel(0xffffffff, sfb); |
1382 | wmb(); | 1226 | wmb(); |
1383 | __raw_writel(0xffffffff, dfb); | 1227 | __raw_writel(0xffffffff, dfb); |
1384 | wmb(); | 1228 | wmb(); |
1229 | sfb += step; | ||
1230 | dfb += step; | ||
1385 | } | 1231 | } |
1386 | 1232 | ||
1387 | if (mask_last) { | 1233 | if (mask_last) { |
1388 | sfb -= 32; | 1234 | sfb += last_step - step; |
1389 | dfb -= 32; | 1235 | dfb += last_step - step; |
1390 | __raw_writel(mask_last, sfb); | 1236 | __raw_writel(mask_last, sfb); |
1391 | wmb(); | 1237 | wmb(); |
1392 | __raw_writel(mask_last, dfb); | 1238 | __raw_writel(mask_last, dfb); |
@@ -1434,7 +1280,7 @@ tgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | |||
1434 | bpp = info->var.bits_per_pixel; | 1280 | bpp = info->var.bits_per_pixel; |
1435 | 1281 | ||
1436 | /* Detect copies of the entire line. */ | 1282 | /* Detect copies of the entire line. */ |
1437 | if (width * (bpp >> 3) == line_length) { | 1283 | if (!(line_length & 63) && width * (bpp >> 3) == line_length) { |
1438 | if (bpp == 8) | 1284 | if (bpp == 8) |
1439 | copyarea_line_8bpp(info, dy, sy, height, width); | 1285 | copyarea_line_8bpp(info, dy, sy, height, width); |
1440 | else | 1286 | else |
@@ -1447,14 +1293,9 @@ tgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area) | |||
1447 | else if (bpp == 32) | 1293 | else if (bpp == 32) |
1448 | cfb_copyarea(info, area); | 1294 | cfb_copyarea(info, area); |
1449 | 1295 | ||
1450 | /* Detect overlapping source and destination that requires | ||
1451 | a backward copy. */ | ||
1452 | else if (dy == sy && dx > sx && dx < sx + width) | ||
1453 | copyarea_backward_8bpp(info, dx, dy, sx, sy, height, | ||
1454 | width, line_length, area); | ||
1455 | else | 1296 | else |
1456 | copyarea_foreward_8bpp(info, dx, dy, sx, sy, height, | 1297 | copyarea_8bpp(info, dx, dy, sx, sy, height, |
1457 | width, line_length); | 1298 | width, line_length, area); |
1458 | } | 1299 | } |
1459 | 1300 | ||
1460 | 1301 | ||
@@ -1470,6 +1311,7 @@ tgafb_init_fix(struct fb_info *info) | |||
1470 | int tga_bus_tc = TGA_BUS_TC(par->dev); | 1311 | int tga_bus_tc = TGA_BUS_TC(par->dev); |
1471 | u8 tga_type = par->tga_type; | 1312 | u8 tga_type = par->tga_type; |
1472 | const char *tga_type_name = NULL; | 1313 | const char *tga_type_name = NULL; |
1314 | unsigned memory_size; | ||
1473 | 1315 | ||
1474 | switch (tga_type) { | 1316 | switch (tga_type) { |
1475 | case TGA_TYPE_8PLANE: | 1317 | case TGA_TYPE_8PLANE: |
@@ -1477,22 +1319,27 @@ tgafb_init_fix(struct fb_info *info) | |||
1477 | tga_type_name = "Digital ZLXp-E1"; | 1319 | tga_type_name = "Digital ZLXp-E1"; |
1478 | if (tga_bus_tc) | 1320 | if (tga_bus_tc) |
1479 | tga_type_name = "Digital ZLX-E1"; | 1321 | tga_type_name = "Digital ZLX-E1"; |
1322 | memory_size = 2097152; | ||
1480 | break; | 1323 | break; |
1481 | case TGA_TYPE_24PLANE: | 1324 | case TGA_TYPE_24PLANE: |
1482 | if (tga_bus_pci) | 1325 | if (tga_bus_pci) |
1483 | tga_type_name = "Digital ZLXp-E2"; | 1326 | tga_type_name = "Digital ZLXp-E2"; |
1484 | if (tga_bus_tc) | 1327 | if (tga_bus_tc) |
1485 | tga_type_name = "Digital ZLX-E2"; | 1328 | tga_type_name = "Digital ZLX-E2"; |
1329 | memory_size = 8388608; | ||
1486 | break; | 1330 | break; |
1487 | case TGA_TYPE_24PLUSZ: | 1331 | case TGA_TYPE_24PLUSZ: |
1488 | if (tga_bus_pci) | 1332 | if (tga_bus_pci) |
1489 | tga_type_name = "Digital ZLXp-E3"; | 1333 | tga_type_name = "Digital ZLXp-E3"; |
1490 | if (tga_bus_tc) | 1334 | if (tga_bus_tc) |
1491 | tga_type_name = "Digital ZLX-E3"; | 1335 | tga_type_name = "Digital ZLX-E3"; |
1336 | memory_size = 16777216; | ||
1492 | break; | 1337 | break; |
1493 | } | 1338 | } |
1494 | if (!tga_type_name) | 1339 | if (!tga_type_name) { |
1495 | tga_type_name = "Unknown"; | 1340 | tga_type_name = "Unknown"; |
1341 | memory_size = 16777216; | ||
1342 | } | ||
1496 | 1343 | ||
1497 | strlcpy(info->fix.id, tga_type_name, sizeof(info->fix.id)); | 1344 | strlcpy(info->fix.id, tga_type_name, sizeof(info->fix.id)); |
1498 | 1345 | ||
@@ -1502,9 +1349,8 @@ tgafb_init_fix(struct fb_info *info) | |||
1502 | ? FB_VISUAL_PSEUDOCOLOR | 1349 | ? FB_VISUAL_PSEUDOCOLOR |
1503 | : FB_VISUAL_DIRECTCOLOR); | 1350 | : FB_VISUAL_DIRECTCOLOR); |
1504 | 1351 | ||
1505 | info->fix.line_length = par->xres * (par->bits_per_pixel >> 3); | ||
1506 | info->fix.smem_start = (size_t) par->tga_fb_base; | 1352 | info->fix.smem_start = (size_t) par->tga_fb_base; |
1507 | info->fix.smem_len = info->fix.line_length * par->yres; | 1353 | info->fix.smem_len = memory_size; |
1508 | info->fix.mmio_start = (size_t) par->tga_regs_base; | 1354 | info->fix.mmio_start = (size_t) par->tga_regs_base; |
1509 | info->fix.mmio_len = 512; | 1355 | info->fix.mmio_len = 512; |
1510 | 1356 | ||
@@ -1628,6 +1474,9 @@ static int tgafb_register(struct device *dev) | |||
1628 | modedb_tga = &modedb_tc; | 1474 | modedb_tga = &modedb_tc; |
1629 | modedbsize_tga = 1; | 1475 | modedbsize_tga = 1; |
1630 | } | 1476 | } |
1477 | |||
1478 | tgafb_init_fix(info); | ||
1479 | |||
1631 | ret = fb_find_mode(&info->var, info, | 1480 | ret = fb_find_mode(&info->var, info, |
1632 | mode_option ? mode_option : mode_option_tga, | 1481 | mode_option ? mode_option : mode_option_tga, |
1633 | modedb_tga, modedbsize_tga, NULL, | 1482 | modedb_tga, modedbsize_tga, NULL, |
@@ -1645,7 +1494,6 @@ static int tgafb_register(struct device *dev) | |||
1645 | } | 1494 | } |
1646 | 1495 | ||
1647 | tgafb_set_par(info); | 1496 | tgafb_set_par(info); |
1648 | tgafb_init_fix(info); | ||
1649 | 1497 | ||
1650 | if (register_framebuffer(info) < 0) { | 1498 | if (register_framebuffer(info) < 0) { |
1651 | printk(KERN_ERR "tgafb: Could not register framebuffer\n"); | 1499 | printk(KERN_ERR "tgafb: Could not register framebuffer\n"); |
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index 1f38445014c1..509d452e8f91 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c | |||
@@ -1474,12 +1474,7 @@ static void uvesafb_init_info(struct fb_info *info, struct vbe_mode_ib *mode) | |||
1474 | * used video mode, i.e. the minimum amount of | 1474 | * used video mode, i.e. the minimum amount of |
1475 | * memory we need. | 1475 | * memory we need. |
1476 | */ | 1476 | */ |
1477 | if (mode != NULL) { | 1477 | size_vmode = info->var.yres * mode->bytes_per_scan_line; |
1478 | size_vmode = info->var.yres * mode->bytes_per_scan_line; | ||
1479 | } else { | ||
1480 | size_vmode = info->var.yres * info->var.xres * | ||
1481 | ((info->var.bits_per_pixel + 7) >> 3); | ||
1482 | } | ||
1483 | 1478 | ||
1484 | /* | 1479 | /* |
1485 | * size_total -- all video memory we have. Used for mtrr | 1480 | * size_total -- all video memory we have. Used for mtrr |
@@ -1812,11 +1807,9 @@ static int uvesafb_remove(struct platform_device *dev) | |||
1812 | fb_destroy_modedb(info->monspecs.modedb); | 1807 | fb_destroy_modedb(info->monspecs.modedb); |
1813 | fb_dealloc_cmap(&info->cmap); | 1808 | fb_dealloc_cmap(&info->cmap); |
1814 | 1809 | ||
1815 | if (par) { | 1810 | kfree(par->vbe_modes); |
1816 | kfree(par->vbe_modes); | 1811 | kfree(par->vbe_state_orig); |
1817 | kfree(par->vbe_state_orig); | 1812 | kfree(par->vbe_state_saved); |
1818 | kfree(par->vbe_state_saved); | ||
1819 | } | ||
1820 | 1813 | ||
1821 | framebuffer_release(info); | 1814 | framebuffer_release(info); |
1822 | } | 1815 | } |
diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c index 1c7da3b098d6..6170e7f58640 100644 --- a/drivers/video/vesafb.c +++ b/drivers/video/vesafb.c | |||
@@ -179,7 +179,6 @@ static void vesafb_destroy(struct fb_info *info) | |||
179 | if (info->screen_base) | 179 | if (info->screen_base) |
180 | iounmap(info->screen_base); | 180 | iounmap(info->screen_base); |
181 | release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); | 181 | release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); |
182 | framebuffer_release(info); | ||
183 | } | 182 | } |
184 | 183 | ||
185 | static struct fb_ops vesafb_ops = { | 184 | static struct fb_ops vesafb_ops = { |
@@ -297,6 +296,7 @@ static int vesafb_probe(struct platform_device *dev) | |||
297 | release_mem_region(vesafb_fix.smem_start, size_total); | 296 | release_mem_region(vesafb_fix.smem_start, size_total); |
298 | return -ENOMEM; | 297 | return -ENOMEM; |
299 | } | 298 | } |
299 | platform_set_drvdata(dev, info); | ||
300 | info->pseudo_palette = info->par; | 300 | info->pseudo_palette = info->par; |
301 | info->par = NULL; | 301 | info->par = NULL; |
302 | 302 | ||
@@ -499,12 +499,23 @@ err: | |||
499 | return err; | 499 | return err; |
500 | } | 500 | } |
501 | 501 | ||
502 | static int vesafb_remove(struct platform_device *pdev) | ||
503 | { | ||
504 | struct fb_info *info = platform_get_drvdata(pdev); | ||
505 | |||
506 | unregister_framebuffer(info); | ||
507 | framebuffer_release(info); | ||
508 | |||
509 | return 0; | ||
510 | } | ||
511 | |||
502 | static struct platform_driver vesafb_driver = { | 512 | static struct platform_driver vesafb_driver = { |
503 | .driver = { | 513 | .driver = { |
504 | .name = "vesa-framebuffer", | 514 | .name = "vesa-framebuffer", |
505 | .owner = THIS_MODULE, | 515 | .owner = THIS_MODULE, |
506 | }, | 516 | }, |
507 | .probe = vesafb_probe, | 517 | .probe = vesafb_probe, |
518 | .remove = vesafb_remove, | ||
508 | }; | 519 | }; |
509 | 520 | ||
510 | module_platform_driver(vesafb_driver); | 521 | module_platform_driver(vesafb_driver); |
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 6ff1a91e9dfd..553cff2f3f4c 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <linux/of_platform.h> | 33 | #include <linux/of_platform.h> |
34 | #include <linux/of_address.h> | 34 | #include <linux/of_address.h> |
35 | #include <linux/io.h> | 35 | #include <linux/io.h> |
36 | #include <linux/xilinxfb.h> | ||
37 | #include <linux/slab.h> | 36 | #include <linux/slab.h> |
38 | 37 | ||
39 | #ifdef CONFIG_PPC_DCR | 38 | #ifdef CONFIG_PPC_DCR |
@@ -84,6 +83,20 @@ | |||
84 | 83 | ||
85 | #define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */ | 84 | #define PALETTE_ENTRIES_NO 16 /* passed to fb_alloc_cmap() */ |
86 | 85 | ||
86 | /* ML300/403 reference design framebuffer driver platform data struct */ | ||
87 | struct xilinxfb_platform_data { | ||
88 | u32 rotate_screen; /* Flag to rotate display 180 degrees */ | ||
89 | u32 screen_height_mm; /* Physical dimensions of screen in mm */ | ||
90 | u32 screen_width_mm; | ||
91 | u32 xres, yres; /* resolution of screen in pixels */ | ||
92 | u32 xvirt, yvirt; /* resolution of memory buffer */ | ||
93 | |||
94 | /* Physical address of framebuffer memory; If non-zero, driver | ||
95 | * will use provided memory address instead of allocating one from | ||
96 | * the consistent pool. */ | ||
97 | u32 fb_phys; | ||
98 | }; | ||
99 | |||
87 | /* | 100 | /* |
88 | * Default xilinxfb configuration | 101 | * Default xilinxfb configuration |
89 | */ | 102 | */ |