diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-26 15:14:41 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-26 15:14:41 -0400 |
commit | 8b29336fe01dab3541ebb283daddf9d0168c3f05 (patch) | |
tree | d64c1a3e00bf66c9ea9b50085f22662871cb5696 /drivers | |
parent | 9f1912c48ce829d24789e3e5d499de0d44d3306a (diff) | |
parent | 1adb656e52e1159b0187bf6590df94c7ff44d389 (diff) |
Merge branch 'gpio/next' of git://git.secretlab.ca/git/linux-2.6
* 'gpio/next' of git://git.secretlab.ca/git/linux-2.6:
gpio/via: rename VIA local config struct
basic_mmio_gpio: split into a gpio library and platform device
gpio: remove some legacy comments in build files
gpio: add trace events for setting direction and value
gpio/pca953x: Use handle_simple_irq instead of handle_edge_irq
gpiolib: export gpiochip_find
gpio: remove redundant Kconfig depends on GPIOLIB
basic_mmio_gpio: convert to non-__raw* accessors
basic_mmio_gpio: support direction registers
basic_mmio_gpio: support different input/output registers
basic_mmio_gpio: detect output method at probe time
basic_mmio_gpio: request register regions
basic_mmio_gpio: allow overriding number of gpio
basic_mmio_gpio: convert to platform_{get,set}_drvdata()
basic_mmio_gpio: remove runtime width/endianness evaluation
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/Kconfig | 23 | ||||
-rw-r--r-- | drivers/gpio/Makefile | 7 | ||||
-rw-r--r-- | drivers/gpio/basic_mmio_gpio.c | 517 | ||||
-rw-r--r-- | drivers/gpio/gpiolib.c | 19 | ||||
-rw-r--r-- | drivers/gpio/pca953x.c | 2 | ||||
-rw-r--r-- | drivers/video/via/via-gpio.c | 49 |
6 files changed, 443 insertions, 174 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d3b295305542..b57ec09af891 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | # | 1 | # |
2 | # platform-neutral GPIO infrastructure and expanders | 2 | # GPIO infrastructure and drivers |
3 | # | 3 | # |
4 | 4 | ||
5 | config ARCH_WANT_OPTIONAL_GPIOLIB | 5 | config ARCH_WANT_OPTIONAL_GPIOLIB |
@@ -31,7 +31,7 @@ menuconfig GPIOLIB | |||
31 | help | 31 | help |
32 | This enables GPIO support through the generic GPIO library. | 32 | This enables GPIO support through the generic GPIO library. |
33 | You only need to enable this, if you also want to enable | 33 | You only need to enable this, if you also want to enable |
34 | one or more of the GPIO expansion card drivers below. | 34 | one or more of the GPIO drivers below. |
35 | 35 | ||
36 | If unsure, say N. | 36 | If unsure, say N. |
37 | 37 | ||
@@ -63,21 +63,26 @@ config GPIO_SYSFS | |||
63 | Kernel drivers may also request that a particular GPIO be | 63 | Kernel drivers may also request that a particular GPIO be |
64 | exported to userspace; this can be useful when debugging. | 64 | exported to userspace; this can be useful when debugging. |
65 | 65 | ||
66 | # put expanders in the right section, in alphabetical order | 66 | # put drivers in the right section, in alphabetical order |
67 | 67 | ||
68 | config GPIO_MAX730X | 68 | config GPIO_MAX730X |
69 | tristate | 69 | tristate |
70 | 70 | ||
71 | comment "Memory mapped GPIO expanders:" | 71 | comment "Memory mapped GPIO drivers:" |
72 | |||
73 | config GPIO_BASIC_MMIO_CORE | ||
74 | tristate | ||
75 | help | ||
76 | Provides core functionality for basic memory-mapped GPIO controllers. | ||
72 | 77 | ||
73 | config GPIO_BASIC_MMIO | 78 | config GPIO_BASIC_MMIO |
74 | tristate "Basic memory-mapped GPIO controllers support" | 79 | tristate "Basic memory-mapped GPIO controllers support" |
80 | select GPIO_BASIC_MMIO_CORE | ||
75 | help | 81 | help |
76 | Say yes here to support basic memory-mapped GPIO controllers. | 82 | Say yes here to support basic memory-mapped GPIO controllers. |
77 | 83 | ||
78 | config GPIO_IT8761E | 84 | config GPIO_IT8761E |
79 | tristate "IT8761E GPIO support" | 85 | tristate "IT8761E GPIO support" |
80 | depends on GPIOLIB | ||
81 | help | 86 | help |
82 | Say yes here to support GPIO functionality of IT8761E super I/O chip. | 87 | Say yes here to support GPIO functionality of IT8761E super I/O chip. |
83 | 88 | ||
@@ -101,7 +106,7 @@ config GPIO_VR41XX | |||
101 | 106 | ||
102 | config GPIO_SCH | 107 | config GPIO_SCH |
103 | tristate "Intel SCH/TunnelCreek GPIO" | 108 | tristate "Intel SCH/TunnelCreek GPIO" |
104 | depends on GPIOLIB && PCI && X86 | 109 | depends on PCI && X86 |
105 | select MFD_CORE | 110 | select MFD_CORE |
106 | select LPC_SCH | 111 | select LPC_SCH |
107 | help | 112 | help |
@@ -121,7 +126,7 @@ config GPIO_SCH | |||
121 | 126 | ||
122 | config GPIO_VX855 | 127 | config GPIO_VX855 |
123 | tristate "VIA VX855/VX875 GPIO" | 128 | tristate "VIA VX855/VX875 GPIO" |
124 | depends on GPIOLIB && MFD_SUPPORT && PCI | 129 | depends on MFD_SUPPORT && PCI |
125 | select MFD_CORE | 130 | select MFD_CORE |
126 | select MFD_VX855 | 131 | select MFD_VX855 |
127 | help | 132 | help |
@@ -347,13 +352,13 @@ config GPIO_ML_IOH | |||
347 | 352 | ||
348 | config GPIO_TIMBERDALE | 353 | config GPIO_TIMBERDALE |
349 | bool "Support for timberdale GPIO IP" | 354 | bool "Support for timberdale GPIO IP" |
350 | depends on MFD_TIMBERDALE && GPIOLIB && HAS_IOMEM | 355 | depends on MFD_TIMBERDALE && HAS_IOMEM |
351 | ---help--- | 356 | ---help--- |
352 | Add support for the GPIO IP in the timberdale FPGA. | 357 | Add support for the GPIO IP in the timberdale FPGA. |
353 | 358 | ||
354 | config GPIO_RDC321X | 359 | config GPIO_RDC321X |
355 | tristate "RDC R-321x GPIO support" | 360 | tristate "RDC R-321x GPIO support" |
356 | depends on PCI && GPIOLIB | 361 | depends on PCI |
357 | select MFD_SUPPORT | 362 | select MFD_SUPPORT |
358 | select MFD_CORE | 363 | select MFD_CORE |
359 | select MFD_RDC321X | 364 | select MFD_RDC321X |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index becef5954356..d92ce3a62ae5 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -1,8 +1,4 @@ | |||
1 | # generic gpio support: dedicated expander chips, etc | 1 | # generic gpio support: platform drivers, dedicated expander chips, etc |
2 | # | ||
3 | # NOTE: platform-specific GPIO drivers don't belong in the | ||
4 | # drivers/gpio directory; put them with other platform setup | ||
5 | # code, IRQ controllers, board init, etc. | ||
6 | 2 | ||
7 | ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG | 3 | ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG |
8 | 4 | ||
@@ -10,6 +6,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o | |||
10 | 6 | ||
11 | obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o | 7 | obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o |
12 | obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o | 8 | obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o |
9 | obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o | ||
13 | obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o | 10 | obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o |
14 | obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o | 11 | obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o |
15 | obj-$(CONFIG_GPIO_MAX730X) += max730x.o | 12 | obj-$(CONFIG_GPIO_MAX730X) += max730x.o |
diff --git a/drivers/gpio/basic_mmio_gpio.c b/drivers/gpio/basic_mmio_gpio.c index 3addea65894e..8152e9f516b0 100644 --- a/drivers/gpio/basic_mmio_gpio.c +++ b/drivers/gpio/basic_mmio_gpio.c | |||
@@ -45,6 +45,7 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` | |||
45 | */ | 45 | */ |
46 | 46 | ||
47 | #include <linux/init.h> | 47 | #include <linux/init.h> |
48 | #include <linux/err.h> | ||
48 | #include <linux/bug.h> | 49 | #include <linux/bug.h> |
49 | #include <linux/kernel.h> | 50 | #include <linux/kernel.h> |
50 | #include <linux/module.h> | 51 | #include <linux/module.h> |
@@ -61,102 +62,101 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` | |||
61 | #include <linux/mod_devicetable.h> | 62 | #include <linux/mod_devicetable.h> |
62 | #include <linux/basic_mmio_gpio.h> | 63 | #include <linux/basic_mmio_gpio.h> |
63 | 64 | ||
64 | struct bgpio_chip { | 65 | static void bgpio_write8(void __iomem *reg, unsigned long data) |
65 | struct gpio_chip gc; | 66 | { |
66 | void __iomem *reg_dat; | 67 | writeb(data, reg); |
67 | void __iomem *reg_set; | 68 | } |
68 | void __iomem *reg_clr; | ||
69 | |||
70 | /* Number of bits (GPIOs): <register width> * 8. */ | ||
71 | int bits; | ||
72 | |||
73 | /* | ||
74 | * Some GPIO controllers work with the big-endian bits notation, | ||
75 | * e.g. in a 8-bits register, GPIO7 is the least significant bit. | ||
76 | */ | ||
77 | int big_endian_bits; | ||
78 | |||
79 | /* | ||
80 | * Used to lock bgpio_chip->data. Also, this is needed to keep | ||
81 | * shadowed and real data registers writes together. | ||
82 | */ | ||
83 | spinlock_t lock; | ||
84 | |||
85 | /* Shadowed data register to clear/set bits safely. */ | ||
86 | unsigned long data; | ||
87 | }; | ||
88 | 69 | ||
89 | static struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc) | 70 | static unsigned long bgpio_read8(void __iomem *reg) |
90 | { | 71 | { |
91 | return container_of(gc, struct bgpio_chip, gc); | 72 | return readb(reg); |
92 | } | 73 | } |
93 | 74 | ||
94 | static unsigned long bgpio_in(struct bgpio_chip *bgc) | 75 | static void bgpio_write16(void __iomem *reg, unsigned long data) |
95 | { | 76 | { |
96 | switch (bgc->bits) { | 77 | writew(data, reg); |
97 | case 8: | ||
98 | return __raw_readb(bgc->reg_dat); | ||
99 | case 16: | ||
100 | return __raw_readw(bgc->reg_dat); | ||
101 | case 32: | ||
102 | return __raw_readl(bgc->reg_dat); | ||
103 | #if BITS_PER_LONG >= 64 | ||
104 | case 64: | ||
105 | return __raw_readq(bgc->reg_dat); | ||
106 | #endif | ||
107 | } | ||
108 | return -EINVAL; | ||
109 | } | 78 | } |
110 | 79 | ||
111 | static void bgpio_out(struct bgpio_chip *bgc, void __iomem *reg, | 80 | static unsigned long bgpio_read16(void __iomem *reg) |
112 | unsigned long data) | ||
113 | { | 81 | { |
114 | switch (bgc->bits) { | 82 | return readw(reg); |
115 | case 8: | 83 | } |
116 | __raw_writeb(data, reg); | 84 | |
117 | return; | 85 | static void bgpio_write32(void __iomem *reg, unsigned long data) |
118 | case 16: | 86 | { |
119 | __raw_writew(data, reg); | 87 | writel(data, reg); |
120 | return; | 88 | } |
121 | case 32: | 89 | |
122 | __raw_writel(data, reg); | 90 | static unsigned long bgpio_read32(void __iomem *reg) |
123 | return; | 91 | { |
92 | return readl(reg); | ||
93 | } | ||
94 | |||
124 | #if BITS_PER_LONG >= 64 | 95 | #if BITS_PER_LONG >= 64 |
125 | case 64: | 96 | static void bgpio_write64(void __iomem *reg, unsigned long data) |
126 | __raw_writeq(data, reg); | 97 | { |
127 | return; | 98 | writeq(data, reg); |
128 | #endif | ||
129 | } | ||
130 | } | 99 | } |
131 | 100 | ||
101 | static unsigned long bgpio_read64(void __iomem *reg) | ||
102 | { | ||
103 | return readq(reg); | ||
104 | } | ||
105 | #endif /* BITS_PER_LONG >= 64 */ | ||
106 | |||
132 | static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin) | 107 | static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin) |
133 | { | 108 | { |
134 | if (bgc->big_endian_bits) | 109 | return 1 << pin; |
135 | return 1 << (bgc->bits - 1 - pin); | 110 | } |
136 | else | 111 | |
137 | return 1 << pin; | 112 | static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc, |
113 | unsigned int pin) | ||
114 | { | ||
115 | return 1 << (bgc->bits - 1 - pin); | ||
138 | } | 116 | } |
139 | 117 | ||
140 | static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) | 118 | static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) |
141 | { | 119 | { |
142 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 120 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
143 | 121 | ||
144 | return bgpio_in(bgc) & bgpio_pin2mask(bgc, gpio); | 122 | return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio); |
145 | } | 123 | } |
146 | 124 | ||
147 | static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | 125 | static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) |
148 | { | 126 | { |
149 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | 127 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
150 | unsigned long mask = bgpio_pin2mask(bgc, gpio); | 128 | unsigned long mask = bgc->pin2mask(bgc, gpio); |
151 | unsigned long flags; | 129 | unsigned long flags; |
152 | 130 | ||
153 | if (bgc->reg_set) { | 131 | spin_lock_irqsave(&bgc->lock, flags); |
154 | if (val) | 132 | |
155 | bgpio_out(bgc, bgc->reg_set, mask); | 133 | if (val) |
156 | else | 134 | bgc->data |= mask; |
157 | bgpio_out(bgc, bgc->reg_clr, mask); | 135 | else |
158 | return; | 136 | bgc->data &= ~mask; |
159 | } | 137 | |
138 | bgc->write_reg(bgc->reg_dat, bgc->data); | ||
139 | |||
140 | spin_unlock_irqrestore(&bgc->lock, flags); | ||
141 | } | ||
142 | |||
143 | static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, | ||
144 | int val) | ||
145 | { | ||
146 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
147 | unsigned long mask = bgc->pin2mask(bgc, gpio); | ||
148 | |||
149 | if (val) | ||
150 | bgc->write_reg(bgc->reg_set, mask); | ||
151 | else | ||
152 | bgc->write_reg(bgc->reg_clr, mask); | ||
153 | } | ||
154 | |||
155 | static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) | ||
156 | { | ||
157 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
158 | unsigned long mask = bgc->pin2mask(bgc, gpio); | ||
159 | unsigned long flags; | ||
160 | 160 | ||
161 | spin_lock_irqsave(&bgc->lock, flags); | 161 | spin_lock_irqsave(&bgc->lock, flags); |
162 | 162 | ||
@@ -165,103 +165,352 @@ static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |||
165 | else | 165 | else |
166 | bgc->data &= ~mask; | 166 | bgc->data &= ~mask; |
167 | 167 | ||
168 | bgpio_out(bgc, bgc->reg_dat, bgc->data); | 168 | bgc->write_reg(bgc->reg_set, bgc->data); |
169 | 169 | ||
170 | spin_unlock_irqrestore(&bgc->lock, flags); | 170 | spin_unlock_irqrestore(&bgc->lock, flags); |
171 | } | 171 | } |
172 | 172 | ||
173 | static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) | ||
174 | { | ||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, | ||
179 | int val) | ||
180 | { | ||
181 | gc->set(gc, gpio, val); | ||
182 | |||
183 | return 0; | ||
184 | } | ||
185 | |||
173 | static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | 186 | static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) |
174 | { | 187 | { |
188 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
189 | unsigned long flags; | ||
190 | |||
191 | spin_lock_irqsave(&bgc->lock, flags); | ||
192 | |||
193 | bgc->dir &= ~bgc->pin2mask(bgc, gpio); | ||
194 | bgc->write_reg(bgc->reg_dir, bgc->dir); | ||
195 | |||
196 | spin_unlock_irqrestore(&bgc->lock, flags); | ||
197 | |||
175 | return 0; | 198 | return 0; |
176 | } | 199 | } |
177 | 200 | ||
178 | static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | 201 | static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) |
179 | { | 202 | { |
180 | bgpio_set(gc, gpio, val); | 203 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
204 | unsigned long flags; | ||
205 | |||
206 | gc->set(gc, gpio, val); | ||
207 | |||
208 | spin_lock_irqsave(&bgc->lock, flags); | ||
209 | |||
210 | bgc->dir |= bgc->pin2mask(bgc, gpio); | ||
211 | bgc->write_reg(bgc->reg_dir, bgc->dir); | ||
212 | |||
213 | spin_unlock_irqrestore(&bgc->lock, flags); | ||
214 | |||
181 | return 0; | 215 | return 0; |
182 | } | 216 | } |
183 | 217 | ||
184 | static int __devinit bgpio_probe(struct platform_device *pdev) | 218 | static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio) |
185 | { | 219 | { |
186 | const struct platform_device_id *platid = platform_get_device_id(pdev); | 220 | struct bgpio_chip *bgc = to_bgpio_chip(gc); |
187 | struct device *dev = &pdev->dev; | 221 | unsigned long flags; |
188 | struct bgpio_pdata *pdata = dev_get_platdata(dev); | ||
189 | struct bgpio_chip *bgc; | ||
190 | struct resource *res_dat; | ||
191 | struct resource *res_set; | ||
192 | struct resource *res_clr; | ||
193 | resource_size_t dat_sz; | ||
194 | int bits; | ||
195 | int ret; | ||
196 | 222 | ||
197 | res_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); | 223 | spin_lock_irqsave(&bgc->lock, flags); |
198 | if (!res_dat) | ||
199 | return -EINVAL; | ||
200 | 224 | ||
201 | dat_sz = resource_size(res_dat); | 225 | bgc->dir |= bgc->pin2mask(bgc, gpio); |
202 | if (!is_power_of_2(dat_sz)) | 226 | bgc->write_reg(bgc->reg_dir, bgc->dir); |
203 | return -EINVAL; | 227 | |
228 | spin_unlock_irqrestore(&bgc->lock, flags); | ||
229 | |||
230 | return 0; | ||
231 | } | ||
204 | 232 | ||
205 | bits = dat_sz * 8; | 233 | static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val) |
206 | if (bits > BITS_PER_LONG) | 234 | { |
235 | struct bgpio_chip *bgc = to_bgpio_chip(gc); | ||
236 | unsigned long flags; | ||
237 | |||
238 | gc->set(gc, gpio, val); | ||
239 | |||
240 | spin_lock_irqsave(&bgc->lock, flags); | ||
241 | |||
242 | bgc->dir &= ~bgc->pin2mask(bgc, gpio); | ||
243 | bgc->write_reg(bgc->reg_dir, bgc->dir); | ||
244 | |||
245 | spin_unlock_irqrestore(&bgc->lock, flags); | ||
246 | |||
247 | return 0; | ||
248 | } | ||
249 | |||
250 | static int bgpio_setup_accessors(struct device *dev, | ||
251 | struct bgpio_chip *bgc, | ||
252 | bool be) | ||
253 | { | ||
254 | |||
255 | switch (bgc->bits) { | ||
256 | case 8: | ||
257 | bgc->read_reg = bgpio_read8; | ||
258 | bgc->write_reg = bgpio_write8; | ||
259 | break; | ||
260 | case 16: | ||
261 | bgc->read_reg = bgpio_read16; | ||
262 | bgc->write_reg = bgpio_write16; | ||
263 | break; | ||
264 | case 32: | ||
265 | bgc->read_reg = bgpio_read32; | ||
266 | bgc->write_reg = bgpio_write32; | ||
267 | break; | ||
268 | #if BITS_PER_LONG >= 64 | ||
269 | case 64: | ||
270 | bgc->read_reg = bgpio_read64; | ||
271 | bgc->write_reg = bgpio_write64; | ||
272 | break; | ||
273 | #endif /* BITS_PER_LONG >= 64 */ | ||
274 | default: | ||
275 | dev_err(dev, "unsupported data width %u bits\n", bgc->bits); | ||
207 | return -EINVAL; | 276 | return -EINVAL; |
277 | } | ||
208 | 278 | ||
209 | bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL); | 279 | bgc->pin2mask = be ? bgpio_pin2mask_be : bgpio_pin2mask; |
210 | if (!bgc) | 280 | |
211 | return -ENOMEM; | 281 | return 0; |
282 | } | ||
283 | |||
284 | /* | ||
285 | * Create the device and allocate the resources. For setting GPIO's there are | ||
286 | * three supported configurations: | ||
287 | * | ||
288 | * - single input/output register resource (named "dat"). | ||
289 | * - set/clear pair (named "set" and "clr"). | ||
290 | * - single output register resource and single input resource ("set" and | ||
291 | * dat"). | ||
292 | * | ||
293 | * For the single output register, this drives a 1 by setting a bit and a zero | ||
294 | * by clearing a bit. For the set clr pair, this drives a 1 by setting a bit | ||
295 | * in the set register and clears it by setting a bit in the clear register. | ||
296 | * The configuration is detected by which resources are present. | ||
297 | * | ||
298 | * For setting the GPIO direction, there are three supported configurations: | ||
299 | * | ||
300 | * - simple bidirection GPIO that requires no configuration. | ||
301 | * - an output direction register (named "dirout") where a 1 bit | ||
302 | * indicates the GPIO is an output. | ||
303 | * - an input direction register (named "dirin") where a 1 bit indicates | ||
304 | * the GPIO is an input. | ||
305 | */ | ||
306 | static int bgpio_setup_io(struct bgpio_chip *bgc, | ||
307 | void __iomem *dat, | ||
308 | void __iomem *set, | ||
309 | void __iomem *clr) | ||
310 | { | ||
212 | 311 | ||
213 | bgc->reg_dat = devm_ioremap(dev, res_dat->start, dat_sz); | 312 | bgc->reg_dat = dat; |
214 | if (!bgc->reg_dat) | 313 | if (!bgc->reg_dat) |
215 | return -ENOMEM; | 314 | return -EINVAL; |
315 | |||
316 | if (set && clr) { | ||
317 | bgc->reg_set = set; | ||
318 | bgc->reg_clr = clr; | ||
319 | bgc->gc.set = bgpio_set_with_clear; | ||
320 | } else if (set && !clr) { | ||
321 | bgc->reg_set = set; | ||
322 | bgc->gc.set = bgpio_set_set; | ||
323 | } else { | ||
324 | bgc->gc.set = bgpio_set; | ||
325 | } | ||
326 | |||
327 | bgc->gc.get = bgpio_get; | ||
328 | |||
329 | return 0; | ||
330 | } | ||
216 | 331 | ||
217 | res_set = platform_get_resource_byname(pdev, IORESOURCE_MEM, "set"); | 332 | static int bgpio_setup_direction(struct bgpio_chip *bgc, |
218 | res_clr = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clr"); | 333 | void __iomem *dirout, |
219 | if (res_set && res_clr) { | 334 | void __iomem *dirin) |
220 | if (resource_size(res_set) != resource_size(res_clr) || | 335 | { |
221 | resource_size(res_set) != dat_sz) | 336 | if (dirout && dirin) { |
222 | return -EINVAL; | ||
223 | |||
224 | bgc->reg_set = devm_ioremap(dev, res_set->start, dat_sz); | ||
225 | bgc->reg_clr = devm_ioremap(dev, res_clr->start, dat_sz); | ||
226 | if (!bgc->reg_set || !bgc->reg_clr) | ||
227 | return -ENOMEM; | ||
228 | } else if (res_set || res_clr) { | ||
229 | return -EINVAL; | 337 | return -EINVAL; |
338 | } else if (dirout) { | ||
339 | bgc->reg_dir = dirout; | ||
340 | bgc->gc.direction_output = bgpio_dir_out; | ||
341 | bgc->gc.direction_input = bgpio_dir_in; | ||
342 | } else if (dirin) { | ||
343 | bgc->reg_dir = dirin; | ||
344 | bgc->gc.direction_output = bgpio_dir_out_inv; | ||
345 | bgc->gc.direction_input = bgpio_dir_in_inv; | ||
346 | } else { | ||
347 | bgc->gc.direction_output = bgpio_simple_dir_out; | ||
348 | bgc->gc.direction_input = bgpio_simple_dir_in; | ||
230 | } | 349 | } |
231 | 350 | ||
232 | spin_lock_init(&bgc->lock); | 351 | return 0; |
352 | } | ||
233 | 353 | ||
234 | bgc->bits = bits; | 354 | int __devexit bgpio_remove(struct bgpio_chip *bgc) |
235 | bgc->big_endian_bits = !strcmp(platid->name, "basic-mmio-gpio-be"); | 355 | { |
236 | bgc->data = bgpio_in(bgc); | 356 | int err = gpiochip_remove(&bgc->gc); |
237 | 357 | ||
238 | bgc->gc.ngpio = bits; | 358 | kfree(bgc); |
239 | bgc->gc.direction_input = bgpio_dir_in; | 359 | |
240 | bgc->gc.direction_output = bgpio_dir_out; | 360 | return err; |
241 | bgc->gc.get = bgpio_get; | 361 | } |
242 | bgc->gc.set = bgpio_set; | 362 | EXPORT_SYMBOL_GPL(bgpio_remove); |
363 | |||
364 | int __devinit bgpio_init(struct bgpio_chip *bgc, | ||
365 | struct device *dev, | ||
366 | unsigned long sz, | ||
367 | void __iomem *dat, | ||
368 | void __iomem *set, | ||
369 | void __iomem *clr, | ||
370 | void __iomem *dirout, | ||
371 | void __iomem *dirin, | ||
372 | bool big_endian) | ||
373 | { | ||
374 | int ret; | ||
375 | |||
376 | if (!is_power_of_2(sz)) | ||
377 | return -EINVAL; | ||
378 | |||
379 | bgc->bits = sz * 8; | ||
380 | if (bgc->bits > BITS_PER_LONG) | ||
381 | return -EINVAL; | ||
382 | |||
383 | spin_lock_init(&bgc->lock); | ||
243 | bgc->gc.dev = dev; | 384 | bgc->gc.dev = dev; |
244 | bgc->gc.label = dev_name(dev); | 385 | bgc->gc.label = dev_name(dev); |
386 | bgc->gc.base = -1; | ||
387 | bgc->gc.ngpio = bgc->bits; | ||
245 | 388 | ||
246 | if (pdata) | 389 | ret = bgpio_setup_io(bgc, dat, set, clr); |
247 | bgc->gc.base = pdata->base; | 390 | if (ret) |
248 | else | 391 | return ret; |
249 | bgc->gc.base = -1; | ||
250 | 392 | ||
251 | dev_set_drvdata(dev, bgc); | 393 | ret = bgpio_setup_accessors(dev, bgc, big_endian); |
394 | if (ret) | ||
395 | return ret; | ||
252 | 396 | ||
253 | ret = gpiochip_add(&bgc->gc); | 397 | ret = bgpio_setup_direction(bgc, dirout, dirin); |
254 | if (ret) | 398 | if (ret) |
255 | dev_err(dev, "gpiochip_add() failed: %d\n", ret); | 399 | return ret; |
400 | |||
401 | bgc->data = bgc->read_reg(bgc->reg_dat); | ||
256 | 402 | ||
257 | return ret; | 403 | return ret; |
258 | } | 404 | } |
405 | EXPORT_SYMBOL_GPL(bgpio_init); | ||
406 | |||
407 | #ifdef CONFIG_GPIO_BASIC_MMIO | ||
259 | 408 | ||
260 | static int __devexit bgpio_remove(struct platform_device *pdev) | 409 | static void __iomem *bgpio_map(struct platform_device *pdev, |
410 | const char *name, | ||
411 | resource_size_t sane_sz, | ||
412 | int *err) | ||
261 | { | 413 | { |
262 | struct bgpio_chip *bgc = dev_get_drvdata(&pdev->dev); | 414 | struct device *dev = &pdev->dev; |
415 | struct resource *r; | ||
416 | resource_size_t start; | ||
417 | resource_size_t sz; | ||
418 | void __iomem *ret; | ||
419 | |||
420 | *err = 0; | ||
421 | |||
422 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); | ||
423 | if (!r) | ||
424 | return NULL; | ||
263 | 425 | ||
264 | return gpiochip_remove(&bgc->gc); | 426 | sz = resource_size(r); |
427 | if (sz != sane_sz) { | ||
428 | *err = -EINVAL; | ||
429 | return NULL; | ||
430 | } | ||
431 | |||
432 | start = r->start; | ||
433 | if (!devm_request_mem_region(dev, start, sz, r->name)) { | ||
434 | *err = -EBUSY; | ||
435 | return NULL; | ||
436 | } | ||
437 | |||
438 | ret = devm_ioremap(dev, start, sz); | ||
439 | if (!ret) { | ||
440 | *err = -ENOMEM; | ||
441 | return NULL; | ||
442 | } | ||
443 | |||
444 | return ret; | ||
445 | } | ||
446 | |||
447 | static int __devinit bgpio_pdev_probe(struct platform_device *pdev) | ||
448 | { | ||
449 | struct device *dev = &pdev->dev; | ||
450 | struct resource *r; | ||
451 | void __iomem *dat; | ||
452 | void __iomem *set; | ||
453 | void __iomem *clr; | ||
454 | void __iomem *dirout; | ||
455 | void __iomem *dirin; | ||
456 | unsigned long sz; | ||
457 | bool be; | ||
458 | int err; | ||
459 | struct bgpio_chip *bgc; | ||
460 | struct bgpio_pdata *pdata = dev_get_platdata(dev); | ||
461 | |||
462 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); | ||
463 | if (!r) | ||
464 | return -EINVAL; | ||
465 | |||
466 | sz = resource_size(r); | ||
467 | |||
468 | dat = bgpio_map(pdev, "dat", sz, &err); | ||
469 | if (!dat) | ||
470 | return err ? err : -EINVAL; | ||
471 | |||
472 | set = bgpio_map(pdev, "set", sz, &err); | ||
473 | if (err) | ||
474 | return err; | ||
475 | |||
476 | clr = bgpio_map(pdev, "clr", sz, &err); | ||
477 | if (err) | ||
478 | return err; | ||
479 | |||
480 | dirout = bgpio_map(pdev, "dirout", sz, &err); | ||
481 | if (err) | ||
482 | return err; | ||
483 | |||
484 | dirin = bgpio_map(pdev, "dirin", sz, &err); | ||
485 | if (err) | ||
486 | return err; | ||
487 | |||
488 | be = !strcmp(platform_get_device_id(pdev)->name, "basic-mmio-gpio-be"); | ||
489 | |||
490 | bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL); | ||
491 | if (!bgc) | ||
492 | return -ENOMEM; | ||
493 | |||
494 | err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, be); | ||
495 | if (err) | ||
496 | return err; | ||
497 | |||
498 | if (pdata) { | ||
499 | bgc->gc.base = pdata->base; | ||
500 | if (pdata->ngpio > 0) | ||
501 | bgc->gc.ngpio = pdata->ngpio; | ||
502 | } | ||
503 | |||
504 | platform_set_drvdata(pdev, bgc); | ||
505 | |||
506 | return gpiochip_add(&bgc->gc); | ||
507 | } | ||
508 | |||
509 | static int __devexit bgpio_pdev_remove(struct platform_device *pdev) | ||
510 | { | ||
511 | struct bgpio_chip *bgc = platform_get_drvdata(pdev); | ||
512 | |||
513 | return bgpio_remove(bgc); | ||
265 | } | 514 | } |
266 | 515 | ||
267 | static const struct platform_device_id bgpio_id_table[] = { | 516 | static const struct platform_device_id bgpio_id_table[] = { |
@@ -276,21 +525,23 @@ static struct platform_driver bgpio_driver = { | |||
276 | .name = "basic-mmio-gpio", | 525 | .name = "basic-mmio-gpio", |
277 | }, | 526 | }, |
278 | .id_table = bgpio_id_table, | 527 | .id_table = bgpio_id_table, |
279 | .probe = bgpio_probe, | 528 | .probe = bgpio_pdev_probe, |
280 | .remove = __devexit_p(bgpio_remove), | 529 | .remove = __devexit_p(bgpio_pdev_remove), |
281 | }; | 530 | }; |
282 | 531 | ||
283 | static int __init bgpio_init(void) | 532 | static int __init bgpio_platform_init(void) |
284 | { | 533 | { |
285 | return platform_driver_register(&bgpio_driver); | 534 | return platform_driver_register(&bgpio_driver); |
286 | } | 535 | } |
287 | module_init(bgpio_init); | 536 | module_init(bgpio_platform_init); |
288 | 537 | ||
289 | static void __exit bgpio_exit(void) | 538 | static void __exit bgpio_platform_exit(void) |
290 | { | 539 | { |
291 | platform_driver_unregister(&bgpio_driver); | 540 | platform_driver_unregister(&bgpio_driver); |
292 | } | 541 | } |
293 | module_exit(bgpio_exit); | 542 | module_exit(bgpio_platform_exit); |
543 | |||
544 | #endif /* CONFIG_GPIO_BASIC_MMIO */ | ||
294 | 545 | ||
295 | MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers"); | 546 | MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers"); |
296 | MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>"); | 547 | MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>"); |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 36a2974815b7..137a8ca67822 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -12,6 +12,8 @@ | |||
12 | #include <linux/idr.h> | 12 | #include <linux/idr.h> |
13 | #include <linux/slab.h> | 13 | #include <linux/slab.h> |
14 | 14 | ||
15 | #define CREATE_TRACE_POINTS | ||
16 | #include <trace/events/gpio.h> | ||
15 | 17 | ||
16 | /* Optional implementation infrastructure for GPIO interfaces. | 18 | /* Optional implementation infrastructure for GPIO interfaces. |
17 | * | 19 | * |
@@ -1165,6 +1167,7 @@ struct gpio_chip *gpiochip_find(void *data, | |||
1165 | 1167 | ||
1166 | return chip; | 1168 | return chip; |
1167 | } | 1169 | } |
1170 | EXPORT_SYMBOL_GPL(gpiochip_find); | ||
1168 | 1171 | ||
1169 | /* These "optional" allocation calls help prevent drivers from stomping | 1172 | /* These "optional" allocation calls help prevent drivers from stomping |
1170 | * on each other, and help provide better diagnostics in debugfs. | 1173 | * on each other, and help provide better diagnostics in debugfs. |
@@ -1404,6 +1407,8 @@ int gpio_direction_input(unsigned gpio) | |||
1404 | status = chip->direction_input(chip, gpio); | 1407 | status = chip->direction_input(chip, gpio); |
1405 | if (status == 0) | 1408 | if (status == 0) |
1406 | clear_bit(FLAG_IS_OUT, &desc->flags); | 1409 | clear_bit(FLAG_IS_OUT, &desc->flags); |
1410 | |||
1411 | trace_gpio_direction(chip->base + gpio, 1, status); | ||
1407 | lose: | 1412 | lose: |
1408 | return status; | 1413 | return status; |
1409 | fail: | 1414 | fail: |
@@ -1457,6 +1462,8 @@ int gpio_direction_output(unsigned gpio, int value) | |||
1457 | status = chip->direction_output(chip, gpio, value); | 1462 | status = chip->direction_output(chip, gpio, value); |
1458 | if (status == 0) | 1463 | if (status == 0) |
1459 | set_bit(FLAG_IS_OUT, &desc->flags); | 1464 | set_bit(FLAG_IS_OUT, &desc->flags); |
1465 | trace_gpio_value(chip->base + gpio, 0, value); | ||
1466 | trace_gpio_direction(chip->base + gpio, 0, status); | ||
1460 | lose: | 1467 | lose: |
1461 | return status; | 1468 | return status; |
1462 | fail: | 1469 | fail: |
@@ -1546,10 +1553,13 @@ EXPORT_SYMBOL_GPL(gpio_set_debounce); | |||
1546 | int __gpio_get_value(unsigned gpio) | 1553 | int __gpio_get_value(unsigned gpio) |
1547 | { | 1554 | { |
1548 | struct gpio_chip *chip; | 1555 | struct gpio_chip *chip; |
1556 | int value; | ||
1549 | 1557 | ||
1550 | chip = gpio_to_chip(gpio); | 1558 | chip = gpio_to_chip(gpio); |
1551 | WARN_ON(chip->can_sleep); | 1559 | WARN_ON(chip->can_sleep); |
1552 | return chip->get ? chip->get(chip, gpio - chip->base) : 0; | 1560 | value = chip->get ? chip->get(chip, gpio - chip->base) : 0; |
1561 | trace_gpio_value(gpio, 1, value); | ||
1562 | return value; | ||
1553 | } | 1563 | } |
1554 | EXPORT_SYMBOL_GPL(__gpio_get_value); | 1564 | EXPORT_SYMBOL_GPL(__gpio_get_value); |
1555 | 1565 | ||
@@ -1568,6 +1578,7 @@ void __gpio_set_value(unsigned gpio, int value) | |||
1568 | 1578 | ||
1569 | chip = gpio_to_chip(gpio); | 1579 | chip = gpio_to_chip(gpio); |
1570 | WARN_ON(chip->can_sleep); | 1580 | WARN_ON(chip->can_sleep); |
1581 | trace_gpio_value(gpio, 0, value); | ||
1571 | chip->set(chip, gpio - chip->base, value); | 1582 | chip->set(chip, gpio - chip->base, value); |
1572 | } | 1583 | } |
1573 | EXPORT_SYMBOL_GPL(__gpio_set_value); | 1584 | EXPORT_SYMBOL_GPL(__gpio_set_value); |
@@ -1618,10 +1629,13 @@ EXPORT_SYMBOL_GPL(__gpio_to_irq); | |||
1618 | int gpio_get_value_cansleep(unsigned gpio) | 1629 | int gpio_get_value_cansleep(unsigned gpio) |
1619 | { | 1630 | { |
1620 | struct gpio_chip *chip; | 1631 | struct gpio_chip *chip; |
1632 | int value; | ||
1621 | 1633 | ||
1622 | might_sleep_if(extra_checks); | 1634 | might_sleep_if(extra_checks); |
1623 | chip = gpio_to_chip(gpio); | 1635 | chip = gpio_to_chip(gpio); |
1624 | return chip->get ? chip->get(chip, gpio - chip->base) : 0; | 1636 | value = chip->get ? chip->get(chip, gpio - chip->base) : 0; |
1637 | trace_gpio_value(gpio, 1, value); | ||
1638 | return value; | ||
1625 | } | 1639 | } |
1626 | EXPORT_SYMBOL_GPL(gpio_get_value_cansleep); | 1640 | EXPORT_SYMBOL_GPL(gpio_get_value_cansleep); |
1627 | 1641 | ||
@@ -1631,6 +1645,7 @@ void gpio_set_value_cansleep(unsigned gpio, int value) | |||
1631 | 1645 | ||
1632 | might_sleep_if(extra_checks); | 1646 | might_sleep_if(extra_checks); |
1633 | chip = gpio_to_chip(gpio); | 1647 | chip = gpio_to_chip(gpio); |
1648 | trace_gpio_value(gpio, 0, value); | ||
1634 | chip->set(chip, gpio - chip->base, value); | 1649 | chip->set(chip, gpio - chip->base, value); |
1635 | } | 1650 | } |
1636 | EXPORT_SYMBOL_GPL(gpio_set_value_cansleep); | 1651 | EXPORT_SYMBOL_GPL(gpio_set_value_cansleep); |
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index 7630ab7b9bec..78a843947d82 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c | |||
@@ -397,7 +397,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, | |||
397 | 397 | ||
398 | irq_set_chip_data(irq, chip); | 398 | irq_set_chip_data(irq, chip); |
399 | irq_set_chip_and_handler(irq, &pca953x_irq_chip, | 399 | irq_set_chip_and_handler(irq, &pca953x_irq_chip, |
400 | handle_edge_irq); | 400 | handle_simple_irq); |
401 | #ifdef CONFIG_ARM | 401 | #ifdef CONFIG_ARM |
402 | set_irq_flags(irq, IRQF_VALID); | 402 | set_irq_flags(irq, IRQF_VALID); |
403 | #else | 403 | #else |
diff --git a/drivers/video/via/via-gpio.c b/drivers/video/via/via-gpio.c index c2a0a1cfd3b3..ab5341814c74 100644 --- a/drivers/video/via/via-gpio.c +++ b/drivers/video/via/via-gpio.c | |||
@@ -145,7 +145,7 @@ static int via_gpio_get(struct gpio_chip *chip, unsigned int nr) | |||
145 | } | 145 | } |
146 | 146 | ||
147 | 147 | ||
148 | static struct viafb_gpio_cfg gpio_config = { | 148 | static struct viafb_gpio_cfg viafb_gpio_config = { |
149 | .gpio_chip = { | 149 | .gpio_chip = { |
150 | .label = "VIAFB onboard GPIO", | 150 | .label = "VIAFB onboard GPIO", |
151 | .owner = THIS_MODULE, | 151 | .owner = THIS_MODULE, |
@@ -183,8 +183,8 @@ static int viafb_gpio_resume(void *private) | |||
183 | { | 183 | { |
184 | int i; | 184 | int i; |
185 | 185 | ||
186 | for (i = 0; i < gpio_config.gpio_chip.ngpio; i += 2) | 186 | for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2) |
187 | viafb_gpio_enable(gpio_config.active_gpios[i]); | 187 | viafb_gpio_enable(viafb_gpio_config.active_gpios[i]); |
188 | return 0; | 188 | return 0; |
189 | } | 189 | } |
190 | 190 | ||
@@ -201,9 +201,9 @@ int viafb_gpio_lookup(const char *name) | |||
201 | { | 201 | { |
202 | int i; | 202 | int i; |
203 | 203 | ||
204 | for (i = 0; i < gpio_config.gpio_chip.ngpio; i++) | 204 | for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i++) |
205 | if (!strcmp(name, gpio_config.active_gpios[i]->vg_name)) | 205 | if (!strcmp(name, viafb_gpio_config.active_gpios[i]->vg_name)) |
206 | return gpio_config.gpio_chip.base + i; | 206 | return viafb_gpio_config.gpio_chip.base + i; |
207 | return -1; | 207 | return -1; |
208 | } | 208 | } |
209 | EXPORT_SYMBOL_GPL(viafb_gpio_lookup); | 209 | EXPORT_SYMBOL_GPL(viafb_gpio_lookup); |
@@ -229,14 +229,15 @@ static __devinit int viafb_gpio_probe(struct platform_device *platdev) | |||
229 | for (gpio = viafb_all_gpios; | 229 | for (gpio = viafb_all_gpios; |
230 | gpio < viafb_all_gpios + VIAFB_NUM_GPIOS; gpio++) | 230 | gpio < viafb_all_gpios + VIAFB_NUM_GPIOS; gpio++) |
231 | if (gpio->vg_port_index == port_cfg[i].ioport_index) { | 231 | if (gpio->vg_port_index == port_cfg[i].ioport_index) { |
232 | gpio_config.active_gpios[ngpio] = gpio; | 232 | viafb_gpio_config.active_gpios[ngpio] = gpio; |
233 | gpio_config.gpio_names[ngpio] = gpio->vg_name; | 233 | viafb_gpio_config.gpio_names[ngpio] = |
234 | gpio->vg_name; | ||
234 | ngpio++; | 235 | ngpio++; |
235 | } | 236 | } |
236 | } | 237 | } |
237 | gpio_config.gpio_chip.ngpio = ngpio; | 238 | viafb_gpio_config.gpio_chip.ngpio = ngpio; |
238 | gpio_config.gpio_chip.names = gpio_config.gpio_names; | 239 | viafb_gpio_config.gpio_chip.names = viafb_gpio_config.gpio_names; |
239 | gpio_config.vdev = vdev; | 240 | viafb_gpio_config.vdev = vdev; |
240 | if (ngpio == 0) { | 241 | if (ngpio == 0) { |
241 | printk(KERN_INFO "viafb: no GPIOs configured\n"); | 242 | printk(KERN_INFO "viafb: no GPIOs configured\n"); |
242 | return 0; | 243 | return 0; |
@@ -245,18 +246,18 @@ static __devinit int viafb_gpio_probe(struct platform_device *platdev) | |||
245 | * Enable the ports. They come in pairs, with a single | 246 | * Enable the ports. They come in pairs, with a single |
246 | * enable bit for both. | 247 | * enable bit for both. |
247 | */ | 248 | */ |
248 | spin_lock_irqsave(&gpio_config.vdev->reg_lock, flags); | 249 | spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags); |
249 | for (i = 0; i < ngpio; i += 2) | 250 | for (i = 0; i < ngpio; i += 2) |
250 | viafb_gpio_enable(gpio_config.active_gpios[i]); | 251 | viafb_gpio_enable(viafb_gpio_config.active_gpios[i]); |
251 | spin_unlock_irqrestore(&gpio_config.vdev->reg_lock, flags); | 252 | spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags); |
252 | /* | 253 | /* |
253 | * Get registered. | 254 | * Get registered. |
254 | */ | 255 | */ |
255 | gpio_config.gpio_chip.base = -1; /* Dynamic */ | 256 | viafb_gpio_config.gpio_chip.base = -1; /* Dynamic */ |
256 | ret = gpiochip_add(&gpio_config.gpio_chip); | 257 | ret = gpiochip_add(&viafb_gpio_config.gpio_chip); |
257 | if (ret) { | 258 | if (ret) { |
258 | printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret); | 259 | printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret); |
259 | gpio_config.gpio_chip.ngpio = 0; | 260 | viafb_gpio_config.gpio_chip.ngpio = 0; |
260 | } | 261 | } |
261 | #ifdef CONFIG_PM | 262 | #ifdef CONFIG_PM |
262 | viafb_pm_register(&viafb_gpio_pm_hooks); | 263 | viafb_pm_register(&viafb_gpio_pm_hooks); |
@@ -277,8 +278,8 @@ static int viafb_gpio_remove(struct platform_device *platdev) | |||
277 | /* | 278 | /* |
278 | * Get unregistered. | 279 | * Get unregistered. |
279 | */ | 280 | */ |
280 | if (gpio_config.gpio_chip.ngpio > 0) { | 281 | if (viafb_gpio_config.gpio_chip.ngpio > 0) { |
281 | ret = gpiochip_remove(&gpio_config.gpio_chip); | 282 | ret = gpiochip_remove(&viafb_gpio_config.gpio_chip); |
282 | if (ret) { /* Somebody still using it? */ | 283 | if (ret) { /* Somebody still using it? */ |
283 | printk(KERN_ERR "Viafb: GPIO remove failed\n"); | 284 | printk(KERN_ERR "Viafb: GPIO remove failed\n"); |
284 | return ret; | 285 | return ret; |
@@ -287,11 +288,11 @@ static int viafb_gpio_remove(struct platform_device *platdev) | |||
287 | /* | 288 | /* |
288 | * Disable the ports. | 289 | * Disable the ports. |
289 | */ | 290 | */ |
290 | spin_lock_irqsave(&gpio_config.vdev->reg_lock, flags); | 291 | spin_lock_irqsave(&viafb_gpio_config.vdev->reg_lock, flags); |
291 | for (i = 0; i < gpio_config.gpio_chip.ngpio; i += 2) | 292 | for (i = 0; i < viafb_gpio_config.gpio_chip.ngpio; i += 2) |
292 | viafb_gpio_disable(gpio_config.active_gpios[i]); | 293 | viafb_gpio_disable(viafb_gpio_config.active_gpios[i]); |
293 | gpio_config.gpio_chip.ngpio = 0; | 294 | viafb_gpio_config.gpio_chip.ngpio = 0; |
294 | spin_unlock_irqrestore(&gpio_config.vdev->reg_lock, flags); | 295 | spin_unlock_irqrestore(&viafb_gpio_config.vdev->reg_lock, flags); |
295 | return ret; | 296 | return ret; |
296 | } | 297 | } |
297 | 298 | ||