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authorHans de Goede <hdegoede@redhat.com>2012-04-28 09:31:17 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-05-07 15:15:30 -0400
commit895d464db68a98fe877f724cafb4c1f84b67492f (patch)
tree254cd7e50fda8c01c5cf07feb0e4d8ecb6baec01 /drivers
parent282ddfbcab456eb09429b3ca3c1cc5dde5a65358 (diff)
[media] gspca_pac7302: Convert multi-line comments to standard kernel style
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/video/gspca/pac7302.c142
1 files changed, 79 insertions, 63 deletions
diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c
index 4f7be66fce45..1e88d3a574d9 100644
--- a/drivers/media/video/gspca/pac7302.c
+++ b/drivers/media/video/gspca/pac7302.c
@@ -23,43 +23,44 @@
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */ 24 */
25 25
26/* Some documentation about various registers as determined by trial and error. 26/*
27 27 * Some documentation about various registers as determined by trial and error.
28 Register page 1: 28 *
29 29 * Register page 1:
30 Address Description 30 *
31 0x78 Global control, bit 6 controls the LED (inverted) 31 * Address Description
32 32 * 0x78 Global control, bit 6 controls the LED (inverted)
33 Register page 3: 33 *
34 34 * Register page 3:
35 Address Description 35 *
36 0x02 Clock divider 3-63, fps = 90 / val. Must be a multiple of 3 on 36 * Address Description
37 the 7302, so one of 3, 6, 9, ..., except when between 6 and 12? 37 * 0x02 Clock divider 3-63, fps = 90 / val. Must be a multiple of 3 on
38 0x03 Variable framerate ctrl reg2==3: 0 -> ~30 fps, 255 -> ~22fps 38 * the 7302, so one of 3, 6, 9, ..., except when between 6 and 12?
39 0x04 Another var framerate ctrl reg2==3, reg3==0: 0 -> ~30 fps, 39 * 0x03 Variable framerate ctrl reg2==3: 0 -> ~30 fps, 255 -> ~22fps
40 63 -> ~27 fps, the 2 msb's must always be 1 !! 40 * 0x04 Another var framerate ctrl reg2==3, reg3==0: 0 -> ~30 fps,
41 0x05 Another var framerate ctrl reg2==3, reg3==0, reg4==0xc0: 41 * 63 -> ~27 fps, the 2 msb's must always be 1 !!
42 1 -> ~30 fps, 2 -> ~20 fps 42 * 0x05 Another var framerate ctrl reg2==3, reg3==0, reg4==0xc0:
43 0x0e Exposure bits 0-7, 0-448, 0 = use full frame time 43 * 1 -> ~30 fps, 2 -> ~20 fps
44 0x0f Exposure bit 8, 0-448, 448 = no exposure at all 44 * 0x0e Exposure bits 0-7, 0-448, 0 = use full frame time
45 0x10 Master gain 0-31 45 * 0x0f Exposure bit 8, 0-448, 448 = no exposure at all
46 0x21 Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused 46 * 0x10 Master gain 0-31
47 47 * 0x21 Bitfield: 0-1 unused, 2-3 vflip/hflip, 4-5 unknown, 6-7 unused
48 The registers are accessed in the following functions: 48 *
49 49 * The registers are accessed in the following functions:
50 Page | Register | Function 50 *
51 -----+------------+--------------------------------------------------- 51 * Page | Register | Function
52 0 | 0x0f..0x20 | setcolors() 52 * -----+------------+---------------------------------------------------
53 0 | 0xa2..0xab | setbrightcont() 53 * 0 | 0x0f..0x20 | setcolors()
54 0 | 0xc5 | setredbalance() 54 * 0 | 0xa2..0xab | setbrightcont()
55 0 | 0xc6 | setwhitebalance() 55 * 0 | 0xc5 | setredbalance()
56 0 | 0xc7 | setbluebalance() 56 * 0 | 0xc6 | setwhitebalance()
57 0 | 0xdc | setbrightcont(), setcolors() 57 * 0 | 0xc7 | setbluebalance()
58 3 | 0x02 | setexposure() 58 * 0 | 0xdc | setbrightcont(), setcolors()
59 3 | 0x10 | setgain() 59 * 3 | 0x02 | setexposure()
60 3 | 0x11 | setcolors(), setgain(), setexposure(), sethvflip() 60 * 3 | 0x10 | setgain()
61 3 | 0x21 | sethvflip() 61 * 3 | 0x11 | setcolors(), setgain(), setexposure(), sethvflip()
62*/ 62 * 3 | 0x21 | sethvflip()
63 */
63 64
64#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65 66
@@ -600,28 +601,36 @@ static void setexposure(struct gspca_dev *gspca_dev)
600 u8 clockdiv; 601 u8 clockdiv;
601 u16 exposure; 602 u16 exposure;
602 603
603 /* register 2 of frame 3 contains the clock divider configuring the 604 /*
604 no fps according to the formula: 90 / reg. sd->exposure is the 605 * Register 2 of frame 3 contains the clock divider configuring the
605 desired exposure time in 0.5 ms. */ 606 * no fps according to the formula: 90 / reg. sd->exposure is the
607 * desired exposure time in 0.5 ms.
608 */
606 clockdiv = (90 * sd->ctrls[EXPOSURE].val + 1999) / 2000; 609 clockdiv = (90 * sd->ctrls[EXPOSURE].val + 1999) / 2000;
607 610
608 /* Note clockdiv = 3 also works, but when running at 30 fps, depending 611 /*
609 on the scene being recorded, the camera switches to another 612 * Note clockdiv = 3 also works, but when running at 30 fps, depending
610 quantization table for certain JPEG blocks, and we don't know how 613 * on the scene being recorded, the camera switches to another
611 to decompress these blocks. So we cap the framerate at 15 fps */ 614 * quantization table for certain JPEG blocks, and we don't know how
615 * to decompress these blocks. So we cap the framerate at 15 fps.
616 */
612 if (clockdiv < 6) 617 if (clockdiv < 6)
613 clockdiv = 6; 618 clockdiv = 6;
614 else if (clockdiv > 63) 619 else if (clockdiv > 63)
615 clockdiv = 63; 620 clockdiv = 63;
616 621
617 /* reg2 MUST be a multiple of 3, except when between 6 and 12? 622 /*
618 Always round up, otherwise we cannot get the desired frametime 623 * Register 2 MUST be a multiple of 3, except when between 6 and 12?
619 using the partial frame time exposure control */ 624 * Always round up, otherwise we cannot get the desired frametime
625 * using the partial frame time exposure control.
626 */
620 if (clockdiv < 6 || clockdiv > 12) 627 if (clockdiv < 6 || clockdiv > 12)
621 clockdiv = ((clockdiv + 2) / 3) * 3; 628 clockdiv = ((clockdiv + 2) / 3) * 3;
622 629
623 /* frame exposure time in ms = 1000 * clockdiv / 90 -> 630 /*
624 exposure = (sd->exposure / 2) * 448 / (1000 * clockdiv / 90) */ 631 * frame exposure time in ms = 1000 * clockdiv / 90 ->
632 * exposure = (sd->exposure / 2) * 448 / (1000 * clockdiv / 90)
633 */
625 exposure = (sd->ctrls[EXPOSURE].val * 45 * 448) / (1000 * clockdiv); 634 exposure = (sd->ctrls[EXPOSURE].val * 45 * 448) / (1000 * clockdiv);
626 /* 0 = use full frametime, 448 = no exposure, reverse it */ 635 /* 0 = use full frametime, 448 = no exposure, reverse it */
627 exposure = 448 - exposure; 636 exposure = 448 - exposure;
@@ -639,10 +648,12 @@ static void setautogain(struct gspca_dev *gspca_dev)
639{ 648{
640 struct sd *sd = (struct sd *) gspca_dev; 649 struct sd *sd = (struct sd *) gspca_dev;
641 650
642 /* when switching to autogain set defaults to make sure 651 /*
643 we are on a valid point of the autogain gain / 652 * When switching to autogain set defaults to make sure
644 exposure knee graph, and give this change time to 653 * we are on a valid point of the autogain gain /
645 take effect before doing autogain. */ 654 * exposure knee graph, and give this change time to
655 * take effect before doing autogain.
656 */
646 if (sd->ctrls[AUTOGAIN].val) { 657 if (sd->ctrls[AUTOGAIN].val) {
647 sd->ctrls[EXPOSURE].val = EXPOSURE_DEF; 658 sd->ctrls[EXPOSURE].val = EXPOSURE_DEF;
648 sd->ctrls[GAIN].val = GAIN_DEF; 659 sd->ctrls[GAIN].val = GAIN_DEF;
@@ -784,10 +795,12 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
784 if (sof) { 795 if (sof) {
785 int n, lum_offset, footer_length; 796 int n, lum_offset, footer_length;
786 797
787 /* 6 bytes after the FF D9 EOF marker a number of lumination 798 /*
788 bytes are send corresponding to different parts of the 799 * 6 bytes after the FF D9 EOF marker a number of lumination
789 image, the 14th and 15th byte after the EOF seem to 800 * bytes are send corresponding to different parts of the
790 correspond to the center of the image */ 801 * image, the 14th and 15th byte after the EOF seem to
802 * correspond to the center of the image.
803 */
791 lum_offset = 61 + sizeof pac_sof_marker; 804 lum_offset = 61 + sizeof pac_sof_marker;
792 footer_length = 74; 805 footer_length = 74;
793 806
@@ -831,9 +844,10 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
831 u8 index; 844 u8 index;
832 u8 value; 845 u8 value;
833 846
834 /* reg->reg: bit0..15: reserved for register index (wIndex is 16bit 847 /*
835 long on the USB bus) 848 * reg->reg: bit0..15: reserved for register index (wIndex is 16bit
836 */ 849 * long on the USB bus)
850 */
837 if (reg->match.type == V4L2_CHIP_MATCH_HOST && 851 if (reg->match.type == V4L2_CHIP_MATCH_HOST &&
838 reg->match.addr == 0 && 852 reg->match.addr == 0 &&
839 (reg->reg < 0x000000ff) && 853 (reg->reg < 0x000000ff) &&
@@ -844,9 +858,11 @@ static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
844 index = reg->reg; 858 index = reg->reg;
845 value = reg->val; 859 value = reg->val;
846 860
847 /* Note that there shall be no access to other page 861 /*
848 by any other function between the page swith and 862 * Note that there shall be no access to other page
849 the actual register write */ 863 * by any other function between the page switch and
864 * the actual register write.
865 */
850 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */ 866 reg_w(gspca_dev, 0xff, 0x00); /* page 0 */
851 reg_w(gspca_dev, index, value); 867 reg_w(gspca_dev, index, value);
852 868