diff options
| author | Simon Arlott <simon@fire.lp0.eu> | 2012-09-11 01:26:15 -0400 |
|---|---|---|
| committer | Stephen Warren <swarren@wwwdotorg.org> | 2012-09-19 21:08:53 -0400 |
| commit | 75fabc3f64489aa2c52eec54cd433ea269a25e05 (patch) | |
| tree | ed157600173b8f860478c1f8dd12c93175c31d2f /drivers | |
| parent | ee4af5696720bb5b9de2e3b18be42089bed1e638 (diff) | |
ARM: bcm2835: add stub clock driver
This patch adds a minimal stub clock driver for the BCM2835. Its sole
purpose is to allow the PL011 AMBA clk_get() API calls to provide
something that looks enough like a clock that the driver probes and
operates correctly.
This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:
* Reworked to call clk_register_fixed_rate(), and clk_register_clkdev()
rather than using static data to represent the clocks.
* Moved implementation to drivers/clk/.
* Modified .dev_id for UART clocks to match UART DT node names.
* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/Makefile | 1 | ||||
| -rw-r--r-- | drivers/clk/clk-bcm2835.c | 59 |
2 files changed, 60 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 5869ea387054..d5c19d1e0cf8 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile | |||
| @@ -3,6 +3,7 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o | |||
| 3 | obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ | 3 | obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ |
| 4 | clk-mux.o clk-divider.o clk-fixed-factor.o | 4 | clk-mux.o clk-divider.o clk-fixed-factor.o |
| 5 | # SoCs specific | 5 | # SoCs specific |
| 6 | obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o | ||
| 6 | obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o | 7 | obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o |
| 7 | obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o | 8 | obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o |
| 8 | obj-$(CONFIG_ARCH_MXS) += mxs/ | 9 | obj-$(CONFIG_ARCH_MXS) += mxs/ |
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c new file mode 100644 index 000000000000..67ad16b20b81 --- /dev/null +++ b/drivers/clk/clk-bcm2835.c | |||
| @@ -0,0 +1,59 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Broadcom | ||
| 3 | * Copyright (C) 2012 Stephen Warren | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/clk-provider.h> | ||
| 21 | #include <linux/clkdev.h> | ||
| 22 | #include <linux/clk/bcm2835.h> | ||
| 23 | |||
| 24 | /* | ||
| 25 | * These are fixed clocks. They're probably not all root clocks and it may | ||
| 26 | * be possible to turn them on and off but until this is mapped out better | ||
| 27 | * it's the only way they can be used. | ||
| 28 | */ | ||
| 29 | void __init bcm2835_init_clocks(void) | ||
| 30 | { | ||
| 31 | struct clk *clk; | ||
| 32 | int ret; | ||
| 33 | |||
| 34 | clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT, | ||
| 35 | 250000000); | ||
| 36 | if (!clk) | ||
| 37 | pr_err("sys_pclk not registered\n"); | ||
| 38 | |||
| 39 | clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, | ||
| 40 | 126000000); | ||
| 41 | if (!clk) | ||
| 42 | pr_err("apb_pclk not registered\n"); | ||
| 43 | |||
| 44 | clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT, | ||
| 45 | 3000000); | ||
| 46 | if (!clk) | ||
| 47 | pr_err("uart0_pclk not registered\n"); | ||
| 48 | ret = clk_register_clkdev(clk, NULL, "20201000.uart"); | ||
| 49 | if (ret) | ||
| 50 | pr_err("uart0_pclk alias not registered\n"); | ||
| 51 | |||
| 52 | clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT, | ||
| 53 | 125000000); | ||
| 54 | if (!clk) | ||
| 55 | pr_err("uart1_pclk not registered\n"); | ||
| 56 | ret = clk_register_clkdev(clk, NULL, "20215000.uart"); | ||
| 57 | if (ret) | ||
| 58 | pr_err("uart0_pclk alias not registered\n"); | ||
| 59 | } | ||
