aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2013-01-06 17:36:14 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-01-07 11:36:41 -0500
commit73b31eaee7f02946dbb0bfabbee72ab6f0117bfb (patch)
treed4d6924a2d4c867d8c020d4152840db540348ce0 /drivers
parentd70a8ed3121e67da8e8bb713d592d9498916c58e (diff)
dma: coh901318: cut down on platform data abstraction
Since we merged the platform data into the driver we can remove the middle-man abstraction. Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/coh901318.c74
1 files changed, 7 insertions, 67 deletions
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index 0604273deafb..a2f079aca550 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -199,16 +199,6 @@ struct coh_dma_channel {
199}; 199};
200 200
201/** 201/**
202 * dma_access_memory_state_t - register dma for memory access
203 *
204 * @dev: The dma device
205 * @active: 1 means dma intends to access memory
206 * 0 means dma wont access memory
207 */
208typedef void (*dma_access_memory_state_t)(struct device *dev,
209 bool active);
210
211/**
212 * struct powersave - DMA power save structure 202 * struct powersave - DMA power save structure
213 * @lock: lock protecting data in this struct 203 * @lock: lock protecting data in this struct
214 * @started_channels: bit mask indicating active dma channels 204 * @started_channels: bit mask indicating active dma channels
@@ -218,22 +208,6 @@ struct powersave {
218 u64 started_channels; 208 u64 started_channels;
219}; 209};
220 210
221/**
222 * struct coh901318_platform - platform arch structure
223 * @chans_slave: specifying dma slave channels
224 * @chans_memcpy: specifying dma memcpy channels
225 * @access_memory_state: requesting DMA memory access (on / off)
226 * @chan_conf: dma channel configurations
227 * @max_channels: max number of dma chanenls
228 */
229struct coh901318_platform {
230 const int *chans_slave;
231 const int *chans_memcpy;
232 const dma_access_memory_state_t access_memory_state;
233 const struct coh_dma_channel *chan_conf;
234 const int max_channels;
235};
236
237/* points out all dma slave channels. 211/* points out all dma slave channels.
238 * Syntax is [A1, B1, A2, B2, .... ,-1,-1] 212 * Syntax is [A1, B1, A2, B2, .... ,-1,-1]
239 * Select all channels from A to B, end of list is marked with -1,-1 213 * Select all channels from A to B, end of list is marked with -1,-1
@@ -246,15 +220,6 @@ static int dma_slave_channels[] = {
246static int dma_memcpy_channels[] = { 220static int dma_memcpy_channels[] = {
247 U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_8, -1, -1}; 221 U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_8, -1, -1};
248 222
249/** register dma for memory access
250 *
251 * active 1 means dma intends to access memory
252 * 0 means dma wont access memory
253 */
254static void coh901318_access_memory_state(struct device *dev, bool active)
255{
256}
257
258#define flags_memcpy_config (COH901318_CX_CFG_CH_DISABLE | \ 223#define flags_memcpy_config (COH901318_CX_CFG_CH_DISABLE | \
259 COH901318_CX_CFG_RM_MEMORY_TO_MEMORY | \ 224 COH901318_CX_CFG_RM_MEMORY_TO_MEMORY | \
260 COH901318_CX_CFG_LCR_DISABLE | \ 225 COH901318_CX_CFG_LCR_DISABLE | \
@@ -1291,14 +1256,6 @@ const struct coh_dma_channel chan_config[U300_DMA_CHANNELS] = {
1291 } 1256 }
1292}; 1257};
1293 1258
1294static struct coh901318_platform coh901318_platform = {
1295 .chans_slave = dma_slave_channels,
1296 .chans_memcpy = dma_memcpy_channels,
1297 .access_memory_state = coh901318_access_memory_state,
1298 .chan_conf = chan_config,
1299 .max_channels = U300_DMA_CHANNELS,
1300};
1301
1302#define COHC_2_DEV(cohc) (&cohc->chan.dev->device) 1259#define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
1303 1260
1304#ifdef VERBOSE_DEBUG 1261#ifdef VERBOSE_DEBUG
@@ -1327,7 +1284,6 @@ struct coh901318_base {
1327 struct dma_device dma_slave; 1284 struct dma_device dma_slave;
1328 struct dma_device dma_memcpy; 1285 struct dma_device dma_memcpy;
1329 struct coh901318_chan *chans; 1286 struct coh901318_chan *chans;
1330 struct coh901318_platform *platform;
1331}; 1287};
1332 1288
1333struct coh901318_chan { 1289struct coh901318_chan {
@@ -1395,7 +1351,7 @@ static int coh901318_debugfs_read(struct file *file, char __user *buf,
1395 1351
1396 tmp += sprintf(tmp, "DMA -- enabled dma channels\n"); 1352 tmp += sprintf(tmp, "DMA -- enabled dma channels\n");
1397 1353
1398 for (i = 0; i < debugfs_dma_base->platform->max_channels; i++) 1354 for (i = 0; i < U300_DMA_CHANNELS; i++)
1399 if (started_channels & (1 << i)) 1355 if (started_channels & (1 << i))
1400 tmp += sprintf(tmp, "channel %d\n", i); 1356 tmp += sprintf(tmp, "channel %d\n", i);
1401 1357
@@ -1463,13 +1419,13 @@ static inline struct coh901318_chan *to_coh901318_chan(struct dma_chan *chan)
1463static inline const struct coh901318_params * 1419static inline const struct coh901318_params *
1464cohc_chan_param(struct coh901318_chan *cohc) 1420cohc_chan_param(struct coh901318_chan *cohc)
1465{ 1421{
1466 return &cohc->base->platform->chan_conf[cohc->id].param; 1422 return &chan_config[cohc->id].param;
1467} 1423}
1468 1424
1469static inline const struct coh_dma_channel * 1425static inline const struct coh_dma_channel *
1470cohc_chan_conf(struct coh901318_chan *cohc) 1426cohc_chan_conf(struct coh901318_chan *cohc)
1471{ 1427{
1472 return &cohc->base->platform->chan_conf[cohc->id]; 1428 return &chan_config[cohc->id];
1473} 1429}
1474 1430
1475static void enable_powersave(struct coh901318_chan *cohc) 1431static void enable_powersave(struct coh901318_chan *cohc)
@@ -1481,12 +1437,6 @@ static void enable_powersave(struct coh901318_chan *cohc)
1481 1437
1482 pm->started_channels &= ~(1ULL << cohc->id); 1438 pm->started_channels &= ~(1ULL << cohc->id);
1483 1439
1484 if (!pm->started_channels) {
1485 /* DMA no longer intends to access memory */
1486 cohc->base->platform->access_memory_state(cohc->base->dev,
1487 false);
1488 }
1489
1490 spin_unlock_irqrestore(&pm->lock, flags); 1440 spin_unlock_irqrestore(&pm->lock, flags);
1491} 1441}
1492static void disable_powersave(struct coh901318_chan *cohc) 1442static void disable_powersave(struct coh901318_chan *cohc)
@@ -1496,12 +1446,6 @@ static void disable_powersave(struct coh901318_chan *cohc)
1496 1446
1497 spin_lock_irqsave(&pm->lock, flags); 1447 spin_lock_irqsave(&pm->lock, flags);
1498 1448
1499 if (!pm->started_channels) {
1500 /* DMA intends to access memory */
1501 cohc->base->platform->access_memory_state(cohc->base->dev,
1502 true);
1503 }
1504
1505 pm->started_channels |= (1ULL << cohc->id); 1449 pm->started_channels |= (1ULL << cohc->id);
1506 1450
1507 spin_unlock_irqrestore(&pm->lock, flags); 1451 spin_unlock_irqrestore(&pm->lock, flags);
@@ -1860,7 +1804,7 @@ static int coh901318_config(struct coh901318_chan *cohc,
1860 if (param) 1804 if (param)
1861 p = param; 1805 p = param;
1862 else 1806 else
1863 p = &cohc->base->platform->chan_conf[channel].param; 1807 p = cohc_chan_param(cohc);
1864 1808
1865 /* Clear any pending BE or TC interrupt */ 1809 /* Clear any pending BE or TC interrupt */
1866 if (channel < 32) { 1810 if (channel < 32) {
@@ -2695,7 +2639,6 @@ void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
2695static int __init coh901318_probe(struct platform_device *pdev) 2639static int __init coh901318_probe(struct platform_device *pdev)
2696{ 2640{
2697 int err = 0; 2641 int err = 0;
2698 struct coh901318_platform *pdata;
2699 struct coh901318_base *base; 2642 struct coh901318_base *base;
2700 int irq; 2643 int irq;
2701 struct resource *io; 2644 struct resource *io;
@@ -2711,11 +2654,9 @@ static int __init coh901318_probe(struct platform_device *pdev)
2711 pdev->dev.driver->name) == NULL) 2654 pdev->dev.driver->name) == NULL)
2712 return -ENOMEM; 2655 return -ENOMEM;
2713 2656
2714 pdata = &coh901318_platform,
2715
2716 base = devm_kzalloc(&pdev->dev, 2657 base = devm_kzalloc(&pdev->dev,
2717 ALIGN(sizeof(struct coh901318_base), 4) + 2658 ALIGN(sizeof(struct coh901318_base), 4) +
2718 pdata->max_channels * 2659 U300_DMA_CHANNELS *
2719 sizeof(struct coh901318_chan), 2660 sizeof(struct coh901318_chan),
2720 GFP_KERNEL); 2661 GFP_KERNEL);
2721 if (!base) 2662 if (!base)
@@ -2728,7 +2669,6 @@ static int __init coh901318_probe(struct platform_device *pdev)
2728 return -ENOMEM; 2669 return -ENOMEM;
2729 2670
2730 base->dev = &pdev->dev; 2671 base->dev = &pdev->dev;
2731 base->platform = pdata;
2732 spin_lock_init(&base->pm.lock); 2672 spin_lock_init(&base->pm.lock);
2733 base->pm.started_channels = 0; 2673 base->pm.started_channels = 0;
2734 2674
@@ -2750,7 +2690,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
2750 return err; 2690 return err;
2751 2691
2752 /* init channels for device transfers */ 2692 /* init channels for device transfers */
2753 coh901318_base_init(&base->dma_slave, base->platform->chans_slave, 2693 coh901318_base_init(&base->dma_slave, dma_slave_channels,
2754 base); 2694 base);
2755 2695
2756 dma_cap_zero(base->dma_slave.cap_mask); 2696 dma_cap_zero(base->dma_slave.cap_mask);
@@ -2770,7 +2710,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
2770 goto err_register_slave; 2710 goto err_register_slave;
2771 2711
2772 /* init channels for memcpy */ 2712 /* init channels for memcpy */
2773 coh901318_base_init(&base->dma_memcpy, base->platform->chans_memcpy, 2713 coh901318_base_init(&base->dma_memcpy, dma_memcpy_channels,
2774 base); 2714 base);
2775 2715
2776 dma_cap_zero(base->dma_memcpy.cap_mask); 2716 dma_cap_zero(base->dma_memcpy.cap_mask);