mvsdio: fix handling of partial word at the end of PIO transfer

Standard data flow for MMC/SD/SDIO cards requires that the mvsdio
controller be set for big endian operation.  This is causing problems
with buffers which length is not a multiple of 4 bytes as the last
partial word doesn't get shifted all the way and stored properly in
memory.  Let's compensate for this.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
CC: stable@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
index b56d72ff06e9..34e23489811a 100644
--- a/drivers/mmc/host/mvsdio.c
+++ b/drivers/mmc/host/mvsdio.c
@@ -384,7 +384,7 @@ static irqreturn_t mvsd_irq(int irq, void *dev)
                                 u16 val[2] = {0, 0};
                                 val[0] = mvsd_read(MVSD_FIFO);
                                 val[1] = mvsd_read(MVSD_FIFO);
-                                memcpy(p, &val, s);
+                                memcpy(p, ((void *)&val) + 4 - s, s);
                                 s = 0;
                                 intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
                         }
@@ -423,7 +423,7 @@ static irqreturn_t mvsd_irq(int irq, void *dev)
                 if (s < 4) {
                         if (s && (intr_status & MVSD_NOR_TX_AVAIL)) {
                                 u16 val[2] = {0, 0};
-                                memcpy(&val, p, s);
+                                memcpy(((void *)&val) + 4 - s, p, s);
                                 mvsd_write(MVSD_FIFO, val[0]);
                                 mvsd_write(MVSD_FIFO, val[1]);
                                 s = 0;