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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:35:29 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:35:29 -0500
commit4c8c225abf972ce422c241579ce1d4d27eaeb166 (patch)
tree77bc67defdc53c494b20632e66b82ce9be3c06af /drivers
parent3eb05225ee8efb81fe50558f5f9d94e7477ade8f (diff)
parent9170100ee46402af6d318134525c728027318d67 (diff)
Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux
Pull GPIO changes from Grant Likely: "This branch contains the usual set of individual driver improvements and bug fixes, as well as updates to the core code. The more notable changes include: - Internally add new API for referencing GPIOs by gpio_desc instead of number. Eventually this will become a public API - ACPI GPIO binding support" * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: (33 commits) arm64: select ARCH_WANT_OPTIONAL_GPIOLIB gpio: em: Use irq_domain_add_simple() to fix runtime error gpio: using common order: let 'static const' instead of 'const static' gpio/vt8500: memory cleanup missing gpiolib: Fix locking on gpio debugfs files gpiolib: let gpio_chip reference its descriptors gpiolib: use descriptors internally gpiolib: use gpio_chips list in gpiochip_find_base gpiolib: use gpio_chips list in sysfs ops gpiolib: use gpio_chips list in gpiochip_find gpiolib: use gpio_chips list in gpiolib_sysfs_init gpiolib: link all gpio_chips using a list gpio/langwell: cleanup driver gpio/langwell: Add Cloverview ids to pci device table gpio/lynxpoint: add chipset gpio driver. gpiolib: add missing braces in gpio_direction_show gpiolib-acpi: Fix error checks in interrupt requesting gpio: mpc8xxx: don't set IRQ_TYPE_NONE when creating irq mapping gpiolib: remove gpiochip_reserve() arm: pxa: tosa: do not use gpiochip_reserve() ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/Kconfig11
-rw-r--r--drivers/gpio/Makefile4
-rw-r--r--drivers/gpio/gpio-em.c3
-rw-r--r--drivers/gpio/gpio-langwell.c53
-rw-r--r--drivers/gpio/gpio-lynxpoint.c469
-rw-r--r--drivers/gpio/gpio-mpc8xxx.c1
-rw-r--r--drivers/gpio/gpio-mxs.c31
-rw-r--r--drivers/gpio/gpio-omap.c6
-rw-r--r--drivers/gpio/gpio-pca953x.c380
-rw-r--r--drivers/gpio/gpio-pl061.c2
-rw-r--r--drivers/gpio/gpio-pxa.c7
-rw-r--r--drivers/gpio/gpio-twl4030.c176
-rw-r--r--drivers/gpio/gpio-vt8500.c65
-rw-r--r--drivers/gpio/gpiolib-acpi.c87
-rw-r--r--drivers/gpio/gpiolib.c759
15 files changed, 1454 insertions, 600 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 74e17f19cc33..93aaadf99f28 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -30,6 +30,9 @@ config ARCH_REQUIRE_GPIOLIB
30 Selecting this from the architecture code will cause the gpiolib 30 Selecting this from the architecture code will cause the gpiolib
31 code to always get built in. 31 code to always get built in.
32 32
33config GPIO_DEVRES
34 def_bool y
35 depends on HAS_IOMEM
33 36
34 37
35menuconfig GPIOLIB 38menuconfig GPIOLIB
@@ -298,6 +301,14 @@ config GPIO_GE_FPGA
298 and write pin state) for GPIO implemented in a number of GE single 301 and write pin state) for GPIO implemented in a number of GE single
299 board computers. 302 board computers.
300 303
304config GPIO_LYNXPOINT
305 bool "Intel Lynxpoint GPIO support"
306 depends on ACPI
307 select IRQ_DOMAIN
308 help
309 driver for GPIO functionality on Intel Lynxpoint PCH chipset
310 Requires ACPI device enumeration code to set up a platform device.
311
301comment "I2C GPIO expanders:" 312comment "I2C GPIO expanders:"
302 313
303config GPIO_ARIZONA 314config GPIO_ARIZONA
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 6dbcba2e5cac..22e07bc9fcb5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -2,7 +2,8 @@
2 2
3ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG 3ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
4 4
5obj-$(CONFIG_GPIOLIB) += gpiolib.o devres.o 5obj-$(CONFIG_GPIO_DEVRES) += devres.o
6obj-$(CONFIG_GPIOLIB) += gpiolib.o
6obj-$(CONFIG_OF_GPIO) += gpiolib-of.o 7obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
7obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o 8obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
8 9
@@ -30,6 +31,7 @@ obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
30obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o 31obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
31obj-$(CONFIG_GPIO_LANGWELL) += gpio-langwell.o 32obj-$(CONFIG_GPIO_LANGWELL) += gpio-langwell.o
32obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o 33obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
34obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
33obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o 35obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
34obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o 36obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o
35obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o 37obj-$(CONFIG_GPIO_MAX7301) += gpio-max7301.o
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
index bdc8302e711a..deca78f99316 100644
--- a/drivers/gpio/gpio-em.c
+++ b/drivers/gpio/gpio-em.c
@@ -299,8 +299,9 @@ static int em_gio_probe(struct platform_device *pdev)
299 irq_chip->irq_set_type = em_gio_irq_set_type; 299 irq_chip->irq_set_type = em_gio_irq_set_type;
300 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE; 300 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE;
301 301
302 p->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 302 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
303 pdata->number_of_pins, 303 pdata->number_of_pins,
304 pdata->irq_base,
304 &em_gio_irq_domain_ops, p); 305 &em_gio_irq_domain_ops, p);
305 if (!p->irq_domain) { 306 if (!p->irq_domain) {
306 ret = -ENXIO; 307 ret = -ENXIO;
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index e77b2b3e94af..634c3d37f7b5 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -71,10 +71,12 @@ struct lnw_gpio {
71 struct irq_domain *domain; 71 struct irq_domain *domain;
72}; 72};
73 73
74#define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip)
75
74static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, 76static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
75 enum GPIO_REG reg_type) 77 enum GPIO_REG reg_type)
76{ 78{
77 struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); 79 struct lnw_gpio *lnw = to_lnw_priv(chip);
78 unsigned nreg = chip->ngpio / 32; 80 unsigned nreg = chip->ngpio / 32;
79 u8 reg = offset / 32; 81 u8 reg = offset / 32;
80 void __iomem *ptr; 82 void __iomem *ptr;
@@ -86,7 +88,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset,
86static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, 88static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset,
87 enum GPIO_REG reg_type) 89 enum GPIO_REG reg_type)
88{ 90{
89 struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); 91 struct lnw_gpio *lnw = to_lnw_priv(chip);
90 unsigned nreg = chip->ngpio / 32; 92 unsigned nreg = chip->ngpio / 32;
91 u8 reg = offset / 16; 93 u8 reg = offset / 16;
92 void __iomem *ptr; 94 void __iomem *ptr;
@@ -130,7 +132,7 @@ static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
130 132
131static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 133static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
132{ 134{
133 struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); 135 struct lnw_gpio *lnw = to_lnw_priv(chip);
134 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); 136 void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
135 u32 value; 137 u32 value;
136 unsigned long flags; 138 unsigned long flags;
@@ -153,7 +155,7 @@ static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
153static int lnw_gpio_direction_output(struct gpio_chip *chip, 155static int lnw_gpio_direction_output(struct gpio_chip *chip,
154 unsigned offset, int value) 156 unsigned offset, int value)
155{ 157{
156 struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); 158 struct lnw_gpio *lnw = to_lnw_priv(chip);
157 void __iomem *gpdr = gpio_reg(chip, offset, GPDR); 159 void __iomem *gpdr = gpio_reg(chip, offset, GPDR);
158 unsigned long flags; 160 unsigned long flags;
159 161
@@ -176,7 +178,7 @@ static int lnw_gpio_direction_output(struct gpio_chip *chip,
176 178
177static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) 179static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
178{ 180{
179 struct lnw_gpio *lnw = container_of(chip, struct lnw_gpio, chip); 181 struct lnw_gpio *lnw = to_lnw_priv(chip);
180 return irq_create_mapping(lnw->domain, offset); 182 return irq_create_mapping(lnw->domain, offset);
181} 183}
182 184
@@ -234,6 +236,8 @@ static DEFINE_PCI_DEVICE_TABLE(lnw_gpio_ids) = { /* pin number */
234 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080f), .driver_data = 64 }, 236 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080f), .driver_data = 64 },
235 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081f), .driver_data = 96 }, 237 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081f), .driver_data = 96 },
236 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081a), .driver_data = 96 }, 238 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081a), .driver_data = 96 },
239 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08eb), .driver_data = 96 },
240 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08f7), .driver_data = 96 },
237 { 0, } 241 { 0, }
238}; 242};
239MODULE_DEVICE_TABLE(pci, lnw_gpio_ids); 243MODULE_DEVICE_TABLE(pci, lnw_gpio_ids);
@@ -299,17 +303,6 @@ static const struct irq_domain_ops lnw_gpio_irq_ops = {
299 .xlate = irq_domain_xlate_twocell, 303 .xlate = irq_domain_xlate_twocell,
300}; 304};
301 305
302#ifdef CONFIG_PM
303static int lnw_gpio_runtime_resume(struct device *dev)
304{
305 return 0;
306}
307
308static int lnw_gpio_runtime_suspend(struct device *dev)
309{
310 return 0;
311}
312
313static int lnw_gpio_runtime_idle(struct device *dev) 306static int lnw_gpio_runtime_idle(struct device *dev)
314{ 307{
315 int err = pm_schedule_suspend(dev, 500); 308 int err = pm_schedule_suspend(dev, 500);
@@ -320,16 +313,8 @@ static int lnw_gpio_runtime_idle(struct device *dev)
320 return -EBUSY; 313 return -EBUSY;
321} 314}
322 315
323#else
324#define lnw_gpio_runtime_suspend NULL
325#define lnw_gpio_runtime_resume NULL
326#define lnw_gpio_runtime_idle NULL
327#endif
328
329static const struct dev_pm_ops lnw_gpio_pm_ops = { 316static const struct dev_pm_ops lnw_gpio_pm_ops = {
330 .runtime_suspend = lnw_gpio_runtime_suspend, 317 SET_RUNTIME_PM_OPS(NULL, NULL, lnw_gpio_runtime_idle)
331 .runtime_resume = lnw_gpio_runtime_resume,
332 .runtime_idle = lnw_gpio_runtime_idle,
333}; 318};
334 319
335static int lnw_gpio_probe(struct pci_dev *pdev, 320static int lnw_gpio_probe(struct pci_dev *pdev,
@@ -349,7 +334,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev,
349 retval = pci_request_regions(pdev, "langwell_gpio"); 334 retval = pci_request_regions(pdev, "langwell_gpio");
350 if (retval) { 335 if (retval) {
351 dev_err(&pdev->dev, "error requesting resources\n"); 336 dev_err(&pdev->dev, "error requesting resources\n");
352 goto err2; 337 goto err_pci_req_region;
353 } 338 }
354 /* get the gpio_base from bar1 */ 339 /* get the gpio_base from bar1 */
355 start = pci_resource_start(pdev, 1); 340 start = pci_resource_start(pdev, 1);
@@ -358,7 +343,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev,
358 if (!base) { 343 if (!base) {
359 dev_err(&pdev->dev, "error mapping bar1\n"); 344 dev_err(&pdev->dev, "error mapping bar1\n");
360 retval = -EFAULT; 345 retval = -EFAULT;
361 goto err3; 346 goto err_ioremap;
362 } 347 }
363 gpio_base = *((u32 *)base + 1); 348 gpio_base = *((u32 *)base + 1);
364 /* release the IO mapping, since we already get the info from bar1 */ 349 /* release the IO mapping, since we already get the info from bar1 */
@@ -370,21 +355,21 @@ static int lnw_gpio_probe(struct pci_dev *pdev,
370 if (!base) { 355 if (!base) {
371 dev_err(&pdev->dev, "error mapping bar0\n"); 356 dev_err(&pdev->dev, "error mapping bar0\n");
372 retval = -EFAULT; 357 retval = -EFAULT;
373 goto err3; 358 goto err_ioremap;
374 } 359 }
375 360
376 lnw = devm_kzalloc(&pdev->dev, sizeof(struct lnw_gpio), GFP_KERNEL); 361 lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL);
377 if (!lnw) { 362 if (!lnw) {
378 dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); 363 dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n");
379 retval = -ENOMEM; 364 retval = -ENOMEM;
380 goto err3; 365 goto err_ioremap;
381 } 366 }
382 367
383 lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio, 368 lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio,
384 &lnw_gpio_irq_ops, lnw); 369 &lnw_gpio_irq_ops, lnw);
385 if (!lnw->domain) { 370 if (!lnw->domain) {
386 retval = -ENOMEM; 371 retval = -ENOMEM;
387 goto err3; 372 goto err_ioremap;
388 } 373 }
389 374
390 lnw->reg_base = base; 375 lnw->reg_base = base;
@@ -403,7 +388,7 @@ static int lnw_gpio_probe(struct pci_dev *pdev,
403 retval = gpiochip_add(&lnw->chip); 388 retval = gpiochip_add(&lnw->chip);
404 if (retval) { 389 if (retval) {
405 dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); 390 dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval);
406 goto err3; 391 goto err_ioremap;
407 } 392 }
408 393
409 lnw_irq_init_hw(lnw); 394 lnw_irq_init_hw(lnw);
@@ -418,9 +403,9 @@ static int lnw_gpio_probe(struct pci_dev *pdev,
418 403
419 return 0; 404 return 0;
420 405
421err3: 406err_ioremap:
422 pci_release_regions(pdev); 407 pci_release_regions(pdev);
423err2: 408err_pci_req_region:
424 pci_disable_device(pdev); 409 pci_disable_device(pdev);
425 return retval; 410 return retval;
426} 411}
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c
new file mode 100644
index 000000000000..3472b05ac512
--- /dev/null
+++ b/drivers/gpio/gpio-lynxpoint.c
@@ -0,0 +1,469 @@
1/*
2 * GPIO controller driver for Intel Lynxpoint PCH chipset>
3 * Copyright (c) 2012, Intel Corporation.
4 *
5 * Author: Mathias Nyman <mathias.nyman@linux.intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/types.h>
26#include <linux/bitops.h>
27#include <linux/interrupt.h>
28#include <linux/irq.h>
29#include <linux/gpio.h>
30#include <linux/irqdomain.h>
31#include <linux/slab.h>
32#include <linux/acpi.h>
33#include <linux/platform_device.h>
34#include <linux/pm_runtime.h>
35
36/* LynxPoint chipset has support for 94 gpio pins */
37
38#define LP_NUM_GPIO 94
39
40/* Bitmapped register offsets */
41#define LP_ACPI_OWNED 0x00 /* Bitmap, set by bios, 0: pin reserved for ACPI */
42#define LP_GC 0x7C /* set APIC IRQ to IRQ14 or IRQ15 for all pins */
43#define LP_INT_STAT 0x80
44#define LP_INT_ENABLE 0x90
45
46/* Each pin has two 32 bit config registers, starting at 0x100 */
47#define LP_CONFIG1 0x100
48#define LP_CONFIG2 0x104
49
50/* LP_CONFIG1 reg bits */
51#define OUT_LVL_BIT BIT(31)
52#define IN_LVL_BIT BIT(30)
53#define TRIG_SEL_BIT BIT(4) /* 0: Edge, 1: Level */
54#define INT_INV_BIT BIT(3) /* Invert interrupt triggering */
55#define DIR_BIT BIT(2) /* 0: Output, 1: Input */
56#define USE_SEL_BIT BIT(0) /* 0: Native, 1: GPIO */
57
58/* LP_CONFIG2 reg bits */
59#define GPINDIS_BIT BIT(2) /* disable input sensing */
60#define GPIWP_BIT (BIT(0) | BIT(1)) /* weak pull options */
61
62struct lp_gpio {
63 struct gpio_chip chip;
64 struct irq_domain *domain;
65 struct platform_device *pdev;
66 spinlock_t lock;
67 unsigned long reg_base;
68};
69
70/*
71 * Lynxpoint gpios are controlled through both bitmapped registers and
72 * per gpio specific registers. The bitmapped registers are in chunks of
73 * 3 x 32bit registers to cover all 94 gpios
74 *
75 * per gpio specific registers consist of two 32bit registers per gpio
76 * (LP_CONFIG1 and LP_CONFIG2), with 94 gpios there's a total of
77 * 188 config registes.
78 *
79 * A simplified view of the register layout look like this:
80 *
81 * LP_ACPI_OWNED[31:0] gpio ownerships for gpios 0-31 (bitmapped registers)
82 * LP_ACPI_OWNED[63:32] gpio ownerships for gpios 32-63
83 * LP_ACPI_OWNED[94:64] gpio ownerships for gpios 63-94
84 * ...
85 * LP_INT_ENABLE[31:0] ...
86 * LP_INT_ENABLE[63:31] ...
87 * LP_INT_ENABLE[94:64] ...
88 * LP0_CONFIG1 (gpio 0) config1 reg for gpio 0 (per gpio registers)
89 * LP0_CONFIG2 (gpio 0) config2 reg for gpio 0
90 * LP1_CONFIG1 (gpio 1) config1 reg for gpio 1
91 * LP1_CONFIG2 (gpio 1) config2 reg for gpio 1
92 * LP2_CONFIG1 (gpio 2) ...
93 * LP2_CONFIG2 (gpio 2) ...
94 * ...
95 * LP94_CONFIG1 (gpio 94) ...
96 * LP94_CONFIG2 (gpio 94) ...
97 */
98
99static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset,
100 int reg)
101{
102 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
103 int reg_offset;
104
105 if (reg == LP_CONFIG1 || reg == LP_CONFIG2)
106 /* per gpio specific config registers */
107 reg_offset = offset * 8;
108 else
109 /* bitmapped registers */
110 reg_offset = (offset / 32) * 4;
111
112 return lg->reg_base + reg + reg_offset;
113}
114
115static int lp_gpio_request(struct gpio_chip *chip, unsigned offset)
116{
117 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
118 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1);
119 unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2);
120 unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED);
121
122 pm_runtime_get(&lg->pdev->dev); /* should we put if failed */
123
124 /* Fail if BIOS reserved pin for ACPI use */
125 if (!(inl(acpi_use) & BIT(offset % 32))) {
126 dev_err(&lg->pdev->dev, "gpio %d reserved for ACPI\n", offset);
127 return -EBUSY;
128 }
129 /* Fail if pin is in alternate function mode (not GPIO mode) */
130 if (!(inl(reg) & USE_SEL_BIT))
131 return -ENODEV;
132
133 /* enable input sensing */
134 outl(inl(conf2) & ~GPINDIS_BIT, conf2);
135
136
137 return 0;
138}
139
140static void lp_gpio_free(struct gpio_chip *chip, unsigned offset)
141{
142 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
143 unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2);
144
145 /* disable input sensing */
146 outl(inl(conf2) | GPINDIS_BIT, conf2);
147
148 pm_runtime_put(&lg->pdev->dev);
149}
150
151static int lp_irq_type(struct irq_data *d, unsigned type)
152{
153 struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
154 u32 hwirq = irqd_to_hwirq(d);
155 unsigned long flags;
156 u32 value;
157 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1);
158
159 if (hwirq >= lg->chip.ngpio)
160 return -EINVAL;
161
162 spin_lock_irqsave(&lg->lock, flags);
163 value = inl(reg);
164
165 /* set both TRIG_SEL and INV bits to 0 for rising edge */
166 if (type & IRQ_TYPE_EDGE_RISING)
167 value &= ~(TRIG_SEL_BIT | INT_INV_BIT);
168
169 /* TRIG_SEL bit 0, INV bit 1 for falling edge */
170 if (type & IRQ_TYPE_EDGE_FALLING)
171 value = (value | INT_INV_BIT) & ~TRIG_SEL_BIT;
172
173 /* TRIG_SEL bit 1, INV bit 0 for level low */
174 if (type & IRQ_TYPE_LEVEL_LOW)
175 value = (value | TRIG_SEL_BIT) & ~INT_INV_BIT;
176
177 /* TRIG_SEL bit 1, INV bit 1 for level high */
178 if (type & IRQ_TYPE_LEVEL_HIGH)
179 value |= TRIG_SEL_BIT | INT_INV_BIT;
180
181 outl(value, reg);
182 spin_unlock_irqrestore(&lg->lock, flags);
183
184 return 0;
185}
186
187static int lp_gpio_get(struct gpio_chip *chip, unsigned offset)
188{
189 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1);
190 return inl(reg) & IN_LVL_BIT;
191}
192
193static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
194{
195 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
196 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1);
197 unsigned long flags;
198
199 spin_lock_irqsave(&lg->lock, flags);
200
201 if (value)
202 outl(inl(reg) | OUT_LVL_BIT, reg);
203 else
204 outl(inl(reg) & ~OUT_LVL_BIT, reg);
205
206 spin_unlock_irqrestore(&lg->lock, flags);
207}
208
209static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
210{
211 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
212 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1);
213 unsigned long flags;
214
215 spin_lock_irqsave(&lg->lock, flags);
216 outl(inl(reg) | DIR_BIT, reg);
217 spin_unlock_irqrestore(&lg->lock, flags);
218
219 return 0;
220}
221
222static int lp_gpio_direction_output(struct gpio_chip *chip,
223 unsigned offset, int value)
224{
225 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
226 unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1);
227 unsigned long flags;
228
229 lp_gpio_set(chip, offset, value);
230
231 spin_lock_irqsave(&lg->lock, flags);
232 outl(inl(reg) & ~DIR_BIT, reg);
233 spin_unlock_irqrestore(&lg->lock, flags);
234
235 return 0;
236}
237
238static int lp_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
239{
240 struct lp_gpio *lg = container_of(chip, struct lp_gpio, chip);
241 return irq_create_mapping(lg->domain, offset);
242}
243
244static void lp_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
245{
246 struct irq_data *data = irq_desc_get_irq_data(desc);
247 struct lp_gpio *lg = irq_data_get_irq_handler_data(data);
248 struct irq_chip *chip = irq_data_get_irq_chip(data);
249 u32 base, pin, mask;
250 unsigned long reg, pending;
251 unsigned virq;
252
253 /* check from GPIO controller which pin triggered the interrupt */
254 for (base = 0; base < lg->chip.ngpio; base += 32) {
255 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
256
257 while ((pending = inl(reg))) {
258 pin = __ffs(pending);
259 mask = BIT(pin);
260 /* Clear before handling so we don't lose an edge */
261 outl(mask, reg);
262 virq = irq_find_mapping(lg->domain, base + pin);
263 generic_handle_irq(virq);
264 }
265 }
266 chip->irq_eoi(data);
267}
268
269static void lp_irq_unmask(struct irq_data *d)
270{
271}
272
273static void lp_irq_mask(struct irq_data *d)
274{
275}
276
277static void lp_irq_enable(struct irq_data *d)
278{
279 struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
280 u32 hwirq = irqd_to_hwirq(d);
281 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
282 unsigned long flags;
283
284 spin_lock_irqsave(&lg->lock, flags);
285 outl(inl(reg) | BIT(hwirq % 32), reg);
286 spin_unlock_irqrestore(&lg->lock, flags);
287}
288
289static void lp_irq_disable(struct irq_data *d)
290{
291 struct lp_gpio *lg = irq_data_get_irq_chip_data(d);
292 u32 hwirq = irqd_to_hwirq(d);
293 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
294 unsigned long flags;
295
296 spin_lock_irqsave(&lg->lock, flags);
297 outl(inl(reg) & ~BIT(hwirq % 32), reg);
298 spin_unlock_irqrestore(&lg->lock, flags);
299}
300
301static struct irq_chip lp_irqchip = {
302 .name = "LP-GPIO",
303 .irq_mask = lp_irq_mask,
304 .irq_unmask = lp_irq_unmask,
305 .irq_enable = lp_irq_enable,
306 .irq_disable = lp_irq_disable,
307 .irq_set_type = lp_irq_type,
308 .flags = IRQCHIP_SKIP_SET_WAKE,
309};
310
311static void lp_gpio_irq_init_hw(struct lp_gpio *lg)
312{
313 unsigned long reg;
314 unsigned base;
315
316 for (base = 0; base < lg->chip.ngpio; base += 32) {
317 /* disable gpio pin interrupts */
318 reg = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);
319 outl(0, reg);
320 /* Clear interrupt status register */
321 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
322 outl(0xffffffff, reg);
323 }
324}
325
326static int lp_gpio_irq_map(struct irq_domain *d, unsigned int virq,
327 irq_hw_number_t hw)
328{
329 struct lp_gpio *lg = d->host_data;
330
331 irq_set_chip_and_handler_name(virq, &lp_irqchip, handle_simple_irq,
332 "demux");
333 irq_set_chip_data(virq, lg);
334 irq_set_irq_type(virq, IRQ_TYPE_NONE);
335
336 return 0;
337}
338
339static const struct irq_domain_ops lp_gpio_irq_ops = {
340 .map = lp_gpio_irq_map,
341};
342
343static int lp_gpio_probe(struct platform_device *pdev)
344{
345 struct lp_gpio *lg;
346 struct gpio_chip *gc;
347 struct resource *io_rc, *irq_rc;
348 struct device *dev = &pdev->dev;
349 unsigned long reg_len;
350 unsigned hwirq;
351 int ret = -ENODEV;
352
353 lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL);
354 if (!lg) {
355 dev_err(dev, "can't allocate lp_gpio chip data\n");
356 return -ENOMEM;
357 }
358
359 lg->pdev = pdev;
360 platform_set_drvdata(pdev, lg);
361
362 io_rc = platform_get_resource(pdev, IORESOURCE_IO, 0);
363 irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
364
365 if (!io_rc) {
366 dev_err(dev, "missing IO resources\n");
367 return -EINVAL;
368 }
369
370 lg->reg_base = io_rc->start;
371 reg_len = resource_size(io_rc);
372
373 if (!devm_request_region(dev, lg->reg_base, reg_len, "lp-gpio")) {
374 dev_err(dev, "failed requesting IO region 0x%x\n",
375 (unsigned int)lg->reg_base);
376 return -EBUSY;
377 }
378
379 spin_lock_init(&lg->lock);
380
381 gc = &lg->chip;
382 gc->label = dev_name(dev);
383 gc->owner = THIS_MODULE;
384 gc->request = lp_gpio_request;
385 gc->free = lp_gpio_free;
386 gc->direction_input = lp_gpio_direction_input;
387 gc->direction_output = lp_gpio_direction_output;
388 gc->get = lp_gpio_get;
389 gc->set = lp_gpio_set;
390 gc->base = -1;
391 gc->ngpio = LP_NUM_GPIO;
392 gc->can_sleep = 0;
393 gc->dev = dev;
394
395 /* set up interrupts */
396 if (irq_rc && irq_rc->start) {
397 hwirq = irq_rc->start;
398 gc->to_irq = lp_gpio_to_irq;
399
400 lg->domain = irq_domain_add_linear(NULL, LP_NUM_GPIO,
401 &lp_gpio_irq_ops, lg);
402 if (!lg->domain)
403 return -ENXIO;
404
405 lp_gpio_irq_init_hw(lg);
406
407 irq_set_handler_data(hwirq, lg);
408 irq_set_chained_handler(hwirq, lp_gpio_irq_handler);
409 }
410
411 ret = gpiochip_add(gc);
412 if (ret) {
413 dev_err(dev, "failed adding lp-gpio chip\n");
414 return ret;
415 }
416 pm_runtime_enable(dev);
417
418 return 0;
419}
420
421static int lp_gpio_runtime_suspend(struct device *dev)
422{
423 return 0;
424}
425
426static int lp_gpio_runtime_resume(struct device *dev)
427{
428 return 0;
429}
430
431static const struct dev_pm_ops lp_gpio_pm_ops = {
432 .runtime_suspend = lp_gpio_runtime_suspend,
433 .runtime_resume = lp_gpio_runtime_resume,
434};
435
436static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = {
437 { "INT33C7", 0 },
438 { }
439};
440MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match);
441
442static int lp_gpio_remove(struct platform_device *pdev)
443{
444 struct lp_gpio *lg = platform_get_drvdata(pdev);
445 int err;
446 err = gpiochip_remove(&lg->chip);
447 if (err)
448 dev_warn(&pdev->dev, "failed to remove gpio_chip.\n");
449 platform_set_drvdata(pdev, NULL);
450 return 0;
451}
452
453static struct platform_driver lp_gpio_driver = {
454 .probe = lp_gpio_probe,
455 .remove = lp_gpio_remove,
456 .driver = {
457 .name = "lp_gpio",
458 .owner = THIS_MODULE,
459 .pm = &lp_gpio_pm_ops,
460 .acpi_match_table = ACPI_PTR(lynxpoint_gpio_acpi_match),
461 },
462};
463
464static int __init lp_gpio_init(void)
465{
466 return platform_driver_register(&lp_gpio_driver);
467}
468
469subsys_initcall(lp_gpio_init);
diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 9ae29cc0d17f..a0b33a216d4a 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -292,7 +292,6 @@ static int mpc8xxx_gpio_irq_map(struct irq_domain *h, unsigned int virq,
292 292
293 irq_set_chip_data(virq, h->host_data); 293 irq_set_chip_data(virq, h->host_data);
294 irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); 294 irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
295 irq_set_irq_type(virq, IRQ_TYPE_NONE);
296 295
297 return 0; 296 return 0;
298} 297}
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index 45d97c46831a..25000b0f8453 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -66,6 +66,7 @@ struct mxs_gpio_port {
66 struct irq_domain *domain; 66 struct irq_domain *domain;
67 struct bgpio_chip bgc; 67 struct bgpio_chip bgc;
68 enum mxs_gpio_id devid; 68 enum mxs_gpio_id devid;
69 u32 both_edges;
69}; 70};
70 71
71static inline int is_imx23_gpio(struct mxs_gpio_port *port) 72static inline int is_imx23_gpio(struct mxs_gpio_port *port)
@@ -82,13 +83,23 @@ static inline int is_imx28_gpio(struct mxs_gpio_port *port)
82 83
83static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) 84static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
84{ 85{
86 u32 val;
85 u32 pin_mask = 1 << d->hwirq; 87 u32 pin_mask = 1 << d->hwirq;
86 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 88 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
87 struct mxs_gpio_port *port = gc->private; 89 struct mxs_gpio_port *port = gc->private;
88 void __iomem *pin_addr; 90 void __iomem *pin_addr;
89 int edge; 91 int edge;
90 92
93 port->both_edges &= ~pin_mask;
91 switch (type) { 94 switch (type) {
95 case IRQ_TYPE_EDGE_BOTH:
96 val = gpio_get_value(port->bgc.gc.base + d->hwirq);
97 if (val)
98 edge = GPIO_INT_FALL_EDGE;
99 else
100 edge = GPIO_INT_RISE_EDGE;
101 port->both_edges |= pin_mask;
102 break;
92 case IRQ_TYPE_EDGE_RISING: 103 case IRQ_TYPE_EDGE_RISING:
93 edge = GPIO_INT_RISE_EDGE; 104 edge = GPIO_INT_RISE_EDGE;
94 break; 105 break;
@@ -125,6 +136,23 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
125 return 0; 136 return 0;
126} 137}
127 138
139static void mxs_flip_edge(struct mxs_gpio_port *port, u32 gpio)
140{
141 u32 bit, val, edge;
142 void __iomem *pin_addr;
143
144 bit = 1 << gpio;
145
146 pin_addr = port->base + PINCTRL_IRQPOL(port);
147 val = readl(pin_addr);
148 edge = val & bit;
149
150 if (edge)
151 writel(bit, pin_addr + MXS_CLR);
152 else
153 writel(bit, pin_addr + MXS_SET);
154}
155
128/* MXS has one interrupt *per* gpio port */ 156/* MXS has one interrupt *per* gpio port */
129static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) 157static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
130{ 158{
@@ -138,6 +166,9 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
138 166
139 while (irq_stat != 0) { 167 while (irq_stat != 0) {
140 int irqoffset = fls(irq_stat) - 1; 168 int irqoffset = fls(irq_stat) - 1;
169 if (port->both_edges & (1 << irqoffset))
170 mxs_flip_edge(port, irqoffset);
171
141 generic_handle_irq(irq_find_mapping(port->domain, irqoffset)); 172 generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
142 irq_stat &= ~(1 << irqoffset); 173 irq_stat &= ~(1 << irqoffset);
143 } 174 }
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f1fbedb2a6f9..159f5c57eb45 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1476,19 +1476,19 @@ static struct omap_gpio_reg_offs omap4_gpio_regs = {
1476 .fallingdetect = OMAP4_GPIO_FALLINGDETECT, 1476 .fallingdetect = OMAP4_GPIO_FALLINGDETECT,
1477}; 1477};
1478 1478
1479const static struct omap_gpio_platform_data omap2_pdata = { 1479static const struct omap_gpio_platform_data omap2_pdata = {
1480 .regs = &omap2_gpio_regs, 1480 .regs = &omap2_gpio_regs,
1481 .bank_width = 32, 1481 .bank_width = 32,
1482 .dbck_flag = false, 1482 .dbck_flag = false,
1483}; 1483};
1484 1484
1485const static struct omap_gpio_platform_data omap3_pdata = { 1485static const struct omap_gpio_platform_data omap3_pdata = {
1486 .regs = &omap2_gpio_regs, 1486 .regs = &omap2_gpio_regs,
1487 .bank_width = 32, 1487 .bank_width = 32,
1488 .dbck_flag = true, 1488 .dbck_flag = true,
1489}; 1489};
1490 1490
1491const static struct omap_gpio_platform_data omap4_pdata = { 1491static const struct omap_gpio_platform_data omap4_pdata = {
1492 .regs = &omap4_gpio_regs, 1492 .regs = &omap4_gpio_regs,
1493 .bank_width = 32, 1493 .bank_width = 32,
1494 .dbck_flag = true, 1494 .dbck_flag = true,
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index cc102d25ee24..24059462c87f 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -46,6 +46,7 @@
46#define PCA957X_TYPE 0x2000 46#define PCA957X_TYPE 0x2000
47 47
48static const struct i2c_device_id pca953x_id[] = { 48static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
49 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, }, 50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
50 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, }, 51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
51 { "pca9536", 4 | PCA953X_TYPE, }, 52 { "pca9536", 4 | PCA953X_TYPE, },
@@ -71,19 +72,23 @@ static const struct i2c_device_id pca953x_id[] = {
71}; 72};
72MODULE_DEVICE_TABLE(i2c, pca953x_id); 73MODULE_DEVICE_TABLE(i2c, pca953x_id);
73 74
75#define MAX_BANK 5
76#define BANK_SZ 8
77
78#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
79
74struct pca953x_chip { 80struct pca953x_chip {
75 unsigned gpio_start; 81 unsigned gpio_start;
76 u32 reg_output; 82 u8 reg_output[MAX_BANK];
77 u32 reg_direction; 83 u8 reg_direction[MAX_BANK];
78 struct mutex i2c_lock; 84 struct mutex i2c_lock;
79 85
80#ifdef CONFIG_GPIO_PCA953X_IRQ 86#ifdef CONFIG_GPIO_PCA953X_IRQ
81 struct mutex irq_lock; 87 struct mutex irq_lock;
82 u32 irq_mask; 88 u8 irq_mask[MAX_BANK];
83 u32 irq_stat; 89 u8 irq_stat[MAX_BANK];
84 u32 irq_trig_raise; 90 u8 irq_trig_raise[MAX_BANK];
85 u32 irq_trig_fall; 91 u8 irq_trig_fall[MAX_BANK];
86 int irq_base;
87 struct irq_domain *domain; 92 struct irq_domain *domain;
88#endif 93#endif
89 94
@@ -93,33 +98,69 @@ struct pca953x_chip {
93 int chip_type; 98 int chip_type;
94}; 99};
95 100
96static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val) 101static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
102 int off)
103{
104 int ret;
105 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
106 int offset = off / BANK_SZ;
107
108 ret = i2c_smbus_read_byte_data(chip->client,
109 (reg << bank_shift) + offset);
110 *val = ret;
111
112 if (ret < 0) {
113 dev_err(&chip->client->dev, "failed reading register\n");
114 return ret;
115 }
116
117 return 0;
118}
119
120static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
121 int off)
122{
123 int ret = 0;
124 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
125 int offset = off / BANK_SZ;
126
127 ret = i2c_smbus_write_byte_data(chip->client,
128 (reg << bank_shift) + offset, val);
129
130 if (ret < 0) {
131 dev_err(&chip->client->dev, "failed writing register\n");
132 return ret;
133 }
134
135 return 0;
136}
137
138static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
97{ 139{
98 int ret = 0; 140 int ret = 0;
99 141
100 if (chip->gpio_chip.ngpio <= 8) 142 if (chip->gpio_chip.ngpio <= 8)
101 ret = i2c_smbus_write_byte_data(chip->client, reg, val); 143 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
102 else if (chip->gpio_chip.ngpio == 24) { 144 else if (chip->gpio_chip.ngpio >= 24) {
103 cpu_to_le32s(&val); 145 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
104 ret = i2c_smbus_write_i2c_block_data(chip->client, 146 ret = i2c_smbus_write_i2c_block_data(chip->client,
105 (reg << 2) | REG_ADDR_AI, 147 (reg << bank_shift) | REG_ADDR_AI,
106 3, 148 NBANK(chip), val);
107 (u8 *) &val);
108 } 149 }
109 else { 150 else {
110 switch (chip->chip_type) { 151 switch (chip->chip_type) {
111 case PCA953X_TYPE: 152 case PCA953X_TYPE:
112 ret = i2c_smbus_write_word_data(chip->client, 153 ret = i2c_smbus_write_word_data(chip->client,
113 reg << 1, val); 154 reg << 1, (u16) *val);
114 break; 155 break;
115 case PCA957X_TYPE: 156 case PCA957X_TYPE:
116 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, 157 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
117 val & 0xff); 158 val[0]);
118 if (ret < 0) 159 if (ret < 0)
119 break; 160 break;
120 ret = i2c_smbus_write_byte_data(chip->client, 161 ret = i2c_smbus_write_byte_data(chip->client,
121 (reg << 1) + 1, 162 (reg << 1) + 1,
122 (val & 0xff00) >> 8); 163 val[1]);
123 break; 164 break;
124 } 165 }
125 } 166 }
@@ -132,26 +173,24 @@ static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
132 return 0; 173 return 0;
133} 174}
134 175
135static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val) 176static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
136{ 177{
137 int ret; 178 int ret;
138 179
139 if (chip->gpio_chip.ngpio <= 8) { 180 if (chip->gpio_chip.ngpio <= 8) {
140 ret = i2c_smbus_read_byte_data(chip->client, reg); 181 ret = i2c_smbus_read_byte_data(chip->client, reg);
141 *val = ret; 182 *val = ret;
142 } 183 } else if (chip->gpio_chip.ngpio >= 24) {
143 else if (chip->gpio_chip.ngpio == 24) { 184 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
144 *val = 0; 185
145 ret = i2c_smbus_read_i2c_block_data(chip->client, 186 ret = i2c_smbus_read_i2c_block_data(chip->client,
146 (reg << 2) | REG_ADDR_AI, 187 (reg << bank_shift) | REG_ADDR_AI,
147 3, 188 NBANK(chip), val);
148 (u8 *) val);
149 le32_to_cpus(val);
150 } else { 189 } else {
151 ret = i2c_smbus_read_word_data(chip->client, reg << 1); 190 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
152 *val = ret; 191 val[0] = (u16)ret & 0xFF;
192 val[1] = (u16)ret >> 8;
153 } 193 }
154
155 if (ret < 0) { 194 if (ret < 0) {
156 dev_err(&chip->client->dev, "failed reading register\n"); 195 dev_err(&chip->client->dev, "failed reading register\n");
157 return ret; 196 return ret;
@@ -163,13 +202,13 @@ static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
163static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) 202static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
164{ 203{
165 struct pca953x_chip *chip; 204 struct pca953x_chip *chip;
166 uint reg_val; 205 u8 reg_val;
167 int ret, offset = 0; 206 int ret, offset = 0;
168 207
169 chip = container_of(gc, struct pca953x_chip, gpio_chip); 208 chip = container_of(gc, struct pca953x_chip, gpio_chip);
170 209
171 mutex_lock(&chip->i2c_lock); 210 mutex_lock(&chip->i2c_lock);
172 reg_val = chip->reg_direction | (1u << off); 211 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
173 212
174 switch (chip->chip_type) { 213 switch (chip->chip_type) {
175 case PCA953X_TYPE: 214 case PCA953X_TYPE:
@@ -179,11 +218,11 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
179 offset = PCA957X_CFG; 218 offset = PCA957X_CFG;
180 break; 219 break;
181 } 220 }
182 ret = pca953x_write_reg(chip, offset, reg_val); 221 ret = pca953x_write_single(chip, offset, reg_val, off);
183 if (ret) 222 if (ret)
184 goto exit; 223 goto exit;
185 224
186 chip->reg_direction = reg_val; 225 chip->reg_direction[off / BANK_SZ] = reg_val;
187 ret = 0; 226 ret = 0;
188exit: 227exit:
189 mutex_unlock(&chip->i2c_lock); 228 mutex_unlock(&chip->i2c_lock);
@@ -194,7 +233,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
194 unsigned off, int val) 233 unsigned off, int val)
195{ 234{
196 struct pca953x_chip *chip; 235 struct pca953x_chip *chip;
197 uint reg_val; 236 u8 reg_val;
198 int ret, offset = 0; 237 int ret, offset = 0;
199 238
200 chip = container_of(gc, struct pca953x_chip, gpio_chip); 239 chip = container_of(gc, struct pca953x_chip, gpio_chip);
@@ -202,9 +241,11 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
202 mutex_lock(&chip->i2c_lock); 241 mutex_lock(&chip->i2c_lock);
203 /* set output level */ 242 /* set output level */
204 if (val) 243 if (val)
205 reg_val = chip->reg_output | (1u << off); 244 reg_val = chip->reg_output[off / BANK_SZ]
245 | (1u << (off % BANK_SZ));
206 else 246 else
207 reg_val = chip->reg_output & ~(1u << off); 247 reg_val = chip->reg_output[off / BANK_SZ]
248 & ~(1u << (off % BANK_SZ));
208 249
209 switch (chip->chip_type) { 250 switch (chip->chip_type) {
210 case PCA953X_TYPE: 251 case PCA953X_TYPE:
@@ -214,14 +255,14 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
214 offset = PCA957X_OUT; 255 offset = PCA957X_OUT;
215 break; 256 break;
216 } 257 }
217 ret = pca953x_write_reg(chip, offset, reg_val); 258 ret = pca953x_write_single(chip, offset, reg_val, off);
218 if (ret) 259 if (ret)
219 goto exit; 260 goto exit;
220 261
221 chip->reg_output = reg_val; 262 chip->reg_output[off / BANK_SZ] = reg_val;
222 263
223 /* then direction */ 264 /* then direction */
224 reg_val = chip->reg_direction & ~(1u << off); 265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
225 switch (chip->chip_type) { 266 switch (chip->chip_type) {
226 case PCA953X_TYPE: 267 case PCA953X_TYPE:
227 offset = PCA953X_DIRECTION; 268 offset = PCA953X_DIRECTION;
@@ -230,11 +271,11 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc,
230 offset = PCA957X_CFG; 271 offset = PCA957X_CFG;
231 break; 272 break;
232 } 273 }
233 ret = pca953x_write_reg(chip, offset, reg_val); 274 ret = pca953x_write_single(chip, offset, reg_val, off);
234 if (ret) 275 if (ret)
235 goto exit; 276 goto exit;
236 277
237 chip->reg_direction = reg_val; 278 chip->reg_direction[off / BANK_SZ] = reg_val;
238 ret = 0; 279 ret = 0;
239exit: 280exit:
240 mutex_unlock(&chip->i2c_lock); 281 mutex_unlock(&chip->i2c_lock);
@@ -258,7 +299,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
258 offset = PCA957X_IN; 299 offset = PCA957X_IN;
259 break; 300 break;
260 } 301 }
261 ret = pca953x_read_reg(chip, offset, &reg_val); 302 ret = pca953x_read_single(chip, offset, &reg_val, off);
262 mutex_unlock(&chip->i2c_lock); 303 mutex_unlock(&chip->i2c_lock);
263 if (ret < 0) { 304 if (ret < 0) {
264 /* NOTE: diagnostic already emitted; that's all we should 305 /* NOTE: diagnostic already emitted; that's all we should
@@ -274,16 +315,18 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
274static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) 315static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
275{ 316{
276 struct pca953x_chip *chip; 317 struct pca953x_chip *chip;
277 u32 reg_val; 318 u8 reg_val;
278 int ret, offset = 0; 319 int ret, offset = 0;
279 320
280 chip = container_of(gc, struct pca953x_chip, gpio_chip); 321 chip = container_of(gc, struct pca953x_chip, gpio_chip);
281 322
282 mutex_lock(&chip->i2c_lock); 323 mutex_lock(&chip->i2c_lock);
283 if (val) 324 if (val)
284 reg_val = chip->reg_output | (1u << off); 325 reg_val = chip->reg_output[off / BANK_SZ]
326 | (1u << (off % BANK_SZ));
285 else 327 else
286 reg_val = chip->reg_output & ~(1u << off); 328 reg_val = chip->reg_output[off / BANK_SZ]
329 & ~(1u << (off % BANK_SZ));
287 330
288 switch (chip->chip_type) { 331 switch (chip->chip_type) {
289 case PCA953X_TYPE: 332 case PCA953X_TYPE:
@@ -293,11 +336,11 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
293 offset = PCA957X_OUT; 336 offset = PCA957X_OUT;
294 break; 337 break;
295 } 338 }
296 ret = pca953x_write_reg(chip, offset, reg_val); 339 ret = pca953x_write_single(chip, offset, reg_val, off);
297 if (ret) 340 if (ret)
298 goto exit; 341 goto exit;
299 342
300 chip->reg_output = reg_val; 343 chip->reg_output[off / BANK_SZ] = reg_val;
301exit: 344exit:
302 mutex_unlock(&chip->i2c_lock); 345 mutex_unlock(&chip->i2c_lock);
303} 346}
@@ -328,21 +371,21 @@ static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
328 struct pca953x_chip *chip; 371 struct pca953x_chip *chip;
329 372
330 chip = container_of(gc, struct pca953x_chip, gpio_chip); 373 chip = container_of(gc, struct pca953x_chip, gpio_chip);
331 return chip->irq_base + off; 374 return irq_create_mapping(chip->domain, off);
332} 375}
333 376
334static void pca953x_irq_mask(struct irq_data *d) 377static void pca953x_irq_mask(struct irq_data *d)
335{ 378{
336 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 379 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
337 380
338 chip->irq_mask &= ~(1 << d->hwirq); 381 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
339} 382}
340 383
341static void pca953x_irq_unmask(struct irq_data *d) 384static void pca953x_irq_unmask(struct irq_data *d)
342{ 385{
343 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 386 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
344 387
345 chip->irq_mask |= 1 << d->hwirq; 388 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
346} 389}
347 390
348static void pca953x_irq_bus_lock(struct irq_data *d) 391static void pca953x_irq_bus_lock(struct irq_data *d)
@@ -355,17 +398,20 @@ static void pca953x_irq_bus_lock(struct irq_data *d)
355static void pca953x_irq_bus_sync_unlock(struct irq_data *d) 398static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
356{ 399{
357 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 400 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
358 u32 new_irqs; 401 u8 new_irqs;
359 u32 level; 402 int level, i;
360 403
361 /* Look for any newly setup interrupt */ 404 /* Look for any newly setup interrupt */
362 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; 405 for (i = 0; i < NBANK(chip); i++) {
363 new_irqs &= ~chip->reg_direction; 406 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
364 407 new_irqs &= ~chip->reg_direction[i];
365 while (new_irqs) { 408
366 level = __ffs(new_irqs); 409 while (new_irqs) {
367 pca953x_gpio_direction_input(&chip->gpio_chip, level); 410 level = __ffs(new_irqs);
368 new_irqs &= ~(1 << level); 411 pca953x_gpio_direction_input(&chip->gpio_chip,
412 level + (BANK_SZ * i));
413 new_irqs &= ~(1 << level);
414 }
369 } 415 }
370 416
371 mutex_unlock(&chip->irq_lock); 417 mutex_unlock(&chip->irq_lock);
@@ -374,7 +420,8 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
374static int pca953x_irq_set_type(struct irq_data *d, unsigned int type) 420static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
375{ 421{
376 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d); 422 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
377 u32 mask = 1 << d->hwirq; 423 int bank_nb = d->hwirq / BANK_SZ;
424 u8 mask = 1 << (d->hwirq % BANK_SZ);
378 425
379 if (!(type & IRQ_TYPE_EDGE_BOTH)) { 426 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
380 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", 427 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
@@ -383,14 +430,14 @@ static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
383 } 430 }
384 431
385 if (type & IRQ_TYPE_EDGE_FALLING) 432 if (type & IRQ_TYPE_EDGE_FALLING)
386 chip->irq_trig_fall |= mask; 433 chip->irq_trig_fall[bank_nb] |= mask;
387 else 434 else
388 chip->irq_trig_fall &= ~mask; 435 chip->irq_trig_fall[bank_nb] &= ~mask;
389 436
390 if (type & IRQ_TYPE_EDGE_RISING) 437 if (type & IRQ_TYPE_EDGE_RISING)
391 chip->irq_trig_raise |= mask; 438 chip->irq_trig_raise[bank_nb] |= mask;
392 else 439 else
393 chip->irq_trig_raise &= ~mask; 440 chip->irq_trig_raise[bank_nb] &= ~mask;
394 441
395 return 0; 442 return 0;
396} 443}
@@ -404,13 +451,13 @@ static struct irq_chip pca953x_irq_chip = {
404 .irq_set_type = pca953x_irq_set_type, 451 .irq_set_type = pca953x_irq_set_type,
405}; 452};
406 453
407static u32 pca953x_irq_pending(struct pca953x_chip *chip) 454static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
408{ 455{
409 u32 cur_stat; 456 u8 cur_stat[MAX_BANK];
410 u32 old_stat; 457 u8 old_stat[MAX_BANK];
411 u32 pending; 458 u8 pendings = 0;
412 u32 trigger; 459 u8 trigger[MAX_BANK], triggers = 0;
413 int ret, offset = 0; 460 int ret, i, offset = 0;
414 461
415 switch (chip->chip_type) { 462 switch (chip->chip_type) {
416 case PCA953X_TYPE: 463 case PCA953X_TYPE:
@@ -420,60 +467,88 @@ static u32 pca953x_irq_pending(struct pca953x_chip *chip)
420 offset = PCA957X_IN; 467 offset = PCA957X_IN;
421 break; 468 break;
422 } 469 }
423 ret = pca953x_read_reg(chip, offset, &cur_stat); 470 ret = pca953x_read_regs(chip, offset, cur_stat);
424 if (ret) 471 if (ret)
425 return 0; 472 return 0;
426 473
427 /* Remove output pins from the equation */ 474 /* Remove output pins from the equation */
428 cur_stat &= chip->reg_direction; 475 for (i = 0; i < NBANK(chip); i++)
476 cur_stat[i] &= chip->reg_direction[i];
477
478 memcpy(old_stat, chip->irq_stat, NBANK(chip));
429 479
430 old_stat = chip->irq_stat; 480 for (i = 0; i < NBANK(chip); i++) {
431 trigger = (cur_stat ^ old_stat) & chip->irq_mask; 481 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
482 triggers += trigger[i];
483 }
432 484
433 if (!trigger) 485 if (!triggers)
434 return 0; 486 return 0;
435 487
436 chip->irq_stat = cur_stat; 488 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
437 489
438 pending = (old_stat & chip->irq_trig_fall) | 490 for (i = 0; i < NBANK(chip); i++) {
439 (cur_stat & chip->irq_trig_raise); 491 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
440 pending &= trigger; 492 (cur_stat[i] & chip->irq_trig_raise[i]);
493 pending[i] &= trigger[i];
494 pendings += pending[i];
495 }
441 496
442 return pending; 497 return pendings;
443} 498}
444 499
445static irqreturn_t pca953x_irq_handler(int irq, void *devid) 500static irqreturn_t pca953x_irq_handler(int irq, void *devid)
446{ 501{
447 struct pca953x_chip *chip = devid; 502 struct pca953x_chip *chip = devid;
448 u32 pending; 503 u8 pending[MAX_BANK];
449 u32 level; 504 u8 level;
450 505 int i;
451 pending = pca953x_irq_pending(chip);
452 506
453 if (!pending) 507 if (!pca953x_irq_pending(chip, pending))
454 return IRQ_HANDLED; 508 return IRQ_HANDLED;
455 509
456 do { 510 for (i = 0; i < NBANK(chip); i++) {
457 level = __ffs(pending); 511 while (pending[i]) {
458 handle_nested_irq(irq_find_mapping(chip->domain, level)); 512 level = __ffs(pending[i]);
459 513 handle_nested_irq(irq_find_mapping(chip->domain,
460 pending &= ~(1 << level); 514 level + (BANK_SZ * i)));
461 } while (pending); 515 pending[i] &= ~(1 << level);
516 }
517 }
462 518
463 return IRQ_HANDLED; 519 return IRQ_HANDLED;
464} 520}
465 521
522static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
523 irq_hw_number_t hwirq)
524{
525 irq_clear_status_flags(irq, IRQ_NOREQUEST);
526 irq_set_chip_data(irq, d->host_data);
527 irq_set_chip(irq, &pca953x_irq_chip);
528 irq_set_nested_thread(irq, true);
529#ifdef CONFIG_ARM
530 set_irq_flags(irq, IRQF_VALID);
531#else
532 irq_set_noprobe(irq);
533#endif
534
535 return 0;
536}
537
538static const struct irq_domain_ops pca953x_irq_simple_ops = {
539 .map = pca953x_gpio_irq_map,
540 .xlate = irq_domain_xlate_twocell,
541};
542
466static int pca953x_irq_setup(struct pca953x_chip *chip, 543static int pca953x_irq_setup(struct pca953x_chip *chip,
467 const struct i2c_device_id *id, 544 const struct i2c_device_id *id,
468 int irq_base) 545 int irq_base)
469{ 546{
470 struct i2c_client *client = chip->client; 547 struct i2c_client *client = chip->client;
471 int ret, offset = 0; 548 int ret, i, offset = 0;
472 u32 temporary;
473 549
474 if (irq_base != -1 550 if (irq_base != -1
475 && (id->driver_data & PCA_INT)) { 551 && (id->driver_data & PCA_INT)) {
476 int lvl;
477 552
478 switch (chip->chip_type) { 553 switch (chip->chip_type) {
479 case PCA953X_TYPE: 554 case PCA953X_TYPE:
@@ -483,49 +558,29 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
483 offset = PCA957X_IN; 558 offset = PCA957X_IN;
484 break; 559 break;
485 } 560 }
486 ret = pca953x_read_reg(chip, offset, &temporary); 561 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
487 chip->irq_stat = temporary;
488 if (ret) 562 if (ret)
489 goto out_failed; 563 return ret;
490 564
491 /* 565 /*
492 * There is no way to know which GPIO line generated the 566 * There is no way to know which GPIO line generated the
493 * interrupt. We have to rely on the previous read for 567 * interrupt. We have to rely on the previous read for
494 * this purpose. 568 * this purpose.
495 */ 569 */
496 chip->irq_stat &= chip->reg_direction; 570 for (i = 0; i < NBANK(chip); i++)
571 chip->irq_stat[i] &= chip->reg_direction[i];
497 mutex_init(&chip->irq_lock); 572 mutex_init(&chip->irq_lock);
498 573
499 chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1); 574 chip->domain = irq_domain_add_simple(client->dev.of_node,
500 if (chip->irq_base < 0)
501 goto out_failed;
502
503 chip->domain = irq_domain_add_legacy(client->dev.of_node,
504 chip->gpio_chip.ngpio, 575 chip->gpio_chip.ngpio,
505 chip->irq_base, 576 irq_base,
506 0, 577 &pca953x_irq_simple_ops,
507 &irq_domain_simple_ops,
508 NULL); 578 NULL);
509 if (!chip->domain) { 579 if (!chip->domain)
510 ret = -ENODEV; 580 return -ENODEV;
511 goto out_irqdesc_free;
512 }
513 581
514 for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) { 582 ret = devm_request_threaded_irq(&client->dev,
515 int irq = lvl + chip->irq_base; 583 client->irq,
516
517 irq_clear_status_flags(irq, IRQ_NOREQUEST);
518 irq_set_chip_data(irq, chip);
519 irq_set_chip(irq, &pca953x_irq_chip);
520 irq_set_nested_thread(irq, true);
521#ifdef CONFIG_ARM
522 set_irq_flags(irq, IRQF_VALID);
523#else
524 irq_set_noprobe(irq);
525#endif
526 }
527
528 ret = request_threaded_irq(client->irq,
529 NULL, 584 NULL,
530 pca953x_irq_handler, 585 pca953x_irq_handler,
531 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 586 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
@@ -533,28 +588,15 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
533 if (ret) { 588 if (ret) {
534 dev_err(&client->dev, "failed to request irq %d\n", 589 dev_err(&client->dev, "failed to request irq %d\n",
535 client->irq); 590 client->irq);
536 goto out_irqdesc_free; 591 return ret;
537 } 592 }
538 593
539 chip->gpio_chip.to_irq = pca953x_gpio_to_irq; 594 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
540 } 595 }
541 596
542 return 0; 597 return 0;
543
544out_irqdesc_free:
545 irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
546out_failed:
547 chip->irq_base = -1;
548 return ret;
549} 598}
550 599
551static void pca953x_irq_teardown(struct pca953x_chip *chip)
552{
553 if (chip->irq_base != -1) {
554 irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
555 free_irq(chip->client->irq, chip);
556 }
557}
558#else /* CONFIG_GPIO_PCA953X_IRQ */ 600#else /* CONFIG_GPIO_PCA953X_IRQ */
559static int pca953x_irq_setup(struct pca953x_chip *chip, 601static int pca953x_irq_setup(struct pca953x_chip *chip,
560 const struct i2c_device_id *id, 602 const struct i2c_device_id *id,
@@ -567,10 +609,6 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
567 609
568 return 0; 610 return 0;
569} 611}
570
571static void pca953x_irq_teardown(struct pca953x_chip *chip)
572{
573}
574#endif 612#endif
575 613
576/* 614/*
@@ -619,18 +657,24 @@ pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
619static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) 657static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
620{ 658{
621 int ret; 659 int ret;
660 u8 val[MAX_BANK];
622 661
623 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output); 662 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
624 if (ret) 663 if (ret)
625 goto out; 664 goto out;
626 665
627 ret = pca953x_read_reg(chip, PCA953X_DIRECTION, 666 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
628 &chip->reg_direction); 667 chip->reg_direction);
629 if (ret) 668 if (ret)
630 goto out; 669 goto out;
631 670
632 /* set platform specific polarity inversion */ 671 /* set platform specific polarity inversion */
633 ret = pca953x_write_reg(chip, PCA953X_INVERT, invert); 672 if (invert)
673 memset(val, 0xFF, NBANK(chip));
674 else
675 memset(val, 0, NBANK(chip));
676
677 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
634out: 678out:
635 return ret; 679 return ret;
636} 680}
@@ -638,28 +682,36 @@ out:
638static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) 682static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
639{ 683{
640 int ret; 684 int ret;
641 u32 val = 0; 685 u8 val[MAX_BANK];
642 686
643 /* Let every port in proper state, that could save power */ 687 /* Let every port in proper state, that could save power */
644 pca953x_write_reg(chip, PCA957X_PUPD, 0x0); 688 memset(val, 0, NBANK(chip));
645 pca953x_write_reg(chip, PCA957X_CFG, 0xffff); 689 pca953x_write_regs(chip, PCA957X_PUPD, val);
646 pca953x_write_reg(chip, PCA957X_OUT, 0x0); 690 memset(val, 0xFF, NBANK(chip));
647 691 pca953x_write_regs(chip, PCA957X_CFG, val);
648 ret = pca953x_read_reg(chip, PCA957X_IN, &val); 692 memset(val, 0, NBANK(chip));
693 pca953x_write_regs(chip, PCA957X_OUT, val);
694
695 ret = pca953x_read_regs(chip, PCA957X_IN, val);
649 if (ret) 696 if (ret)
650 goto out; 697 goto out;
651 ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output); 698 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
652 if (ret) 699 if (ret)
653 goto out; 700 goto out;
654 ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction); 701 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
655 if (ret) 702 if (ret)
656 goto out; 703 goto out;
657 704
658 /* set platform specific polarity inversion */ 705 /* set platform specific polarity inversion */
659 pca953x_write_reg(chip, PCA957X_INVRT, invert); 706 if (invert)
707 memset(val, 0xFF, NBANK(chip));
708 else
709 memset(val, 0, NBANK(chip));
710 pca953x_write_regs(chip, PCA957X_INVRT, val);
660 711
661 /* To enable register 6, 7 to controll pull up and pull down */ 712 /* To enable register 6, 7 to controll pull up and pull down */
662 pca953x_write_reg(chip, PCA957X_BKEN, 0x202); 713 memset(val, 0x02, NBANK(chip));
714 pca953x_write_regs(chip, PCA957X_BKEN, val);
663 715
664 return 0; 716 return 0;
665out: 717out:
@@ -675,7 +727,8 @@ static int pca953x_probe(struct i2c_client *client,
675 int ret; 727 int ret;
676 u32 invert = 0; 728 u32 invert = 0;
677 729
678 chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL); 730 chip = devm_kzalloc(&client->dev,
731 sizeof(struct pca953x_chip), GFP_KERNEL);
679 if (chip == NULL) 732 if (chip == NULL)
680 return -ENOMEM; 733 return -ENOMEM;
681 734
@@ -710,15 +763,15 @@ static int pca953x_probe(struct i2c_client *client,
710 else 763 else
711 ret = device_pca957x_init(chip, invert); 764 ret = device_pca957x_init(chip, invert);
712 if (ret) 765 if (ret)
713 goto out_failed; 766 return ret;
714 767
715 ret = pca953x_irq_setup(chip, id, irq_base); 768 ret = pca953x_irq_setup(chip, id, irq_base);
716 if (ret) 769 if (ret)
717 goto out_failed; 770 return ret;
718 771
719 ret = gpiochip_add(&chip->gpio_chip); 772 ret = gpiochip_add(&chip->gpio_chip);
720 if (ret) 773 if (ret)
721 goto out_failed_irq; 774 return ret;
722 775
723 if (pdata && pdata->setup) { 776 if (pdata && pdata->setup) {
724 ret = pdata->setup(client, chip->gpio_chip.base, 777 ret = pdata->setup(client, chip->gpio_chip.base,
@@ -729,12 +782,6 @@ static int pca953x_probe(struct i2c_client *client,
729 782
730 i2c_set_clientdata(client, chip); 783 i2c_set_clientdata(client, chip);
731 return 0; 784 return 0;
732
733out_failed_irq:
734 pca953x_irq_teardown(chip);
735out_failed:
736 kfree(chip);
737 return ret;
738} 785}
739 786
740static int pca953x_remove(struct i2c_client *client) 787static int pca953x_remove(struct i2c_client *client)
@@ -760,12 +807,11 @@ static int pca953x_remove(struct i2c_client *client)
760 return ret; 807 return ret;
761 } 808 }
762 809
763 pca953x_irq_teardown(chip);
764 kfree(chip);
765 return 0; 810 return 0;
766} 811}
767 812
768static const struct of_device_id pca953x_dt_ids[] = { 813static const struct of_device_id pca953x_dt_ids[] = {
814 { .compatible = "nxp,pca9505", },
769 { .compatible = "nxp,pca9534", }, 815 { .compatible = "nxp,pca9534", },
770 { .compatible = "nxp,pca9535", }, 816 { .compatible = "nxp,pca9535", },
771 { .compatible = "nxp,pca9536", }, 817 { .compatible = "nxp,pca9536", },
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index c1720de18a4f..b820869ca93c 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -365,7 +365,7 @@ static int __init pl061_gpio_init(void)
365{ 365{
366 return amba_driver_register(&pl061_gpio_driver); 366 return amba_driver_register(&pl061_gpio_driver);
367} 367}
368subsys_initcall(pl061_gpio_init); 368module_init(pl061_gpio_init);
369 369
370MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); 370MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
371MODULE_DESCRIPTION("PL061 GPIO driver"); 371MODULE_DESCRIPTION("PL061 GPIO driver");
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 8325f580c0f1..9cc108d2b770 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -642,12 +642,7 @@ static struct platform_driver pxa_gpio_driver = {
642 .of_match_table = of_match_ptr(pxa_gpio_dt_ids), 642 .of_match_table = of_match_ptr(pxa_gpio_dt_ids),
643 }, 643 },
644}; 644};
645 645module_platform_driver(pxa_gpio_driver);
646static int __init pxa_gpio_init(void)
647{
648 return platform_driver_register(&pxa_gpio_driver);
649}
650postcore_initcall(pxa_gpio_init);
651 646
652#ifdef CONFIG_PM 647#ifdef CONFIG_PM
653static int pxa_gpio_suspend(void) 648static int pxa_gpio_suspend(void)
diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c
index 9572aa137e6f..4d330e36da1d 100644
--- a/drivers/gpio/gpio-twl4030.c
+++ b/drivers/gpio/gpio-twl4030.c
@@ -37,7 +37,6 @@
37 37
38#include <linux/i2c/twl.h> 38#include <linux/i2c/twl.h>
39 39
40
41/* 40/*
42 * The GPIO "subchip" supports 18 GPIOs which can be configured as 41 * The GPIO "subchip" supports 18 GPIOs which can be configured as
43 * inputs or outputs, with pullups or pulldowns on each pin. Each 42 * inputs or outputs, with pullups or pulldowns on each pin. Each
@@ -49,11 +48,6 @@
49 * There are also two LED pins used sometimes as output-only GPIOs. 48 * There are also two LED pins used sometimes as output-only GPIOs.
50 */ 49 */
51 50
52
53static struct gpio_chip twl_gpiochip;
54static int twl4030_gpio_base;
55static int twl4030_gpio_irq_base;
56
57/* genirq interfaces are not available to modules */ 51/* genirq interfaces are not available to modules */
58#ifdef MODULE 52#ifdef MODULE
59#define is_module() true 53#define is_module() true
@@ -69,14 +63,24 @@ static int twl4030_gpio_irq_base;
69/* Mask for GPIO registers when aggregated into a 32-bit integer */ 63/* Mask for GPIO registers when aggregated into a 32-bit integer */
70#define GPIO_32_MASK 0x0003ffff 64#define GPIO_32_MASK 0x0003ffff
71 65
72/* Data structures */ 66struct gpio_twl4030_priv {
73static DEFINE_MUTEX(gpio_lock); 67 struct gpio_chip gpio_chip;
68 struct mutex mutex;
69 int irq_base;
74 70
75/* store usage of each GPIO. - each bit represents one GPIO */ 71 /* Bitfields for state caching */
76static unsigned int gpio_usage_count; 72 unsigned int usage_count;
73 unsigned int direction;
74 unsigned int out_state;
75};
77 76
78/*----------------------------------------------------------------------*/ 77/*----------------------------------------------------------------------*/
79 78
79static inline struct gpio_twl4030_priv *to_gpio_twl4030(struct gpio_chip *chip)
80{
81 return container_of(chip, struct gpio_twl4030_priv, gpio_chip);
82}
83
80/* 84/*
81 * To configure TWL4030 GPIO module registers 85 * To configure TWL4030 GPIO module registers
82 */ 86 */
@@ -126,7 +130,7 @@ static inline int gpio_twl4030_read(u8 address)
126 130
127/*----------------------------------------------------------------------*/ 131/*----------------------------------------------------------------------*/
128 132
129static u8 cached_leden; /* protected by gpio_lock */ 133static u8 cached_leden;
130 134
131/* The LED lines are open drain outputs ... a FET pulls to GND, so an 135/* The LED lines are open drain outputs ... a FET pulls to GND, so an
132 * external pullup is needed. We could also expose the integrated PWM 136 * external pullup is needed. We could also expose the integrated PWM
@@ -140,14 +144,12 @@ static void twl4030_led_set_value(int led, int value)
140 if (led) 144 if (led)
141 mask <<= 1; 145 mask <<= 1;
142 146
143 mutex_lock(&gpio_lock);
144 if (value) 147 if (value)
145 cached_leden &= ~mask; 148 cached_leden &= ~mask;
146 else 149 else
147 cached_leden |= mask; 150 cached_leden |= mask;
148 status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden, 151 status = twl_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
149 TWL4030_LED_LEDEN_REG); 152 TWL4030_LED_LEDEN_REG);
150 mutex_unlock(&gpio_lock);
151} 153}
152 154
153static int twl4030_set_gpio_direction(int gpio, int is_input) 155static int twl4030_set_gpio_direction(int gpio, int is_input)
@@ -158,7 +160,6 @@ static int twl4030_set_gpio_direction(int gpio, int is_input)
158 u8 base = REG_GPIODATADIR1 + d_bnk; 160 u8 base = REG_GPIODATADIR1 + d_bnk;
159 int ret = 0; 161 int ret = 0;
160 162
161 mutex_lock(&gpio_lock);
162 ret = gpio_twl4030_read(base); 163 ret = gpio_twl4030_read(base);
163 if (ret >= 0) { 164 if (ret >= 0) {
164 if (is_input) 165 if (is_input)
@@ -168,7 +169,6 @@ static int twl4030_set_gpio_direction(int gpio, int is_input)
168 169
169 ret = gpio_twl4030_write(base, reg); 170 ret = gpio_twl4030_write(base, reg);
170 } 171 }
171 mutex_unlock(&gpio_lock);
172 return ret; 172 return ret;
173} 173}
174 174
@@ -193,10 +193,6 @@ static int twl4030_get_gpio_datain(int gpio)
193 u8 base = 0; 193 u8 base = 0;
194 int ret = 0; 194 int ret = 0;
195 195
196 if (unlikely((gpio >= TWL4030_GPIO_MAX)
197 || !(gpio_usage_count & BIT(gpio))))
198 return -EPERM;
199
200 base = REG_GPIODATAIN1 + d_bnk; 196 base = REG_GPIODATAIN1 + d_bnk;
201 ret = gpio_twl4030_read(base); 197 ret = gpio_twl4030_read(base);
202 if (ret > 0) 198 if (ret > 0)
@@ -209,9 +205,10 @@ static int twl4030_get_gpio_datain(int gpio)
209 205
210static int twl_request(struct gpio_chip *chip, unsigned offset) 206static int twl_request(struct gpio_chip *chip, unsigned offset)
211{ 207{
208 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
212 int status = 0; 209 int status = 0;
213 210
214 mutex_lock(&gpio_lock); 211 mutex_lock(&priv->mutex);
215 212
216 /* Support the two LED outputs as output-only GPIOs. */ 213 /* Support the two LED outputs as output-only GPIOs. */
217 if (offset >= TWL4030_GPIO_MAX) { 214 if (offset >= TWL4030_GPIO_MAX) {
@@ -252,7 +249,7 @@ static int twl_request(struct gpio_chip *chip, unsigned offset)
252 } 249 }
253 250
254 /* on first use, turn GPIO module "on" */ 251 /* on first use, turn GPIO module "on" */
255 if (!gpio_usage_count) { 252 if (!priv->usage_count) {
256 struct twl4030_gpio_platform_data *pdata; 253 struct twl4030_gpio_platform_data *pdata;
257 u8 value = MASK_GPIO_CTRL_GPIO_ON; 254 u8 value = MASK_GPIO_CTRL_GPIO_ON;
258 255
@@ -266,79 +263,120 @@ static int twl_request(struct gpio_chip *chip, unsigned offset)
266 status = gpio_twl4030_write(REG_GPIO_CTRL, value); 263 status = gpio_twl4030_write(REG_GPIO_CTRL, value);
267 } 264 }
268 265
266done:
269 if (!status) 267 if (!status)
270 gpio_usage_count |= (0x1 << offset); 268 priv->usage_count |= BIT(offset);
271 269
272done: 270 mutex_unlock(&priv->mutex);
273 mutex_unlock(&gpio_lock);
274 return status; 271 return status;
275} 272}
276 273
277static void twl_free(struct gpio_chip *chip, unsigned offset) 274static void twl_free(struct gpio_chip *chip, unsigned offset)
278{ 275{
276 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
277
278 mutex_lock(&priv->mutex);
279 if (offset >= TWL4030_GPIO_MAX) { 279 if (offset >= TWL4030_GPIO_MAX) {
280 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1); 280 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1);
281 return; 281 goto out;
282 } 282 }
283 283
284 mutex_lock(&gpio_lock); 284 priv->usage_count &= ~BIT(offset);
285
286 gpio_usage_count &= ~BIT(offset);
287 285
288 /* on last use, switch off GPIO module */ 286 /* on last use, switch off GPIO module */
289 if (!gpio_usage_count) 287 if (!priv->usage_count)
290 gpio_twl4030_write(REG_GPIO_CTRL, 0x0); 288 gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
291 289
292 mutex_unlock(&gpio_lock); 290out:
291 mutex_unlock(&priv->mutex);
293} 292}
294 293
295static int twl_direction_in(struct gpio_chip *chip, unsigned offset) 294static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
296{ 295{
297 return (offset < TWL4030_GPIO_MAX) 296 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
298 ? twl4030_set_gpio_direction(offset, 1) 297 int ret;
299 : -EINVAL; 298
299 mutex_lock(&priv->mutex);
300 if (offset < TWL4030_GPIO_MAX)
301 ret = twl4030_set_gpio_direction(offset, 1);
302 else
303 ret = -EINVAL;
304
305 if (!ret)
306 priv->direction &= ~BIT(offset);
307
308 mutex_unlock(&priv->mutex);
309
310 return ret;
300} 311}
301 312
302static int twl_get(struct gpio_chip *chip, unsigned offset) 313static int twl_get(struct gpio_chip *chip, unsigned offset)
303{ 314{
315 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
316 int ret;
304 int status = 0; 317 int status = 0;
305 318
306 if (offset < TWL4030_GPIO_MAX) 319 mutex_lock(&priv->mutex);
307 status = twl4030_get_gpio_datain(offset); 320 if (!(priv->usage_count & BIT(offset))) {
308 else if (offset == TWL4030_GPIO_MAX) 321 ret = -EPERM;
309 status = cached_leden & LEDEN_LEDAON; 322 goto out;
323 }
324
325 if (priv->direction & BIT(offset))
326 status = priv->out_state & BIT(offset);
310 else 327 else
311 status = cached_leden & LEDEN_LEDBON; 328 status = twl4030_get_gpio_datain(offset);
312 return (status < 0) ? 0 : status; 329
330 ret = (status <= 0) ? 0 : 1;
331out:
332 mutex_unlock(&priv->mutex);
333 return ret;
313} 334}
314 335
315static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value) 336static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
316{ 337{
317 if (offset < TWL4030_GPIO_MAX) { 338 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
339
340 mutex_lock(&priv->mutex);
341 if (offset < TWL4030_GPIO_MAX)
318 twl4030_set_gpio_dataout(offset, value); 342 twl4030_set_gpio_dataout(offset, value);
319 return twl4030_set_gpio_direction(offset, 0); 343 else
320 } else {
321 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); 344 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value);
322 return 0; 345
323 } 346 if (value)
347 priv->out_state |= BIT(offset);
348 else
349 priv->out_state &= ~BIT(offset);
350
351 mutex_unlock(&priv->mutex);
324} 352}
325 353
326static void twl_set(struct gpio_chip *chip, unsigned offset, int value) 354static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
327{ 355{
356 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
357
358 mutex_lock(&priv->mutex);
328 if (offset < TWL4030_GPIO_MAX) 359 if (offset < TWL4030_GPIO_MAX)
329 twl4030_set_gpio_dataout(offset, value); 360 twl4030_set_gpio_dataout(offset, value);
330 else 361
331 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value); 362 priv->direction |= BIT(offset);
363 mutex_unlock(&priv->mutex);
364
365 twl_set(chip, offset, value);
366
367 return 0;
332} 368}
333 369
334static int twl_to_irq(struct gpio_chip *chip, unsigned offset) 370static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
335{ 371{
336 return (twl4030_gpio_irq_base && (offset < TWL4030_GPIO_MAX)) 372 struct gpio_twl4030_priv *priv = to_gpio_twl4030(chip);
337 ? (twl4030_gpio_irq_base + offset) 373
374 return (priv->irq_base && (offset < TWL4030_GPIO_MAX))
375 ? (priv->irq_base + offset)
338 : -EINVAL; 376 : -EINVAL;
339} 377}
340 378
341static struct gpio_chip twl_gpiochip = { 379static struct gpio_chip template_chip = {
342 .label = "twl4030", 380 .label = "twl4030",
343 .owner = THIS_MODULE, 381 .owner = THIS_MODULE,
344 .request = twl_request, 382 .request = twl_request,
@@ -424,8 +462,14 @@ static int gpio_twl4030_probe(struct platform_device *pdev)
424{ 462{
425 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; 463 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
426 struct device_node *node = pdev->dev.of_node; 464 struct device_node *node = pdev->dev.of_node;
465 struct gpio_twl4030_priv *priv;
427 int ret, irq_base; 466 int ret, irq_base;
428 467
468 priv = devm_kzalloc(&pdev->dev, sizeof(struct gpio_twl4030_priv),
469 GFP_KERNEL);
470 if (!priv)
471 return -ENOMEM;
472
429 /* maybe setup IRQs */ 473 /* maybe setup IRQs */
430 if (is_module()) { 474 if (is_module()) {
431 dev_err(&pdev->dev, "can't dispatch IRQs from modules\n"); 475 dev_err(&pdev->dev, "can't dispatch IRQs from modules\n");
@@ -445,12 +489,15 @@ static int gpio_twl4030_probe(struct platform_device *pdev)
445 if (ret < 0) 489 if (ret < 0)
446 return ret; 490 return ret;
447 491
448 twl4030_gpio_irq_base = irq_base; 492 priv->irq_base = irq_base;
449 493
450no_irqs: 494no_irqs:
451 twl_gpiochip.base = -1; 495 priv->gpio_chip = template_chip;
452 twl_gpiochip.ngpio = TWL4030_GPIO_MAX; 496 priv->gpio_chip.base = -1;
453 twl_gpiochip.dev = &pdev->dev; 497 priv->gpio_chip.ngpio = TWL4030_GPIO_MAX;
498 priv->gpio_chip.dev = &pdev->dev;
499
500 mutex_init(&priv->mutex);
454 501
455 if (node) 502 if (node)
456 pdata = of_gpio_twl4030(&pdev->dev); 503 pdata = of_gpio_twl4030(&pdev->dev);
@@ -481,23 +528,23 @@ no_irqs:
481 * is (still) clear if use_leds is set. 528 * is (still) clear if use_leds is set.
482 */ 529 */
483 if (pdata->use_leds) 530 if (pdata->use_leds)
484 twl_gpiochip.ngpio += 2; 531 priv->gpio_chip.ngpio += 2;
485 532
486 ret = gpiochip_add(&twl_gpiochip); 533 ret = gpiochip_add(&priv->gpio_chip);
487 if (ret < 0) { 534 if (ret < 0) {
488 dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); 535 dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret);
489 twl_gpiochip.ngpio = 0; 536 priv->gpio_chip.ngpio = 0;
490 gpio_twl4030_remove(pdev); 537 gpio_twl4030_remove(pdev);
491 goto out; 538 goto out;
492 } 539 }
493 540
494 twl4030_gpio_base = twl_gpiochip.base; 541 platform_set_drvdata(pdev, priv);
495 542
496 if (pdata && pdata->setup) { 543 if (pdata && pdata->setup) {
497 int status; 544 int status;
498 545
499 status = pdata->setup(&pdev->dev, 546 status = pdata->setup(&pdev->dev, priv->gpio_chip.base,
500 twl4030_gpio_base, TWL4030_GPIO_MAX); 547 TWL4030_GPIO_MAX);
501 if (status) 548 if (status)
502 dev_dbg(&pdev->dev, "setup --> %d\n", status); 549 dev_dbg(&pdev->dev, "setup --> %d\n", status);
503 } 550 }
@@ -510,18 +557,19 @@ out:
510static int gpio_twl4030_remove(struct platform_device *pdev) 557static int gpio_twl4030_remove(struct platform_device *pdev)
511{ 558{
512 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; 559 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
560 struct gpio_twl4030_priv *priv = platform_get_drvdata(pdev);
513 int status; 561 int status;
514 562
515 if (pdata && pdata->teardown) { 563 if (pdata && pdata->teardown) {
516 status = pdata->teardown(&pdev->dev, 564 status = pdata->teardown(&pdev->dev, priv->gpio_chip.base,
517 twl4030_gpio_base, TWL4030_GPIO_MAX); 565 TWL4030_GPIO_MAX);
518 if (status) { 566 if (status) {
519 dev_dbg(&pdev->dev, "teardown --> %d\n", status); 567 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
520 return status; 568 return status;
521 } 569 }
522 } 570 }
523 571
524 status = gpiochip_remove(&twl_gpiochip); 572 status = gpiochip_remove(&priv->gpio_chip);
525 if (status < 0) 573 if (status < 0)
526 return status; 574 return status;
527 575
diff --git a/drivers/gpio/gpio-vt8500.c b/drivers/gpio/gpio-vt8500.c
index b53320a16fc8..81683ca35ac1 100644
--- a/drivers/gpio/gpio-vt8500.c
+++ b/drivers/gpio/gpio-vt8500.c
@@ -73,19 +73,20 @@ struct vt8500_gpio_data {
73static struct vt8500_gpio_data vt8500_data = { 73static struct vt8500_gpio_data vt8500_data = {
74 .num_banks = 7, 74 .num_banks = 7,
75 .banks = { 75 .banks = {
76 VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
76 VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26), 77 VT8500_BANK(0x00, 0x20, 0x40, 0x60, 26),
77 VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28), 78 VT8500_BANK(0x04, 0x24, 0x44, 0x64, 28),
78 VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31), 79 VT8500_BANK(0x08, 0x28, 0x48, 0x68, 31),
79 VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19), 80 VT8500_BANK(0x0C, 0x2C, 0x4C, 0x6C, 19),
80 VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19), 81 VT8500_BANK(0x10, 0x30, 0x50, 0x70, 19),
81 VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23), 82 VT8500_BANK(0x14, 0x34, 0x54, 0x74, 23),
82 VT8500_BANK(NO_REG, 0x3C, 0x5C, 0x7C, 9),
83 }, 83 },
84}; 84};
85 85
86static struct vt8500_gpio_data wm8505_data = { 86static struct vt8500_gpio_data wm8505_data = {
87 .num_banks = 10, 87 .num_banks = 10,
88 .banks = { 88 .banks = {
89 VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
89 VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8), 90 VT8500_BANK(0x40, 0x68, 0x90, 0xB8, 8),
90 VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32), 91 VT8500_BANK(0x44, 0x6C, 0x94, 0xBC, 32),
91 VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6), 92 VT8500_BANK(0x48, 0x70, 0x98, 0xC0, 6),
@@ -95,7 +96,6 @@ static struct vt8500_gpio_data wm8505_data = {
95 VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5), 96 VT8500_BANK(0x58, 0x80, 0xA8, 0xD0, 5),
96 VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12), 97 VT8500_BANK(0x5C, 0x84, 0xAC, 0xD4, 12),
97 VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16), 98 VT8500_BANK(0x60, 0x88, 0xB0, 0xD8, 16),
98 VT8500_BANK(0x64, 0x8C, 0xB4, 0xDC, 22),
99 VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6), 99 VT8500_BANK(0x500, 0x504, 0x508, 0x50C, 6),
100 }, 100 },
101}; 101};
@@ -127,6 +127,12 @@ struct vt8500_gpio_chip {
127 void __iomem *base; 127 void __iomem *base;
128}; 128};
129 129
130struct vt8500_data {
131 struct vt8500_gpio_chip *chip;
132 void __iomem *iobase;
133 int num_banks;
134};
135
130 136
131#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip) 137#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)
132 138
@@ -224,19 +230,32 @@ static int vt8500_of_xlate(struct gpio_chip *gc,
224static int vt8500_add_chips(struct platform_device *pdev, void __iomem *base, 230static int vt8500_add_chips(struct platform_device *pdev, void __iomem *base,
225 const struct vt8500_gpio_data *data) 231 const struct vt8500_gpio_data *data)
226{ 232{
233 struct vt8500_data *priv;
227 struct vt8500_gpio_chip *vtchip; 234 struct vt8500_gpio_chip *vtchip;
228 struct gpio_chip *chip; 235 struct gpio_chip *chip;
229 int i; 236 int i;
230 int pin_cnt = 0; 237 int pin_cnt = 0;
231 238
232 vtchip = devm_kzalloc(&pdev->dev, 239 priv = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_data), GFP_KERNEL);
240 if (!priv) {
241 dev_err(&pdev->dev, "failed to allocate memory\n");
242 return -ENOMEM;
243 }
244
245 priv->chip = devm_kzalloc(&pdev->dev,
233 sizeof(struct vt8500_gpio_chip) * data->num_banks, 246 sizeof(struct vt8500_gpio_chip) * data->num_banks,
234 GFP_KERNEL); 247 GFP_KERNEL);
235 if (!vtchip) { 248 if (!priv->chip) {
236 pr_err("%s: failed to allocate chip memory\n", __func__); 249 dev_err(&pdev->dev, "failed to allocate chip memory\n");
237 return -ENOMEM; 250 return -ENOMEM;
238 } 251 }
239 252
253 priv->iobase = base;
254 priv->num_banks = data->num_banks;
255 platform_set_drvdata(pdev, priv);
256
257 vtchip = priv->chip;
258
240 for (i = 0; i < data->num_banks; i++) { 259 for (i = 0; i < data->num_banks; i++) {
241 vtchip[i].base = base; 260 vtchip[i].base = base;
242 vtchip[i].regs = &data->banks[i]; 261 vtchip[i].regs = &data->banks[i];
@@ -273,36 +292,54 @@ static struct of_device_id vt8500_gpio_dt_ids[] = {
273 292
274static int vt8500_gpio_probe(struct platform_device *pdev) 293static int vt8500_gpio_probe(struct platform_device *pdev)
275{ 294{
295 int ret;
276 void __iomem *gpio_base; 296 void __iomem *gpio_base;
277 struct device_node *np; 297 struct resource *res;
278 const struct of_device_id *of_id = 298 const struct of_device_id *of_id =
279 of_match_device(vt8500_gpio_dt_ids, &pdev->dev); 299 of_match_device(vt8500_gpio_dt_ids, &pdev->dev);
280 300
281 if (!of_id) { 301 if (!of_id) {
282 dev_err(&pdev->dev, "Failed to find gpio controller\n"); 302 dev_err(&pdev->dev, "No matching driver data\n");
283 return -ENODEV; 303 return -ENODEV;
284 } 304 }
285 305
286 np = pdev->dev.of_node; 306 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
287 if (!np) { 307 if (!res) {
288 dev_err(&pdev->dev, "Missing GPIO description in devicetree\n"); 308 dev_err(&pdev->dev, "Unable to get IO resource\n");
289 return -EFAULT; 309 return -ENODEV;
290 } 310 }
291 311
292 gpio_base = of_iomap(np, 0); 312 gpio_base = devm_request_and_ioremap(&pdev->dev, res);
293 if (!gpio_base) { 313 if (!gpio_base) {
294 dev_err(&pdev->dev, "Unable to map GPIO registers\n"); 314 dev_err(&pdev->dev, "Unable to map GPIO registers\n");
295 of_node_put(np);
296 return -ENOMEM; 315 return -ENOMEM;
297 } 316 }
298 317
299 vt8500_add_chips(pdev, gpio_base, of_id->data); 318 ret = vt8500_add_chips(pdev, gpio_base, of_id->data);
319
320 return ret;
321}
322
323static int vt8500_gpio_remove(struct platform_device *pdev)
324{
325 int i;
326 int ret;
327 struct vt8500_data *priv = platform_get_drvdata(pdev);
328 struct vt8500_gpio_chip *vtchip = priv->chip;
329
330 for (i = 0; i < priv->num_banks; i++) {
331 ret = gpiochip_remove(&vtchip[i].chip);
332 if (ret)
333 dev_warn(&pdev->dev, "gpiochip_remove returned %d\n",
334 ret);
335 }
300 336
301 return 0; 337 return 0;
302} 338}
303 339
304static struct platform_driver vt8500_gpio_driver = { 340static struct platform_driver vt8500_gpio_driver = {
305 .probe = vt8500_gpio_probe, 341 .probe = vt8500_gpio_probe,
342 .remove = vt8500_gpio_remove,
306 .driver = { 343 .driver = {
307 .name = "vt8500-gpio", 344 .name = "vt8500-gpio",
308 .owner = THIS_MODULE, 345 .owner = THIS_MODULE,
diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
index cbad6e908d30..a063eb04b6ce 100644
--- a/drivers/gpio/gpiolib-acpi.c
+++ b/drivers/gpio/gpiolib-acpi.c
@@ -15,6 +15,7 @@
15#include <linux/export.h> 15#include <linux/export.h>
16#include <linux/acpi_gpio.h> 16#include <linux/acpi_gpio.h>
17#include <linux/acpi.h> 17#include <linux/acpi.h>
18#include <linux/interrupt.h>
18 19
19static int acpi_gpiochip_find(struct gpio_chip *gc, void *data) 20static int acpi_gpiochip_find(struct gpio_chip *gc, void *data)
20{ 21{
@@ -52,3 +53,89 @@ int acpi_get_gpio(char *path, int pin)
52 return chip->base + pin; 53 return chip->base + pin;
53} 54}
54EXPORT_SYMBOL_GPL(acpi_get_gpio); 55EXPORT_SYMBOL_GPL(acpi_get_gpio);
56
57
58static irqreturn_t acpi_gpio_irq_handler(int irq, void *data)
59{
60 acpi_handle handle = data;
61
62 acpi_evaluate_object(handle, NULL, NULL, NULL);
63
64 return IRQ_HANDLED;
65}
66
67/**
68 * acpi_gpiochip_request_interrupts() - Register isr for gpio chip ACPI events
69 * @chip: gpio chip
70 *
71 * ACPI5 platforms can use GPIO signaled ACPI events. These GPIO interrupts are
72 * handled by ACPI event methods which need to be called from the GPIO
73 * chip's interrupt handler. acpi_gpiochip_request_interrupts finds out which
74 * gpio pins have acpi event methods and assigns interrupt handlers that calls
75 * the acpi event methods for those pins.
76 *
77 * Interrupts are automatically freed on driver detach
78 */
79
80void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)
81{
82 struct acpi_buffer buf = {ACPI_ALLOCATE_BUFFER, NULL};
83 struct acpi_resource *res;
84 acpi_handle handle, ev_handle;
85 acpi_status status;
86 unsigned int pin;
87 int irq, ret;
88 char ev_name[5];
89
90 if (!chip->dev || !chip->to_irq)
91 return;
92
93 handle = ACPI_HANDLE(chip->dev);
94 if (!handle)
95 return;
96
97 status = acpi_get_event_resources(handle, &buf);
98 if (ACPI_FAILURE(status))
99 return;
100
101 /* If a gpio interrupt has an acpi event handler method, then
102 * set up an interrupt handler that calls the acpi event handler
103 */
104
105 for (res = buf.pointer;
106 res && (res->type != ACPI_RESOURCE_TYPE_END_TAG);
107 res = ACPI_NEXT_RESOURCE(res)) {
108
109 if (res->type != ACPI_RESOURCE_TYPE_GPIO ||
110 res->data.gpio.connection_type !=
111 ACPI_RESOURCE_GPIO_TYPE_INT)
112 continue;
113
114 pin = res->data.gpio.pin_table[0];
115 if (pin > chip->ngpio)
116 continue;
117
118 sprintf(ev_name, "_%c%02X",
119 res->data.gpio.triggering ? 'E' : 'L', pin);
120
121 status = acpi_get_handle(handle, ev_name, &ev_handle);
122 if (ACPI_FAILURE(status))
123 continue;
124
125 irq = chip->to_irq(chip, pin);
126 if (irq < 0)
127 continue;
128
129 /* Assume BIOS sets the triggering, so no flags */
130 ret = devm_request_threaded_irq(chip->dev, irq, NULL,
131 acpi_gpio_irq_handler,
132 0,
133 "GPIO-signaled-ACPI-event",
134 ev_handle);
135 if (ret)
136 dev_err(chip->dev,
137 "Failed to request IRQ %d ACPI event handler\n",
138 irq);
139 }
140}
141EXPORT_SYMBOL(acpi_gpiochip_request_interrupts);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 5359ca78130f..4828fe7c66cb 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -3,6 +3,7 @@
3#include <linux/interrupt.h> 3#include <linux/interrupt.h>
4#include <linux/irq.h> 4#include <linux/irq.h>
5#include <linux/spinlock.h> 5#include <linux/spinlock.h>
6#include <linux/list.h>
6#include <linux/device.h> 7#include <linux/device.h>
7#include <linux/err.h> 8#include <linux/err.h>
8#include <linux/debugfs.h> 9#include <linux/debugfs.h>
@@ -52,14 +53,13 @@ struct gpio_desc {
52/* flag symbols are bit numbers */ 53/* flag symbols are bit numbers */
53#define FLAG_REQUESTED 0 54#define FLAG_REQUESTED 0
54#define FLAG_IS_OUT 1 55#define FLAG_IS_OUT 1
55#define FLAG_RESERVED 2 56#define FLAG_EXPORT 2 /* protected by sysfs_lock */
56#define FLAG_EXPORT 3 /* protected by sysfs_lock */ 57#define FLAG_SYSFS 3 /* exported via /sys/class/gpio/control */
57#define FLAG_SYSFS 4 /* exported via /sys/class/gpio/control */ 58#define FLAG_TRIG_FALL 4 /* trigger on falling edge */
58#define FLAG_TRIG_FALL 5 /* trigger on falling edge */ 59#define FLAG_TRIG_RISE 5 /* trigger on rising edge */
59#define FLAG_TRIG_RISE 6 /* trigger on rising edge */ 60#define FLAG_ACTIVE_LOW 6 /* sysfs value has active low */
60#define FLAG_ACTIVE_LOW 7 /* sysfs value has active low */ 61#define FLAG_OPEN_DRAIN 7 /* Gpio is open drain type */
61#define FLAG_OPEN_DRAIN 8 /* Gpio is open drain type */ 62#define FLAG_OPEN_SOURCE 8 /* Gpio is open source type */
62#define FLAG_OPEN_SOURCE 9 /* Gpio is open source type */
63 63
64#define ID_SHIFT 16 /* add new flags before this one */ 64#define ID_SHIFT 16 /* add new flags before this one */
65 65
@@ -72,10 +72,36 @@ struct gpio_desc {
72}; 72};
73static struct gpio_desc gpio_desc[ARCH_NR_GPIOS]; 73static struct gpio_desc gpio_desc[ARCH_NR_GPIOS];
74 74
75#define GPIO_OFFSET_VALID(chip, offset) (offset >= 0 && offset < chip->ngpio)
76
77static LIST_HEAD(gpio_chips);
78
75#ifdef CONFIG_GPIO_SYSFS 79#ifdef CONFIG_GPIO_SYSFS
76static DEFINE_IDR(dirent_idr); 80static DEFINE_IDR(dirent_idr);
77#endif 81#endif
78 82
83/*
84 * Internal gpiod_* API using descriptors instead of the integer namespace.
85 * Most of this should eventually go public.
86 */
87static int gpiod_request(struct gpio_desc *desc, const char *label);
88static void gpiod_free(struct gpio_desc *desc);
89static int gpiod_direction_input(struct gpio_desc *desc);
90static int gpiod_direction_output(struct gpio_desc *desc, int value);
91static int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce);
92static int gpiod_get_value_cansleep(struct gpio_desc *desc);
93static void gpiod_set_value_cansleep(struct gpio_desc *desc, int value);
94static int gpiod_get_value(struct gpio_desc *desc);
95static void gpiod_set_value(struct gpio_desc *desc, int value);
96static int gpiod_cansleep(struct gpio_desc *desc);
97static int gpiod_to_irq(struct gpio_desc *desc);
98static int gpiod_export(struct gpio_desc *desc, bool direction_may_change);
99static int gpiod_export_link(struct device *dev, const char *name,
100 struct gpio_desc *desc);
101static int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value);
102static void gpiod_unexport(struct gpio_desc *desc);
103
104
79static inline void desc_set_label(struct gpio_desc *d, const char *label) 105static inline void desc_set_label(struct gpio_desc *d, const char *label)
80{ 106{
81#ifdef CONFIG_DEBUG_FS 107#ifdef CONFIG_DEBUG_FS
@@ -83,6 +109,36 @@ static inline void desc_set_label(struct gpio_desc *d, const char *label)
83#endif 109#endif
84} 110}
85 111
112/*
113 * Return the GPIO number of the passed descriptor relative to its chip
114 */
115static int gpio_chip_hwgpio(const struct gpio_desc *desc)
116{
117 return desc - &desc->chip->desc[0];
118}
119
120/**
121 * Convert a GPIO number to its descriptor
122 */
123static struct gpio_desc *gpio_to_desc(unsigned gpio)
124{
125 if (WARN(!gpio_is_valid(gpio), "invalid GPIO %d\n", gpio))
126 return NULL;
127 else
128 return &gpio_desc[gpio];
129}
130
131/**
132 * Convert a GPIO descriptor to the integer namespace.
133 * This should disappear in the future but is needed since we still
134 * use GPIO numbers for error messages and sysfs nodes
135 */
136static int desc_to_gpio(const struct gpio_desc *desc)
137{
138 return desc->chip->base + gpio_chip_hwgpio(desc);
139}
140
141
86/* Warn when drivers omit gpio_request() calls -- legal but ill-advised 142/* Warn when drivers omit gpio_request() calls -- legal but ill-advised
87 * when setting direction, and otherwise illegal. Until board setup code 143 * when setting direction, and otherwise illegal. Until board setup code
88 * and drivers use explicit requests everywhere (which won't happen when 144 * and drivers use explicit requests everywhere (which won't happen when
@@ -94,10 +150,10 @@ static inline void desc_set_label(struct gpio_desc *d, const char *label)
94 * only "legal" in the sense that (old) code using it won't break yet, 150 * only "legal" in the sense that (old) code using it won't break yet,
95 * but instead only triggers a WARN() stack dump. 151 * but instead only triggers a WARN() stack dump.
96 */ 152 */
97static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset) 153static int gpio_ensure_requested(struct gpio_desc *desc)
98{ 154{
99 const struct gpio_chip *chip = desc->chip; 155 const struct gpio_chip *chip = desc->chip;
100 const int gpio = chip->base + offset; 156 const int gpio = desc_to_gpio(desc);
101 157
102 if (WARN(test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0, 158 if (WARN(test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0,
103 "autorequest GPIO-%d\n", gpio)) { 159 "autorequest GPIO-%d\n", gpio)) {
@@ -116,95 +172,54 @@ static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset)
116} 172}
117 173
118/* caller holds gpio_lock *OR* gpio is marked as requested */ 174/* caller holds gpio_lock *OR* gpio is marked as requested */
175static struct gpio_chip *gpiod_to_chip(struct gpio_desc *desc)
176{
177 return desc->chip;
178}
179
119struct gpio_chip *gpio_to_chip(unsigned gpio) 180struct gpio_chip *gpio_to_chip(unsigned gpio)
120{ 181{
121 return gpio_desc[gpio].chip; 182 return gpiod_to_chip(gpio_to_desc(gpio));
122} 183}
123 184
124/* dynamic allocation of GPIOs, e.g. on a hotplugged device */ 185/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
125static int gpiochip_find_base(int ngpio) 186static int gpiochip_find_base(int ngpio)
126{ 187{
127 int i; 188 struct gpio_chip *chip;
128 int spare = 0; 189 int base = ARCH_NR_GPIOS - ngpio;
129 int base = -ENOSPC;
130
131 for (i = ARCH_NR_GPIOS - 1; i >= 0 ; i--) {
132 struct gpio_desc *desc = &gpio_desc[i];
133 struct gpio_chip *chip = desc->chip;
134 190
135 if (!chip && !test_bit(FLAG_RESERVED, &desc->flags)) { 191 list_for_each_entry_reverse(chip, &gpio_chips, list) {
136 spare++; 192 /* found a free space? */
137 if (spare == ngpio) { 193 if (chip->base + chip->ngpio <= base)
138 base = i; 194 break;
139 break; 195 else
140 } 196 /* nope, check the space right before the chip */
141 } else { 197 base = chip->base - ngpio;
142 spare = 0;
143 if (chip)
144 i -= chip->ngpio - 1;
145 }
146 } 198 }
147 199
148 if (gpio_is_valid(base)) 200 if (gpio_is_valid(base)) {
149 pr_debug("%s: found new base at %d\n", __func__, base); 201 pr_debug("%s: found new base at %d\n", __func__, base);
150 return base; 202 return base;
151} 203 } else {
152 204 pr_err("%s: cannot find free range\n", __func__);
153/** 205 return -ENOSPC;
154 * gpiochip_reserve() - reserve range of gpios to use with platform code only
155 * @start: starting gpio number
156 * @ngpio: number of gpios to reserve
157 * Context: platform init, potentially before irqs or kmalloc will work
158 *
159 * Returns a negative errno if any gpio within the range is already reserved
160 * or registered, else returns zero as a success code. Use this function
161 * to mark a range of gpios as unavailable for dynamic gpio number allocation,
162 * for example because its driver support is not yet loaded.
163 */
164int __init gpiochip_reserve(int start, int ngpio)
165{
166 int ret = 0;
167 unsigned long flags;
168 int i;
169
170 if (!gpio_is_valid(start) || !gpio_is_valid(start + ngpio - 1))
171 return -EINVAL;
172
173 spin_lock_irqsave(&gpio_lock, flags);
174
175 for (i = start; i < start + ngpio; i++) {
176 struct gpio_desc *desc = &gpio_desc[i];
177
178 if (desc->chip || test_bit(FLAG_RESERVED, &desc->flags)) {
179 ret = -EBUSY;
180 goto err;
181 }
182
183 set_bit(FLAG_RESERVED, &desc->flags);
184 } 206 }
185
186 pr_debug("%s: reserved gpios from %d to %d\n",
187 __func__, start, start + ngpio - 1);
188err:
189 spin_unlock_irqrestore(&gpio_lock, flags);
190
191 return ret;
192} 207}
193 208
194/* caller ensures gpio is valid and requested, chip->get_direction may sleep */ 209/* caller ensures gpio is valid and requested, chip->get_direction may sleep */
195static int gpio_get_direction(unsigned gpio) 210static int gpiod_get_direction(struct gpio_desc *desc)
196{ 211{
197 struct gpio_chip *chip; 212 struct gpio_chip *chip;
198 struct gpio_desc *desc = &gpio_desc[gpio]; 213 unsigned offset;
199 int status = -EINVAL; 214 int status = -EINVAL;
200 215
201 chip = gpio_to_chip(gpio); 216 chip = gpiod_to_chip(desc);
202 gpio -= chip->base; 217 offset = gpio_chip_hwgpio(desc);
203 218
204 if (!chip->get_direction) 219 if (!chip->get_direction)
205 return status; 220 return status;
206 221
207 status = chip->get_direction(chip, gpio); 222 status = chip->get_direction(chip, offset);
208 if (status > 0) { 223 if (status > 0) {
209 /* GPIOF_DIR_IN, or other positive */ 224 /* GPIOF_DIR_IN, or other positive */
210 status = 1; 225 status = 1;
@@ -248,19 +263,19 @@ static DEFINE_MUTEX(sysfs_lock);
248static ssize_t gpio_direction_show(struct device *dev, 263static ssize_t gpio_direction_show(struct device *dev,
249 struct device_attribute *attr, char *buf) 264 struct device_attribute *attr, char *buf)
250{ 265{
251 const struct gpio_desc *desc = dev_get_drvdata(dev); 266 struct gpio_desc *desc = dev_get_drvdata(dev);
252 unsigned gpio = desc - gpio_desc;
253 ssize_t status; 267 ssize_t status;
254 268
255 mutex_lock(&sysfs_lock); 269 mutex_lock(&sysfs_lock);
256 270
257 if (!test_bit(FLAG_EXPORT, &desc->flags)) 271 if (!test_bit(FLAG_EXPORT, &desc->flags)) {
258 status = -EIO; 272 status = -EIO;
259 else 273 } else {
260 gpio_get_direction(gpio); 274 gpiod_get_direction(desc);
261 status = sprintf(buf, "%s\n", 275 status = sprintf(buf, "%s\n",
262 test_bit(FLAG_IS_OUT, &desc->flags) 276 test_bit(FLAG_IS_OUT, &desc->flags)
263 ? "out" : "in"); 277 ? "out" : "in");
278 }
264 279
265 mutex_unlock(&sysfs_lock); 280 mutex_unlock(&sysfs_lock);
266 return status; 281 return status;
@@ -269,8 +284,7 @@ static ssize_t gpio_direction_show(struct device *dev,
269static ssize_t gpio_direction_store(struct device *dev, 284static ssize_t gpio_direction_store(struct device *dev,
270 struct device_attribute *attr, const char *buf, size_t size) 285 struct device_attribute *attr, const char *buf, size_t size)
271{ 286{
272 const struct gpio_desc *desc = dev_get_drvdata(dev); 287 struct gpio_desc *desc = dev_get_drvdata(dev);
273 unsigned gpio = desc - gpio_desc;
274 ssize_t status; 288 ssize_t status;
275 289
276 mutex_lock(&sysfs_lock); 290 mutex_lock(&sysfs_lock);
@@ -278,11 +292,11 @@ static ssize_t gpio_direction_store(struct device *dev,
278 if (!test_bit(FLAG_EXPORT, &desc->flags)) 292 if (!test_bit(FLAG_EXPORT, &desc->flags))
279 status = -EIO; 293 status = -EIO;
280 else if (sysfs_streq(buf, "high")) 294 else if (sysfs_streq(buf, "high"))
281 status = gpio_direction_output(gpio, 1); 295 status = gpiod_direction_output(desc, 1);
282 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low")) 296 else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
283 status = gpio_direction_output(gpio, 0); 297 status = gpiod_direction_output(desc, 0);
284 else if (sysfs_streq(buf, "in")) 298 else if (sysfs_streq(buf, "in"))
285 status = gpio_direction_input(gpio); 299 status = gpiod_direction_input(desc);
286 else 300 else
287 status = -EINVAL; 301 status = -EINVAL;
288 302
@@ -296,8 +310,7 @@ static /* const */ DEVICE_ATTR(direction, 0644,
296static ssize_t gpio_value_show(struct device *dev, 310static ssize_t gpio_value_show(struct device *dev,
297 struct device_attribute *attr, char *buf) 311 struct device_attribute *attr, char *buf)
298{ 312{
299 const struct gpio_desc *desc = dev_get_drvdata(dev); 313 struct gpio_desc *desc = dev_get_drvdata(dev);
300 unsigned gpio = desc - gpio_desc;
301 ssize_t status; 314 ssize_t status;
302 315
303 mutex_lock(&sysfs_lock); 316 mutex_lock(&sysfs_lock);
@@ -307,7 +320,7 @@ static ssize_t gpio_value_show(struct device *dev,
307 } else { 320 } else {
308 int value; 321 int value;
309 322
310 value = !!gpio_get_value_cansleep(gpio); 323 value = !!gpiod_get_value_cansleep(desc);
311 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) 324 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
312 value = !value; 325 value = !value;
313 326
@@ -321,8 +334,7 @@ static ssize_t gpio_value_show(struct device *dev,
321static ssize_t gpio_value_store(struct device *dev, 334static ssize_t gpio_value_store(struct device *dev,
322 struct device_attribute *attr, const char *buf, size_t size) 335 struct device_attribute *attr, const char *buf, size_t size)
323{ 336{
324 const struct gpio_desc *desc = dev_get_drvdata(dev); 337 struct gpio_desc *desc = dev_get_drvdata(dev);
325 unsigned gpio = desc - gpio_desc;
326 ssize_t status; 338 ssize_t status;
327 339
328 mutex_lock(&sysfs_lock); 340 mutex_lock(&sysfs_lock);
@@ -338,7 +350,7 @@ static ssize_t gpio_value_store(struct device *dev,
338 if (status == 0) { 350 if (status == 0) {
339 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) 351 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
340 value = !value; 352 value = !value;
341 gpio_set_value_cansleep(gpio, value != 0); 353 gpiod_set_value_cansleep(desc, value != 0);
342 status = size; 354 status = size;
343 } 355 }
344 } 356 }
@@ -368,7 +380,7 @@ static int gpio_setup_irq(struct gpio_desc *desc, struct device *dev,
368 if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags) 380 if ((desc->flags & GPIO_TRIGGER_MASK) == gpio_flags)
369 return 0; 381 return 0;
370 382
371 irq = gpio_to_irq(desc - gpio_desc); 383 irq = gpiod_to_irq(desc);
372 if (irq < 0) 384 if (irq < 0)
373 return -EIO; 385 return -EIO;
374 386
@@ -638,29 +650,32 @@ static ssize_t export_store(struct class *class,
638 struct class_attribute *attr, 650 struct class_attribute *attr,
639 const char *buf, size_t len) 651 const char *buf, size_t len)
640{ 652{
641 long gpio; 653 long gpio;
642 int status; 654 struct gpio_desc *desc;
655 int status;
643 656
644 status = strict_strtol(buf, 0, &gpio); 657 status = strict_strtol(buf, 0, &gpio);
645 if (status < 0) 658 if (status < 0)
646 goto done; 659 goto done;
647 660
661 desc = gpio_to_desc(gpio);
662
648 /* No extra locking here; FLAG_SYSFS just signifies that the 663 /* No extra locking here; FLAG_SYSFS just signifies that the
649 * request and export were done by on behalf of userspace, so 664 * request and export were done by on behalf of userspace, so
650 * they may be undone on its behalf too. 665 * they may be undone on its behalf too.
651 */ 666 */
652 667
653 status = gpio_request(gpio, "sysfs"); 668 status = gpiod_request(desc, "sysfs");
654 if (status < 0) { 669 if (status < 0) {
655 if (status == -EPROBE_DEFER) 670 if (status == -EPROBE_DEFER)
656 status = -ENODEV; 671 status = -ENODEV;
657 goto done; 672 goto done;
658 } 673 }
659 status = gpio_export(gpio, true); 674 status = gpiod_export(desc, true);
660 if (status < 0) 675 if (status < 0)
661 gpio_free(gpio); 676 gpiod_free(desc);
662 else 677 else
663 set_bit(FLAG_SYSFS, &gpio_desc[gpio].flags); 678 set_bit(FLAG_SYSFS, &desc->flags);
664 679
665done: 680done:
666 if (status) 681 if (status)
@@ -672,8 +687,9 @@ static ssize_t unexport_store(struct class *class,
672 struct class_attribute *attr, 687 struct class_attribute *attr,
673 const char *buf, size_t len) 688 const char *buf, size_t len)
674{ 689{
675 long gpio; 690 long gpio;
676 int status; 691 struct gpio_desc *desc;
692 int status;
677 693
678 status = strict_strtol(buf, 0, &gpio); 694 status = strict_strtol(buf, 0, &gpio);
679 if (status < 0) 695 if (status < 0)
@@ -681,17 +697,18 @@ static ssize_t unexport_store(struct class *class,
681 697
682 status = -EINVAL; 698 status = -EINVAL;
683 699
700 desc = gpio_to_desc(gpio);
684 /* reject bogus commands (gpio_unexport ignores them) */ 701 /* reject bogus commands (gpio_unexport ignores them) */
685 if (!gpio_is_valid(gpio)) 702 if (!desc)
686 goto done; 703 goto done;
687 704
688 /* No extra locking here; FLAG_SYSFS just signifies that the 705 /* No extra locking here; FLAG_SYSFS just signifies that the
689 * request and export were done by on behalf of userspace, so 706 * request and export were done by on behalf of userspace, so
690 * they may be undone on its behalf too. 707 * they may be undone on its behalf too.
691 */ 708 */
692 if (test_and_clear_bit(FLAG_SYSFS, &gpio_desc[gpio].flags)) { 709 if (test_and_clear_bit(FLAG_SYSFS, &desc->flags)) {
693 status = 0; 710 status = 0;
694 gpio_free(gpio); 711 gpiod_free(desc);
695 } 712 }
696done: 713done:
697 if (status) 714 if (status)
@@ -728,13 +745,13 @@ static struct class gpio_class = {
728 * 745 *
729 * Returns zero on success, else an error. 746 * Returns zero on success, else an error.
730 */ 747 */
731int gpio_export(unsigned gpio, bool direction_may_change) 748static int gpiod_export(struct gpio_desc *desc, bool direction_may_change)
732{ 749{
733 unsigned long flags; 750 unsigned long flags;
734 struct gpio_desc *desc;
735 int status; 751 int status;
736 const char *ioname = NULL; 752 const char *ioname = NULL;
737 struct device *dev; 753 struct device *dev;
754 int offset;
738 755
739 /* can't export until sysfs is available ... */ 756 /* can't export until sysfs is available ... */
740 if (!gpio_class.p) { 757 if (!gpio_class.p) {
@@ -742,20 +759,19 @@ int gpio_export(unsigned gpio, bool direction_may_change)
742 return -ENOENT; 759 return -ENOENT;
743 } 760 }
744 761
745 if (!gpio_is_valid(gpio)) { 762 if (!desc) {
746 pr_debug("%s: gpio %d is not valid\n", __func__, gpio); 763 pr_debug("%s: invalid gpio descriptor\n", __func__);
747 return -EINVAL; 764 return -EINVAL;
748 } 765 }
749 766
750 mutex_lock(&sysfs_lock); 767 mutex_lock(&sysfs_lock);
751 768
752 spin_lock_irqsave(&gpio_lock, flags); 769 spin_lock_irqsave(&gpio_lock, flags);
753 desc = &gpio_desc[gpio];
754 if (!test_bit(FLAG_REQUESTED, &desc->flags) || 770 if (!test_bit(FLAG_REQUESTED, &desc->flags) ||
755 test_bit(FLAG_EXPORT, &desc->flags)) { 771 test_bit(FLAG_EXPORT, &desc->flags)) {
756 spin_unlock_irqrestore(&gpio_lock, flags); 772 spin_unlock_irqrestore(&gpio_lock, flags);
757 pr_debug("%s: gpio %d unavailable (requested=%d, exported=%d)\n", 773 pr_debug("%s: gpio %d unavailable (requested=%d, exported=%d)\n",
758 __func__, gpio, 774 __func__, desc_to_gpio(desc),
759 test_bit(FLAG_REQUESTED, &desc->flags), 775 test_bit(FLAG_REQUESTED, &desc->flags),
760 test_bit(FLAG_EXPORT, &desc->flags)); 776 test_bit(FLAG_EXPORT, &desc->flags));
761 status = -EPERM; 777 status = -EPERM;
@@ -766,11 +782,13 @@ int gpio_export(unsigned gpio, bool direction_may_change)
766 direction_may_change = false; 782 direction_may_change = false;
767 spin_unlock_irqrestore(&gpio_lock, flags); 783 spin_unlock_irqrestore(&gpio_lock, flags);
768 784
769 if (desc->chip->names && desc->chip->names[gpio - desc->chip->base]) 785 offset = gpio_chip_hwgpio(desc);
770 ioname = desc->chip->names[gpio - desc->chip->base]; 786 if (desc->chip->names && desc->chip->names[offset])
787 ioname = desc->chip->names[offset];
771 788
772 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), 789 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
773 desc, ioname ? ioname : "gpio%u", gpio); 790 desc, ioname ? ioname : "gpio%u",
791 desc_to_gpio(desc));
774 if (IS_ERR(dev)) { 792 if (IS_ERR(dev)) {
775 status = PTR_ERR(dev); 793 status = PTR_ERR(dev);
776 goto fail_unlock; 794 goto fail_unlock;
@@ -786,7 +804,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
786 goto fail_unregister_device; 804 goto fail_unregister_device;
787 } 805 }
788 806
789 if (gpio_to_irq(gpio) >= 0 && (direction_may_change || 807 if (gpiod_to_irq(desc) >= 0 && (direction_may_change ||
790 !test_bit(FLAG_IS_OUT, &desc->flags))) { 808 !test_bit(FLAG_IS_OUT, &desc->flags))) {
791 status = device_create_file(dev, &dev_attr_edge); 809 status = device_create_file(dev, &dev_attr_edge);
792 if (status) 810 if (status)
@@ -801,9 +819,15 @@ fail_unregister_device:
801 device_unregister(dev); 819 device_unregister(dev);
802fail_unlock: 820fail_unlock:
803 mutex_unlock(&sysfs_lock); 821 mutex_unlock(&sysfs_lock);
804 pr_debug("%s: gpio%d status %d\n", __func__, gpio, status); 822 pr_debug("%s: gpio%d status %d\n", __func__, desc_to_gpio(desc),
823 status);
805 return status; 824 return status;
806} 825}
826
827int gpio_export(unsigned gpio, bool direction_may_change)
828{
829 return gpiod_export(gpio_to_desc(gpio), direction_may_change);
830}
807EXPORT_SYMBOL_GPL(gpio_export); 831EXPORT_SYMBOL_GPL(gpio_export);
808 832
809static int match_export(struct device *dev, const void *data) 833static int match_export(struct device *dev, const void *data)
@@ -822,18 +846,16 @@ static int match_export(struct device *dev, const void *data)
822 * 846 *
823 * Returns zero on success, else an error. 847 * Returns zero on success, else an error.
824 */ 848 */
825int gpio_export_link(struct device *dev, const char *name, unsigned gpio) 849static int gpiod_export_link(struct device *dev, const char *name,
850 struct gpio_desc *desc)
826{ 851{
827 struct gpio_desc *desc;
828 int status = -EINVAL; 852 int status = -EINVAL;
829 853
830 if (!gpio_is_valid(gpio)) 854 if (!desc)
831 goto done; 855 goto done;
832 856
833 mutex_lock(&sysfs_lock); 857 mutex_lock(&sysfs_lock);
834 858
835 desc = &gpio_desc[gpio];
836
837 if (test_bit(FLAG_EXPORT, &desc->flags)) { 859 if (test_bit(FLAG_EXPORT, &desc->flags)) {
838 struct device *tdev; 860 struct device *tdev;
839 861
@@ -850,12 +872,17 @@ int gpio_export_link(struct device *dev, const char *name, unsigned gpio)
850 872
851done: 873done:
852 if (status) 874 if (status)
853 pr_debug("%s: gpio%d status %d\n", __func__, gpio, status); 875 pr_debug("%s: gpio%d status %d\n", __func__, desc_to_gpio(desc),
876 status);
854 877
855 return status; 878 return status;
856} 879}
857EXPORT_SYMBOL_GPL(gpio_export_link);
858 880
881int gpio_export_link(struct device *dev, const char *name, unsigned gpio)
882{
883 return gpiod_export_link(dev, name, gpio_to_desc(gpio));
884}
885EXPORT_SYMBOL_GPL(gpio_export_link);
859 886
860/** 887/**
861 * gpio_sysfs_set_active_low - set the polarity of gpio sysfs value 888 * gpio_sysfs_set_active_low - set the polarity of gpio sysfs value
@@ -869,19 +896,16 @@ EXPORT_SYMBOL_GPL(gpio_export_link);
869 * 896 *
870 * Returns zero on success, else an error. 897 * Returns zero on success, else an error.
871 */ 898 */
872int gpio_sysfs_set_active_low(unsigned gpio, int value) 899static int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
873{ 900{
874 struct gpio_desc *desc;
875 struct device *dev = NULL; 901 struct device *dev = NULL;
876 int status = -EINVAL; 902 int status = -EINVAL;
877 903
878 if (!gpio_is_valid(gpio)) 904 if (!desc)
879 goto done; 905 goto done;
880 906
881 mutex_lock(&sysfs_lock); 907 mutex_lock(&sysfs_lock);
882 908
883 desc = &gpio_desc[gpio];
884
885 if (test_bit(FLAG_EXPORT, &desc->flags)) { 909 if (test_bit(FLAG_EXPORT, &desc->flags)) {
886 dev = class_find_device(&gpio_class, NULL, desc, match_export); 910 dev = class_find_device(&gpio_class, NULL, desc, match_export);
887 if (dev == NULL) { 911 if (dev == NULL) {
@@ -897,10 +921,16 @@ unlock:
897 921
898done: 922done:
899 if (status) 923 if (status)
900 pr_debug("%s: gpio%d status %d\n", __func__, gpio, status); 924 pr_debug("%s: gpio%d status %d\n", __func__, desc_to_gpio(desc),
925 status);
901 926
902 return status; 927 return status;
903} 928}
929
930int gpio_sysfs_set_active_low(unsigned gpio, int value)
931{
932 return gpiod_sysfs_set_active_low(gpio_to_desc(gpio), value);
933}
904EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low); 934EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
905 935
906/** 936/**
@@ -909,21 +939,18 @@ EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
909 * 939 *
910 * This is implicit on gpio_free(). 940 * This is implicit on gpio_free().
911 */ 941 */
912void gpio_unexport(unsigned gpio) 942static void gpiod_unexport(struct gpio_desc *desc)
913{ 943{
914 struct gpio_desc *desc;
915 int status = 0; 944 int status = 0;
916 struct device *dev = NULL; 945 struct device *dev = NULL;
917 946
918 if (!gpio_is_valid(gpio)) { 947 if (!desc) {
919 status = -EINVAL; 948 status = -EINVAL;
920 goto done; 949 goto done;
921 } 950 }
922 951
923 mutex_lock(&sysfs_lock); 952 mutex_lock(&sysfs_lock);
924 953
925 desc = &gpio_desc[gpio];
926
927 if (test_bit(FLAG_EXPORT, &desc->flags)) { 954 if (test_bit(FLAG_EXPORT, &desc->flags)) {
928 955
929 dev = class_find_device(&gpio_class, NULL, desc, match_export); 956 dev = class_find_device(&gpio_class, NULL, desc, match_export);
@@ -935,13 +962,20 @@ void gpio_unexport(unsigned gpio)
935 } 962 }
936 963
937 mutex_unlock(&sysfs_lock); 964 mutex_unlock(&sysfs_lock);
965
938 if (dev) { 966 if (dev) {
939 device_unregister(dev); 967 device_unregister(dev);
940 put_device(dev); 968 put_device(dev);
941 } 969 }
942done: 970done:
943 if (status) 971 if (status)
944 pr_debug("%s: gpio%d status %d\n", __func__, gpio, status); 972 pr_debug("%s: gpio%d status %d\n", __func__, desc_to_gpio(desc),
973 status);
974}
975
976void gpio_unexport(unsigned gpio)
977{
978 gpiod_unexport(gpio_to_desc(gpio));
945} 979}
946EXPORT_SYMBOL_GPL(gpio_unexport); 980EXPORT_SYMBOL_GPL(gpio_unexport);
947 981
@@ -975,9 +1009,9 @@ static int gpiochip_export(struct gpio_chip *chip)
975 unsigned gpio; 1009 unsigned gpio;
976 1010
977 spin_lock_irqsave(&gpio_lock, flags); 1011 spin_lock_irqsave(&gpio_lock, flags);
978 gpio = chip->base; 1012 gpio = 0;
979 while (gpio_desc[gpio].chip == chip) 1013 while (gpio < chip->ngpio)
980 gpio_desc[gpio++].chip = NULL; 1014 chip->desc[gpio++].chip = NULL;
981 spin_unlock_irqrestore(&gpio_lock, flags); 1015 spin_unlock_irqrestore(&gpio_lock, flags);
982 1016
983 pr_debug("%s: chip %s status %d\n", __func__, 1017 pr_debug("%s: chip %s status %d\n", __func__,
@@ -1012,7 +1046,7 @@ static int __init gpiolib_sysfs_init(void)
1012{ 1046{
1013 int status; 1047 int status;
1014 unsigned long flags; 1048 unsigned long flags;
1015 unsigned gpio; 1049 struct gpio_chip *chip;
1016 1050
1017 status = class_register(&gpio_class); 1051 status = class_register(&gpio_class);
1018 if (status < 0) 1052 if (status < 0)
@@ -1025,10 +1059,7 @@ static int __init gpiolib_sysfs_init(void)
1025 * registered, and so arch_initcall() can always gpio_export(). 1059 * registered, and so arch_initcall() can always gpio_export().
1026 */ 1060 */
1027 spin_lock_irqsave(&gpio_lock, flags); 1061 spin_lock_irqsave(&gpio_lock, flags);
1028 for (gpio = 0; gpio < ARCH_NR_GPIOS; gpio++) { 1062 list_for_each_entry(chip, &gpio_chips, list) {
1029 struct gpio_chip *chip;
1030
1031 chip = gpio_desc[gpio].chip;
1032 if (!chip || chip->exported) 1063 if (!chip || chip->exported)
1033 continue; 1064 continue;
1034 1065
@@ -1053,8 +1084,66 @@ static inline void gpiochip_unexport(struct gpio_chip *chip)
1053{ 1084{
1054} 1085}
1055 1086
1087static inline int gpiod_export(struct gpio_desc *desc,
1088 bool direction_may_change)
1089{
1090 return -ENOSYS;
1091}
1092
1093static inline int gpiod_export_link(struct device *dev, const char *name,
1094 struct gpio_desc *desc)
1095{
1096 return -ENOSYS;
1097}
1098
1099static inline int gpiod_sysfs_set_active_low(struct gpio_desc *desc, int value)
1100{
1101 return -ENOSYS;
1102}
1103
1104static inline void gpiod_unexport(struct gpio_desc *desc)
1105{
1106}
1107
1056#endif /* CONFIG_GPIO_SYSFS */ 1108#endif /* CONFIG_GPIO_SYSFS */
1057 1109
1110/*
1111 * Add a new chip to the global chips list, keeping the list of chips sorted
1112 * by base order.
1113 *
1114 * Return -EBUSY if the new chip overlaps with some other chip's integer
1115 * space.
1116 */
1117static int gpiochip_add_to_list(struct gpio_chip *chip)
1118{
1119 struct list_head *pos = &gpio_chips;
1120 struct gpio_chip *_chip;
1121 int err = 0;
1122
1123 /* find where to insert our chip */
1124 list_for_each(pos, &gpio_chips) {
1125 _chip = list_entry(pos, struct gpio_chip, list);
1126 /* shall we insert before _chip? */
1127 if (_chip->base >= chip->base + chip->ngpio)
1128 break;
1129 }
1130
1131 /* are we stepping on the chip right before? */
1132 if (pos != &gpio_chips && pos->prev != &gpio_chips) {
1133 _chip = list_entry(pos->prev, struct gpio_chip, list);
1134 if (_chip->base + _chip->ngpio > chip->base) {
1135 dev_err(chip->dev,
1136 "GPIO integer space overlap, cannot add chip\n");
1137 err = -EBUSY;
1138 }
1139 }
1140
1141 if (!err)
1142 list_add_tail(&chip->list, pos);
1143
1144 return err;
1145}
1146
1058/** 1147/**
1059 * gpiochip_add() - register a gpio_chip 1148 * gpiochip_add() - register a gpio_chip
1060 * @chip: the chip to register, with chip->base initialized 1149 * @chip: the chip to register, with chip->base initialized
@@ -1096,16 +1185,14 @@ int gpiochip_add(struct gpio_chip *chip)
1096 chip->base = base; 1185 chip->base = base;
1097 } 1186 }
1098 1187
1099 /* these GPIO numbers must not be managed by another gpio_chip */ 1188 status = gpiochip_add_to_list(chip);
1100 for (id = base; id < base + chip->ngpio; id++) { 1189
1101 if (gpio_desc[id].chip != NULL) {
1102 status = -EBUSY;
1103 break;
1104 }
1105 }
1106 if (status == 0) { 1190 if (status == 0) {
1107 for (id = base; id < base + chip->ngpio; id++) { 1191 chip->desc = &gpio_desc[chip->base];
1108 gpio_desc[id].chip = chip; 1192
1193 for (id = 0; id < chip->ngpio; id++) {
1194 struct gpio_desc *desc = &chip->desc[id];
1195 desc->chip = chip;
1109 1196
1110 /* REVISIT: most hardware initializes GPIOs as 1197 /* REVISIT: most hardware initializes GPIOs as
1111 * inputs (often with pullups enabled) so power 1198 * inputs (often with pullups enabled) so power
@@ -1114,7 +1201,7 @@ int gpiochip_add(struct gpio_chip *chip)
1114 * and in case chip->get_direction is not set, 1201 * and in case chip->get_direction is not set,
1115 * we may expose the wrong direction in sysfs. 1202 * we may expose the wrong direction in sysfs.
1116 */ 1203 */
1117 gpio_desc[id].flags = !chip->direction_input 1204 desc->flags = !chip->direction_input
1118 ? (1 << FLAG_IS_OUT) 1205 ? (1 << FLAG_IS_OUT)
1119 : 0; 1206 : 0;
1120 } 1207 }
@@ -1167,15 +1254,17 @@ int gpiochip_remove(struct gpio_chip *chip)
1167 gpiochip_remove_pin_ranges(chip); 1254 gpiochip_remove_pin_ranges(chip);
1168 of_gpiochip_remove(chip); 1255 of_gpiochip_remove(chip);
1169 1256
1170 for (id = chip->base; id < chip->base + chip->ngpio; id++) { 1257 for (id = 0; id < chip->ngpio; id++) {
1171 if (test_bit(FLAG_REQUESTED, &gpio_desc[id].flags)) { 1258 if (test_bit(FLAG_REQUESTED, &chip->desc[id].flags)) {
1172 status = -EBUSY; 1259 status = -EBUSY;
1173 break; 1260 break;
1174 } 1261 }
1175 } 1262 }
1176 if (status == 0) { 1263 if (status == 0) {
1177 for (id = chip->base; id < chip->base + chip->ngpio; id++) 1264 for (id = 0; id < chip->ngpio; id++)
1178 gpio_desc[id].chip = NULL; 1265 chip->desc[id].chip = NULL;
1266
1267 list_del(&chip->list);
1179 } 1268 }
1180 1269
1181 spin_unlock_irqrestore(&gpio_lock, flags); 1270 spin_unlock_irqrestore(&gpio_lock, flags);
@@ -1202,20 +1291,17 @@ struct gpio_chip *gpiochip_find(void *data,
1202 int (*match)(struct gpio_chip *chip, 1291 int (*match)(struct gpio_chip *chip,
1203 void *data)) 1292 void *data))
1204{ 1293{
1205 struct gpio_chip *chip = NULL; 1294 struct gpio_chip *chip;
1206 unsigned long flags; 1295 unsigned long flags;
1207 int i;
1208 1296
1209 spin_lock_irqsave(&gpio_lock, flags); 1297 spin_lock_irqsave(&gpio_lock, flags);
1210 for (i = 0; i < ARCH_NR_GPIOS; i++) { 1298 list_for_each_entry(chip, &gpio_chips, list)
1211 if (!gpio_desc[i].chip) 1299 if (match(chip, data))
1212 continue;
1213
1214 if (match(gpio_desc[i].chip, data)) {
1215 chip = gpio_desc[i].chip;
1216 break; 1300 break;
1217 } 1301
1218 } 1302 /* No match? */
1303 if (&chip->list == &gpio_chips)
1304 chip = NULL;
1219 spin_unlock_irqrestore(&gpio_lock, flags); 1305 spin_unlock_irqrestore(&gpio_lock, flags);
1220 1306
1221 return chip; 1307 return chip;
@@ -1297,20 +1383,18 @@ EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1297 * on each other, and help provide better diagnostics in debugfs. 1383 * on each other, and help provide better diagnostics in debugfs.
1298 * They're called even less than the "set direction" calls. 1384 * They're called even less than the "set direction" calls.
1299 */ 1385 */
1300int gpio_request(unsigned gpio, const char *label) 1386static int gpiod_request(struct gpio_desc *desc, const char *label)
1301{ 1387{
1302 struct gpio_desc *desc;
1303 struct gpio_chip *chip; 1388 struct gpio_chip *chip;
1304 int status = -EPROBE_DEFER; 1389 int status = -EPROBE_DEFER;
1305 unsigned long flags; 1390 unsigned long flags;
1306 1391
1307 spin_lock_irqsave(&gpio_lock, flags); 1392 spin_lock_irqsave(&gpio_lock, flags);
1308 1393
1309 if (!gpio_is_valid(gpio)) { 1394 if (!desc) {
1310 status = -EINVAL; 1395 status = -EINVAL;
1311 goto done; 1396 goto done;
1312 } 1397 }
1313 desc = &gpio_desc[gpio];
1314 chip = desc->chip; 1398 chip = desc->chip;
1315 if (chip == NULL) 1399 if (chip == NULL)
1316 goto done; 1400 goto done;
@@ -1334,7 +1418,7 @@ int gpio_request(unsigned gpio, const char *label)
1334 if (chip->request) { 1418 if (chip->request) {
1335 /* chip->request may sleep */ 1419 /* chip->request may sleep */
1336 spin_unlock_irqrestore(&gpio_lock, flags); 1420 spin_unlock_irqrestore(&gpio_lock, flags);
1337 status = chip->request(chip, gpio - chip->base); 1421 status = chip->request(chip, gpio_chip_hwgpio(desc));
1338 spin_lock_irqsave(&gpio_lock, flags); 1422 spin_lock_irqsave(&gpio_lock, flags);
1339 1423
1340 if (status < 0) { 1424 if (status < 0) {
@@ -1347,42 +1431,46 @@ int gpio_request(unsigned gpio, const char *label)
1347 if (chip->get_direction) { 1431 if (chip->get_direction) {
1348 /* chip->get_direction may sleep */ 1432 /* chip->get_direction may sleep */
1349 spin_unlock_irqrestore(&gpio_lock, flags); 1433 spin_unlock_irqrestore(&gpio_lock, flags);
1350 gpio_get_direction(gpio); 1434 gpiod_get_direction(desc);
1351 spin_lock_irqsave(&gpio_lock, flags); 1435 spin_lock_irqsave(&gpio_lock, flags);
1352 } 1436 }
1353done: 1437done:
1354 if (status) 1438 if (status)
1355 pr_debug("gpio_request: gpio-%d (%s) status %d\n", 1439 pr_debug("_gpio_request: gpio-%d (%s) status %d\n",
1356 gpio, label ? : "?", status); 1440 desc ? desc_to_gpio(desc) : -1,
1441 label ? : "?", status);
1357 spin_unlock_irqrestore(&gpio_lock, flags); 1442 spin_unlock_irqrestore(&gpio_lock, flags);
1358 return status; 1443 return status;
1359} 1444}
1445
1446int gpio_request(unsigned gpio, const char *label)
1447{
1448 return gpiod_request(gpio_to_desc(gpio), label);
1449}
1360EXPORT_SYMBOL_GPL(gpio_request); 1450EXPORT_SYMBOL_GPL(gpio_request);
1361 1451
1362void gpio_free(unsigned gpio) 1452static void gpiod_free(struct gpio_desc *desc)
1363{ 1453{
1364 unsigned long flags; 1454 unsigned long flags;
1365 struct gpio_desc *desc;
1366 struct gpio_chip *chip; 1455 struct gpio_chip *chip;
1367 1456
1368 might_sleep(); 1457 might_sleep();
1369 1458
1370 if (!gpio_is_valid(gpio)) { 1459 if (!desc) {
1371 WARN_ON(extra_checks); 1460 WARN_ON(extra_checks);
1372 return; 1461 return;
1373 } 1462 }
1374 1463
1375 gpio_unexport(gpio); 1464 gpiod_unexport(desc);
1376 1465
1377 spin_lock_irqsave(&gpio_lock, flags); 1466 spin_lock_irqsave(&gpio_lock, flags);
1378 1467
1379 desc = &gpio_desc[gpio];
1380 chip = desc->chip; 1468 chip = desc->chip;
1381 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) { 1469 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
1382 if (chip->free) { 1470 if (chip->free) {
1383 spin_unlock_irqrestore(&gpio_lock, flags); 1471 spin_unlock_irqrestore(&gpio_lock, flags);
1384 might_sleep_if(chip->can_sleep); 1472 might_sleep_if(chip->can_sleep);
1385 chip->free(chip, gpio - chip->base); 1473 chip->free(chip, gpio_chip_hwgpio(desc));
1386 spin_lock_irqsave(&gpio_lock, flags); 1474 spin_lock_irqsave(&gpio_lock, flags);
1387 } 1475 }
1388 desc_set_label(desc, NULL); 1476 desc_set_label(desc, NULL);
@@ -1396,6 +1484,11 @@ void gpio_free(unsigned gpio)
1396 1484
1397 spin_unlock_irqrestore(&gpio_lock, flags); 1485 spin_unlock_irqrestore(&gpio_lock, flags);
1398} 1486}
1487
1488void gpio_free(unsigned gpio)
1489{
1490 gpiod_free(gpio_to_desc(gpio));
1491}
1399EXPORT_SYMBOL_GPL(gpio_free); 1492EXPORT_SYMBOL_GPL(gpio_free);
1400 1493
1401/** 1494/**
@@ -1406,29 +1499,32 @@ EXPORT_SYMBOL_GPL(gpio_free);
1406 */ 1499 */
1407int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) 1500int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
1408{ 1501{
1502 struct gpio_desc *desc;
1409 int err; 1503 int err;
1410 1504
1411 err = gpio_request(gpio, label); 1505 desc = gpio_to_desc(gpio);
1506
1507 err = gpiod_request(desc, label);
1412 if (err) 1508 if (err)
1413 return err; 1509 return err;
1414 1510
1415 if (flags & GPIOF_OPEN_DRAIN) 1511 if (flags & GPIOF_OPEN_DRAIN)
1416 set_bit(FLAG_OPEN_DRAIN, &gpio_desc[gpio].flags); 1512 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
1417 1513
1418 if (flags & GPIOF_OPEN_SOURCE) 1514 if (flags & GPIOF_OPEN_SOURCE)
1419 set_bit(FLAG_OPEN_SOURCE, &gpio_desc[gpio].flags); 1515 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
1420 1516
1421 if (flags & GPIOF_DIR_IN) 1517 if (flags & GPIOF_DIR_IN)
1422 err = gpio_direction_input(gpio); 1518 err = gpiod_direction_input(desc);
1423 else 1519 else
1424 err = gpio_direction_output(gpio, 1520 err = gpiod_direction_output(desc,
1425 (flags & GPIOF_INIT_HIGH) ? 1 : 0); 1521 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
1426 1522
1427 if (err) 1523 if (err)
1428 goto free_gpio; 1524 goto free_gpio;
1429 1525
1430 if (flags & GPIOF_EXPORT) { 1526 if (flags & GPIOF_EXPORT) {
1431 err = gpio_export(gpio, flags & GPIOF_EXPORT_CHANGEABLE); 1527 err = gpiod_export(desc, flags & GPIOF_EXPORT_CHANGEABLE);
1432 if (err) 1528 if (err)
1433 goto free_gpio; 1529 goto free_gpio;
1434 } 1530 }
@@ -1436,7 +1532,7 @@ int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
1436 return 0; 1532 return 0;
1437 1533
1438 free_gpio: 1534 free_gpio:
1439 gpio_free(gpio); 1535 gpiod_free(desc);
1440 return err; 1536 return err;
1441} 1537}
1442EXPORT_SYMBOL_GPL(gpio_request_one); 1538EXPORT_SYMBOL_GPL(gpio_request_one);
@@ -1491,14 +1587,17 @@ EXPORT_SYMBOL_GPL(gpio_free_array);
1491 */ 1587 */
1492const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) 1588const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
1493{ 1589{
1494 unsigned gpio = chip->base + offset; 1590 struct gpio_desc *desc;
1495 1591
1496 if (!gpio_is_valid(gpio) || gpio_desc[gpio].chip != chip) 1592 if (!GPIO_OFFSET_VALID(chip, offset))
1497 return NULL; 1593 return NULL;
1498 if (test_bit(FLAG_REQUESTED, &gpio_desc[gpio].flags) == 0) 1594
1595 desc = &chip->desc[offset];
1596
1597 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
1499 return NULL; 1598 return NULL;
1500#ifdef CONFIG_DEBUG_FS 1599#ifdef CONFIG_DEBUG_FS
1501 return gpio_desc[gpio].label; 1600 return desc->label;
1502#else 1601#else
1503 return "?"; 1602 return "?";
1504#endif 1603#endif
@@ -1515,24 +1614,21 @@ EXPORT_SYMBOL_GPL(gpiochip_is_requested);
1515 * rely on gpio_request() having been called beforehand. 1614 * rely on gpio_request() having been called beforehand.
1516 */ 1615 */
1517 1616
1518int gpio_direction_input(unsigned gpio) 1617static int gpiod_direction_input(struct gpio_desc *desc)
1519{ 1618{
1520 unsigned long flags; 1619 unsigned long flags;
1521 struct gpio_chip *chip; 1620 struct gpio_chip *chip;
1522 struct gpio_desc *desc = &gpio_desc[gpio];
1523 int status = -EINVAL; 1621 int status = -EINVAL;
1622 int offset;
1524 1623
1525 spin_lock_irqsave(&gpio_lock, flags); 1624 spin_lock_irqsave(&gpio_lock, flags);
1526 1625
1527 if (!gpio_is_valid(gpio)) 1626 if (!desc)
1528 goto fail; 1627 goto fail;
1529 chip = desc->chip; 1628 chip = desc->chip;
1530 if (!chip || !chip->get || !chip->direction_input) 1629 if (!chip || !chip->get || !chip->direction_input)
1531 goto fail; 1630 goto fail;
1532 gpio -= chip->base; 1631 status = gpio_ensure_requested(desc);
1533 if (gpio >= chip->ngpio)
1534 goto fail;
1535 status = gpio_ensure_requested(desc, gpio);
1536 if (status < 0) 1632 if (status < 0)
1537 goto fail; 1633 goto fail;
1538 1634
@@ -1542,11 +1638,12 @@ int gpio_direction_input(unsigned gpio)
1542 1638
1543 might_sleep_if(chip->can_sleep); 1639 might_sleep_if(chip->can_sleep);
1544 1640
1641 offset = gpio_chip_hwgpio(desc);
1545 if (status) { 1642 if (status) {
1546 status = chip->request(chip, gpio); 1643 status = chip->request(chip, offset);
1547 if (status < 0) { 1644 if (status < 0) {
1548 pr_debug("GPIO-%d: chip request fail, %d\n", 1645 pr_debug("GPIO-%d: chip request fail, %d\n",
1549 chip->base + gpio, status); 1646 desc_to_gpio(desc), status);
1550 /* and it's not available to anyone else ... 1647 /* and it's not available to anyone else ...
1551 * gpio_request() is the fully clean solution. 1648 * gpio_request() is the fully clean solution.
1552 */ 1649 */
@@ -1554,48 +1651,54 @@ int gpio_direction_input(unsigned gpio)
1554 } 1651 }
1555 } 1652 }
1556 1653
1557 status = chip->direction_input(chip, gpio); 1654 status = chip->direction_input(chip, offset);
1558 if (status == 0) 1655 if (status == 0)
1559 clear_bit(FLAG_IS_OUT, &desc->flags); 1656 clear_bit(FLAG_IS_OUT, &desc->flags);
1560 1657
1561 trace_gpio_direction(chip->base + gpio, 1, status); 1658 trace_gpio_direction(desc_to_gpio(desc), 1, status);
1562lose: 1659lose:
1563 return status; 1660 return status;
1564fail: 1661fail:
1565 spin_unlock_irqrestore(&gpio_lock, flags); 1662 spin_unlock_irqrestore(&gpio_lock, flags);
1566 if (status) 1663 if (status) {
1664 int gpio = -1;
1665 if (desc)
1666 gpio = desc_to_gpio(desc);
1567 pr_debug("%s: gpio-%d status %d\n", 1667 pr_debug("%s: gpio-%d status %d\n",
1568 __func__, gpio, status); 1668 __func__, gpio, status);
1669 }
1569 return status; 1670 return status;
1570} 1671}
1672
1673int gpio_direction_input(unsigned gpio)
1674{
1675 return gpiod_direction_input(gpio_to_desc(gpio));
1676}
1571EXPORT_SYMBOL_GPL(gpio_direction_input); 1677EXPORT_SYMBOL_GPL(gpio_direction_input);
1572 1678
1573int gpio_direction_output(unsigned gpio, int value) 1679static int gpiod_direction_output(struct gpio_desc *desc, int value)
1574{ 1680{
1575 unsigned long flags; 1681 unsigned long flags;
1576 struct gpio_chip *chip; 1682 struct gpio_chip *chip;
1577 struct gpio_desc *desc = &gpio_desc[gpio];
1578 int status = -EINVAL; 1683 int status = -EINVAL;
1684 int offset;
1579 1685
1580 /* Open drain pin should not be driven to 1 */ 1686 /* Open drain pin should not be driven to 1 */
1581 if (value && test_bit(FLAG_OPEN_DRAIN, &desc->flags)) 1687 if (value && test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1582 return gpio_direction_input(gpio); 1688 return gpiod_direction_input(desc);
1583 1689
1584 /* Open source pin should not be driven to 0 */ 1690 /* Open source pin should not be driven to 0 */
1585 if (!value && test_bit(FLAG_OPEN_SOURCE, &desc->flags)) 1691 if (!value && test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1586 return gpio_direction_input(gpio); 1692 return gpiod_direction_input(desc);
1587 1693
1588 spin_lock_irqsave(&gpio_lock, flags); 1694 spin_lock_irqsave(&gpio_lock, flags);
1589 1695
1590 if (!gpio_is_valid(gpio)) 1696 if (!desc)
1591 goto fail; 1697 goto fail;
1592 chip = desc->chip; 1698 chip = desc->chip;
1593 if (!chip || !chip->set || !chip->direction_output) 1699 if (!chip || !chip->set || !chip->direction_output)
1594 goto fail; 1700 goto fail;
1595 gpio -= chip->base; 1701 status = gpio_ensure_requested(desc);
1596 if (gpio >= chip->ngpio)
1597 goto fail;
1598 status = gpio_ensure_requested(desc, gpio);
1599 if (status < 0) 1702 if (status < 0)
1600 goto fail; 1703 goto fail;
1601 1704
@@ -1605,11 +1708,12 @@ int gpio_direction_output(unsigned gpio, int value)
1605 1708
1606 might_sleep_if(chip->can_sleep); 1709 might_sleep_if(chip->can_sleep);
1607 1710
1711 offset = gpio_chip_hwgpio(desc);
1608 if (status) { 1712 if (status) {
1609 status = chip->request(chip, gpio); 1713 status = chip->request(chip, offset);
1610 if (status < 0) { 1714 if (status < 0) {
1611 pr_debug("GPIO-%d: chip request fail, %d\n", 1715 pr_debug("GPIO-%d: chip request fail, %d\n",
1612 chip->base + gpio, status); 1716 desc_to_gpio(desc), status);
1613 /* and it's not available to anyone else ... 1717 /* and it's not available to anyone else ...
1614 * gpio_request() is the fully clean solution. 1718 * gpio_request() is the fully clean solution.
1615 */ 1719 */
@@ -1617,20 +1721,29 @@ int gpio_direction_output(unsigned gpio, int value)
1617 } 1721 }
1618 } 1722 }
1619 1723
1620 status = chip->direction_output(chip, gpio, value); 1724 status = chip->direction_output(chip, offset, value);
1621 if (status == 0) 1725 if (status == 0)
1622 set_bit(FLAG_IS_OUT, &desc->flags); 1726 set_bit(FLAG_IS_OUT, &desc->flags);
1623 trace_gpio_value(chip->base + gpio, 0, value); 1727 trace_gpio_value(desc_to_gpio(desc), 0, value);
1624 trace_gpio_direction(chip->base + gpio, 0, status); 1728 trace_gpio_direction(desc_to_gpio(desc), 0, status);
1625lose: 1729lose:
1626 return status; 1730 return status;
1627fail: 1731fail:
1628 spin_unlock_irqrestore(&gpio_lock, flags); 1732 spin_unlock_irqrestore(&gpio_lock, flags);
1629 if (status) 1733 if (status) {
1734 int gpio = -1;
1735 if (desc)
1736 gpio = desc_to_gpio(desc);
1630 pr_debug("%s: gpio-%d status %d\n", 1737 pr_debug("%s: gpio-%d status %d\n",
1631 __func__, gpio, status); 1738 __func__, gpio, status);
1739 }
1632 return status; 1740 return status;
1633} 1741}
1742
1743int gpio_direction_output(unsigned gpio, int value)
1744{
1745 return gpiod_direction_output(gpio_to_desc(gpio), value);
1746}
1634EXPORT_SYMBOL_GPL(gpio_direction_output); 1747EXPORT_SYMBOL_GPL(gpio_direction_output);
1635 1748
1636/** 1749/**
@@ -1638,24 +1751,22 @@ EXPORT_SYMBOL_GPL(gpio_direction_output);
1638 * @gpio: the gpio to set debounce time 1751 * @gpio: the gpio to set debounce time
1639 * @debounce: debounce time is microseconds 1752 * @debounce: debounce time is microseconds
1640 */ 1753 */
1641int gpio_set_debounce(unsigned gpio, unsigned debounce) 1754static int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
1642{ 1755{
1643 unsigned long flags; 1756 unsigned long flags;
1644 struct gpio_chip *chip; 1757 struct gpio_chip *chip;
1645 struct gpio_desc *desc = &gpio_desc[gpio];
1646 int status = -EINVAL; 1758 int status = -EINVAL;
1759 int offset;
1647 1760
1648 spin_lock_irqsave(&gpio_lock, flags); 1761 spin_lock_irqsave(&gpio_lock, flags);
1649 1762
1650 if (!gpio_is_valid(gpio)) 1763 if (!desc)
1651 goto fail; 1764 goto fail;
1652 chip = desc->chip; 1765 chip = desc->chip;
1653 if (!chip || !chip->set || !chip->set_debounce) 1766 if (!chip || !chip->set || !chip->set_debounce)
1654 goto fail; 1767 goto fail;
1655 gpio -= chip->base; 1768
1656 if (gpio >= chip->ngpio) 1769 status = gpio_ensure_requested(desc);
1657 goto fail;
1658 status = gpio_ensure_requested(desc, gpio);
1659 if (status < 0) 1770 if (status < 0)
1660 goto fail; 1771 goto fail;
1661 1772
@@ -1665,16 +1776,26 @@ int gpio_set_debounce(unsigned gpio, unsigned debounce)
1665 1776
1666 might_sleep_if(chip->can_sleep); 1777 might_sleep_if(chip->can_sleep);
1667 1778
1668 return chip->set_debounce(chip, gpio, debounce); 1779 offset = gpio_chip_hwgpio(desc);
1780 return chip->set_debounce(chip, offset, debounce);
1669 1781
1670fail: 1782fail:
1671 spin_unlock_irqrestore(&gpio_lock, flags); 1783 spin_unlock_irqrestore(&gpio_lock, flags);
1672 if (status) 1784 if (status) {
1785 int gpio = -1;
1786 if (desc)
1787 gpio = desc_to_gpio(desc);
1673 pr_debug("%s: gpio-%d status %d\n", 1788 pr_debug("%s: gpio-%d status %d\n",
1674 __func__, gpio, status); 1789 __func__, gpio, status);
1790 }
1675 1791
1676 return status; 1792 return status;
1677} 1793}
1794
1795int gpio_set_debounce(unsigned gpio, unsigned debounce)
1796{
1797 return gpiod_set_debounce(gpio_to_desc(gpio), debounce);
1798}
1678EXPORT_SYMBOL_GPL(gpio_set_debounce); 1799EXPORT_SYMBOL_GPL(gpio_set_debounce);
1679 1800
1680/* I/O calls are only valid after configuration completed; the relevant 1801/* I/O calls are only valid after configuration completed; the relevant
@@ -1708,18 +1829,25 @@ EXPORT_SYMBOL_GPL(gpio_set_debounce);
1708 * It returns the zero or nonzero value provided by the associated 1829 * It returns the zero or nonzero value provided by the associated
1709 * gpio_chip.get() method; or zero if no such method is provided. 1830 * gpio_chip.get() method; or zero if no such method is provided.
1710 */ 1831 */
1711int __gpio_get_value(unsigned gpio) 1832static int gpiod_get_value(struct gpio_desc *desc)
1712{ 1833{
1713 struct gpio_chip *chip; 1834 struct gpio_chip *chip;
1714 int value; 1835 int value;
1836 int offset;
1715 1837
1716 chip = gpio_to_chip(gpio); 1838 chip = desc->chip;
1839 offset = gpio_chip_hwgpio(desc);
1717 /* Should be using gpio_get_value_cansleep() */ 1840 /* Should be using gpio_get_value_cansleep() */
1718 WARN_ON(chip->can_sleep); 1841 WARN_ON(chip->can_sleep);
1719 value = chip->get ? chip->get(chip, gpio - chip->base) : 0; 1842 value = chip->get ? chip->get(chip, offset) : 0;
1720 trace_gpio_value(gpio, 1, value); 1843 trace_gpio_value(desc_to_gpio(desc), 1, value);
1721 return value; 1844 return value;
1722} 1845}
1846
1847int __gpio_get_value(unsigned gpio)
1848{
1849 return gpiod_get_value(gpio_to_desc(gpio));
1850}
1723EXPORT_SYMBOL_GPL(__gpio_get_value); 1851EXPORT_SYMBOL_GPL(__gpio_get_value);
1724 1852
1725/* 1853/*
@@ -1728,23 +1856,25 @@ EXPORT_SYMBOL_GPL(__gpio_get_value);
1728 * @chip: Gpio chip. 1856 * @chip: Gpio chip.
1729 * @value: Non-zero for setting it HIGH otherise it will set to LOW. 1857 * @value: Non-zero for setting it HIGH otherise it will set to LOW.
1730 */ 1858 */
1731static void _gpio_set_open_drain_value(unsigned gpio, 1859static void _gpio_set_open_drain_value(struct gpio_desc *desc, int value)
1732 struct gpio_chip *chip, int value)
1733{ 1860{
1734 int err = 0; 1861 int err = 0;
1862 struct gpio_chip *chip = desc->chip;
1863 int offset = gpio_chip_hwgpio(desc);
1864
1735 if (value) { 1865 if (value) {
1736 err = chip->direction_input(chip, gpio - chip->base); 1866 err = chip->direction_input(chip, offset);
1737 if (!err) 1867 if (!err)
1738 clear_bit(FLAG_IS_OUT, &gpio_desc[gpio].flags); 1868 clear_bit(FLAG_IS_OUT, &desc->flags);
1739 } else { 1869 } else {
1740 err = chip->direction_output(chip, gpio - chip->base, 0); 1870 err = chip->direction_output(chip, offset, 0);
1741 if (!err) 1871 if (!err)
1742 set_bit(FLAG_IS_OUT, &gpio_desc[gpio].flags); 1872 set_bit(FLAG_IS_OUT, &desc->flags);
1743 } 1873 }
1744 trace_gpio_direction(gpio, value, err); 1874 trace_gpio_direction(desc_to_gpio(desc), value, err);
1745 if (err < 0) 1875 if (err < 0)
1746 pr_err("%s: Error in set_value for open drain gpio%d err %d\n", 1876 pr_err("%s: Error in set_value for open drain gpio%d err %d\n",
1747 __func__, gpio, err); 1877 __func__, desc_to_gpio(desc), err);
1748} 1878}
1749 1879
1750/* 1880/*
@@ -1753,26 +1883,27 @@ static void _gpio_set_open_drain_value(unsigned gpio,
1753 * @chip: Gpio chip. 1883 * @chip: Gpio chip.
1754 * @value: Non-zero for setting it HIGH otherise it will set to LOW. 1884 * @value: Non-zero for setting it HIGH otherise it will set to LOW.
1755 */ 1885 */
1756static void _gpio_set_open_source_value(unsigned gpio, 1886static void _gpio_set_open_source_value(struct gpio_desc *desc, int value)
1757 struct gpio_chip *chip, int value)
1758{ 1887{
1759 int err = 0; 1888 int err = 0;
1889 struct gpio_chip *chip = desc->chip;
1890 int offset = gpio_chip_hwgpio(desc);
1891
1760 if (value) { 1892 if (value) {
1761 err = chip->direction_output(chip, gpio - chip->base, 1); 1893 err = chip->direction_output(chip, offset, 1);
1762 if (!err) 1894 if (!err)
1763 set_bit(FLAG_IS_OUT, &gpio_desc[gpio].flags); 1895 set_bit(FLAG_IS_OUT, &desc->flags);
1764 } else { 1896 } else {
1765 err = chip->direction_input(chip, gpio - chip->base); 1897 err = chip->direction_input(chip, offset);
1766 if (!err) 1898 if (!err)
1767 clear_bit(FLAG_IS_OUT, &gpio_desc[gpio].flags); 1899 clear_bit(FLAG_IS_OUT, &desc->flags);
1768 } 1900 }
1769 trace_gpio_direction(gpio, !value, err); 1901 trace_gpio_direction(desc_to_gpio(desc), !value, err);
1770 if (err < 0) 1902 if (err < 0)
1771 pr_err("%s: Error in set_value for open source gpio%d err %d\n", 1903 pr_err("%s: Error in set_value for open source gpio%d err %d\n",
1772 __func__, gpio, err); 1904 __func__, desc_to_gpio(desc), err);
1773} 1905}
1774 1906
1775
1776/** 1907/**
1777 * __gpio_set_value() - assign a gpio's value 1908 * __gpio_set_value() - assign a gpio's value
1778 * @gpio: gpio whose value will be assigned 1909 * @gpio: gpio whose value will be assigned
@@ -1782,20 +1913,25 @@ static void _gpio_set_open_source_value(unsigned gpio,
1782 * This is used directly or indirectly to implement gpio_set_value(). 1913 * This is used directly or indirectly to implement gpio_set_value().
1783 * It invokes the associated gpio_chip.set() method. 1914 * It invokes the associated gpio_chip.set() method.
1784 */ 1915 */
1785void __gpio_set_value(unsigned gpio, int value) 1916static void gpiod_set_value(struct gpio_desc *desc, int value)
1786{ 1917{
1787 struct gpio_chip *chip; 1918 struct gpio_chip *chip;
1788 1919
1789 chip = gpio_to_chip(gpio); 1920 chip = desc->chip;
1790 /* Should be using gpio_set_value_cansleep() */ 1921 /* Should be using gpio_set_value_cansleep() */
1791 WARN_ON(chip->can_sleep); 1922 WARN_ON(chip->can_sleep);
1792 trace_gpio_value(gpio, 0, value); 1923 trace_gpio_value(desc_to_gpio(desc), 0, value);
1793 if (test_bit(FLAG_OPEN_DRAIN, &gpio_desc[gpio].flags)) 1924 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1794 _gpio_set_open_drain_value(gpio, chip, value); 1925 _gpio_set_open_drain_value(desc, value);
1795 else if (test_bit(FLAG_OPEN_SOURCE, &gpio_desc[gpio].flags)) 1926 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1796 _gpio_set_open_source_value(gpio, chip, value); 1927 _gpio_set_open_source_value(desc, value);
1797 else 1928 else
1798 chip->set(chip, gpio - chip->base, value); 1929 chip->set(chip, gpio_chip_hwgpio(desc), value);
1930}
1931
1932void __gpio_set_value(unsigned gpio, int value)
1933{
1934 return gpiod_set_value(gpio_to_desc(gpio), value);
1799} 1935}
1800EXPORT_SYMBOL_GPL(__gpio_set_value); 1936EXPORT_SYMBOL_GPL(__gpio_set_value);
1801 1937
@@ -1807,14 +1943,15 @@ EXPORT_SYMBOL_GPL(__gpio_set_value);
1807 * This is used directly or indirectly to implement gpio_cansleep(). It 1943 * This is used directly or indirectly to implement gpio_cansleep(). It
1808 * returns nonzero if access reading or writing the GPIO value can sleep. 1944 * returns nonzero if access reading or writing the GPIO value can sleep.
1809 */ 1945 */
1810int __gpio_cansleep(unsigned gpio) 1946static int gpiod_cansleep(struct gpio_desc *desc)
1811{ 1947{
1812 struct gpio_chip *chip;
1813
1814 /* only call this on GPIOs that are valid! */ 1948 /* only call this on GPIOs that are valid! */
1815 chip = gpio_to_chip(gpio); 1949 return desc->chip->can_sleep;
1950}
1816 1951
1817 return chip->can_sleep; 1952int __gpio_cansleep(unsigned gpio)
1953{
1954 return gpiod_cansleep(gpio_to_desc(gpio));
1818} 1955}
1819EXPORT_SYMBOL_GPL(__gpio_cansleep); 1956EXPORT_SYMBOL_GPL(__gpio_cansleep);
1820 1957
@@ -1827,50 +1964,67 @@ EXPORT_SYMBOL_GPL(__gpio_cansleep);
1827 * It returns the number of the IRQ signaled by this (input) GPIO, 1964 * It returns the number of the IRQ signaled by this (input) GPIO,
1828 * or a negative errno. 1965 * or a negative errno.
1829 */ 1966 */
1830int __gpio_to_irq(unsigned gpio) 1967static int gpiod_to_irq(struct gpio_desc *desc)
1831{ 1968{
1832 struct gpio_chip *chip; 1969 struct gpio_chip *chip;
1970 int offset;
1833 1971
1834 chip = gpio_to_chip(gpio); 1972 chip = desc->chip;
1835 return chip->to_irq ? chip->to_irq(chip, gpio - chip->base) : -ENXIO; 1973 offset = gpio_chip_hwgpio(desc);
1974 return chip->to_irq ? chip->to_irq(chip, offset) : -ENXIO;
1836} 1975}
1837EXPORT_SYMBOL_GPL(__gpio_to_irq);
1838 1976
1977int __gpio_to_irq(unsigned gpio)
1978{
1979 return gpiod_to_irq(gpio_to_desc(gpio));
1980}
1981EXPORT_SYMBOL_GPL(__gpio_to_irq);
1839 1982
1840 1983
1841/* There's no value in making it easy to inline GPIO calls that may sleep. 1984/* There's no value in making it easy to inline GPIO calls that may sleep.
1842 * Common examples include ones connected to I2C or SPI chips. 1985 * Common examples include ones connected to I2C or SPI chips.
1843 */ 1986 */
1844 1987
1845int gpio_get_value_cansleep(unsigned gpio) 1988static int gpiod_get_value_cansleep(struct gpio_desc *desc)
1846{ 1989{
1847 struct gpio_chip *chip; 1990 struct gpio_chip *chip;
1848 int value; 1991 int value;
1992 int offset;
1849 1993
1850 might_sleep_if(extra_checks); 1994 might_sleep_if(extra_checks);
1851 chip = gpio_to_chip(gpio); 1995 chip = desc->chip;
1852 value = chip->get ? chip->get(chip, gpio - chip->base) : 0; 1996 offset = gpio_chip_hwgpio(desc);
1853 trace_gpio_value(gpio, 1, value); 1997 value = chip->get ? chip->get(chip, offset) : 0;
1998 trace_gpio_value(desc_to_gpio(desc), 1, value);
1854 return value; 1999 return value;
1855} 2000}
2001
2002int gpio_get_value_cansleep(unsigned gpio)
2003{
2004 return gpiod_get_value_cansleep(gpio_to_desc(gpio));
2005}
1856EXPORT_SYMBOL_GPL(gpio_get_value_cansleep); 2006EXPORT_SYMBOL_GPL(gpio_get_value_cansleep);
1857 2007
1858void gpio_set_value_cansleep(unsigned gpio, int value) 2008static void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
1859{ 2009{
1860 struct gpio_chip *chip; 2010 struct gpio_chip *chip;
1861 2011
1862 might_sleep_if(extra_checks); 2012 might_sleep_if(extra_checks);
1863 chip = gpio_to_chip(gpio); 2013 chip = desc->chip;
1864 trace_gpio_value(gpio, 0, value); 2014 trace_gpio_value(desc_to_gpio(desc), 0, value);
1865 if (test_bit(FLAG_OPEN_DRAIN, &gpio_desc[gpio].flags)) 2015 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1866 _gpio_set_open_drain_value(gpio, chip, value); 2016 _gpio_set_open_drain_value(desc, value);
1867 else if (test_bit(FLAG_OPEN_SOURCE, &gpio_desc[gpio].flags)) 2017 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1868 _gpio_set_open_source_value(gpio, chip, value); 2018 _gpio_set_open_source_value(desc, value);
1869 else 2019 else
1870 chip->set(chip, gpio - chip->base, value); 2020 chip->set(chip, gpio_chip_hwgpio(desc), value);
1871} 2021}
1872EXPORT_SYMBOL_GPL(gpio_set_value_cansleep);
1873 2022
2023void gpio_set_value_cansleep(unsigned gpio, int value)
2024{
2025 return gpiod_set_value_cansleep(gpio_to_desc(gpio), value);
2026}
2027EXPORT_SYMBOL_GPL(gpio_set_value_cansleep);
1874 2028
1875#ifdef CONFIG_DEBUG_FS 2029#ifdef CONFIG_DEBUG_FS
1876 2030
@@ -1878,14 +2032,14 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
1878{ 2032{
1879 unsigned i; 2033 unsigned i;
1880 unsigned gpio = chip->base; 2034 unsigned gpio = chip->base;
1881 struct gpio_desc *gdesc = &gpio_desc[gpio]; 2035 struct gpio_desc *gdesc = &chip->desc[0];
1882 int is_out; 2036 int is_out;
1883 2037
1884 for (i = 0; i < chip->ngpio; i++, gpio++, gdesc++) { 2038 for (i = 0; i < chip->ngpio; i++, gpio++, gdesc++) {
1885 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) 2039 if (!test_bit(FLAG_REQUESTED, &gdesc->flags))
1886 continue; 2040 continue;
1887 2041
1888 gpio_get_direction(gpio); 2042 gpiod_get_direction(gdesc);
1889 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); 2043 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
1890 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s", 2044 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s",
1891 gpio, gdesc->label, 2045 gpio, gdesc->label,
@@ -1899,46 +2053,35 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
1899 2053
1900static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) 2054static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
1901{ 2055{
2056 unsigned long flags;
1902 struct gpio_chip *chip = NULL; 2057 struct gpio_chip *chip = NULL;
1903 unsigned int gpio; 2058 loff_t index = *pos;
1904 void *ret = NULL;
1905 loff_t index = 0;
1906
1907 /* REVISIT this isn't locked against gpio_chip removal ... */
1908 2059
1909 for (gpio = 0; gpio_is_valid(gpio); gpio++) { 2060 s->private = "";
1910 if (gpio_desc[gpio].chip == chip)
1911 continue;
1912
1913 chip = gpio_desc[gpio].chip;
1914 if (!chip)
1915 continue;
1916 2061
1917 if (index++ >= *pos) { 2062 spin_lock_irqsave(&gpio_lock, flags);
1918 ret = chip; 2063 list_for_each_entry(chip, &gpio_chips, list)
1919 break; 2064 if (index-- == 0) {
2065 spin_unlock_irqrestore(&gpio_lock, flags);
2066 return chip;
1920 } 2067 }
1921 } 2068 spin_unlock_irqrestore(&gpio_lock, flags);
1922
1923 s->private = "";
1924 2069
1925 return ret; 2070 return NULL;
1926} 2071}
1927 2072
1928static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) 2073static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
1929{ 2074{
2075 unsigned long flags;
1930 struct gpio_chip *chip = v; 2076 struct gpio_chip *chip = v;
1931 unsigned int gpio;
1932 void *ret = NULL; 2077 void *ret = NULL;
1933 2078
1934 /* skip GPIOs provided by the current chip */ 2079 spin_lock_irqsave(&gpio_lock, flags);
1935 for (gpio = chip->base + chip->ngpio; gpio_is_valid(gpio); gpio++) { 2080 if (list_is_last(&chip->list, &gpio_chips))
1936 chip = gpio_desc[gpio].chip; 2081 ret = NULL;
1937 if (chip) { 2082 else
1938 ret = chip; 2083 ret = list_entry(chip->list.next, struct gpio_chip, list);
1939 break; 2084 spin_unlock_irqrestore(&gpio_lock, flags);
1940 }
1941 }
1942 2085
1943 s->private = "\n"; 2086 s->private = "\n";
1944 ++*pos; 2087 ++*pos;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-16 19:32:19 -0400