aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorTejun Heo <htejun@gmail.com>2008-05-19 13:17:51 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-07-14 15:59:32 -0400
commit341c2c958ec7bdd9f54733a8b0b432fe76842a82 (patch)
tree1af1983fe82ad032de6142229fe6c70f04466918 /drivers
parentbce7f793daec3e65ec5c5705d2457b81fe7b5725 (diff)
libata: consistently use msecs for time durations
libata has been using mix of jiffies and msecs for time druations. This is getting confusing. As writing sub HZ values in jiffies is PITA and msecs_to_jiffies() can't be used as initializer, unify unit for all time durations to msecs. So, durations are in msecs and deadlines are in jiffies. ata_deadline() is added to compute deadline from a start time and duration in msecs. While at it, drop now superflous _msec suffix from arguments and rename @timeout to @deadline if it represents a fixed point in time rather than duration. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/libata-core.c44
-rw-r--r--drivers/ata/libata-eh.c33
-rw-r--r--drivers/ata/libata-pmp.c3
-rw-r--r--drivers/ata/libata-sff.c15
-rw-r--r--drivers/ata/pata_bf54x.c6
-rw-r--r--drivers/ata/pata_scc.c2
6 files changed, 52 insertions, 51 deletions
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 303fc0d2b978..c5c3b1b516e1 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -54,7 +54,6 @@
54#include <linux/completion.h> 54#include <linux/completion.h>
55#include <linux/suspend.h> 55#include <linux/suspend.h>
56#include <linux/workqueue.h> 56#include <linux/workqueue.h>
57#include <linux/jiffies.h>
58#include <linux/scatterlist.h> 57#include <linux/scatterlist.h>
59#include <linux/io.h> 58#include <linux/io.h>
60#include <scsi/scsi.h> 59#include <scsi/scsi.h>
@@ -145,7 +144,7 @@ static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CF
145module_param_named(dma, libata_dma_mask, int, 0444); 144module_param_named(dma, libata_dma_mask, int, 0444);
146MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); 145MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
147 146
148static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 147static int ata_probe_timeout = ATA_TMOUT_INTERNAL / 1000;
149module_param(ata_probe_timeout, int, 0444); 148module_param(ata_probe_timeout, int, 0444);
150MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 149MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
151 150
@@ -1533,7 +1532,7 @@ unsigned long ata_id_xfermask(const u16 *id)
1533 * @ap: The ata_port to queue port_task for 1532 * @ap: The ata_port to queue port_task for
1534 * @fn: workqueue function to be scheduled 1533 * @fn: workqueue function to be scheduled
1535 * @data: data for @fn to use 1534 * @data: data for @fn to use
1536 * @delay: delay time for workqueue function 1535 * @delay: delay time in msecs for workqueue function
1537 * 1536 *
1538 * Schedule @fn(@data) for execution after @delay jiffies using 1537 * Schedule @fn(@data) for execution after @delay jiffies using
1539 * port_task. There is one port_task per port and it's the 1538 * port_task. There is one port_task per port and it's the
@@ -1552,7 +1551,7 @@ void ata_pio_queue_task(struct ata_port *ap, void *data, unsigned long delay)
1552 ap->port_task_data = data; 1551 ap->port_task_data = data;
1553 1552
1554 /* may fail if ata_port_flush_task() in progress */ 1553 /* may fail if ata_port_flush_task() in progress */
1555 queue_delayed_work(ata_wq, &ap->port_task, delay); 1554 queue_delayed_work(ata_wq, &ap->port_task, msecs_to_jiffies(delay));
1556} 1555}
1557 1556
1558/** 1557/**
@@ -1685,7 +1684,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
1685 spin_unlock_irqrestore(ap->lock, flags); 1684 spin_unlock_irqrestore(ap->lock, flags);
1686 1685
1687 if (!timeout) 1686 if (!timeout)
1688 timeout = ata_probe_timeout * 1000 / HZ; 1687 timeout = ata_probe_timeout * 1000;
1689 1688
1690 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); 1689 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
1691 1690
@@ -3319,7 +3318,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3319 int (*check_ready)(struct ata_link *link)) 3318 int (*check_ready)(struct ata_link *link))
3320{ 3319{
3321 unsigned long start = jiffies; 3320 unsigned long start = jiffies;
3322 unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT; 3321 unsigned long nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3323 int warned = 0; 3322 int warned = 0;
3324 3323
3325 if (time_after(nodev_deadline, deadline)) 3324 if (time_after(nodev_deadline, deadline))
@@ -3387,7 +3386,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3387int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, 3386int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
3388 int (*check_ready)(struct ata_link *link)) 3387 int (*check_ready)(struct ata_link *link))
3389{ 3388{
3390 msleep(ATA_WAIT_AFTER_RESET_MSECS); 3389 msleep(ATA_WAIT_AFTER_RESET);
3391 3390
3392 return ata_wait_ready(link, deadline, check_ready); 3391 return ata_wait_ready(link, deadline, check_ready);
3393} 3392}
@@ -3417,13 +3416,13 @@ int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
3417int sata_link_debounce(struct ata_link *link, const unsigned long *params, 3416int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3418 unsigned long deadline) 3417 unsigned long deadline)
3419{ 3418{
3420 unsigned long interval_msec = params[0]; 3419 unsigned long interval = params[0];
3421 unsigned long duration = msecs_to_jiffies(params[1]); 3420 unsigned long duration = params[1];
3422 unsigned long last_jiffies, t; 3421 unsigned long last_jiffies, t;
3423 u32 last, cur; 3422 u32 last, cur;
3424 int rc; 3423 int rc;
3425 3424
3426 t = jiffies + msecs_to_jiffies(params[2]); 3425 t = ata_deadline(jiffies, params[2]);
3427 if (time_before(t, deadline)) 3426 if (time_before(t, deadline))
3428 deadline = t; 3427 deadline = t;
3429 3428
@@ -3435,7 +3434,7 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3435 last_jiffies = jiffies; 3434 last_jiffies = jiffies;
3436 3435
3437 while (1) { 3436 while (1) {
3438 msleep(interval_msec); 3437 msleep(interval);
3439 if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) 3438 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3440 return rc; 3439 return rc;
3441 cur &= 0xf; 3440 cur &= 0xf;
@@ -3444,7 +3443,8 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3444 if (cur == last) { 3443 if (cur == last) {
3445 if (cur == 1 && time_before(jiffies, deadline)) 3444 if (cur == 1 && time_before(jiffies, deadline))
3446 continue; 3445 continue;
3447 if (time_after(jiffies, last_jiffies + duration)) 3446 if (time_after(jiffies,
3447 ata_deadline(last_jiffies, duration)))
3448 return 0; 3448 return 0;
3449 continue; 3449 continue;
3450 } 3450 }
@@ -3636,7 +3636,8 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3636 if (check_ready) { 3636 if (check_ready) {
3637 unsigned long pmp_deadline; 3637 unsigned long pmp_deadline;
3638 3638
3639 pmp_deadline = jiffies + ATA_TMOUT_PMP_SRST_WAIT; 3639 pmp_deadline = ata_deadline(jiffies,
3640 ATA_TMOUT_PMP_SRST_WAIT);
3640 if (time_after(pmp_deadline, deadline)) 3641 if (time_after(pmp_deadline, deadline))
3641 pmp_deadline = deadline; 3642 pmp_deadline = deadline;
3642 ata_wait_ready(link, pmp_deadline, check_ready); 3643 ata_wait_ready(link, pmp_deadline, check_ready);
@@ -6073,8 +6074,6 @@ static void __init ata_parse_force_param(void)
6073 6074
6074static int __init ata_init(void) 6075static int __init ata_init(void)
6075{ 6076{
6076 ata_probe_timeout *= HZ;
6077
6078 ata_parse_force_param(); 6077 ata_parse_force_param();
6079 6078
6080 ata_wq = create_workqueue("ata"); 6079 ata_wq = create_workqueue("ata");
@@ -6127,8 +6126,8 @@ int ata_ratelimit(void)
6127 * @reg: IO-mapped register 6126 * @reg: IO-mapped register
6128 * @mask: Mask to apply to read register value 6127 * @mask: Mask to apply to read register value
6129 * @val: Wait condition 6128 * @val: Wait condition
6130 * @interval_msec: polling interval in milliseconds 6129 * @interval: polling interval in milliseconds
6131 * @timeout_msec: timeout in milliseconds 6130 * @timeout: timeout in milliseconds
6132 * 6131 *
6133 * Waiting for some bits of register to change is a common 6132 * Waiting for some bits of register to change is a common
6134 * operation for ATA controllers. This function reads 32bit LE 6133 * operation for ATA controllers. This function reads 32bit LE
@@ -6146,10 +6145,9 @@ int ata_ratelimit(void)
6146 * The final register value. 6145 * The final register value.
6147 */ 6146 */
6148u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, 6147u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6149 unsigned long interval_msec, 6148 unsigned long interval, unsigned long timeout)
6150 unsigned long timeout_msec)
6151{ 6149{
6152 unsigned long timeout; 6150 unsigned long deadline;
6153 u32 tmp; 6151 u32 tmp;
6154 6152
6155 tmp = ioread32(reg); 6153 tmp = ioread32(reg);
@@ -6158,10 +6156,10 @@ u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6158 * preceding writes reach the controller before starting to 6156 * preceding writes reach the controller before starting to
6159 * eat away the timeout. 6157 * eat away the timeout.
6160 */ 6158 */
6161 timeout = jiffies + (timeout_msec * HZ) / 1000; 6159 deadline = ata_deadline(jiffies, timeout);
6162 6160
6163 while ((tmp & mask) == val && time_before(jiffies, timeout)) { 6161 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
6164 msleep(interval_msec); 6162 msleep(interval);
6165 tmp = ioread32(reg); 6163 tmp = ioread32(reg);
6166 } 6164 }
6167 6165
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 7894d83ea1eb..08dd07f10008 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -66,15 +66,14 @@ enum {
66 ATA_ECAT_DUBIOUS_TOUT_HSM = 6, 66 ATA_ECAT_DUBIOUS_TOUT_HSM = 6,
67 ATA_ECAT_DUBIOUS_UNK_DEV = 7, 67 ATA_ECAT_DUBIOUS_UNK_DEV = 7,
68 ATA_ECAT_NR = 8, 68 ATA_ECAT_NR = 8,
69};
70 69
71/* Waiting in ->prereset can never be reliable. It's sometimes nice 70 /* Waiting in ->prereset can never be reliable. It's
72 * to wait there but it can't be depended upon; otherwise, we wouldn't 71 * sometimes nice to wait there but it can't be depended upon;
73 * be resetting. Just give it enough time for most drives to spin up. 72 * otherwise, we wouldn't be resetting. Just give it enough
74 */ 73 * time for most drives to spin up.
75enum { 74 */
76 ATA_EH_PRERESET_TIMEOUT = 10 * HZ, 75 ATA_EH_PRERESET_TIMEOUT = 10000,
77 ATA_EH_FASTDRAIN_INTERVAL = 3 * HZ, 76 ATA_EH_FASTDRAIN_INTERVAL = 3000,
78}; 77};
79 78
80/* The following table determines how we sequence resets. Each entry 79/* The following table determines how we sequence resets. Each entry
@@ -84,10 +83,10 @@ enum {
84 * are mostly for error handling, hotplug and retarded devices. 83 * are mostly for error handling, hotplug and retarded devices.
85 */ 84 */
86static const unsigned long ata_eh_reset_timeouts[] = { 85static const unsigned long ata_eh_reset_timeouts[] = {
87 10 * HZ, /* most drives spin up by 10sec */ 86 10000, /* most drives spin up by 10sec */
88 10 * HZ, /* > 99% working drives spin up before 20sec */ 87 10000, /* > 99% working drives spin up before 20sec */
89 35 * HZ, /* give > 30 secs of idleness for retarded devices */ 88 35000, /* give > 30 secs of idleness for retarded devices */
90 5 * HZ, /* and sweet one last chance */ 89 5000, /* and sweet one last chance */
91 /* > 1 min has elapsed, give up */ 90 /* > 1 min has elapsed, give up */
92}; 91};
93 92
@@ -641,7 +640,7 @@ void ata_eh_fastdrain_timerfn(unsigned long arg)
641 /* some qcs have finished, give it another chance */ 640 /* some qcs have finished, give it another chance */
642 ap->fastdrain_cnt = cnt; 641 ap->fastdrain_cnt = cnt;
643 ap->fastdrain_timer.expires = 642 ap->fastdrain_timer.expires =
644 jiffies + ATA_EH_FASTDRAIN_INTERVAL; 643 ata_deadline(jiffies, ATA_EH_FASTDRAIN_INTERVAL);
645 add_timer(&ap->fastdrain_timer); 644 add_timer(&ap->fastdrain_timer);
646 } 645 }
647 646
@@ -681,7 +680,8 @@ static void ata_eh_set_pending(struct ata_port *ap, int fastdrain)
681 680
682 /* activate fast drain */ 681 /* activate fast drain */
683 ap->fastdrain_cnt = cnt; 682 ap->fastdrain_cnt = cnt;
684 ap->fastdrain_timer.expires = jiffies + ATA_EH_FASTDRAIN_INTERVAL; 683 ap->fastdrain_timer.expires =
684 ata_deadline(jiffies, ATA_EH_FASTDRAIN_INTERVAL);
685 add_timer(&ap->fastdrain_timer); 685 add_timer(&ap->fastdrain_timer);
686} 686}
687 687
@@ -2125,7 +2125,8 @@ int ata_eh_reset(struct ata_link *link, int classify,
2125 } 2125 }
2126 2126
2127 if (prereset) { 2127 if (prereset) {
2128 rc = prereset(link, jiffies + ATA_EH_PRERESET_TIMEOUT); 2128 rc = prereset(link,
2129 ata_deadline(jiffies, ATA_EH_PRERESET_TIMEOUT));
2129 if (rc) { 2130 if (rc) {
2130 if (rc == -ENOENT) { 2131 if (rc == -ENOENT) {
2131 ata_link_printk(link, KERN_DEBUG, 2132 ata_link_printk(link, KERN_DEBUG,
@@ -2160,7 +2161,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
2160 if (ata_is_host_link(link)) 2161 if (ata_is_host_link(link))
2161 ata_eh_freeze_port(ap); 2162 ata_eh_freeze_port(ap);
2162 2163
2163 deadline = jiffies + ata_eh_reset_timeouts[try++]; 2164 deadline = ata_deadline(jiffies, ata_eh_reset_timeouts[try++]);
2164 2165
2165 if (reset) { 2166 if (reset) {
2166 if (verbose) 2167 if (verbose)
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c
index 7daf4c0f6216..63691d77ac43 100644
--- a/drivers/ata/libata-pmp.c
+++ b/drivers/ata/libata-pmp.c
@@ -785,7 +785,8 @@ static int sata_pmp_eh_handle_disabled_links(struct ata_port *ap)
785 * SError.N working. 785 * SError.N working.
786 */ 786 */
787 sata_link_hardreset(link, sata_deb_timing_normal, 787 sata_link_hardreset(link, sata_deb_timing_normal,
788 jiffies + ATA_TMOUT_INTERNAL_QUICK, NULL, NULL); 788 ata_deadline(jiffies, ATA_TMOUT_INTERNAL_QUICK),
789 NULL, NULL);
789 790
790 /* unconditionally clear SError.N */ 791 /* unconditionally clear SError.N */
791 rc = sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG); 792 rc = sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index c0908c225483..304fdc6f1dc2 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -345,8 +345,8 @@ void ata_sff_dma_pause(struct ata_port *ap)
345/** 345/**
346 * ata_sff_busy_sleep - sleep until BSY clears, or timeout 346 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
347 * @ap: port containing status register to be polled 347 * @ap: port containing status register to be polled
348 * @tmout_pat: impatience timeout 348 * @tmout_pat: impatience timeout in msecs
349 * @tmout: overall timeout 349 * @tmout: overall timeout in msecs
350 * 350 *
351 * Sleep until ATA Status register bit BSY clears, 351 * Sleep until ATA Status register bit BSY clears,
352 * or a timeout occurs. 352 * or a timeout occurs.
@@ -365,7 +365,7 @@ int ata_sff_busy_sleep(struct ata_port *ap,
365 365
366 status = ata_sff_busy_wait(ap, ATA_BUSY, 300); 366 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
367 timer_start = jiffies; 367 timer_start = jiffies;
368 timeout = timer_start + tmout_pat; 368 timeout = ata_deadline(timer_start, tmout_pat);
369 while (status != 0xff && (status & ATA_BUSY) && 369 while (status != 0xff && (status & ATA_BUSY) &&
370 time_before(jiffies, timeout)) { 370 time_before(jiffies, timeout)) {
371 msleep(50); 371 msleep(50);
@@ -377,7 +377,7 @@ int ata_sff_busy_sleep(struct ata_port *ap,
377 "port is slow to respond, please be patient " 377 "port is slow to respond, please be patient "
378 "(Status 0x%x)\n", status); 378 "(Status 0x%x)\n", status);
379 379
380 timeout = timer_start + tmout; 380 timeout = ata_deadline(timer_start, tmout);
381 while (status != 0xff && (status & ATA_BUSY) && 381 while (status != 0xff && (status & ATA_BUSY) &&
382 time_before(jiffies, timeout)) { 382 time_before(jiffies, timeout)) {
383 msleep(50); 383 msleep(50);
@@ -390,7 +390,7 @@ int ata_sff_busy_sleep(struct ata_port *ap,
390 if (status & ATA_BUSY) { 390 if (status & ATA_BUSY) {
391 ata_port_printk(ap, KERN_ERR, "port failed to respond " 391 ata_port_printk(ap, KERN_ERR, "port failed to respond "
392 "(%lu secs, Status 0x%x)\n", 392 "(%lu secs, Status 0x%x)\n",
393 tmout / HZ, status); 393 DIV_ROUND_UP(tmout, 1000), status);
394 return -EBUSY; 394 return -EBUSY;
395 } 395 }
396 396
@@ -1888,7 +1888,7 @@ int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1888 unsigned int dev1 = devmask & (1 << 1); 1888 unsigned int dev1 = devmask & (1 << 1);
1889 int rc, ret = 0; 1889 int rc, ret = 0;
1890 1890
1891 msleep(ATA_WAIT_AFTER_RESET_MSECS); 1891 msleep(ATA_WAIT_AFTER_RESET);
1892 1892
1893 /* always check readiness of the master device */ 1893 /* always check readiness of the master device */
1894 rc = ata_sff_wait_ready(link, deadline); 1894 rc = ata_sff_wait_ready(link, deadline);
@@ -2371,7 +2371,8 @@ void ata_bus_reset(struct ata_port *ap)
2371 2371
2372 /* issue bus reset */ 2372 /* issue bus reset */
2373 if (ap->flags & ATA_FLAG_SRST) { 2373 if (ap->flags & ATA_FLAG_SRST) {
2374 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); 2374 rc = ata_bus_softreset(ap, devmask,
2375 ata_deadline(jiffies, 40000));
2375 if (rc && rc != -ENODEV) 2376 if (rc && rc != -ENODEV)
2376 goto err_out; 2377 goto err_out;
2377 } 2378 }
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index 55516103626a..d3932901a3b3 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1011,7 +1011,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1011 void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; 1011 void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
1012 unsigned int dev0 = devmask & (1 << 0); 1012 unsigned int dev0 = devmask & (1 << 0);
1013 unsigned int dev1 = devmask & (1 << 1); 1013 unsigned int dev1 = devmask & (1 << 1);
1014 unsigned long timeout; 1014 unsigned long deadline;
1015 1015
1016 /* if device 0 was found in ata_devchk, wait for its 1016 /* if device 0 was found in ata_devchk, wait for its
1017 * BSY bit to clear 1017 * BSY bit to clear
@@ -1022,7 +1022,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1022 /* if device 1 was found in ata_devchk, wait for 1022 /* if device 1 was found in ata_devchk, wait for
1023 * register access, then wait for BSY to clear 1023 * register access, then wait for BSY to clear
1024 */ 1024 */
1025 timeout = jiffies + ATA_TMOUT_BOOT; 1025 deadline = ata_deadline(jiffies, ATA_TMOUT_BOOT);
1026 while (dev1) { 1026 while (dev1) {
1027 u8 nsect, lbal; 1027 u8 nsect, lbal;
1028 1028
@@ -1031,7 +1031,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1031 lbal = read_atapi_register(base, ATA_REG_LBAL); 1031 lbal = read_atapi_register(base, ATA_REG_LBAL);
1032 if ((nsect == 1) && (lbal == 1)) 1032 if ((nsect == 1) && (lbal == 1))
1033 break; 1033 break;
1034 if (time_after(jiffies, timeout)) { 1034 if (time_after(jiffies, deadline)) {
1035 dev1 = 0; 1035 dev1 = 0;
1036 break; 1036 break;
1037 } 1037 }
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index bbf5aa345e68..16673d168573 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -696,7 +696,7 @@ static void scc_bmdma_stop (struct ata_queued_cmd *qc)
696 696
697 if (reg & INTSTS_BMSINT) { 697 if (reg & INTSTS_BMSINT) {
698 unsigned int classes; 698 unsigned int classes;
699 unsigned long deadline = jiffies + ATA_TMOUT_BOOT; 699 unsigned long deadline = ata_deadline(jiffies, ATA_TMOUT_BOOT);
700 printk(KERN_WARNING "%s: Internal Bus Error\n", DRV_NAME); 700 printk(KERN_WARNING "%s: Internal Bus Error\n", DRV_NAME);
701 out_be32(bmid_base + SCC_DMA_INTST, INTSTS_BMSINT); 701 out_be32(bmid_base + SCC_DMA_INTST, INTSTS_BMSINT);
702 /* TBD: SW reset */ 702 /* TBD: SW reset */