diff options
author | Brian Niebuhr <bniebuhr@efjohnson.com> | 2010-10-06 08:43:31 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2010-11-18 08:08:36 -0500 |
commit | 3409e408ab0d7171ae81d198110a1f293852959f (patch) | |
tree | 88878684b29b727246ea2b994296231821a55666 /drivers | |
parent | 87467bd9052725283b9a9f4b1b310fed8744fb1e (diff) |
spi: davinci: remove non-useful "clk_internal" platform data
The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.
Remove this platform data.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/spi/davinci_spi.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 5fe298099a1a..2e74fcd2f423 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
927 | } | 927 | } |
928 | } | 928 | } |
929 | 929 | ||
930 | /* Clock internal */ | ||
931 | if (davinci_spi->pdata->clk_internal) | ||
932 | set_io_bits(davinci_spi->base + SPIGCR1, | ||
933 | SPIGCR1_CLKMOD_MASK); | ||
934 | else | ||
935 | clear_io_bits(davinci_spi->base + SPIGCR1, | ||
936 | SPIGCR1_CLKMOD_MASK); | ||
937 | |||
938 | if (pdata->intr_line) | 930 | if (pdata->intr_line) |
939 | iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); | 931 | iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL); |
940 | else | 932 | else |
@@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
943 | iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); | 935 | iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF); |
944 | 936 | ||
945 | /* master mode default */ | 937 | /* master mode default */ |
938 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); | ||
946 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); | 939 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); |
947 | 940 | ||
948 | ret = spi_bitbang_start(&davinci_spi->bitbang); | 941 | ret = spi_bitbang_start(&davinci_spi->bitbang); |