diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2013-11-19 18:47:32 -0500 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2013-12-11 05:40:25 -0500 |
commit | 2e8bac532f8bcd3834853e0a22b130b9fd59270d (patch) | |
tree | f0ba4934e6657bf432fe56b6c8a40f04c95b8274 /drivers | |
parent | 662e7230ee16951e6858c01e72db87c5dc46150e (diff) |
clocksource: orion: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clocksource/time-orion.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/time-orion.c b/drivers/clocksource/time-orion.c index 9c7f018a67ca..20066222f3f2 100644 --- a/drivers/clocksource/time-orion.c +++ b/drivers/clocksource/time-orion.c | |||
@@ -53,7 +53,7 @@ EXPORT_SYMBOL(orion_timer_ctrl_clrset); | |||
53 | /* | 53 | /* |
54 | * Free-running clocksource handling. | 54 | * Free-running clocksource handling. |
55 | */ | 55 | */ |
56 | static u32 notrace orion_read_sched_clock(void) | 56 | static u64 notrace orion_read_sched_clock(void) |
57 | { | 57 | { |
58 | return ~readl(timer_base + TIMER0_VAL); | 58 | return ~readl(timer_base + TIMER0_VAL); |
59 | } | 59 | } |
@@ -135,7 +135,7 @@ static void __init orion_timer_init(struct device_node *np) | |||
135 | clocksource_mmio_init(timer_base + TIMER0_VAL, "orion_clocksource", | 135 | clocksource_mmio_init(timer_base + TIMER0_VAL, "orion_clocksource", |
136 | clk_get_rate(clk), 300, 32, | 136 | clk_get_rate(clk), 300, 32, |
137 | clocksource_mmio_readl_down); | 137 | clocksource_mmio_readl_down); |
138 | setup_sched_clock(orion_read_sched_clock, 32, clk_get_rate(clk)); | 138 | sched_clock_register(orion_read_sched_clock, 32, clk_get_rate(clk)); |
139 | 139 | ||
140 | /* setup timer1 as clockevent timer */ | 140 | /* setup timer1 as clockevent timer */ |
141 | if (setup_irq(irq, &orion_clkevt_irq)) | 141 | if (setup_irq(irq, &orion_clkevt_irq)) |