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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2013-06-24 08:48:46 -0400
committerJohn W. Linville <linville@tuxdriver.com>2013-06-24 14:44:28 -0400
commit2b5e54e22f596bcd9ec0018f228a2606e016a108 (patch)
tree2f94a47ab00a46e71d5b647c403dafd9a3616d39 /drivers
parentd567e4eb80593b55690eda4be17ed6289630107e (diff)
ath9k: Add support for AR9462 2.1
Various parts of the HW code are applicable for both v2.0 and v2.1. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c6
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.h4
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c2
4 files changed, 10 insertions, 9 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 1e86977d3322..d105e43d22e1 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3606,7 +3606,7 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
3606 * 7:4 R/W SWITCH_TABLE_COM_SPDT_WLAN_IDLE 3606 * 7:4 R/W SWITCH_TABLE_COM_SPDT_WLAN_IDLE
3607 * SWITCH_TABLE_COM_SPDT_WLAN_IDLE 3607 * SWITCH_TABLE_COM_SPDT_WLAN_IDLE
3608 */ 3608 */
3609 if (AR_SREV_9462_20(ah) || AR_SREV_9565(ah)) { 3609 if (AR_SREV_9462_20_OR_LATER(ah) || AR_SREV_9565(ah)) {
3610 value = ar9003_switch_com_spdt_get(ah, is2ghz); 3610 value = ar9003_switch_com_spdt_get(ah, is2ghz);
3611 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, 3611 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL,
3612 AR_SWITCH_TABLE_COM_SPDT_ALL, value); 3612 AR_SWITCH_TABLE_COM_SPDT_ALL, value);
@@ -4059,8 +4059,9 @@ static void ar9003_hw_thermo_cal_apply(struct ath_hw *ah)
4059{ 4059{
4060 u32 data, ko, kg; 4060 u32 data, ko, kg;
4061 4061
4062 if (!AR_SREV_9462_20(ah)) 4062 if (!AR_SREV_9462_20_OR_LATER(ah))
4063 return; 4063 return;
4064
4064 ar9300_otp_read_word(ah, 1, &data); 4065 ar9300_otp_read_word(ah, 1, &data);
4065 ko = data & 0xff; 4066 ko = data & 0xff;
4066 kg = (data >> 8) & 0xff; 4067 kg = (data >> 8) & 0xff;
@@ -4752,7 +4753,7 @@ tempslope:
4752 AR_PHY_TPC_19_ALPHA_THERM, temp_slope); 4753 AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
4753 } 4754 }
4754 4755
4755 if (AR_SREV_9462_20(ah)) 4756 if (AR_SREV_9462_20_OR_LATER(ah))
4756 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, 4757 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4757 AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope); 4758 AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
4758 4759
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index df84d20e1092..1f694ab3cc78 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -743,7 +743,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
743 ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex); 743 ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex);
744 ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex); 744 ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex);
745 ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex); 745 ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex);
746 if (i == ATH_INI_POST && AR_SREV_9462_20(ah)) 746 if (i == ATH_INI_POST && AR_SREV_9462_20_OR_LATER(ah))
747 ar9003_hw_prog_ini(ah, 747 ar9003_hw_prog_ini(ah,
748 &ah->ini_radio_post_sys2ant, 748 &ah->ini_radio_post_sys2ant,
749 modesIndex); 749 modesIndex);
@@ -754,7 +754,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
754 */ 754 */
755 REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites); 755 REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites);
756 756
757 if (AR_SREV_9462_20(ah)) { 757 if (AR_SREV_9462_20_OR_LATER(ah)) {
758 /* 758 /*
759 * CUS217 mix LNA mode. 759 * CUS217 mix LNA mode.
760 */ 760 */
@@ -1512,7 +1512,7 @@ static int ar9003_hw_fast_chan_change(struct ath_hw *ah,
1512 ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex); 1512 ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex);
1513 ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex); 1513 ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex);
1514 1514
1515 if (AR_SREV_9462_20(ah)) 1515 if (AR_SREV_9462_20_OR_LATER(ah))
1516 ar9003_hw_prog_ini(ah, &ah->ini_radio_post_sys2ant, 1516 ar9003_hw_prog_ini(ah, &ah->ini_radio_post_sys2ant,
1517 modesIndex); 1517 modesIndex);
1518 1518
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 5013c731f9f6..d4d39f305a0b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -954,7 +954,7 @@
954#define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208) 954#define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208)
955#define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c) 955#define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c)
956#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220) 956#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
957#define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + (AR_SREV_AR9462(ah) ? \ 957#define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + (AR_SREV_9462_20_OR_LATER(ah) ? \
958 0x280 : 0x240)) 958 0x280 : 0x240))
959#define AR_PHY_TPC_19_B1 (AR_SM1_BASE + 0x240) 959#define AR_PHY_TPC_19_B1 (AR_SM1_BASE + 0x240)
960#define AR_PHY_TPC_19_B1_ALPHA_THERM 0xff 960#define AR_PHY_TPC_19_B1_ALPHA_THERM 0xff
@@ -1048,7 +1048,7 @@
1048#define AR_GLB_GPIO_CONTROL (AR_GLB_BASE) 1048#define AR_GLB_GPIO_CONTROL (AR_GLB_BASE)
1049#define AR_PHY_GLB_CONTROL (AR_GLB_BASE + 0x44) 1049#define AR_PHY_GLB_CONTROL (AR_GLB_BASE + 0x44)
1050#define AR_GLB_SCRATCH(_ah) (AR_GLB_BASE + \ 1050#define AR_GLB_SCRATCH(_ah) (AR_GLB_BASE + \
1051 (AR_SREV_9462_20(_ah) ? 0x4c : 0x50)) 1051 (AR_SREV_9462_20_OR_LATER(_ah) ? 0x4c : 0x50))
1052#define AR_GLB_STATUS (AR_GLB_BASE + 0x48) 1052#define AR_GLB_STATUS (AR_GLB_BASE + 0x48)
1053 1053
1054/* 1054/*
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 5324c3346af8..4ca0cb060106 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -2599,7 +2599,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2599 if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE)) 2599 if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE))
2600 pCap->hw_caps |= ATH9K_HW_CAP_MCI; 2600 pCap->hw_caps |= ATH9K_HW_CAP_MCI;
2601 2601
2602 if (AR_SREV_9462_20(ah)) 2602 if (AR_SREV_9462_20_OR_LATER(ah))
2603 pCap->hw_caps |= ATH9K_HW_CAP_RTT; 2603 pCap->hw_caps |= ATH9K_HW_CAP_RTT;
2604 } 2604 }
2605 2605