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authorDavid S. Miller <davem@davemloft.net>2013-04-16 16:43:39 -0400
committerDavid S. Miller <davem@davemloft.net>2013-04-16 16:43:39 -0400
commit264f0ef766d6e9fcc1b4c3afd288a20ee05ef541 (patch)
treeed99023f742f6c9c8542c9631c8dfac77e71759c /drivers
parentbf7bfd7ff0a8e85c5f469a24c27d4dd1eb756104 (diff)
parent06e1d1d71876c75bf4a9d3b310c1b4df34e8be69 (diff)
Merge branch 'for-davem' of git://gitorious.org/linux-can/linux-can-next
Marc Kleine-Budde says: ==================== this is a pull-request for net-next/master. It consists of a patch by Oliver Hartkopp. In this patch he cleans up the sja1000 header file by using a common prefix for all sja1000 defines. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/can/sja1000/ems_pci.c6
-rw-r--r--drivers/net/can/sja1000/ems_pcmcia.c6
-rw-r--r--drivers/net/can/sja1000/kvaser_pci.c4
-rw-r--r--drivers/net/can/sja1000/peak_pci.c2
-rw-r--r--drivers/net/can/sja1000/peak_pcmcia.c8
-rw-r--r--drivers/net/can/sja1000/plx_pci.c12
-rw-r--r--drivers/net/can/sja1000/sja1000.c126
-rw-r--r--drivers/net/can/sja1000/sja1000.h68
8 files changed, 117 insertions, 115 deletions
diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c
index 36d298da2af6..3752342a678a 100644
--- a/drivers/net/can/sja1000/ems_pci.c
+++ b/drivers/net/can/sja1000/ems_pci.c
@@ -168,12 +168,12 @@ static inline int ems_pci_check_chan(const struct sja1000_priv *priv)
168 unsigned char res; 168 unsigned char res;
169 169
170 /* Make sure SJA1000 is in reset mode */ 170 /* Make sure SJA1000 is in reset mode */
171 priv->write_reg(priv, REG_MOD, 1); 171 priv->write_reg(priv, SJA1000_MOD, 1);
172 172
173 priv->write_reg(priv, REG_CDR, CDR_PELICAN); 173 priv->write_reg(priv, SJA1000_CDR, CDR_PELICAN);
174 174
175 /* read reset-values */ 175 /* read reset-values */
176 res = priv->read_reg(priv, REG_CDR); 176 res = priv->read_reg(priv, SJA1000_CDR);
177 177
178 if (res == CDR_PELICAN) 178 if (res == CDR_PELICAN)
179 return 1; 179 return 1;
diff --git a/drivers/net/can/sja1000/ems_pcmcia.c b/drivers/net/can/sja1000/ems_pcmcia.c
index 5c2f3fbbf5ae..a3aa6817b515 100644
--- a/drivers/net/can/sja1000/ems_pcmcia.c
+++ b/drivers/net/can/sja1000/ems_pcmcia.c
@@ -126,11 +126,11 @@ static irqreturn_t ems_pcmcia_interrupt(int irq, void *dev_id)
126static inline int ems_pcmcia_check_chan(struct sja1000_priv *priv) 126static inline int ems_pcmcia_check_chan(struct sja1000_priv *priv)
127{ 127{
128 /* Make sure SJA1000 is in reset mode */ 128 /* Make sure SJA1000 is in reset mode */
129 ems_pcmcia_write_reg(priv, REG_MOD, 1); 129 ems_pcmcia_write_reg(priv, SJA1000_MOD, 1);
130 ems_pcmcia_write_reg(priv, REG_CDR, CDR_PELICAN); 130 ems_pcmcia_write_reg(priv, SJA1000_CDR, CDR_PELICAN);
131 131
132 /* read reset-values */ 132 /* read reset-values */
133 if (ems_pcmcia_read_reg(priv, REG_CDR) == CDR_PELICAN) 133 if (ems_pcmcia_read_reg(priv, SJA1000_CDR) == CDR_PELICAN)
134 return 1; 134 return 1;
135 135
136 return 0; 136 return 0;
diff --git a/drivers/net/can/sja1000/kvaser_pci.c b/drivers/net/can/sja1000/kvaser_pci.c
index 37b0381f532e..217585b97cd3 100644
--- a/drivers/net/can/sja1000/kvaser_pci.c
+++ b/drivers/net/can/sja1000/kvaser_pci.c
@@ -159,9 +159,9 @@ static int number_of_sja1000_chip(void __iomem *base_addr)
159 for (i = 0; i < MAX_NO_OF_CHANNELS; i++) { 159 for (i = 0; i < MAX_NO_OF_CHANNELS; i++) {
160 /* reset chip */ 160 /* reset chip */
161 iowrite8(MOD_RM, base_addr + 161 iowrite8(MOD_RM, base_addr +
162 (i * KVASER_PCI_PORT_BYTES) + REG_MOD); 162 (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD);
163 status = ioread8(base_addr + 163 status = ioread8(base_addr +
164 (i * KVASER_PCI_PORT_BYTES) + REG_MOD); 164 (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD);
165 /* check reset bit */ 165 /* check reset bit */
166 if (!(status & MOD_RM)) 166 if (!(status & MOD_RM))
167 break; 167 break;
diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c
index d1e7f1006ddd..6b6f0ad75090 100644
--- a/drivers/net/can/sja1000/peak_pci.c
+++ b/drivers/net/can/sja1000/peak_pci.c
@@ -402,7 +402,7 @@ static void peak_pciec_write_reg(const struct sja1000_priv *priv,
402 int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; 402 int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
403 403
404 /* sja1000 register changes control the leds state */ 404 /* sja1000 register changes control the leds state */
405 if (port == REG_MOD) 405 if (port == SJA1000_MOD)
406 switch (val) { 406 switch (val) {
407 case MOD_RM: 407 case MOD_RM:
408 /* Reset Mode: set led on */ 408 /* Reset Mode: set led on */
diff --git a/drivers/net/can/sja1000/peak_pcmcia.c b/drivers/net/can/sja1000/peak_pcmcia.c
index 1a7020ba37f5..977901a0214a 100644
--- a/drivers/net/can/sja1000/peak_pcmcia.c
+++ b/drivers/net/can/sja1000/peak_pcmcia.c
@@ -196,7 +196,7 @@ static void pcan_write_canreg(const struct sja1000_priv *priv, int port, u8 v)
196 int c = (priv->reg_base - card->ioport_addr) / PCC_CHAN_SIZE; 196 int c = (priv->reg_base - card->ioport_addr) / PCC_CHAN_SIZE;
197 197
198 /* sja1000 register changes control the leds state */ 198 /* sja1000 register changes control the leds state */
199 if (port == REG_MOD) 199 if (port == SJA1000_MOD)
200 switch (v) { 200 switch (v) {
201 case MOD_RM: 201 case MOD_RM:
202 /* Reset Mode: set led on */ 202 /* Reset Mode: set led on */
@@ -509,11 +509,11 @@ static void pcan_free_channels(struct pcan_pccard *card)
509static inline int pcan_channel_present(struct sja1000_priv *priv) 509static inline int pcan_channel_present(struct sja1000_priv *priv)
510{ 510{
511 /* make sure SJA1000 is in reset mode */ 511 /* make sure SJA1000 is in reset mode */
512 pcan_write_canreg(priv, REG_MOD, 1); 512 pcan_write_canreg(priv, SJA1000_MOD, 1);
513 pcan_write_canreg(priv, REG_CDR, CDR_PELICAN); 513 pcan_write_canreg(priv, SJA1000_CDR, CDR_PELICAN);
514 514
515 /* read reset-values */ 515 /* read reset-values */
516 if (pcan_read_canreg(priv, REG_CDR) == CDR_PELICAN) 516 if (pcan_read_canreg(priv, SJA1000_CDR) == CDR_PELICAN)
517 return 1; 517 return 1;
518 518
519 return 0; 519 return 0;
diff --git a/drivers/net/can/sja1000/plx_pci.c b/drivers/net/can/sja1000/plx_pci.c
index 3c18d7d000ed..c52c1e96bf90 100644
--- a/drivers/net/can/sja1000/plx_pci.c
+++ b/drivers/net/can/sja1000/plx_pci.c
@@ -348,20 +348,20 @@ static inline int plx_pci_check_sja1000(const struct sja1000_priv *priv)
348 */ 348 */
349 if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) == 349 if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) ==
350 REG_CR_BASICCAN_INITIAL && 350 REG_CR_BASICCAN_INITIAL &&
351 (priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_BASICCAN_INITIAL) && 351 (priv->read_reg(priv, SJA1000_SR) == REG_SR_BASICCAN_INITIAL) &&
352 (priv->read_reg(priv, REG_IR) == REG_IR_BASICCAN_INITIAL)) 352 (priv->read_reg(priv, SJA1000_IR) == REG_IR_BASICCAN_INITIAL))
353 flag = 1; 353 flag = 1;
354 354
355 /* Bring the SJA1000 into the PeliCAN mode*/ 355 /* Bring the SJA1000 into the PeliCAN mode*/
356 priv->write_reg(priv, REG_CDR, CDR_PELICAN); 356 priv->write_reg(priv, SJA1000_CDR, CDR_PELICAN);
357 357
358 /* 358 /*
359 * Check registers after reset in the PeliCAN mode. 359 * Check registers after reset in the PeliCAN mode.
360 * See states on p. 23 of the Datasheet. 360 * See states on p. 23 of the Datasheet.
361 */ 361 */
362 if (priv->read_reg(priv, REG_MOD) == REG_MOD_PELICAN_INITIAL && 362 if (priv->read_reg(priv, SJA1000_MOD) == REG_MOD_PELICAN_INITIAL &&
363 priv->read_reg(priv, SJA1000_REG_SR) == REG_SR_PELICAN_INITIAL && 363 priv->read_reg(priv, SJA1000_SR) == REG_SR_PELICAN_INITIAL &&
364 priv->read_reg(priv, REG_IR) == REG_IR_PELICAN_INITIAL) 364 priv->read_reg(priv, SJA1000_IR) == REG_IR_PELICAN_INITIAL)
365 return flag; 365 return flag;
366 366
367 return 0; 367 return 0;
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index e4df307eaa90..7164a999f50f 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -91,14 +91,14 @@ static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
91 * the write_reg() operation - especially on SMP systems. 91 * the write_reg() operation - especially on SMP systems.
92 */ 92 */
93 spin_lock_irqsave(&priv->cmdreg_lock, flags); 93 spin_lock_irqsave(&priv->cmdreg_lock, flags);
94 priv->write_reg(priv, REG_CMR, val); 94 priv->write_reg(priv, SJA1000_CMR, val);
95 priv->read_reg(priv, SJA1000_REG_SR); 95 priv->read_reg(priv, SJA1000_SR);
96 spin_unlock_irqrestore(&priv->cmdreg_lock, flags); 96 spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
97} 97}
98 98
99static int sja1000_is_absent(struct sja1000_priv *priv) 99static int sja1000_is_absent(struct sja1000_priv *priv)
100{ 100{
101 return (priv->read_reg(priv, REG_MOD) == 0xFF); 101 return (priv->read_reg(priv, SJA1000_MOD) == 0xFF);
102} 102}
103 103
104static int sja1000_probe_chip(struct net_device *dev) 104static int sja1000_probe_chip(struct net_device *dev)
@@ -116,11 +116,11 @@ static int sja1000_probe_chip(struct net_device *dev)
116static void set_reset_mode(struct net_device *dev) 116static void set_reset_mode(struct net_device *dev)
117{ 117{
118 struct sja1000_priv *priv = netdev_priv(dev); 118 struct sja1000_priv *priv = netdev_priv(dev);
119 unsigned char status = priv->read_reg(priv, REG_MOD); 119 unsigned char status = priv->read_reg(priv, SJA1000_MOD);
120 int i; 120 int i;
121 121
122 /* disable interrupts */ 122 /* disable interrupts */
123 priv->write_reg(priv, REG_IER, IRQ_OFF); 123 priv->write_reg(priv, SJA1000_IER, IRQ_OFF);
124 124
125 for (i = 0; i < 100; i++) { 125 for (i = 0; i < 100; i++) {
126 /* check reset bit */ 126 /* check reset bit */
@@ -129,9 +129,10 @@ static void set_reset_mode(struct net_device *dev)
129 return; 129 return;
130 } 130 }
131 131
132 priv->write_reg(priv, REG_MOD, MOD_RM); /* reset chip */ 132 /* reset chip */
133 priv->write_reg(priv, SJA1000_MOD, MOD_RM);
133 udelay(10); 134 udelay(10);
134 status = priv->read_reg(priv, REG_MOD); 135 status = priv->read_reg(priv, SJA1000_MOD);
135 } 136 }
136 137
137 netdev_err(dev, "setting SJA1000 into reset mode failed!\n"); 138 netdev_err(dev, "setting SJA1000 into reset mode failed!\n");
@@ -140,7 +141,7 @@ static void set_reset_mode(struct net_device *dev)
140static void set_normal_mode(struct net_device *dev) 141static void set_normal_mode(struct net_device *dev)
141{ 142{
142 struct sja1000_priv *priv = netdev_priv(dev); 143 struct sja1000_priv *priv = netdev_priv(dev);
143 unsigned char status = priv->read_reg(priv, REG_MOD); 144 unsigned char status = priv->read_reg(priv, SJA1000_MOD);
144 int i; 145 int i;
145 146
146 for (i = 0; i < 100; i++) { 147 for (i = 0; i < 100; i++) {
@@ -149,22 +150,22 @@ static void set_normal_mode(struct net_device *dev)
149 priv->can.state = CAN_STATE_ERROR_ACTIVE; 150 priv->can.state = CAN_STATE_ERROR_ACTIVE;
150 /* enable interrupts */ 151 /* enable interrupts */
151 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 152 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
152 priv->write_reg(priv, REG_IER, IRQ_ALL); 153 priv->write_reg(priv, SJA1000_IER, IRQ_ALL);
153 else 154 else
154 priv->write_reg(priv, REG_IER, 155 priv->write_reg(priv, SJA1000_IER,
155 IRQ_ALL & ~IRQ_BEI); 156 IRQ_ALL & ~IRQ_BEI);
156 return; 157 return;
157 } 158 }
158 159
159 /* set chip to normal mode */ 160 /* set chip to normal mode */
160 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 161 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
161 priv->write_reg(priv, REG_MOD, MOD_LOM); 162 priv->write_reg(priv, SJA1000_MOD, MOD_LOM);
162 else 163 else
163 priv->write_reg(priv, REG_MOD, 0x00); 164 priv->write_reg(priv, SJA1000_MOD, 0x00);
164 165
165 udelay(10); 166 udelay(10);
166 167
167 status = priv->read_reg(priv, REG_MOD); 168 status = priv->read_reg(priv, SJA1000_MOD);
168 } 169 }
169 170
170 netdev_err(dev, "setting SJA1000 into normal mode failed!\n"); 171 netdev_err(dev, "setting SJA1000 into normal mode failed!\n");
@@ -179,9 +180,9 @@ static void sja1000_start(struct net_device *dev)
179 set_reset_mode(dev); 180 set_reset_mode(dev);
180 181
181 /* Clear error counters and error code capture */ 182 /* Clear error counters and error code capture */
182 priv->write_reg(priv, REG_TXERR, 0x0); 183 priv->write_reg(priv, SJA1000_TXERR, 0x0);
183 priv->write_reg(priv, REG_RXERR, 0x0); 184 priv->write_reg(priv, SJA1000_RXERR, 0x0);
184 priv->read_reg(priv, REG_ECC); 185 priv->read_reg(priv, SJA1000_ECC);
185 186
186 /* leave reset mode */ 187 /* leave reset mode */
187 set_normal_mode(dev); 188 set_normal_mode(dev);
@@ -217,8 +218,8 @@ static int sja1000_set_bittiming(struct net_device *dev)
217 218
218 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1); 219 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
219 220
220 priv->write_reg(priv, REG_BTR0, btr0); 221 priv->write_reg(priv, SJA1000_BTR0, btr0);
221 priv->write_reg(priv, REG_BTR1, btr1); 222 priv->write_reg(priv, SJA1000_BTR1, btr1);
222 223
223 return 0; 224 return 0;
224} 225}
@@ -228,8 +229,8 @@ static int sja1000_get_berr_counter(const struct net_device *dev,
228{ 229{
229 struct sja1000_priv *priv = netdev_priv(dev); 230 struct sja1000_priv *priv = netdev_priv(dev);
230 231
231 bec->txerr = priv->read_reg(priv, REG_TXERR); 232 bec->txerr = priv->read_reg(priv, SJA1000_TXERR);
232 bec->rxerr = priv->read_reg(priv, REG_RXERR); 233 bec->rxerr = priv->read_reg(priv, SJA1000_RXERR);
233 234
234 return 0; 235 return 0;
235} 236}
@@ -247,20 +248,20 @@ static void chipset_init(struct net_device *dev)
247 struct sja1000_priv *priv = netdev_priv(dev); 248 struct sja1000_priv *priv = netdev_priv(dev);
248 249
249 /* set clock divider and output control register */ 250 /* set clock divider and output control register */
250 priv->write_reg(priv, REG_CDR, priv->cdr | CDR_PELICAN); 251 priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
251 252
252 /* set acceptance filter (accept all) */ 253 /* set acceptance filter (accept all) */
253 priv->write_reg(priv, REG_ACCC0, 0x00); 254 priv->write_reg(priv, SJA1000_ACCC0, 0x00);
254 priv->write_reg(priv, REG_ACCC1, 0x00); 255 priv->write_reg(priv, SJA1000_ACCC1, 0x00);
255 priv->write_reg(priv, REG_ACCC2, 0x00); 256 priv->write_reg(priv, SJA1000_ACCC2, 0x00);
256 priv->write_reg(priv, REG_ACCC3, 0x00); 257 priv->write_reg(priv, SJA1000_ACCC3, 0x00);
257 258
258 priv->write_reg(priv, REG_ACCM0, 0xFF); 259 priv->write_reg(priv, SJA1000_ACCM0, 0xFF);
259 priv->write_reg(priv, REG_ACCM1, 0xFF); 260 priv->write_reg(priv, SJA1000_ACCM1, 0xFF);
260 priv->write_reg(priv, REG_ACCM2, 0xFF); 261 priv->write_reg(priv, SJA1000_ACCM2, 0xFF);
261 priv->write_reg(priv, REG_ACCM3, 0xFF); 262 priv->write_reg(priv, SJA1000_ACCM3, 0xFF);
262 263
263 priv->write_reg(priv, REG_OCR, priv->ocr | OCR_MODE_NORMAL); 264 priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL);
264} 265}
265 266
266/* 267/*
@@ -289,21 +290,21 @@ static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,
289 id = cf->can_id; 290 id = cf->can_id;
290 291
291 if (id & CAN_RTR_FLAG) 292 if (id & CAN_RTR_FLAG)
292 fi |= FI_RTR; 293 fi |= SJA1000_FI_RTR;
293 294
294 if (id & CAN_EFF_FLAG) { 295 if (id & CAN_EFF_FLAG) {
295 fi |= FI_FF; 296 fi |= SJA1000_FI_FF;
296 dreg = EFF_BUF; 297 dreg = SJA1000_EFF_BUF;
297 priv->write_reg(priv, REG_FI, fi); 298 priv->write_reg(priv, SJA1000_FI, fi);
298 priv->write_reg(priv, REG_ID1, (id & 0x1fe00000) >> (5 + 16)); 299 priv->write_reg(priv, SJA1000_ID1, (id & 0x1fe00000) >> 21);
299 priv->write_reg(priv, REG_ID2, (id & 0x001fe000) >> (5 + 8)); 300 priv->write_reg(priv, SJA1000_ID2, (id & 0x001fe000) >> 13);
300 priv->write_reg(priv, REG_ID3, (id & 0x00001fe0) >> 5); 301 priv->write_reg(priv, SJA1000_ID3, (id & 0x00001fe0) >> 5);
301 priv->write_reg(priv, REG_ID4, (id & 0x0000001f) << 3); 302 priv->write_reg(priv, SJA1000_ID4, (id & 0x0000001f) << 3);
302 } else { 303 } else {
303 dreg = SFF_BUF; 304 dreg = SJA1000_SFF_BUF;
304 priv->write_reg(priv, REG_FI, fi); 305 priv->write_reg(priv, SJA1000_FI, fi);
305 priv->write_reg(priv, REG_ID1, (id & 0x000007f8) >> 3); 306 priv->write_reg(priv, SJA1000_ID1, (id & 0x000007f8) >> 3);
306 priv->write_reg(priv, REG_ID2, (id & 0x00000007) << 5); 307 priv->write_reg(priv, SJA1000_ID2, (id & 0x00000007) << 5);
307 } 308 }
308 309
309 for (i = 0; i < dlc; i++) 310 for (i = 0; i < dlc; i++)
@@ -335,25 +336,25 @@ static void sja1000_rx(struct net_device *dev)
335 if (skb == NULL) 336 if (skb == NULL)
336 return; 337 return;
337 338
338 fi = priv->read_reg(priv, REG_FI); 339 fi = priv->read_reg(priv, SJA1000_FI);
339 340
340 if (fi & FI_FF) { 341 if (fi & SJA1000_FI_FF) {
341 /* extended frame format (EFF) */ 342 /* extended frame format (EFF) */
342 dreg = EFF_BUF; 343 dreg = SJA1000_EFF_BUF;
343 id = (priv->read_reg(priv, REG_ID1) << (5 + 16)) 344 id = (priv->read_reg(priv, SJA1000_ID1) << 21)
344 | (priv->read_reg(priv, REG_ID2) << (5 + 8)) 345 | (priv->read_reg(priv, SJA1000_ID2) << 13)
345 | (priv->read_reg(priv, REG_ID3) << 5) 346 | (priv->read_reg(priv, SJA1000_ID3) << 5)
346 | (priv->read_reg(priv, REG_ID4) >> 3); 347 | (priv->read_reg(priv, SJA1000_ID4) >> 3);
347 id |= CAN_EFF_FLAG; 348 id |= CAN_EFF_FLAG;
348 } else { 349 } else {
349 /* standard frame format (SFF) */ 350 /* standard frame format (SFF) */
350 dreg = SFF_BUF; 351 dreg = SJA1000_SFF_BUF;
351 id = (priv->read_reg(priv, REG_ID1) << 3) 352 id = (priv->read_reg(priv, SJA1000_ID1) << 3)
352 | (priv->read_reg(priv, REG_ID2) >> 5); 353 | (priv->read_reg(priv, SJA1000_ID2) >> 5);
353 } 354 }
354 355
355 cf->can_dlc = get_can_dlc(fi & 0x0F); 356 cf->can_dlc = get_can_dlc(fi & 0x0F);
356 if (fi & FI_RTR) { 357 if (fi & SJA1000_FI_RTR) {
357 id |= CAN_RTR_FLAG; 358 id |= CAN_RTR_FLAG;
358 } else { 359 } else {
359 for (i = 0; i < cf->can_dlc; i++) 360 for (i = 0; i < cf->can_dlc; i++)
@@ -414,7 +415,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
414 priv->can.can_stats.bus_error++; 415 priv->can.can_stats.bus_error++;
415 stats->rx_errors++; 416 stats->rx_errors++;
416 417
417 ecc = priv->read_reg(priv, REG_ECC); 418 ecc = priv->read_reg(priv, SJA1000_ECC);
418 419
419 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 420 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
420 421
@@ -448,7 +449,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
448 if (isrc & IRQ_ALI) { 449 if (isrc & IRQ_ALI) {
449 /* arbitration lost interrupt */ 450 /* arbitration lost interrupt */
450 netdev_dbg(dev, "arbitration lost interrupt\n"); 451 netdev_dbg(dev, "arbitration lost interrupt\n");
451 alc = priv->read_reg(priv, REG_ALC); 452 alc = priv->read_reg(priv, SJA1000_ALC);
452 priv->can.can_stats.arbitration_lost++; 453 priv->can.can_stats.arbitration_lost++;
453 stats->tx_errors++; 454 stats->tx_errors++;
454 cf->can_id |= CAN_ERR_LOSTARB; 455 cf->can_id |= CAN_ERR_LOSTARB;
@@ -457,8 +458,8 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
457 458
458 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING || 459 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
459 state == CAN_STATE_ERROR_PASSIVE)) { 460 state == CAN_STATE_ERROR_PASSIVE)) {
460 uint8_t rxerr = priv->read_reg(priv, REG_RXERR); 461 uint8_t rxerr = priv->read_reg(priv, SJA1000_RXERR);
461 uint8_t txerr = priv->read_reg(priv, REG_TXERR); 462 uint8_t txerr = priv->read_reg(priv, SJA1000_TXERR);
462 cf->can_id |= CAN_ERR_CRTL; 463 cf->can_id |= CAN_ERR_CRTL;
463 if (state == CAN_STATE_ERROR_WARNING) { 464 if (state == CAN_STATE_ERROR_WARNING) {
464 priv->can.can_stats.error_warning++; 465 priv->can.can_stats.error_warning++;
@@ -494,15 +495,16 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
494 int n = 0; 495 int n = 0;
495 496
496 /* Shared interrupts and IRQ off? */ 497 /* Shared interrupts and IRQ off? */
497 if (priv->read_reg(priv, REG_IER) == IRQ_OFF) 498 if (priv->read_reg(priv, SJA1000_IER) == IRQ_OFF)
498 return IRQ_NONE; 499 return IRQ_NONE;
499 500
500 if (priv->pre_irq) 501 if (priv->pre_irq)
501 priv->pre_irq(priv); 502 priv->pre_irq(priv);
502 503
503 while ((isrc = priv->read_reg(priv, REG_IR)) && (n < SJA1000_MAX_IRQ)) { 504 while ((isrc = priv->read_reg(priv, SJA1000_IR)) &&
505 (n < SJA1000_MAX_IRQ)) {
504 n++; 506 n++;
505 status = priv->read_reg(priv, SJA1000_REG_SR); 507 status = priv->read_reg(priv, SJA1000_SR);
506 /* check for absent controller due to hw unplug */ 508 /* check for absent controller due to hw unplug */
507 if (status == 0xFF && sja1000_is_absent(priv)) 509 if (status == 0xFF && sja1000_is_absent(priv))
508 return IRQ_NONE; 510 return IRQ_NONE;
@@ -519,7 +521,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
519 } else { 521 } else {
520 /* transmission complete */ 522 /* transmission complete */
521 stats->tx_bytes += 523 stats->tx_bytes +=
522 priv->read_reg(priv, REG_FI) & 0xf; 524 priv->read_reg(priv, SJA1000_FI) & 0xf;
523 stats->tx_packets++; 525 stats->tx_packets++;
524 can_get_echo_skb(dev, 0); 526 can_get_echo_skb(dev, 0);
525 } 527 }
@@ -530,7 +532,7 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)
530 /* receive interrupt */ 532 /* receive interrupt */
531 while (status & SR_RBS) { 533 while (status & SR_RBS) {
532 sja1000_rx(dev); 534 sja1000_rx(dev);
533 status = priv->read_reg(priv, SJA1000_REG_SR); 535 status = priv->read_reg(priv, SJA1000_SR);
534 /* check for absent controller */ 536 /* check for absent controller */
535 if (status == 0xFF && sja1000_is_absent(priv)) 537 if (status == 0xFF && sja1000_is_absent(priv))
536 return IRQ_NONE; 538 return IRQ_NONE;
diff --git a/drivers/net/can/sja1000/sja1000.h b/drivers/net/can/sja1000/sja1000.h
index aa48e053da27..9d46398f8154 100644
--- a/drivers/net/can/sja1000/sja1000.h
+++ b/drivers/net/can/sja1000/sja1000.h
@@ -54,46 +54,46 @@
54#define SJA1000_MAX_IRQ 20 /* max. number of interrupts handled in ISR */ 54#define SJA1000_MAX_IRQ 20 /* max. number of interrupts handled in ISR */
55 55
56/* SJA1000 registers - manual section 6.4 (Pelican Mode) */ 56/* SJA1000 registers - manual section 6.4 (Pelican Mode) */
57#define REG_MOD 0x00 57#define SJA1000_MOD 0x00
58#define REG_CMR 0x01 58#define SJA1000_CMR 0x01
59#define SJA1000_REG_SR 0x02 59#define SJA1000_SR 0x02
60#define REG_IR 0x03 60#define SJA1000_IR 0x03
61#define REG_IER 0x04 61#define SJA1000_IER 0x04
62#define REG_ALC 0x0B 62#define SJA1000_ALC 0x0B
63#define REG_ECC 0x0C 63#define SJA1000_ECC 0x0C
64#define REG_EWL 0x0D 64#define SJA1000_EWL 0x0D
65#define REG_RXERR 0x0E 65#define SJA1000_RXERR 0x0E
66#define REG_TXERR 0x0F 66#define SJA1000_TXERR 0x0F
67#define REG_ACCC0 0x10 67#define SJA1000_ACCC0 0x10
68#define REG_ACCC1 0x11 68#define SJA1000_ACCC1 0x11
69#define REG_ACCC2 0x12 69#define SJA1000_ACCC2 0x12
70#define REG_ACCC3 0x13 70#define SJA1000_ACCC3 0x13
71#define REG_ACCM0 0x14 71#define SJA1000_ACCM0 0x14
72#define REG_ACCM1 0x15 72#define SJA1000_ACCM1 0x15
73#define REG_ACCM2 0x16 73#define SJA1000_ACCM2 0x16
74#define REG_ACCM3 0x17 74#define SJA1000_ACCM3 0x17
75#define REG_RMC 0x1D 75#define SJA1000_RMC 0x1D
76#define REG_RBSA 0x1E 76#define SJA1000_RBSA 0x1E
77 77
78/* Common registers - manual section 6.5 */ 78/* Common registers - manual section 6.5 */
79#define REG_BTR0 0x06 79#define SJA1000_BTR0 0x06
80#define REG_BTR1 0x07 80#define SJA1000_BTR1 0x07
81#define REG_OCR 0x08 81#define SJA1000_OCR 0x08
82#define REG_CDR 0x1F 82#define SJA1000_CDR 0x1F
83 83
84#define REG_FI 0x10 84#define SJA1000_FI 0x10
85#define SFF_BUF 0x13 85#define SJA1000_SFF_BUF 0x13
86#define EFF_BUF 0x15 86#define SJA1000_EFF_BUF 0x15
87 87
88#define FI_FF 0x80 88#define SJA1000_FI_FF 0x80
89#define FI_RTR 0x40 89#define SJA1000_FI_RTR 0x40
90 90
91#define REG_ID1 0x11 91#define SJA1000_ID1 0x11
92#define REG_ID2 0x12 92#define SJA1000_ID2 0x12
93#define REG_ID3 0x13 93#define SJA1000_ID3 0x13
94#define REG_ID4 0x14 94#define SJA1000_ID4 0x14
95 95
96#define CAN_RAM 0x20 96#define SJA1000_CAN_RAM 0x20
97 97
98/* mode register */ 98/* mode register */
99#define MOD_RM 0x01 99#define MOD_RM 0x01