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authorPJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>2009-04-09 18:26:21 -0400
committerDavid S. Miller <davem@davemloft.net>2009-04-11 05:47:57 -0400
commit2132d38133f48ef51d28252bb9c0b792f5b57019 (patch)
tree888a403d73a0c32fca83e53e06891d3cb543f8d7 /drivers
parentfbb5a5583034e98f87fcff94183637486d7ada18 (diff)
ixgbe: Enable another bit for flow control operation
The discard pause frames bit was not enabled, so flow control frames could be passed up to the host. Enabled DPF to keep the frames off the stack. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c1
-rw-r--r--drivers/net/ixgbe/ixgbe_common.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index de4db0dc7879..63aacd53aab7 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -322,6 +322,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
322 } 322 }
323 323
324 /* Enable 802.3x based flow control settings. */ 324 /* Enable 802.3x based flow control settings. */
325 fctrl_reg |= IXGBE_FCTRL_DPF;
325 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); 326 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg);
326 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); 327 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg);
327 328
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 63ab6671d08e..846c9deeaa7a 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -1700,6 +1700,7 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
1700 } 1700 }
1701 1701
1702 /* Enable 802.3x based flow control settings. */ 1702 /* Enable 802.3x based flow control settings. */
1703 mflcn_reg |= IXGBE_MFLCN_DPF;
1703 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg); 1704 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg);
1704 IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg); 1705 IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg);
1705 1706