diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-09-19 23:51:04 -0400 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-09-20 01:52:38 -0400 |
| commit | 1cce058b29e7eb8a71a72d8bb87eb7b4e0401c22 (patch) | |
| tree | 493477b7a19606c66de2f003bca83672f2164cad /drivers | |
| parent | c26afe9e8591f306d79aab8071f1d34e4f60b700 (diff) | |
| parent | 9d037a777695993ec7437e5f451647dea7919d4c (diff) | |
Merge remote-tracking branch 'origin/master' into next
(Merge in order to get the PCIe mps/mrss code fixes)
Diffstat (limited to 'drivers')
150 files changed, 2063 insertions, 1382 deletions
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h index bc533dde16c4..f895a244ca7e 100644 --- a/drivers/acpi/acpica/acconfig.h +++ b/drivers/acpi/acpica/acconfig.h | |||
| @@ -121,7 +121,7 @@ | |||
| 121 | 121 | ||
| 122 | /* Maximum sleep allowed via Sleep() operator */ | 122 | /* Maximum sleep allowed via Sleep() operator */ |
| 123 | 123 | ||
| 124 | #define ACPI_MAX_SLEEP 20000 /* Two seconds */ | 124 | #define ACPI_MAX_SLEEP 2000 /* Two seconds */ |
| 125 | 125 | ||
| 126 | /****************************************************************************** | 126 | /****************************************************************************** |
| 127 | * | 127 | * |
diff --git a/drivers/acpi/apei/Kconfig b/drivers/acpi/apei/Kconfig index c34aa51af4ee..e3f47872ec22 100644 --- a/drivers/acpi/apei/Kconfig +++ b/drivers/acpi/apei/Kconfig | |||
| @@ -13,6 +13,7 @@ config ACPI_APEI_GHES | |||
| 13 | bool "APEI Generic Hardware Error Source" | 13 | bool "APEI Generic Hardware Error Source" |
| 14 | depends on ACPI_APEI && X86 | 14 | depends on ACPI_APEI && X86 |
| 15 | select ACPI_HED | 15 | select ACPI_HED |
| 16 | select IRQ_WORK | ||
| 16 | select LLIST | 17 | select LLIST |
| 17 | select GENERIC_ALLOCATOR | 18 | select GENERIC_ALLOCATOR |
| 18 | help | 19 | help |
diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c index 8041248fce9b..61540360d5ce 100644 --- a/drivers/acpi/apei/apei-base.c +++ b/drivers/acpi/apei/apei-base.c | |||
| @@ -618,7 +618,7 @@ int apei_osc_setup(void) | |||
| 618 | }; | 618 | }; |
| 619 | 619 | ||
| 620 | capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE; | 620 | capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE; |
| 621 | capbuf[OSC_SUPPORT_TYPE] = 0; | 621 | capbuf[OSC_SUPPORT_TYPE] = 1; |
| 622 | capbuf[OSC_CONTROL_TYPE] = 0; | 622 | capbuf[OSC_CONTROL_TYPE] = 0; |
| 623 | 623 | ||
| 624 | if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)) | 624 | if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)) |
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 0eef4da1ac61..20663f8dae45 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c | |||
| @@ -168,13 +168,11 @@ struct regmap *regmap_init(struct device *dev, | |||
| 168 | map->work_buf = kmalloc(map->format.buf_size, GFP_KERNEL); | 168 | map->work_buf = kmalloc(map->format.buf_size, GFP_KERNEL); |
| 169 | if (map->work_buf == NULL) { | 169 | if (map->work_buf == NULL) { |
| 170 | ret = -ENOMEM; | 170 | ret = -ENOMEM; |
| 171 | goto err_bus; | 171 | goto err_map; |
| 172 | } | 172 | } |
| 173 | 173 | ||
| 174 | return map; | 174 | return map; |
| 175 | 175 | ||
| 176 | err_bus: | ||
| 177 | module_put(map->bus->owner); | ||
| 178 | err_map: | 176 | err_map: |
| 179 | kfree(map); | 177 | kfree(map); |
| 180 | err: | 178 | err: |
| @@ -188,7 +186,6 @@ EXPORT_SYMBOL_GPL(regmap_init); | |||
| 188 | void regmap_exit(struct regmap *map) | 186 | void regmap_exit(struct regmap *map) |
| 189 | { | 187 | { |
| 190 | kfree(map->work_buf); | 188 | kfree(map->work_buf); |
| 191 | module_put(map->bus->owner); | ||
| 192 | kfree(map); | 189 | kfree(map); |
| 193 | } | 190 | } |
| 194 | EXPORT_SYMBOL_GPL(regmap_exit); | 191 | EXPORT_SYMBOL_GPL(regmap_exit); |
diff --git a/drivers/cpufreq/pcc-cpufreq.c b/drivers/cpufreq/pcc-cpufreq.c index 7b0603eb0129..cdc02ac8f41a 100644 --- a/drivers/cpufreq/pcc-cpufreq.c +++ b/drivers/cpufreq/pcc-cpufreq.c | |||
| @@ -261,6 +261,9 @@ static int pcc_get_offset(int cpu) | |||
| 261 | pr = per_cpu(processors, cpu); | 261 | pr = per_cpu(processors, cpu); |
| 262 | pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu); | 262 | pcc_cpu_data = per_cpu_ptr(pcc_cpu_info, cpu); |
| 263 | 263 | ||
| 264 | if (!pr) | ||
| 265 | return -ENODEV; | ||
| 266 | |||
| 264 | status = acpi_evaluate_object(pr->handle, "PCCP", NULL, &buffer); | 267 | status = acpi_evaluate_object(pr->handle, "PCCP", NULL, &buffer); |
| 265 | if (ACPI_FAILURE(status)) | 268 | if (ACPI_FAILURE(status)) |
| 266 | return -ENODEV; | 269 | return -ENODEV; |
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index cd3a7c726bf8..467e4dcb20a0 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c | |||
| @@ -174,8 +174,10 @@ struct d40_base; | |||
| 174 | * @tasklet: Tasklet that gets scheduled from interrupt context to complete a | 174 | * @tasklet: Tasklet that gets scheduled from interrupt context to complete a |
| 175 | * transfer and call client callback. | 175 | * transfer and call client callback. |
| 176 | * @client: Cliented owned descriptor list. | 176 | * @client: Cliented owned descriptor list. |
| 177 | * @pending_queue: Submitted jobs, to be issued by issue_pending() | ||
| 177 | * @active: Active descriptor. | 178 | * @active: Active descriptor. |
| 178 | * @queue: Queued jobs. | 179 | * @queue: Queued jobs. |
| 180 | * @prepare_queue: Prepared jobs. | ||
| 179 | * @dma_cfg: The client configuration of this dma channel. | 181 | * @dma_cfg: The client configuration of this dma channel. |
| 180 | * @configured: whether the dma_cfg configuration is valid | 182 | * @configured: whether the dma_cfg configuration is valid |
| 181 | * @base: Pointer to the device instance struct. | 183 | * @base: Pointer to the device instance struct. |
| @@ -203,6 +205,7 @@ struct d40_chan { | |||
| 203 | struct list_head pending_queue; | 205 | struct list_head pending_queue; |
| 204 | struct list_head active; | 206 | struct list_head active; |
| 205 | struct list_head queue; | 207 | struct list_head queue; |
| 208 | struct list_head prepare_queue; | ||
| 206 | struct stedma40_chan_cfg dma_cfg; | 209 | struct stedma40_chan_cfg dma_cfg; |
| 207 | bool configured; | 210 | bool configured; |
| 208 | struct d40_base *base; | 211 | struct d40_base *base; |
| @@ -477,7 +480,6 @@ static struct d40_desc *d40_desc_get(struct d40_chan *d40c) | |||
| 477 | 480 | ||
| 478 | list_for_each_entry_safe(d, _d, &d40c->client, node) | 481 | list_for_each_entry_safe(d, _d, &d40c->client, node) |
| 479 | if (async_tx_test_ack(&d->txd)) { | 482 | if (async_tx_test_ack(&d->txd)) { |
| 480 | d40_pool_lli_free(d40c, d); | ||
| 481 | d40_desc_remove(d); | 483 | d40_desc_remove(d); |
| 482 | desc = d; | 484 | desc = d; |
| 483 | memset(desc, 0, sizeof(*desc)); | 485 | memset(desc, 0, sizeof(*desc)); |
| @@ -644,8 +646,11 @@ static struct d40_desc *d40_first_active_get(struct d40_chan *d40c) | |||
| 644 | return d; | 646 | return d; |
| 645 | } | 647 | } |
| 646 | 648 | ||
| 649 | /* remove desc from current queue and add it to the pending_queue */ | ||
| 647 | static void d40_desc_queue(struct d40_chan *d40c, struct d40_desc *desc) | 650 | static void d40_desc_queue(struct d40_chan *d40c, struct d40_desc *desc) |
| 648 | { | 651 | { |
| 652 | d40_desc_remove(desc); | ||
| 653 | desc->is_in_client_list = false; | ||
| 649 | list_add_tail(&desc->node, &d40c->pending_queue); | 654 | list_add_tail(&desc->node, &d40c->pending_queue); |
| 650 | } | 655 | } |
| 651 | 656 | ||
| @@ -803,6 +808,7 @@ done: | |||
| 803 | static void d40_term_all(struct d40_chan *d40c) | 808 | static void d40_term_all(struct d40_chan *d40c) |
| 804 | { | 809 | { |
| 805 | struct d40_desc *d40d; | 810 | struct d40_desc *d40d; |
| 811 | struct d40_desc *_d; | ||
| 806 | 812 | ||
| 807 | /* Release active descriptors */ | 813 | /* Release active descriptors */ |
| 808 | while ((d40d = d40_first_active_get(d40c))) { | 814 | while ((d40d = d40_first_active_get(d40c))) { |
| @@ -822,6 +828,21 @@ static void d40_term_all(struct d40_chan *d40c) | |||
| 822 | d40_desc_free(d40c, d40d); | 828 | d40_desc_free(d40c, d40d); |
| 823 | } | 829 | } |
| 824 | 830 | ||
| 831 | /* Release client owned descriptors */ | ||
| 832 | if (!list_empty(&d40c->client)) | ||
| 833 | list_for_each_entry_safe(d40d, _d, &d40c->client, node) { | ||
| 834 | d40_desc_remove(d40d); | ||
| 835 | d40_desc_free(d40c, d40d); | ||
| 836 | } | ||
| 837 | |||
| 838 | /* Release descriptors in prepare queue */ | ||
| 839 | if (!list_empty(&d40c->prepare_queue)) | ||
| 840 | list_for_each_entry_safe(d40d, _d, | ||
| 841 | &d40c->prepare_queue, node) { | ||
| 842 | d40_desc_remove(d40d); | ||
| 843 | d40_desc_free(d40c, d40d); | ||
| 844 | } | ||
| 845 | |||
| 825 | d40c->pending_tx = 0; | 846 | d40c->pending_tx = 0; |
| 826 | d40c->busy = false; | 847 | d40c->busy = false; |
| 827 | } | 848 | } |
| @@ -1208,7 +1229,6 @@ static void dma_tasklet(unsigned long data) | |||
| 1208 | 1229 | ||
| 1209 | if (!d40d->cyclic) { | 1230 | if (!d40d->cyclic) { |
| 1210 | if (async_tx_test_ack(&d40d->txd)) { | 1231 | if (async_tx_test_ack(&d40d->txd)) { |
| 1211 | d40_pool_lli_free(d40c, d40d); | ||
| 1212 | d40_desc_remove(d40d); | 1232 | d40_desc_remove(d40d); |
| 1213 | d40_desc_free(d40c, d40d); | 1233 | d40_desc_free(d40c, d40d); |
| 1214 | } else { | 1234 | } else { |
| @@ -1595,21 +1615,10 @@ static int d40_free_dma(struct d40_chan *d40c) | |||
| 1595 | u32 event; | 1615 | u32 event; |
| 1596 | struct d40_phy_res *phy = d40c->phy_chan; | 1616 | struct d40_phy_res *phy = d40c->phy_chan; |
| 1597 | bool is_src; | 1617 | bool is_src; |
| 1598 | struct d40_desc *d; | ||
| 1599 | struct d40_desc *_d; | ||
| 1600 | |||
| 1601 | 1618 | ||
| 1602 | /* Terminate all queued and active transfers */ | 1619 | /* Terminate all queued and active transfers */ |
| 1603 | d40_term_all(d40c); | 1620 | d40_term_all(d40c); |
| 1604 | 1621 | ||
| 1605 | /* Release client owned descriptors */ | ||
| 1606 | if (!list_empty(&d40c->client)) | ||
| 1607 | list_for_each_entry_safe(d, _d, &d40c->client, node) { | ||
| 1608 | d40_pool_lli_free(d40c, d); | ||
| 1609 | d40_desc_remove(d); | ||
| 1610 | d40_desc_free(d40c, d); | ||
| 1611 | } | ||
| 1612 | |||
| 1613 | if (phy == NULL) { | 1622 | if (phy == NULL) { |
| 1614 | chan_err(d40c, "phy == null\n"); | 1623 | chan_err(d40c, "phy == null\n"); |
| 1615 | return -EINVAL; | 1624 | return -EINVAL; |
| @@ -1911,6 +1920,12 @@ d40_prep_sg(struct dma_chan *dchan, struct scatterlist *sg_src, | |||
| 1911 | goto err; | 1920 | goto err; |
| 1912 | } | 1921 | } |
| 1913 | 1922 | ||
| 1923 | /* | ||
| 1924 | * add descriptor to the prepare queue in order to be able | ||
| 1925 | * to free them later in terminate_all | ||
| 1926 | */ | ||
| 1927 | list_add_tail(&desc->node, &chan->prepare_queue); | ||
| 1928 | |||
| 1914 | spin_unlock_irqrestore(&chan->lock, flags); | 1929 | spin_unlock_irqrestore(&chan->lock, flags); |
| 1915 | 1930 | ||
| 1916 | return &desc->txd; | 1931 | return &desc->txd; |
| @@ -2400,6 +2415,7 @@ static void __init d40_chan_init(struct d40_base *base, struct dma_device *dma, | |||
| 2400 | INIT_LIST_HEAD(&d40c->queue); | 2415 | INIT_LIST_HEAD(&d40c->queue); |
| 2401 | INIT_LIST_HEAD(&d40c->pending_queue); | 2416 | INIT_LIST_HEAD(&d40c->pending_queue); |
| 2402 | INIT_LIST_HEAD(&d40c->client); | 2417 | INIT_LIST_HEAD(&d40c->client); |
| 2418 | INIT_LIST_HEAD(&d40c->prepare_queue); | ||
| 2403 | 2419 | ||
| 2404 | tasklet_init(&d40c->tasklet, dma_tasklet, | 2420 | tasklet_init(&d40c->tasklet, dma_tasklet, |
| 2405 | (unsigned long) d40c); | 2421 | (unsigned long) d40c); |
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index 57cd3a406edf..fd7170a9ad2c 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c | |||
| @@ -290,6 +290,9 @@ static const struct { | |||
| 290 | {PCI_VENDOR_ID_NEC, PCI_ANY_ID, PCI_ANY_ID, | 290 | {PCI_VENDOR_ID_NEC, PCI_ANY_ID, PCI_ANY_ID, |
| 291 | QUIRK_CYCLE_TIMER}, | 291 | QUIRK_CYCLE_TIMER}, |
| 292 | 292 | ||
| 293 | {PCI_VENDOR_ID_O2, PCI_ANY_ID, PCI_ANY_ID, | ||
| 294 | QUIRK_NO_MSI}, | ||
| 295 | |||
| 293 | {PCI_VENDOR_ID_RICOH, PCI_ANY_ID, PCI_ANY_ID, | 296 | {PCI_VENDOR_ID_RICOH, PCI_ANY_ID, PCI_ANY_ID, |
| 294 | QUIRK_CYCLE_TIMER}, | 297 | QUIRK_CYCLE_TIMER}, |
| 295 | 298 | ||
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c index 231714def4d2..4e24436b0f82 100644 --- a/drivers/gpio/gpio-generic.c +++ b/drivers/gpio/gpio-generic.c | |||
| @@ -351,7 +351,7 @@ static int bgpio_setup_direction(struct bgpio_chip *bgc, | |||
| 351 | return 0; | 351 | return 0; |
| 352 | } | 352 | } |
| 353 | 353 | ||
| 354 | int __devexit bgpio_remove(struct bgpio_chip *bgc) | 354 | int bgpio_remove(struct bgpio_chip *bgc) |
| 355 | { | 355 | { |
| 356 | int err = gpiochip_remove(&bgc->gc); | 356 | int err = gpiochip_remove(&bgc->gc); |
| 357 | 357 | ||
| @@ -361,15 +361,10 @@ int __devexit bgpio_remove(struct bgpio_chip *bgc) | |||
| 361 | } | 361 | } |
| 362 | EXPORT_SYMBOL_GPL(bgpio_remove); | 362 | EXPORT_SYMBOL_GPL(bgpio_remove); |
| 363 | 363 | ||
| 364 | int __devinit bgpio_init(struct bgpio_chip *bgc, | 364 | int bgpio_init(struct bgpio_chip *bgc, struct device *dev, |
| 365 | struct device *dev, | 365 | unsigned long sz, void __iomem *dat, void __iomem *set, |
| 366 | unsigned long sz, | 366 | void __iomem *clr, void __iomem *dirout, void __iomem *dirin, |
| 367 | void __iomem *dat, | 367 | bool big_endian) |
| 368 | void __iomem *set, | ||
| 369 | void __iomem *clr, | ||
| 370 | void __iomem *dirout, | ||
| 371 | void __iomem *dirin, | ||
| 372 | bool big_endian) | ||
| 373 | { | 368 | { |
| 374 | int ret; | 369 | int ret; |
| 375 | 370 | ||
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 802b61ac3139..f7c6854eb4dd 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
| @@ -256,7 +256,6 @@ int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed, | |||
| 256 | { | 256 | { |
| 257 | printk(KERN_ERR "panic occurred, switching back to text console\n"); | 257 | printk(KERN_ERR "panic occurred, switching back to text console\n"); |
| 258 | return drm_fb_helper_force_kernel_mode(); | 258 | return drm_fb_helper_force_kernel_mode(); |
| 259 | return 0; | ||
| 260 | } | 259 | } |
| 261 | EXPORT_SYMBOL(drm_fb_helper_panic); | 260 | EXPORT_SYMBOL(drm_fb_helper_panic); |
| 262 | 261 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 8d02d875376d..c919cfc8f2fd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
| @@ -530,7 +530,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
| 530 | nouveau_gpuobj_ref(NULL, &obj); | 530 | nouveau_gpuobj_ref(NULL, &obj); |
| 531 | if (ret) | 531 | if (ret) |
| 532 | return ret; | 532 | return ret; |
| 533 | } else { | 533 | } else |
| 534 | if (USE_SEMA(dev)) { | ||
| 534 | /* map fence bo into channel's vm */ | 535 | /* map fence bo into channel's vm */ |
| 535 | ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm, | 536 | ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm, |
| 536 | &chan->fence.vma); | 537 | &chan->fence.vma); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index c444cadbf849..2706cb3d871a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
| @@ -37,8 +37,11 @@ nouveau_sgdma_populate(struct ttm_backend *be, unsigned long num_pages, | |||
| 37 | return -ENOMEM; | 37 | return -ENOMEM; |
| 38 | 38 | ||
| 39 | nvbe->ttm_alloced = kmalloc(sizeof(bool) * num_pages, GFP_KERNEL); | 39 | nvbe->ttm_alloced = kmalloc(sizeof(bool) * num_pages, GFP_KERNEL); |
| 40 | if (!nvbe->ttm_alloced) | 40 | if (!nvbe->ttm_alloced) { |
| 41 | kfree(nvbe->pages); | ||
| 42 | nvbe->pages = NULL; | ||
| 41 | return -ENOMEM; | 43 | return -ENOMEM; |
| 44 | } | ||
| 42 | 45 | ||
| 43 | nvbe->nr_pages = 0; | 46 | nvbe->nr_pages = 0; |
| 44 | while (num_pages--) { | 47 | while (num_pages--) { |
| @@ -126,7 +129,7 @@ nv04_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem) | |||
| 126 | 129 | ||
| 127 | for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++, pte++) { | 130 | for (j = 0; j < PAGE_SIZE / NV_CTXDMA_PAGE_SIZE; j++, pte++) { |
| 128 | nv_wo32(gpuobj, (pte * 4) + 0, offset_l | 3); | 131 | nv_wo32(gpuobj, (pte * 4) + 0, offset_l | 3); |
| 129 | dma_offset += NV_CTXDMA_PAGE_SIZE; | 132 | offset_l += NV_CTXDMA_PAGE_SIZE; |
| 130 | } | 133 | } |
| 131 | } | 134 | } |
| 132 | 135 | ||
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c index 118261d4927a..5e45398a9e2d 100644 --- a/drivers/gpu/drm/nouveau/nv04_crtc.c +++ b/drivers/gpu/drm/nouveau/nv04_crtc.c | |||
| @@ -781,11 +781,20 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
| 781 | struct drm_device *dev = crtc->dev; | 781 | struct drm_device *dev = crtc->dev; |
| 782 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 782 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 783 | struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; | 783 | struct nv04_crtc_reg *regp = &dev_priv->mode_reg.crtc_reg[nv_crtc->index]; |
| 784 | struct drm_framebuffer *drm_fb = nv_crtc->base.fb; | 784 | struct drm_framebuffer *drm_fb; |
| 785 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | 785 | struct nouveau_framebuffer *fb; |
| 786 | int arb_burst, arb_lwm; | 786 | int arb_burst, arb_lwm; |
| 787 | int ret; | 787 | int ret; |
| 788 | 788 | ||
| 789 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); | ||
| 790 | |||
| 791 | /* no fb bound */ | ||
| 792 | if (!atomic && !crtc->fb) { | ||
| 793 | NV_DEBUG_KMS(dev, "No FB bound\n"); | ||
| 794 | return 0; | ||
| 795 | } | ||
| 796 | |||
| 797 | |||
| 789 | /* If atomic, we want to switch to the fb we were passed, so | 798 | /* If atomic, we want to switch to the fb we were passed, so |
| 790 | * now we update pointers to do that. (We don't pin; just | 799 | * now we update pointers to do that. (We don't pin; just |
| 791 | * assume we're already pinned and update the base address.) | 800 | * assume we're already pinned and update the base address.) |
| @@ -794,6 +803,8 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
| 794 | drm_fb = passed_fb; | 803 | drm_fb = passed_fb; |
| 795 | fb = nouveau_framebuffer(passed_fb); | 804 | fb = nouveau_framebuffer(passed_fb); |
| 796 | } else { | 805 | } else { |
| 806 | drm_fb = crtc->fb; | ||
| 807 | fb = nouveau_framebuffer(crtc->fb); | ||
| 797 | /* If not atomic, we can go ahead and pin, and unpin the | 808 | /* If not atomic, we can go ahead and pin, and unpin the |
| 798 | * old fb we were passed. | 809 | * old fb we were passed. |
| 799 | */ | 810 | */ |
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c index 46ad59ea2185..5d989073ba6e 100644 --- a/drivers/gpu/drm/nouveau/nv50_crtc.c +++ b/drivers/gpu/drm/nouveau/nv50_crtc.c | |||
| @@ -519,12 +519,18 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
| 519 | struct drm_device *dev = nv_crtc->base.dev; | 519 | struct drm_device *dev = nv_crtc->base.dev; |
| 520 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 520 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 521 | struct nouveau_channel *evo = nv50_display(dev)->master; | 521 | struct nouveau_channel *evo = nv50_display(dev)->master; |
| 522 | struct drm_framebuffer *drm_fb = nv_crtc->base.fb; | 522 | struct drm_framebuffer *drm_fb; |
| 523 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | 523 | struct nouveau_framebuffer *fb; |
| 524 | int ret; | 524 | int ret; |
| 525 | 525 | ||
| 526 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); | 526 | NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); |
| 527 | 527 | ||
| 528 | /* no fb bound */ | ||
| 529 | if (!atomic && !crtc->fb) { | ||
| 530 | NV_DEBUG_KMS(dev, "No FB bound\n"); | ||
| 531 | return 0; | ||
| 532 | } | ||
| 533 | |||
| 528 | /* If atomic, we want to switch to the fb we were passed, so | 534 | /* If atomic, we want to switch to the fb we were passed, so |
| 529 | * now we update pointers to do that. (We don't pin; just | 535 | * now we update pointers to do that. (We don't pin; just |
| 530 | * assume we're already pinned and update the base address.) | 536 | * assume we're already pinned and update the base address.) |
| @@ -533,6 +539,8 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
| 533 | drm_fb = passed_fb; | 539 | drm_fb = passed_fb; |
| 534 | fb = nouveau_framebuffer(passed_fb); | 540 | fb = nouveau_framebuffer(passed_fb); |
| 535 | } else { | 541 | } else { |
| 542 | drm_fb = crtc->fb; | ||
| 543 | fb = nouveau_framebuffer(crtc->fb); | ||
| 536 | /* If not atomic, we can go ahead and pin, and unpin the | 544 | /* If not atomic, we can go ahead and pin, and unpin the |
| 537 | * old fb we were passed. | 545 | * old fb we were passed. |
| 538 | */ | 546 | */ |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index d8d71a399f52..e8a746712b5b 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -41,6 +41,31 @@ static void evergreen_gpu_init(struct radeon_device *rdev); | |||
| 41 | void evergreen_fini(struct radeon_device *rdev); | 41 | void evergreen_fini(struct radeon_device *rdev); |
| 42 | static void evergreen_pcie_gen2_enable(struct radeon_device *rdev); | 42 | static void evergreen_pcie_gen2_enable(struct radeon_device *rdev); |
| 43 | 43 | ||
| 44 | void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) | ||
| 45 | { | ||
| 46 | u16 ctl, v; | ||
| 47 | int cap, err; | ||
| 48 | |||
| 49 | cap = pci_pcie_cap(rdev->pdev); | ||
| 50 | if (!cap) | ||
| 51 | return; | ||
| 52 | |||
| 53 | err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, &ctl); | ||
| 54 | if (err) | ||
| 55 | return; | ||
| 56 | |||
| 57 | v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12; | ||
| 58 | |||
| 59 | /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it | ||
| 60 | * to avoid hangs or perfomance issues | ||
| 61 | */ | ||
| 62 | if ((v == 0) || (v == 6) || (v == 7)) { | ||
| 63 | ctl &= ~PCI_EXP_DEVCTL_READRQ; | ||
| 64 | ctl |= (2 << 12); | ||
| 65 | pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, ctl); | ||
| 66 | } | ||
| 67 | } | ||
| 68 | |||
| 44 | void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc) | 69 | void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc) |
| 45 | { | 70 | { |
| 46 | /* enable the pflip int */ | 71 | /* enable the pflip int */ |
| @@ -1379,7 +1404,8 @@ int evergreen_cp_resume(struct radeon_device *rdev) | |||
| 1379 | /* Initialize the ring buffer's read and write pointers */ | 1404 | /* Initialize the ring buffer's read and write pointers */ |
| 1380 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); | 1405 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); |
| 1381 | WREG32(CP_RB_RPTR_WR, 0); | 1406 | WREG32(CP_RB_RPTR_WR, 0); |
| 1382 | WREG32(CP_RB_WPTR, 0); | 1407 | rdev->cp.wptr = 0; |
| 1408 | WREG32(CP_RB_WPTR, rdev->cp.wptr); | ||
| 1383 | 1409 | ||
| 1384 | /* set the wb address wether it's enabled or not */ | 1410 | /* set the wb address wether it's enabled or not */ |
| 1385 | WREG32(CP_RB_RPTR_ADDR, | 1411 | WREG32(CP_RB_RPTR_ADDR, |
| @@ -1401,7 +1427,6 @@ int evergreen_cp_resume(struct radeon_device *rdev) | |||
| 1401 | WREG32(CP_DEBUG, (1 << 27) | (1 << 28)); | 1427 | WREG32(CP_DEBUG, (1 << 27) | (1 << 28)); |
| 1402 | 1428 | ||
| 1403 | rdev->cp.rptr = RREG32(CP_RB_RPTR); | 1429 | rdev->cp.rptr = RREG32(CP_RB_RPTR); |
| 1404 | rdev->cp.wptr = RREG32(CP_RB_WPTR); | ||
| 1405 | 1430 | ||
| 1406 | evergreen_cp_start(rdev); | 1431 | evergreen_cp_start(rdev); |
| 1407 | rdev->cp.ready = true; | 1432 | rdev->cp.ready = true; |
| @@ -1863,6 +1888,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
| 1863 | 1888 | ||
| 1864 | WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); | 1889 | WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); |
| 1865 | 1890 | ||
| 1891 | evergreen_fix_pci_max_read_req_size(rdev); | ||
| 1892 | |||
| 1866 | cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & ~2; | 1893 | cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & ~2; |
| 1867 | 1894 | ||
| 1868 | cc_gc_shader_pipe_config |= | 1895 | cc_gc_shader_pipe_config |= |
| @@ -3144,21 +3171,23 @@ int evergreen_suspend(struct radeon_device *rdev) | |||
| 3144 | } | 3171 | } |
| 3145 | 3172 | ||
| 3146 | int evergreen_copy_blit(struct radeon_device *rdev, | 3173 | int evergreen_copy_blit(struct radeon_device *rdev, |
| 3147 | uint64_t src_offset, uint64_t dst_offset, | 3174 | uint64_t src_offset, |
| 3148 | unsigned num_pages, struct radeon_fence *fence) | 3175 | uint64_t dst_offset, |
| 3176 | unsigned num_gpu_pages, | ||
| 3177 | struct radeon_fence *fence) | ||
| 3149 | { | 3178 | { |
| 3150 | int r; | 3179 | int r; |
| 3151 | 3180 | ||
| 3152 | mutex_lock(&rdev->r600_blit.mutex); | 3181 | mutex_lock(&rdev->r600_blit.mutex); |
| 3153 | rdev->r600_blit.vb_ib = NULL; | 3182 | rdev->r600_blit.vb_ib = NULL; |
| 3154 | r = evergreen_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); | 3183 | r = evergreen_blit_prepare_copy(rdev, num_gpu_pages * RADEON_GPU_PAGE_SIZE); |
| 3155 | if (r) { | 3184 | if (r) { |
| 3156 | if (rdev->r600_blit.vb_ib) | 3185 | if (rdev->r600_blit.vb_ib) |
| 3157 | radeon_ib_free(rdev, &rdev->r600_blit.vb_ib); | 3186 | radeon_ib_free(rdev, &rdev->r600_blit.vb_ib); |
| 3158 | mutex_unlock(&rdev->r600_blit.mutex); | 3187 | mutex_unlock(&rdev->r600_blit.mutex); |
| 3159 | return r; | 3188 | return r; |
| 3160 | } | 3189 | } |
| 3161 | evergreen_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); | 3190 | evergreen_kms_blit_copy(rdev, src_offset, dst_offset, num_gpu_pages * RADEON_GPU_PAGE_SIZE); |
| 3162 | evergreen_blit_done_copy(rdev, fence); | 3191 | evergreen_blit_done_copy(rdev, fence); |
| 3163 | mutex_unlock(&rdev->r600_blit.mutex); | 3192 | mutex_unlock(&rdev->r600_blit.mutex); |
| 3164 | return 0; | 3193 | return 0; |
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index a2e00fa9c618..99fbd793c08c 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
| @@ -39,6 +39,7 @@ extern int evergreen_mc_wait_for_idle(struct radeon_device *rdev); | |||
| 39 | extern void evergreen_mc_program(struct radeon_device *rdev); | 39 | extern void evergreen_mc_program(struct radeon_device *rdev); |
| 40 | extern void evergreen_irq_suspend(struct radeon_device *rdev); | 40 | extern void evergreen_irq_suspend(struct radeon_device *rdev); |
| 41 | extern int evergreen_mc_init(struct radeon_device *rdev); | 41 | extern int evergreen_mc_init(struct radeon_device *rdev); |
| 42 | extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); | ||
| 42 | 43 | ||
| 43 | #define EVERGREEN_PFP_UCODE_SIZE 1120 | 44 | #define EVERGREEN_PFP_UCODE_SIZE 1120 |
| 44 | #define EVERGREEN_PM4_UCODE_SIZE 1376 | 45 | #define EVERGREEN_PM4_UCODE_SIZE 1376 |
| @@ -669,6 +670,8 @@ static void cayman_gpu_init(struct radeon_device *rdev) | |||
| 669 | 670 | ||
| 670 | WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); | 671 | WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); |
| 671 | 672 | ||
| 673 | evergreen_fix_pci_max_read_req_size(rdev); | ||
| 674 | |||
| 672 | mc_shared_chmap = RREG32(MC_SHARED_CHMAP); | 675 | mc_shared_chmap = RREG32(MC_SHARED_CHMAP); |
| 673 | mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); | 676 | mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); |
| 674 | 677 | ||
| @@ -1184,7 +1187,8 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1184 | 1187 | ||
| 1185 | /* Initialize the ring buffer's read and write pointers */ | 1188 | /* Initialize the ring buffer's read and write pointers */ |
| 1186 | WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA); | 1189 | WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA); |
| 1187 | WREG32(CP_RB0_WPTR, 0); | 1190 | rdev->cp.wptr = 0; |
| 1191 | WREG32(CP_RB0_WPTR, rdev->cp.wptr); | ||
| 1188 | 1192 | ||
| 1189 | /* set the wb address wether it's enabled or not */ | 1193 | /* set the wb address wether it's enabled or not */ |
| 1190 | WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); | 1194 | WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); |
| @@ -1204,7 +1208,6 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1204 | WREG32(CP_RB0_BASE, rdev->cp.gpu_addr >> 8); | 1208 | WREG32(CP_RB0_BASE, rdev->cp.gpu_addr >> 8); |
| 1205 | 1209 | ||
| 1206 | rdev->cp.rptr = RREG32(CP_RB0_RPTR); | 1210 | rdev->cp.rptr = RREG32(CP_RB0_RPTR); |
| 1207 | rdev->cp.wptr = RREG32(CP_RB0_WPTR); | ||
| 1208 | 1211 | ||
| 1209 | /* ring1 - compute only */ | 1212 | /* ring1 - compute only */ |
| 1210 | /* Set ring buffer size */ | 1213 | /* Set ring buffer size */ |
| @@ -1217,7 +1220,8 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1217 | 1220 | ||
| 1218 | /* Initialize the ring buffer's read and write pointers */ | 1221 | /* Initialize the ring buffer's read and write pointers */ |
| 1219 | WREG32(CP_RB1_CNTL, tmp | RB_RPTR_WR_ENA); | 1222 | WREG32(CP_RB1_CNTL, tmp | RB_RPTR_WR_ENA); |
| 1220 | WREG32(CP_RB1_WPTR, 0); | 1223 | rdev->cp1.wptr = 0; |
| 1224 | WREG32(CP_RB1_WPTR, rdev->cp1.wptr); | ||
| 1221 | 1225 | ||
| 1222 | /* set the wb address wether it's enabled or not */ | 1226 | /* set the wb address wether it's enabled or not */ |
| 1223 | WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); | 1227 | WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC); |
| @@ -1229,7 +1233,6 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1229 | WREG32(CP_RB1_BASE, rdev->cp1.gpu_addr >> 8); | 1233 | WREG32(CP_RB1_BASE, rdev->cp1.gpu_addr >> 8); |
| 1230 | 1234 | ||
| 1231 | rdev->cp1.rptr = RREG32(CP_RB1_RPTR); | 1235 | rdev->cp1.rptr = RREG32(CP_RB1_RPTR); |
| 1232 | rdev->cp1.wptr = RREG32(CP_RB1_WPTR); | ||
| 1233 | 1236 | ||
| 1234 | /* ring2 - compute only */ | 1237 | /* ring2 - compute only */ |
| 1235 | /* Set ring buffer size */ | 1238 | /* Set ring buffer size */ |
| @@ -1242,7 +1245,8 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1242 | 1245 | ||
| 1243 | /* Initialize the ring buffer's read and write pointers */ | 1246 | /* Initialize the ring buffer's read and write pointers */ |
| 1244 | WREG32(CP_RB2_CNTL, tmp | RB_RPTR_WR_ENA); | 1247 | WREG32(CP_RB2_CNTL, tmp | RB_RPTR_WR_ENA); |
| 1245 | WREG32(CP_RB2_WPTR, 0); | 1248 | rdev->cp2.wptr = 0; |
| 1249 | WREG32(CP_RB2_WPTR, rdev->cp2.wptr); | ||
| 1246 | 1250 | ||
| 1247 | /* set the wb address wether it's enabled or not */ | 1251 | /* set the wb address wether it's enabled or not */ |
| 1248 | WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); | 1252 | WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC); |
| @@ -1254,7 +1258,6 @@ int cayman_cp_resume(struct radeon_device *rdev) | |||
| 1254 | WREG32(CP_RB2_BASE, rdev->cp2.gpu_addr >> 8); | 1258 | WREG32(CP_RB2_BASE, rdev->cp2.gpu_addr >> 8); |
| 1255 | 1259 | ||
| 1256 | rdev->cp2.rptr = RREG32(CP_RB2_RPTR); | 1260 | rdev->cp2.rptr = RREG32(CP_RB2_RPTR); |
| 1257 | rdev->cp2.wptr = RREG32(CP_RB2_WPTR); | ||
| 1258 | 1261 | ||
| 1259 | /* start the rings */ | 1262 | /* start the rings */ |
| 1260 | cayman_cp_start(rdev); | 1263 | cayman_cp_start(rdev); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index f2204cb1ccdf..5b1837b4aacf 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
| @@ -721,11 +721,11 @@ void r100_fence_ring_emit(struct radeon_device *rdev, | |||
| 721 | int r100_copy_blit(struct radeon_device *rdev, | 721 | int r100_copy_blit(struct radeon_device *rdev, |
| 722 | uint64_t src_offset, | 722 | uint64_t src_offset, |
| 723 | uint64_t dst_offset, | 723 | uint64_t dst_offset, |
| 724 | unsigned num_pages, | 724 | unsigned num_gpu_pages, |
| 725 | struct radeon_fence *fence) | 725 | struct radeon_fence *fence) |
| 726 | { | 726 | { |
| 727 | uint32_t cur_pages; | 727 | uint32_t cur_pages; |
| 728 | uint32_t stride_bytes = PAGE_SIZE; | 728 | uint32_t stride_bytes = RADEON_GPU_PAGE_SIZE; |
| 729 | uint32_t pitch; | 729 | uint32_t pitch; |
| 730 | uint32_t stride_pixels; | 730 | uint32_t stride_pixels; |
| 731 | unsigned ndw; | 731 | unsigned ndw; |
| @@ -737,7 +737,7 @@ int r100_copy_blit(struct radeon_device *rdev, | |||
| 737 | /* radeon pitch is /64 */ | 737 | /* radeon pitch is /64 */ |
| 738 | pitch = stride_bytes / 64; | 738 | pitch = stride_bytes / 64; |
| 739 | stride_pixels = stride_bytes / 4; | 739 | stride_pixels = stride_bytes / 4; |
| 740 | num_loops = DIV_ROUND_UP(num_pages, 8191); | 740 | num_loops = DIV_ROUND_UP(num_gpu_pages, 8191); |
| 741 | 741 | ||
| 742 | /* Ask for enough room for blit + flush + fence */ | 742 | /* Ask for enough room for blit + flush + fence */ |
| 743 | ndw = 64 + (10 * num_loops); | 743 | ndw = 64 + (10 * num_loops); |
| @@ -746,12 +746,12 @@ int r100_copy_blit(struct radeon_device *rdev, | |||
| 746 | DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw); | 746 | DRM_ERROR("radeon: moving bo (%d) asking for %u dw.\n", r, ndw); |
| 747 | return -EINVAL; | 747 | return -EINVAL; |
| 748 | } | 748 | } |
| 749 | while (num_pages > 0) { | 749 | while (num_gpu_pages > 0) { |
| 750 | cur_pages = num_pages; | 750 | cur_pages = num_gpu_pages; |
| 751 | if (cur_pages > 8191) { | 751 | if (cur_pages > 8191) { |
| 752 | cur_pages = 8191; | 752 | cur_pages = 8191; |
| 753 | } | 753 | } |
| 754 | num_pages -= cur_pages; | 754 | num_gpu_pages -= cur_pages; |
| 755 | 755 | ||
| 756 | /* pages are in Y direction - height | 756 | /* pages are in Y direction - height |
| 757 | page width in X direction - width */ | 757 | page width in X direction - width */ |
| @@ -773,8 +773,8 @@ int r100_copy_blit(struct radeon_device *rdev, | |||
| 773 | radeon_ring_write(rdev, (0x1fff) | (0x1fff << 16)); | 773 | radeon_ring_write(rdev, (0x1fff) | (0x1fff << 16)); |
| 774 | radeon_ring_write(rdev, 0); | 774 | radeon_ring_write(rdev, 0); |
| 775 | radeon_ring_write(rdev, (0x1fff) | (0x1fff << 16)); | 775 | radeon_ring_write(rdev, (0x1fff) | (0x1fff << 16)); |
| 776 | radeon_ring_write(rdev, num_pages); | 776 | radeon_ring_write(rdev, cur_pages); |
| 777 | radeon_ring_write(rdev, num_pages); | 777 | radeon_ring_write(rdev, cur_pages); |
| 778 | radeon_ring_write(rdev, cur_pages | (stride_pixels << 16)); | 778 | radeon_ring_write(rdev, cur_pages | (stride_pixels << 16)); |
| 779 | } | 779 | } |
| 780 | radeon_ring_write(rdev, PACKET0(RADEON_DSTCACHE_CTLSTAT, 0)); | 780 | radeon_ring_write(rdev, PACKET0(RADEON_DSTCACHE_CTLSTAT, 0)); |
| @@ -990,7 +990,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
| 990 | /* Force read & write ptr to 0 */ | 990 | /* Force read & write ptr to 0 */ |
| 991 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE); | 991 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE); |
| 992 | WREG32(RADEON_CP_RB_RPTR_WR, 0); | 992 | WREG32(RADEON_CP_RB_RPTR_WR, 0); |
| 993 | WREG32(RADEON_CP_RB_WPTR, 0); | 993 | rdev->cp.wptr = 0; |
| 994 | WREG32(RADEON_CP_RB_WPTR, rdev->cp.wptr); | ||
| 994 | 995 | ||
| 995 | /* set the wb address whether it's enabled or not */ | 996 | /* set the wb address whether it's enabled or not */ |
| 996 | WREG32(R_00070C_CP_RB_RPTR_ADDR, | 997 | WREG32(R_00070C_CP_RB_RPTR_ADDR, |
| @@ -1007,9 +1008,6 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
| 1007 | WREG32(RADEON_CP_RB_CNTL, tmp); | 1008 | WREG32(RADEON_CP_RB_CNTL, tmp); |
| 1008 | udelay(10); | 1009 | udelay(10); |
| 1009 | rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR); | 1010 | rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR); |
| 1010 | rdev->cp.wptr = RREG32(RADEON_CP_RB_WPTR); | ||
| 1011 | /* protect against crazy HW on resume */ | ||
| 1012 | rdev->cp.wptr &= rdev->cp.ptr_mask; | ||
| 1013 | /* Set cp mode to bus mastering & enable cp*/ | 1011 | /* Set cp mode to bus mastering & enable cp*/ |
| 1014 | WREG32(RADEON_CP_CSQ_MODE, | 1012 | WREG32(RADEON_CP_CSQ_MODE, |
| 1015 | REG_SET(RADEON_INDIRECT2_START, indirect2_start) | | 1013 | REG_SET(RADEON_INDIRECT2_START, indirect2_start) | |
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index f24058300413..a1f3ba063c2d 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c | |||
| @@ -84,7 +84,7 @@ static int r200_get_vtx_size_0(uint32_t vtx_fmt_0) | |||
| 84 | int r200_copy_dma(struct radeon_device *rdev, | 84 | int r200_copy_dma(struct radeon_device *rdev, |
| 85 | uint64_t src_offset, | 85 | uint64_t src_offset, |
| 86 | uint64_t dst_offset, | 86 | uint64_t dst_offset, |
| 87 | unsigned num_pages, | 87 | unsigned num_gpu_pages, |
| 88 | struct radeon_fence *fence) | 88 | struct radeon_fence *fence) |
| 89 | { | 89 | { |
| 90 | uint32_t size; | 90 | uint32_t size; |
| @@ -93,7 +93,7 @@ int r200_copy_dma(struct radeon_device *rdev, | |||
| 93 | int r = 0; | 93 | int r = 0; |
| 94 | 94 | ||
| 95 | /* radeon pitch is /64 */ | 95 | /* radeon pitch is /64 */ |
| 96 | size = num_pages << PAGE_SHIFT; | 96 | size = num_gpu_pages << RADEON_GPU_PAGE_SHIFT; |
| 97 | num_loops = DIV_ROUND_UP(size, 0x1FFFFF); | 97 | num_loops = DIV_ROUND_UP(size, 0x1FFFFF); |
| 98 | r = radeon_ring_lock(rdev, num_loops * 4 + 64); | 98 | r = radeon_ring_lock(rdev, num_loops * 4 + 64); |
| 99 | if (r) { | 99 | if (r) { |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index aa5571b73aa0..720dd99163f8 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -2209,7 +2209,8 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
| 2209 | /* Initialize the ring buffer's read and write pointers */ | 2209 | /* Initialize the ring buffer's read and write pointers */ |
| 2210 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); | 2210 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); |
| 2211 | WREG32(CP_RB_RPTR_WR, 0); | 2211 | WREG32(CP_RB_RPTR_WR, 0); |
| 2212 | WREG32(CP_RB_WPTR, 0); | 2212 | rdev->cp.wptr = 0; |
| 2213 | WREG32(CP_RB_WPTR, rdev->cp.wptr); | ||
| 2213 | 2214 | ||
| 2214 | /* set the wb address whether it's enabled or not */ | 2215 | /* set the wb address whether it's enabled or not */ |
| 2215 | WREG32(CP_RB_RPTR_ADDR, | 2216 | WREG32(CP_RB_RPTR_ADDR, |
| @@ -2231,7 +2232,6 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
| 2231 | WREG32(CP_DEBUG, (1 << 27) | (1 << 28)); | 2232 | WREG32(CP_DEBUG, (1 << 27) | (1 << 28)); |
| 2232 | 2233 | ||
| 2233 | rdev->cp.rptr = RREG32(CP_RB_RPTR); | 2234 | rdev->cp.rptr = RREG32(CP_RB_RPTR); |
| 2234 | rdev->cp.wptr = RREG32(CP_RB_WPTR); | ||
| 2235 | 2235 | ||
| 2236 | r600_cp_start(rdev); | 2236 | r600_cp_start(rdev); |
| 2237 | rdev->cp.ready = true; | 2237 | rdev->cp.ready = true; |
| @@ -2353,21 +2353,23 @@ void r600_fence_ring_emit(struct radeon_device *rdev, | |||
| 2353 | } | 2353 | } |
| 2354 | 2354 | ||
| 2355 | int r600_copy_blit(struct radeon_device *rdev, | 2355 | int r600_copy_blit(struct radeon_device *rdev, |
| 2356 | uint64_t src_offset, uint64_t dst_offset, | 2356 | uint64_t src_offset, |
| 2357 | unsigned num_pages, struct radeon_fence *fence) | 2357 | uint64_t dst_offset, |
| 2358 | unsigned num_gpu_pages, | ||
| 2359 | struct radeon_fence *fence) | ||
| 2358 | { | 2360 | { |
| 2359 | int r; | 2361 | int r; |
| 2360 | 2362 | ||
| 2361 | mutex_lock(&rdev->r600_blit.mutex); | 2363 | mutex_lock(&rdev->r600_blit.mutex); |
| 2362 | rdev->r600_blit.vb_ib = NULL; | 2364 | rdev->r600_blit.vb_ib = NULL; |
| 2363 | r = r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); | 2365 | r = r600_blit_prepare_copy(rdev, num_gpu_pages * RADEON_GPU_PAGE_SIZE); |
| 2364 | if (r) { | 2366 | if (r) { |
| 2365 | if (rdev->r600_blit.vb_ib) | 2367 | if (rdev->r600_blit.vb_ib) |
| 2366 | radeon_ib_free(rdev, &rdev->r600_blit.vb_ib); | 2368 | radeon_ib_free(rdev, &rdev->r600_blit.vb_ib); |
| 2367 | mutex_unlock(&rdev->r600_blit.mutex); | 2369 | mutex_unlock(&rdev->r600_blit.mutex); |
| 2368 | return r; | 2370 | return r; |
| 2369 | } | 2371 | } |
| 2370 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); | 2372 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_gpu_pages * RADEON_GPU_PAGE_SIZE); |
| 2371 | r600_blit_done_copy(rdev, fence); | 2373 | r600_blit_done_copy(rdev, fence); |
| 2372 | mutex_unlock(&rdev->r600_blit.mutex); | 2374 | mutex_unlock(&rdev->r600_blit.mutex); |
| 2373 | return 0; | 2375 | return 0; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 32807baf55e2..c1e056b35b29 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -322,6 +322,7 @@ union radeon_gart_table { | |||
| 322 | 322 | ||
| 323 | #define RADEON_GPU_PAGE_SIZE 4096 | 323 | #define RADEON_GPU_PAGE_SIZE 4096 |
| 324 | #define RADEON_GPU_PAGE_MASK (RADEON_GPU_PAGE_SIZE - 1) | 324 | #define RADEON_GPU_PAGE_MASK (RADEON_GPU_PAGE_SIZE - 1) |
| 325 | #define RADEON_GPU_PAGE_SHIFT 12 | ||
| 325 | 326 | ||
| 326 | struct radeon_gart { | 327 | struct radeon_gart { |
| 327 | dma_addr_t table_addr; | 328 | dma_addr_t table_addr; |
| @@ -914,17 +915,17 @@ struct radeon_asic { | |||
| 914 | int (*copy_blit)(struct radeon_device *rdev, | 915 | int (*copy_blit)(struct radeon_device *rdev, |
| 915 | uint64_t src_offset, | 916 | uint64_t src_offset, |
| 916 | uint64_t dst_offset, | 917 | uint64_t dst_offset, |
| 917 | unsigned num_pages, | 918 | unsigned num_gpu_pages, |
| 918 | struct radeon_fence *fence); | 919 | struct radeon_fence *fence); |
| 919 | int (*copy_dma)(struct radeon_device *rdev, | 920 | int (*copy_dma)(struct radeon_device *rdev, |
| 920 | uint64_t src_offset, | 921 | uint64_t src_offset, |
| 921 | uint64_t dst_offset, | 922 | uint64_t dst_offset, |
| 922 | unsigned num_pages, | 923 | unsigned num_gpu_pages, |
| 923 | struct radeon_fence *fence); | 924 | struct radeon_fence *fence); |
| 924 | int (*copy)(struct radeon_device *rdev, | 925 | int (*copy)(struct radeon_device *rdev, |
| 925 | uint64_t src_offset, | 926 | uint64_t src_offset, |
| 926 | uint64_t dst_offset, | 927 | uint64_t dst_offset, |
| 927 | unsigned num_pages, | 928 | unsigned num_gpu_pages, |
| 928 | struct radeon_fence *fence); | 929 | struct radeon_fence *fence); |
| 929 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); | 930 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); |
| 930 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); | 931 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 3d7a0d7c6a9a..3dedaa07aac1 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
| @@ -75,7 +75,7 @@ uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); | |||
| 75 | int r100_copy_blit(struct radeon_device *rdev, | 75 | int r100_copy_blit(struct radeon_device *rdev, |
| 76 | uint64_t src_offset, | 76 | uint64_t src_offset, |
| 77 | uint64_t dst_offset, | 77 | uint64_t dst_offset, |
| 78 | unsigned num_pages, | 78 | unsigned num_gpu_pages, |
| 79 | struct radeon_fence *fence); | 79 | struct radeon_fence *fence); |
| 80 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, | 80 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
| 81 | uint32_t tiling_flags, uint32_t pitch, | 81 | uint32_t tiling_flags, uint32_t pitch, |
| @@ -143,7 +143,7 @@ extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); | |||
| 143 | extern int r200_copy_dma(struct radeon_device *rdev, | 143 | extern int r200_copy_dma(struct radeon_device *rdev, |
| 144 | uint64_t src_offset, | 144 | uint64_t src_offset, |
| 145 | uint64_t dst_offset, | 145 | uint64_t dst_offset, |
| 146 | unsigned num_pages, | 146 | unsigned num_gpu_pages, |
| 147 | struct radeon_fence *fence); | 147 | struct radeon_fence *fence); |
| 148 | void r200_set_safe_registers(struct radeon_device *rdev); | 148 | void r200_set_safe_registers(struct radeon_device *rdev); |
| 149 | 149 | ||
| @@ -311,7 +311,7 @@ void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); | |||
| 311 | int r600_ring_test(struct radeon_device *rdev); | 311 | int r600_ring_test(struct radeon_device *rdev); |
| 312 | int r600_copy_blit(struct radeon_device *rdev, | 312 | int r600_copy_blit(struct radeon_device *rdev, |
| 313 | uint64_t src_offset, uint64_t dst_offset, | 313 | uint64_t src_offset, uint64_t dst_offset, |
| 314 | unsigned num_pages, struct radeon_fence *fence); | 314 | unsigned num_gpu_pages, struct radeon_fence *fence); |
| 315 | void r600_hpd_init(struct radeon_device *rdev); | 315 | void r600_hpd_init(struct radeon_device *rdev); |
| 316 | void r600_hpd_fini(struct radeon_device *rdev); | 316 | void r600_hpd_fini(struct radeon_device *rdev); |
| 317 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); | 317 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| @@ -403,7 +403,7 @@ void evergreen_bandwidth_update(struct radeon_device *rdev); | |||
| 403 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); | 403 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 404 | int evergreen_copy_blit(struct radeon_device *rdev, | 404 | int evergreen_copy_blit(struct radeon_device *rdev, |
| 405 | uint64_t src_offset, uint64_t dst_offset, | 405 | uint64_t src_offset, uint64_t dst_offset, |
| 406 | unsigned num_pages, struct radeon_fence *fence); | 406 | unsigned num_gpu_pages, struct radeon_fence *fence); |
| 407 | void evergreen_hpd_init(struct radeon_device *rdev); | 407 | void evergreen_hpd_init(struct radeon_device *rdev); |
| 408 | void evergreen_hpd_fini(struct radeon_device *rdev); | 408 | void evergreen_hpd_fini(struct radeon_device *rdev); |
| 409 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); | 409 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index dcd0863e31ae..b6e18c8db9f5 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
| @@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_device *dev) | |||
| 219 | } else { | 219 | } else { |
| 220 | DRM_INFO("Using generic clock info\n"); | 220 | DRM_INFO("Using generic clock info\n"); |
| 221 | 221 | ||
| 222 | /* may need to be per card */ | ||
| 223 | rdev->clock.max_pixel_clock = 35000; | ||
| 224 | |||
| 222 | if (rdev->flags & RADEON_IS_IGP) { | 225 | if (rdev->flags & RADEON_IS_IGP) { |
| 223 | p1pll->reference_freq = 1432; | 226 | p1pll->reference_freq = 1432; |
| 224 | p2pll->reference_freq = 1432; | 227 | p2pll->reference_freq = 1432; |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 4f0c1ecac72e..c4b8741dbf58 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
| @@ -1297,12 +1297,33 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
| 1297 | if (!radeon_dig_connector->edp_on) | 1297 | if (!radeon_dig_connector->edp_on) |
| 1298 | atombios_set_edp_panel_power(connector, | 1298 | atombios_set_edp_panel_power(connector, |
| 1299 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | 1299 | ATOM_TRANSMITTER_ACTION_POWER_OFF); |
| 1300 | } else { | 1300 | } else if (radeon_connector_encoder_is_dp_bridge(connector)) { |
| 1301 | /* need to setup ddc on the bridge */ | 1301 | /* DP bridges are always DP */ |
| 1302 | if (radeon_connector_encoder_is_dp_bridge(connector)) { | 1302 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; |
| 1303 | /* get the DPCD from the bridge */ | ||
| 1304 | radeon_dp_getdpcd(radeon_connector); | ||
| 1305 | |||
| 1306 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) | ||
| 1307 | ret = connector_status_connected; | ||
| 1308 | else { | ||
| 1309 | /* need to setup ddc on the bridge */ | ||
| 1303 | if (encoder) | 1310 | if (encoder) |
| 1304 | radeon_atom_ext_encoder_setup_ddc(encoder); | 1311 | radeon_atom_ext_encoder_setup_ddc(encoder); |
| 1312 | if (radeon_ddc_probe(radeon_connector, | ||
| 1313 | radeon_connector->requires_extended_probe)) | ||
| 1314 | ret = connector_status_connected; | ||
| 1315 | } | ||
| 1316 | |||
| 1317 | if ((ret == connector_status_disconnected) && | ||
| 1318 | radeon_connector->dac_load_detect) { | ||
| 1319 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
| 1320 | struct drm_encoder_helper_funcs *encoder_funcs; | ||
| 1321 | if (encoder) { | ||
| 1322 | encoder_funcs = encoder->helper_private; | ||
| 1323 | ret = encoder_funcs->detect(encoder, connector); | ||
| 1324 | } | ||
| 1305 | } | 1325 | } |
| 1326 | } else { | ||
| 1306 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | 1327 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
| 1307 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | 1328 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
| 1308 | ret = connector_status_connected; | 1329 | ret = connector_status_connected; |
| @@ -1318,16 +1339,6 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
| 1318 | ret = connector_status_connected; | 1339 | ret = connector_status_connected; |
| 1319 | } | 1340 | } |
| 1320 | } | 1341 | } |
| 1321 | |||
| 1322 | if ((ret == connector_status_disconnected) && | ||
| 1323 | radeon_connector->dac_load_detect) { | ||
| 1324 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
| 1325 | struct drm_encoder_helper_funcs *encoder_funcs; | ||
| 1326 | if (encoder) { | ||
| 1327 | encoder_funcs = encoder->helper_private; | ||
| 1328 | ret = encoder_funcs->detect(encoder, connector); | ||
| 1329 | } | ||
| 1330 | } | ||
| 1331 | } | 1342 | } |
| 1332 | 1343 | ||
| 1333 | radeon_connector_update_scratch_regs(connector, ret); | 1344 | radeon_connector_update_scratch_regs(connector, ret); |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 1a858944e4f3..6adb3e58affd 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
| @@ -473,8 +473,8 @@ pflip_cleanup: | |||
| 473 | spin_lock_irqsave(&dev->event_lock, flags); | 473 | spin_lock_irqsave(&dev->event_lock, flags); |
| 474 | radeon_crtc->unpin_work = NULL; | 474 | radeon_crtc->unpin_work = NULL; |
| 475 | unlock_free: | 475 | unlock_free: |
| 476 | drm_gem_object_unreference_unlocked(old_radeon_fb->obj); | ||
| 477 | spin_unlock_irqrestore(&dev->event_lock, flags); | 476 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 477 | drm_gem_object_unreference_unlocked(old_radeon_fb->obj); | ||
| 478 | radeon_fence_unref(&work->fence); | 478 | radeon_fence_unref(&work->fence); |
| 479 | kfree(work); | 479 | kfree(work); |
| 480 | 480 | ||
| @@ -707,16 +707,21 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | |||
| 707 | radeon_router_select_ddc_port(radeon_connector); | 707 | radeon_router_select_ddc_port(radeon_connector); |
| 708 | 708 | ||
| 709 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || | 709 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
| 710 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { | 710 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) || |
| 711 | radeon_connector_encoder_is_dp_bridge(&radeon_connector->base)) { | ||
| 711 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; | 712 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
| 713 | |||
| 712 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || | 714 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || |
| 713 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) | 715 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) |
| 714 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); | 716 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
| 715 | } | 717 | &dig->dp_i2c_bus->adapter); |
| 716 | if (!radeon_connector->ddc_bus) | 718 | else if (radeon_connector->ddc_bus && !radeon_connector->edid) |
| 717 | return -1; | 719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, |
| 718 | if (!radeon_connector->edid) { | 720 | &radeon_connector->ddc_bus->adapter); |
| 719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 721 | } else { |
| 722 | if (radeon_connector->ddc_bus && !radeon_connector->edid) | ||
| 723 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, | ||
| 724 | &radeon_connector->ddc_bus->adapter); | ||
| 720 | } | 725 | } |
| 721 | 726 | ||
| 722 | if (!radeon_connector->edid) { | 727 | if (!radeon_connector->edid) { |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 9b86fb0e4122..0b5468bfaf54 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
| @@ -277,7 +277,12 @@ static int radeon_move_blit(struct ttm_buffer_object *bo, | |||
| 277 | DRM_ERROR("Trying to move memory with CP turned off.\n"); | 277 | DRM_ERROR("Trying to move memory with CP turned off.\n"); |
| 278 | return -EINVAL; | 278 | return -EINVAL; |
| 279 | } | 279 | } |
| 280 | r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence); | 280 | |
| 281 | BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); | ||
| 282 | |||
| 283 | r = radeon_copy(rdev, old_start, new_start, | ||
| 284 | new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE), /* GPU pages */ | ||
| 285 | fence); | ||
| 281 | /* FIXME: handle copy error */ | 286 | /* FIXME: handle copy error */ |
| 282 | r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL, | 287 | r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL, |
| 283 | evict, no_wait_reserve, no_wait_gpu, new_mem); | 288 | evict, no_wait_reserve, no_wait_gpu, new_mem); |
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index a4d38d85909a..ef06194c5aa6 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c | |||
| @@ -394,7 +394,8 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, | |||
| 394 | 394 | ||
| 395 | if (!(new_man->flags & TTM_MEMTYPE_FLAG_FIXED)) { | 395 | if (!(new_man->flags & TTM_MEMTYPE_FLAG_FIXED)) { |
| 396 | if (bo->ttm == NULL) { | 396 | if (bo->ttm == NULL) { |
| 397 | ret = ttm_bo_add_ttm(bo, false); | 397 | bool zero = !(old_man->flags & TTM_MEMTYPE_FLAG_FIXED); |
| 398 | ret = ttm_bo_add_ttm(bo, zero); | ||
| 398 | if (ret) | 399 | if (ret) |
| 399 | goto out_err; | 400 | goto out_err; |
| 400 | } | 401 | } |
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 7d27d2b0445a..7484e1b67249 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h | |||
| @@ -277,6 +277,7 @@ | |||
| 277 | #define USB_DEVICE_ID_PENPOWER 0x00f4 | 277 | #define USB_DEVICE_ID_PENPOWER 0x00f4 |
| 278 | 278 | ||
| 279 | #define USB_VENDOR_ID_GREENASIA 0x0e8f | 279 | #define USB_VENDOR_ID_GREENASIA 0x0e8f |
| 280 | #define USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD 0x3013 | ||
| 280 | 281 | ||
| 281 | #define USB_VENDOR_ID_GRETAGMACBETH 0x0971 | 282 | #define USB_VENDOR_ID_GRETAGMACBETH 0x0971 |
| 282 | #define USB_DEVICE_ID_GRETAGMACBETH_HUEY 0x2005 | 283 | #define USB_DEVICE_ID_GRETAGMACBETH_HUEY 0x2005 |
diff --git a/drivers/hid/hid-magicmouse.c b/drivers/hid/hid-magicmouse.c index 0ec91c18a421..f0fbd7bd239e 100644 --- a/drivers/hid/hid-magicmouse.c +++ b/drivers/hid/hid-magicmouse.c | |||
| @@ -81,6 +81,28 @@ MODULE_PARM_DESC(report_undeciphered, "Report undeciphered multi-touch state fie | |||
| 81 | #define NO_TOUCHES -1 | 81 | #define NO_TOUCHES -1 |
| 82 | #define SINGLE_TOUCH_UP -2 | 82 | #define SINGLE_TOUCH_UP -2 |
| 83 | 83 | ||
| 84 | /* Touch surface information. Dimension is in hundredths of a mm, min and max | ||
| 85 | * are in units. */ | ||
| 86 | #define MOUSE_DIMENSION_X (float)9056 | ||
| 87 | #define MOUSE_MIN_X -1100 | ||
| 88 | #define MOUSE_MAX_X 1258 | ||
| 89 | #define MOUSE_RES_X ((MOUSE_MAX_X - MOUSE_MIN_X) / (MOUSE_DIMENSION_X / 100)) | ||
| 90 | #define MOUSE_DIMENSION_Y (float)5152 | ||
| 91 | #define MOUSE_MIN_Y -1589 | ||
| 92 | #define MOUSE_MAX_Y 2047 | ||
| 93 | #define MOUSE_RES_Y ((MOUSE_MAX_Y - MOUSE_MIN_Y) / (MOUSE_DIMENSION_Y / 100)) | ||
| 94 | |||
| 95 | #define TRACKPAD_DIMENSION_X (float)13000 | ||
| 96 | #define TRACKPAD_MIN_X -2909 | ||
| 97 | #define TRACKPAD_MAX_X 3167 | ||
| 98 | #define TRACKPAD_RES_X \ | ||
| 99 | ((TRACKPAD_MAX_X - TRACKPAD_MIN_X) / (TRACKPAD_DIMENSION_X / 100)) | ||
| 100 | #define TRACKPAD_DIMENSION_Y (float)11000 | ||
| 101 | #define TRACKPAD_MIN_Y -2456 | ||
| 102 | #define TRACKPAD_MAX_Y 2565 | ||
| 103 | #define TRACKPAD_RES_Y \ | ||
| 104 | ((TRACKPAD_MAX_Y - TRACKPAD_MIN_Y) / (TRACKPAD_DIMENSION_Y / 100)) | ||
| 105 | |||
| 84 | /** | 106 | /** |
| 85 | * struct magicmouse_sc - Tracks Magic Mouse-specific data. | 107 | * struct magicmouse_sc - Tracks Magic Mouse-specific data. |
| 86 | * @input: Input device through which we report events. | 108 | * @input: Input device through which we report events. |
| @@ -406,17 +428,31 @@ static void magicmouse_setup_input(struct input_dev *input, struct hid_device *h | |||
| 406 | * inverse of the reported Y. | 428 | * inverse of the reported Y. |
| 407 | */ | 429 | */ |
| 408 | if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { | 430 | if (input->id.product == USB_DEVICE_ID_APPLE_MAGICMOUSE) { |
| 409 | input_set_abs_params(input, ABS_MT_POSITION_X, -1100, | 431 | input_set_abs_params(input, ABS_MT_POSITION_X, |
| 410 | 1358, 4, 0); | 432 | MOUSE_MIN_X, MOUSE_MAX_X, 4, 0); |
| 411 | input_set_abs_params(input, ABS_MT_POSITION_Y, -1589, | 433 | input_set_abs_params(input, ABS_MT_POSITION_Y, |
| 412 | 2047, 4, 0); | 434 | MOUSE_MIN_Y, MOUSE_MAX_Y, 4, 0); |
| 435 | |||
| 436 | input_abs_set_res(input, ABS_MT_POSITION_X, | ||
| 437 | MOUSE_RES_X); | ||
| 438 | input_abs_set_res(input, ABS_MT_POSITION_Y, | ||
| 439 | MOUSE_RES_Y); | ||
| 413 | } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ | 440 | } else { /* USB_DEVICE_ID_APPLE_MAGICTRACKPAD */ |
| 414 | input_set_abs_params(input, ABS_X, -2909, 3167, 4, 0); | 441 | input_set_abs_params(input, ABS_X, TRACKPAD_MIN_X, |
| 415 | input_set_abs_params(input, ABS_Y, -2456, 2565, 4, 0); | 442 | TRACKPAD_MAX_X, 4, 0); |
| 416 | input_set_abs_params(input, ABS_MT_POSITION_X, -2909, | 443 | input_set_abs_params(input, ABS_Y, TRACKPAD_MIN_Y, |
| 417 | 3167, 4, 0); | 444 | TRACKPAD_MAX_Y, 4, 0); |
| 418 | input_set_abs_params(input, ABS_MT_POSITION_Y, -2456, | 445 | input_set_abs_params(input, ABS_MT_POSITION_X, |
| 419 | 2565, 4, 0); | 446 | TRACKPAD_MIN_X, TRACKPAD_MAX_X, 4, 0); |
| 447 | input_set_abs_params(input, ABS_MT_POSITION_Y, | ||
| 448 | TRACKPAD_MIN_Y, TRACKPAD_MAX_Y, 4, 0); | ||
| 449 | |||
| 450 | input_abs_set_res(input, ABS_X, TRACKPAD_RES_X); | ||
| 451 | input_abs_set_res(input, ABS_Y, TRACKPAD_RES_Y); | ||
| 452 | input_abs_set_res(input, ABS_MT_POSITION_X, | ||
| 453 | TRACKPAD_RES_X); | ||
| 454 | input_abs_set_res(input, ABS_MT_POSITION_Y, | ||
| 455 | TRACKPAD_RES_Y); | ||
| 420 | } | 456 | } |
| 421 | 457 | ||
| 422 | input_set_events_per_packet(input, 60); | 458 | input_set_events_per_packet(input, 60); |
| @@ -501,9 +537,17 @@ static int magicmouse_probe(struct hid_device *hdev, | |||
| 501 | } | 537 | } |
| 502 | report->size = 6; | 538 | report->size = 6; |
| 503 | 539 | ||
| 540 | /* | ||
| 541 | * Some devices repond with 'invalid report id' when feature | ||
| 542 | * report switching it into multitouch mode is sent to it. | ||
| 543 | * | ||
| 544 | * This results in -EIO from the _raw low-level transport callback, | ||
| 545 | * but there seems to be no other way of switching the mode. | ||
| 546 | * Thus the super-ugly hacky success check below. | ||
| 547 | */ | ||
| 504 | ret = hdev->hid_output_raw_report(hdev, feature, sizeof(feature), | 548 | ret = hdev->hid_output_raw_report(hdev, feature, sizeof(feature), |
| 505 | HID_FEATURE_REPORT); | 549 | HID_FEATURE_REPORT); |
| 506 | if (ret != sizeof(feature)) { | 550 | if (ret != -EIO && ret != sizeof(feature)) { |
| 507 | hid_err(hdev, "unable to request touch data (%d)\n", ret); | 551 | hid_err(hdev, "unable to request touch data (%d)\n", ret); |
| 508 | goto err_stop_hw; | 552 | goto err_stop_hw; |
| 509 | } | 553 | } |
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c index 06888323828c..72ca689b6474 100644 --- a/drivers/hid/hid-wacom.c +++ b/drivers/hid/hid-wacom.c | |||
| @@ -353,11 +353,7 @@ static int wacom_probe(struct hid_device *hdev, | |||
| 353 | if (ret) { | 353 | if (ret) { |
| 354 | hid_warn(hdev, "can't create sysfs battery attribute, err: %d\n", | 354 | hid_warn(hdev, "can't create sysfs battery attribute, err: %d\n", |
| 355 | ret); | 355 | ret); |
| 356 | /* | 356 | goto err_battery; |
| 357 | * battery attribute is not critical for the tablet, but if it | ||
| 358 | * failed then there is no need to create ac attribute | ||
| 359 | */ | ||
| 360 | goto move_on; | ||
| 361 | } | 357 | } |
| 362 | 358 | ||
| 363 | wdata->ac.properties = wacom_ac_props; | 359 | wdata->ac.properties = wacom_ac_props; |
| @@ -371,18 +367,14 @@ static int wacom_probe(struct hid_device *hdev, | |||
| 371 | if (ret) { | 367 | if (ret) { |
| 372 | hid_warn(hdev, | 368 | hid_warn(hdev, |
| 373 | "can't create ac battery attribute, err: %d\n", ret); | 369 | "can't create ac battery attribute, err: %d\n", ret); |
| 374 | /* | 370 | goto err_ac; |
| 375 | * ac attribute is not critical for the tablet, but if it | ||
| 376 | * failed then we don't want to battery attribute to exist | ||
| 377 | */ | ||
| 378 | power_supply_unregister(&wdata->battery); | ||
| 379 | } | 371 | } |
| 380 | |||
| 381 | move_on: | ||
| 382 | #endif | 372 | #endif |
| 383 | hidinput = list_entry(hdev->inputs.next, struct hid_input, list); | 373 | hidinput = list_entry(hdev->inputs.next, struct hid_input, list); |
| 384 | input = hidinput->input; | 374 | input = hidinput->input; |
| 385 | 375 | ||
| 376 | __set_bit(INPUT_PROP_POINTER, input->propbit); | ||
| 377 | |||
| 386 | /* Basics */ | 378 | /* Basics */ |
| 387 | input->evbit[0] |= BIT(EV_KEY) | BIT(EV_ABS) | BIT(EV_REL); | 379 | input->evbit[0] |= BIT(EV_KEY) | BIT(EV_ABS) | BIT(EV_REL); |
| 388 | 380 | ||
| @@ -416,6 +408,13 @@ move_on: | |||
| 416 | 408 | ||
| 417 | return 0; | 409 | return 0; |
| 418 | 410 | ||
| 411 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | ||
| 412 | err_ac: | ||
| 413 | power_supply_unregister(&wdata->battery); | ||
| 414 | err_battery: | ||
| 415 | device_remove_file(&hdev->dev, &dev_attr_speed); | ||
| 416 | hid_hw_stop(hdev); | ||
| 417 | #endif | ||
| 419 | err_free: | 418 | err_free: |
| 420 | kfree(wdata); | 419 | kfree(wdata); |
| 421 | return ret; | 420 | return ret; |
| @@ -426,6 +425,7 @@ static void wacom_remove(struct hid_device *hdev) | |||
| 426 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | 425 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY |
| 427 | struct wacom_data *wdata = hid_get_drvdata(hdev); | 426 | struct wacom_data *wdata = hid_get_drvdata(hdev); |
| 428 | #endif | 427 | #endif |
| 428 | device_remove_file(&hdev->dev, &dev_attr_speed); | ||
| 429 | hid_hw_stop(hdev); | 429 | hid_hw_stop(hdev); |
| 430 | 430 | ||
| 431 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY | 431 | #ifdef CONFIG_HID_WACOM_POWER_SUPPLY |
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c index 4bdb5d46c52c..3146fdcda272 100644 --- a/drivers/hid/usbhid/hid-quirks.c +++ b/drivers/hid/usbhid/hid-quirks.c | |||
| @@ -47,6 +47,7 @@ static const struct hid_blacklist { | |||
| 47 | { USB_VENDOR_ID_AFATECH, USB_DEVICE_ID_AFATECH_AF9016, HID_QUIRK_FULLSPEED_INTERVAL }, | 47 | { USB_VENDOR_ID_AFATECH, USB_DEVICE_ID_AFATECH_AF9016, HID_QUIRK_FULLSPEED_INTERVAL }, |
| 48 | 48 | ||
| 49 | { USB_VENDOR_ID_ETURBOTOUCH, USB_DEVICE_ID_ETURBOTOUCH, HID_QUIRK_MULTI_INPUT }, | 49 | { USB_VENDOR_ID_ETURBOTOUCH, USB_DEVICE_ID_ETURBOTOUCH, HID_QUIRK_MULTI_INPUT }, |
| 50 | { USB_VENDOR_ID_GREENASIA, USB_DEVICE_ID_GREENASIA_DUAL_USB_JOYPAD, HID_QUIRK_MULTI_INPUT }, | ||
| 50 | { USB_VENDOR_ID_PANTHERLORD, USB_DEVICE_ID_PANTHERLORD_TWIN_USB_JOYSTICK, HID_QUIRK_MULTI_INPUT | HID_QUIRK_SKIP_OUTPUT_REPORTS }, | 51 | { USB_VENDOR_ID_PANTHERLORD, USB_DEVICE_ID_PANTHERLORD_TWIN_USB_JOYSTICK, HID_QUIRK_MULTI_INPUT | HID_QUIRK_SKIP_OUTPUT_REPORTS }, |
| 51 | { USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT }, | 52 | { USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT }, |
| 52 | { USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT }, | 53 | { USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT }, |
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index 59d83e83da7f..411257676133 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c | |||
| @@ -601,7 +601,12 @@ static int create_core_data(struct platform_data *pdata, | |||
| 601 | err = rdmsr_safe_on_cpu(cpu, tdata->intrpt_reg, &eax, &edx); | 601 | err = rdmsr_safe_on_cpu(cpu, tdata->intrpt_reg, &eax, &edx); |
| 602 | if (!err) { | 602 | if (!err) { |
| 603 | tdata->attr_size += MAX_THRESH_ATTRS; | 603 | tdata->attr_size += MAX_THRESH_ATTRS; |
| 604 | tdata->ttarget = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000; | 604 | tdata->tmin = tdata->tjmax - |
| 605 | ((eax & THERM_MASK_THRESHOLD0) >> | ||
| 606 | THERM_SHIFT_THRESHOLD0) * 1000; | ||
| 607 | tdata->ttarget = tdata->tjmax - | ||
| 608 | ((eax & THERM_MASK_THRESHOLD1) >> | ||
| 609 | THERM_SHIFT_THRESHOLD1) * 1000; | ||
| 605 | } | 610 | } |
| 606 | 611 | ||
| 607 | pdata->core_data[attr_no] = tdata; | 612 | pdata->core_data[attr_no] = tdata; |
diff --git a/drivers/hwmon/max16065.c b/drivers/hwmon/max16065.c index d94a24fdf4ba..dd2d7b9620c2 100644 --- a/drivers/hwmon/max16065.c +++ b/drivers/hwmon/max16065.c | |||
| @@ -124,7 +124,7 @@ static inline int MV_TO_LIMIT(int mv, int range) | |||
| 124 | 124 | ||
| 125 | static inline int ADC_TO_CURR(int adc, int gain) | 125 | static inline int ADC_TO_CURR(int adc, int gain) |
| 126 | { | 126 | { |
| 127 | return adc * 1400000 / gain * 255; | 127 | return adc * 1400000 / (gain * 255); |
| 128 | } | 128 | } |
| 129 | 129 | ||
| 130 | /* | 130 | /* |
diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index a561c3a0e916..397fc59b5682 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c | |||
| @@ -978,6 +978,8 @@ static void pmbus_find_max_attr(struct i2c_client *client, | |||
| 978 | struct pmbus_limit_attr { | 978 | struct pmbus_limit_attr { |
| 979 | u16 reg; /* Limit register */ | 979 | u16 reg; /* Limit register */ |
| 980 | bool update; /* True if register needs updates */ | 980 | bool update; /* True if register needs updates */ |
| 981 | bool low; /* True if low limit; for limits with compare | ||
| 982 | functions only */ | ||
| 981 | const char *attr; /* Attribute name */ | 983 | const char *attr; /* Attribute name */ |
| 982 | const char *alarm; /* Alarm attribute name */ | 984 | const char *alarm; /* Alarm attribute name */ |
| 983 | u32 sbit; /* Alarm attribute status bit */ | 985 | u32 sbit; /* Alarm attribute status bit */ |
| @@ -1029,7 +1031,8 @@ static bool pmbus_add_limit_attrs(struct i2c_client *client, | |||
| 1029 | if (attr->compare) { | 1031 | if (attr->compare) { |
| 1030 | pmbus_add_boolean_cmp(data, name, | 1032 | pmbus_add_boolean_cmp(data, name, |
| 1031 | l->alarm, index, | 1033 | l->alarm, index, |
| 1032 | cbase, cindex, | 1034 | l->low ? cindex : cbase, |
| 1035 | l->low ? cbase : cindex, | ||
| 1033 | attr->sbase + page, l->sbit); | 1036 | attr->sbase + page, l->sbit); |
| 1034 | } else { | 1037 | } else { |
| 1035 | pmbus_add_boolean_reg(data, name, | 1038 | pmbus_add_boolean_reg(data, name, |
| @@ -1366,11 +1369,13 @@ static const struct pmbus_sensor_attr power_attributes[] = { | |||
| 1366 | static const struct pmbus_limit_attr temp_limit_attrs[] = { | 1369 | static const struct pmbus_limit_attr temp_limit_attrs[] = { |
| 1367 | { | 1370 | { |
| 1368 | .reg = PMBUS_UT_WARN_LIMIT, | 1371 | .reg = PMBUS_UT_WARN_LIMIT, |
| 1372 | .low = true, | ||
| 1369 | .attr = "min", | 1373 | .attr = "min", |
| 1370 | .alarm = "min_alarm", | 1374 | .alarm = "min_alarm", |
| 1371 | .sbit = PB_TEMP_UT_WARNING, | 1375 | .sbit = PB_TEMP_UT_WARNING, |
| 1372 | }, { | 1376 | }, { |
| 1373 | .reg = PMBUS_UT_FAULT_LIMIT, | 1377 | .reg = PMBUS_UT_FAULT_LIMIT, |
| 1378 | .low = true, | ||
| 1374 | .attr = "lcrit", | 1379 | .attr = "lcrit", |
| 1375 | .alarm = "lcrit_alarm", | 1380 | .alarm = "lcrit_alarm", |
| 1376 | .sbit = PB_TEMP_UT_FAULT, | 1381 | .sbit = PB_TEMP_UT_FAULT, |
| @@ -1399,11 +1404,13 @@ static const struct pmbus_limit_attr temp_limit_attrs[] = { | |||
| 1399 | static const struct pmbus_limit_attr temp_limit_attrs23[] = { | 1404 | static const struct pmbus_limit_attr temp_limit_attrs23[] = { |
| 1400 | { | 1405 | { |
| 1401 | .reg = PMBUS_UT_WARN_LIMIT, | 1406 | .reg = PMBUS_UT_WARN_LIMIT, |
| 1407 | .low = true, | ||
| 1402 | .attr = "min", | 1408 | .attr = "min", |
| 1403 | .alarm = "min_alarm", | 1409 | .alarm = "min_alarm", |
| 1404 | .sbit = PB_TEMP_UT_WARNING, | 1410 | .sbit = PB_TEMP_UT_WARNING, |
| 1405 | }, { | 1411 | }, { |
| 1406 | .reg = PMBUS_UT_FAULT_LIMIT, | 1412 | .reg = PMBUS_UT_FAULT_LIMIT, |
| 1413 | .low = true, | ||
| 1407 | .attr = "lcrit", | 1414 | .attr = "lcrit", |
| 1408 | .alarm = "lcrit_alarm", | 1415 | .alarm = "lcrit_alarm", |
| 1409 | .sbit = PB_TEMP_UT_FAULT, | 1416 | .sbit = PB_TEMP_UT_FAULT, |
diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c index ace1c7319734..d0ddb60155c9 100644 --- a/drivers/hwmon/pmbus/ucd9000.c +++ b/drivers/hwmon/pmbus/ucd9000.c | |||
| @@ -141,13 +141,11 @@ static int ucd9000_probe(struct i2c_client *client, | |||
| 141 | block_buffer[ret] = '\0'; | 141 | block_buffer[ret] = '\0'; |
| 142 | dev_info(&client->dev, "Device ID %s\n", block_buffer); | 142 | dev_info(&client->dev, "Device ID %s\n", block_buffer); |
| 143 | 143 | ||
| 144 | mid = NULL; | 144 | for (mid = ucd9000_id; mid->name[0]; mid++) { |
| 145 | for (i = 0; i < ARRAY_SIZE(ucd9000_id); i++) { | ||
| 146 | mid = &ucd9000_id[i]; | ||
| 147 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) | 145 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) |
| 148 | break; | 146 | break; |
| 149 | } | 147 | } |
| 150 | if (!mid || !strlen(mid->name)) { | 148 | if (!mid->name[0]) { |
| 151 | dev_err(&client->dev, "Unsupported device\n"); | 149 | dev_err(&client->dev, "Unsupported device\n"); |
| 152 | return -ENODEV; | 150 | return -ENODEV; |
| 153 | } | 151 | } |
diff --git a/drivers/hwmon/pmbus/ucd9200.c b/drivers/hwmon/pmbus/ucd9200.c index ffcc1cf3609d..c65e9da707cc 100644 --- a/drivers/hwmon/pmbus/ucd9200.c +++ b/drivers/hwmon/pmbus/ucd9200.c | |||
| @@ -68,13 +68,11 @@ static int ucd9200_probe(struct i2c_client *client, | |||
| 68 | block_buffer[ret] = '\0'; | 68 | block_buffer[ret] = '\0'; |
| 69 | dev_info(&client->dev, "Device ID %s\n", block_buffer); | 69 | dev_info(&client->dev, "Device ID %s\n", block_buffer); |
| 70 | 70 | ||
| 71 | mid = NULL; | 71 | for (mid = ucd9200_id; mid->name[0]; mid++) { |
| 72 | for (i = 0; i < ARRAY_SIZE(ucd9200_id); i++) { | ||
| 73 | mid = &ucd9200_id[i]; | ||
| 74 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) | 72 | if (!strncasecmp(mid->name, block_buffer, strlen(mid->name))) |
| 75 | break; | 73 | break; |
| 76 | } | 74 | } |
| 77 | if (!mid || !strlen(mid->name)) { | 75 | if (!mid->name[0]) { |
| 78 | dev_err(&client->dev, "Unsupported device\n"); | 76 | dev_err(&client->dev, "Unsupported device\n"); |
| 79 | return -ENODEV; | 77 | return -ENODEV; |
| 80 | } | 78 | } |
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c index 6659d269b841..b73da6cd6f91 100644 --- a/drivers/i2c/busses/i2c-pxa-pci.c +++ b/drivers/i2c/busses/i2c-pxa-pci.c | |||
| @@ -109,12 +109,15 @@ static int __devinit ce4100_i2c_probe(struct pci_dev *dev, | |||
| 109 | return -EINVAL; | 109 | return -EINVAL; |
| 110 | } | 110 | } |
| 111 | sds = kzalloc(sizeof(*sds), GFP_KERNEL); | 111 | sds = kzalloc(sizeof(*sds), GFP_KERNEL); |
| 112 | if (!sds) | 112 | if (!sds) { |
| 113 | ret = -ENOMEM; | ||
| 113 | goto err_mem; | 114 | goto err_mem; |
| 115 | } | ||
| 114 | 116 | ||
| 115 | for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) { | 117 | for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) { |
| 116 | sds->pdev[i] = add_i2c_device(dev, i); | 118 | sds->pdev[i] = add_i2c_device(dev, i); |
| 117 | if (IS_ERR(sds->pdev[i])) { | 119 | if (IS_ERR(sds->pdev[i])) { |
| 120 | ret = PTR_ERR(sds->pdev[i]); | ||
| 118 | while (--i >= 0) | 121 | while (--i >= 0) |
| 119 | platform_device_unregister(sds->pdev[i]); | 122 | platform_device_unregister(sds->pdev[i]); |
| 120 | goto err_dev_add; | 123 | goto err_dev_add; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 2440b7411978..3c94c4a81a55 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
| @@ -270,14 +270,30 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) | |||
| 270 | 270 | ||
| 271 | /* Rounds down to not include partial word at the end of buf */ | 271 | /* Rounds down to not include partial word at the end of buf */ |
| 272 | words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD; | 272 | words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD; |
| 273 | if (words_to_transfer > tx_fifo_avail) | ||
| 274 | words_to_transfer = tx_fifo_avail; | ||
| 275 | 273 | ||
| 276 | i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); | 274 | /* It's very common to have < 4 bytes, so optimize that case. */ |
| 277 | 275 | if (words_to_transfer) { | |
| 278 | buf += words_to_transfer * BYTES_PER_FIFO_WORD; | 276 | if (words_to_transfer > tx_fifo_avail) |
| 279 | buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; | 277 | words_to_transfer = tx_fifo_avail; |
| 280 | tx_fifo_avail -= words_to_transfer; | 278 | |
| 279 | /* | ||
| 280 | * Update state before writing to FIFO. If this casues us | ||
| 281 | * to finish writing all bytes (AKA buf_remaining goes to 0) we | ||
| 282 | * have a potential for an interrupt (PACKET_XFER_COMPLETE is | ||
| 283 | * not maskable). We need to make sure that the isr sees | ||
| 284 | * buf_remaining as 0 and doesn't call us back re-entrantly. | ||
| 285 | */ | ||
| 286 | buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; | ||
| 287 | tx_fifo_avail -= words_to_transfer; | ||
| 288 | i2c_dev->msg_buf_remaining = buf_remaining; | ||
| 289 | i2c_dev->msg_buf = buf + | ||
| 290 | words_to_transfer * BYTES_PER_FIFO_WORD; | ||
| 291 | barrier(); | ||
| 292 | |||
| 293 | i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); | ||
| 294 | |||
| 295 | buf += words_to_transfer * BYTES_PER_FIFO_WORD; | ||
| 296 | } | ||
| 281 | 297 | ||
| 282 | /* | 298 | /* |
| 283 | * If there is a partial word at the end of buf, handle it manually to | 299 | * If there is a partial word at the end of buf, handle it manually to |
| @@ -287,14 +303,15 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) | |||
| 287 | if (tx_fifo_avail > 0 && buf_remaining > 0) { | 303 | if (tx_fifo_avail > 0 && buf_remaining > 0) { |
| 288 | BUG_ON(buf_remaining > 3); | 304 | BUG_ON(buf_remaining > 3); |
| 289 | memcpy(&val, buf, buf_remaining); | 305 | memcpy(&val, buf, buf_remaining); |
| 306 | |||
| 307 | /* Again update before writing to FIFO to make sure isr sees. */ | ||
| 308 | i2c_dev->msg_buf_remaining = 0; | ||
| 309 | i2c_dev->msg_buf = NULL; | ||
| 310 | barrier(); | ||
| 311 | |||
| 290 | i2c_writel(i2c_dev, val, I2C_TX_FIFO); | 312 | i2c_writel(i2c_dev, val, I2C_TX_FIFO); |
| 291 | buf_remaining = 0; | ||
| 292 | tx_fifo_avail--; | ||
| 293 | } | 313 | } |
| 294 | 314 | ||
| 295 | BUG_ON(tx_fifo_avail > 0 && buf_remaining > 0); | ||
| 296 | i2c_dev->msg_buf_remaining = buf_remaining; | ||
| 297 | i2c_dev->msg_buf = buf; | ||
| 298 | return 0; | 315 | return 0; |
| 299 | } | 316 | } |
| 300 | 317 | ||
| @@ -411,9 +428,10 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) | |||
| 411 | tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); | 428 | tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); |
| 412 | } | 429 | } |
| 413 | 430 | ||
| 414 | if ((status & I2C_INT_PACKET_XFER_COMPLETE) && | 431 | if (status & I2C_INT_PACKET_XFER_COMPLETE) { |
| 415 | !i2c_dev->msg_buf_remaining) | 432 | BUG_ON(i2c_dev->msg_buf_remaining); |
| 416 | complete(&i2c_dev->msg_complete); | 433 | complete(&i2c_dev->msg_complete); |
| 434 | } | ||
| 417 | 435 | ||
| 418 | i2c_writel(i2c_dev, status, I2C_INT_STATUS); | 436 | i2c_writel(i2c_dev, status, I2C_INT_STATUS); |
| 419 | if (i2c_dev->is_dvc) | 437 | if (i2c_dev->is_dvc) |
| @@ -531,7 +549,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], | |||
| 531 | 549 | ||
| 532 | static u32 tegra_i2c_func(struct i2c_adapter *adap) | 550 | static u32 tegra_i2c_func(struct i2c_adapter *adap) |
| 533 | { | 551 | { |
| 534 | return I2C_FUNC_I2C; | 552 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
| 535 | } | 553 | } |
| 536 | 554 | ||
| 537 | static const struct i2c_algorithm tegra_i2c_algo = { | 555 | static const struct i2c_algorithm tegra_i2c_algo = { |
| @@ -719,6 +737,17 @@ static int tegra_i2c_resume(struct platform_device *pdev) | |||
| 719 | } | 737 | } |
| 720 | #endif | 738 | #endif |
| 721 | 739 | ||
| 740 | #if defined(CONFIG_OF) | ||
| 741 | /* Match table for of_platform binding */ | ||
| 742 | static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { | ||
| 743 | { .compatible = "nvidia,tegra20-i2c", }, | ||
| 744 | {}, | ||
| 745 | }; | ||
| 746 | MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); | ||
| 747 | #else | ||
| 748 | #define tegra_i2c_of_match NULL | ||
| 749 | #endif | ||
| 750 | |||
| 722 | static struct platform_driver tegra_i2c_driver = { | 751 | static struct platform_driver tegra_i2c_driver = { |
| 723 | .probe = tegra_i2c_probe, | 752 | .probe = tegra_i2c_probe, |
| 724 | .remove = tegra_i2c_remove, | 753 | .remove = tegra_i2c_remove, |
| @@ -729,6 +758,7 @@ static struct platform_driver tegra_i2c_driver = { | |||
| 729 | .driver = { | 758 | .driver = { |
| 730 | .name = "tegra-i2c", | 759 | .name = "tegra-i2c", |
| 731 | .owner = THIS_MODULE, | 760 | .owner = THIS_MODULE, |
| 761 | .of_match_table = tegra_i2c_of_match, | ||
| 732 | }, | 762 | }, |
| 733 | }; | 763 | }; |
| 734 | 764 | ||
diff --git a/drivers/input/keyboard/adp5588-keys.c b/drivers/input/keyboard/adp5588-keys.c index 7b404e5443ed..e34eeb8ae371 100644 --- a/drivers/input/keyboard/adp5588-keys.c +++ b/drivers/input/keyboard/adp5588-keys.c | |||
| @@ -668,4 +668,3 @@ module_exit(adp5588_exit); | |||
| 668 | MODULE_LICENSE("GPL"); | 668 | MODULE_LICENSE("GPL"); |
| 669 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | 669 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
| 670 | MODULE_DESCRIPTION("ADP5588/87 Keypad driver"); | 670 | MODULE_DESCRIPTION("ADP5588/87 Keypad driver"); |
| 671 | MODULE_ALIAS("platform:adp5588-keys"); | ||
diff --git a/drivers/input/misc/cm109.c b/drivers/input/misc/cm109.c index b09c7d127219..ab860511f016 100644 --- a/drivers/input/misc/cm109.c +++ b/drivers/input/misc/cm109.c | |||
| @@ -475,7 +475,7 @@ static void cm109_toggle_buzzer_sync(struct cm109_dev *dev, int on) | |||
| 475 | le16_to_cpu(dev->ctl_req->wIndex), | 475 | le16_to_cpu(dev->ctl_req->wIndex), |
| 476 | dev->ctl_data, | 476 | dev->ctl_data, |
| 477 | USB_PKT_LEN, USB_CTRL_SET_TIMEOUT); | 477 | USB_PKT_LEN, USB_CTRL_SET_TIMEOUT); |
| 478 | if (error && error != EINTR) | 478 | if (error < 0 && error != -EINTR) |
| 479 | err("%s: usb_control_msg() failed %d", __func__, error); | 479 | err("%s: usb_control_msg() failed %d", __func__, error); |
| 480 | } | 480 | } |
| 481 | 481 | ||
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c index da280189ef07..5ec617e28f7e 100644 --- a/drivers/input/mouse/bcm5974.c +++ b/drivers/input/mouse/bcm5974.c | |||
| @@ -67,6 +67,10 @@ | |||
| 67 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI 0x0245 | 67 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI 0x0245 |
| 68 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_ISO 0x0246 | 68 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_ISO 0x0246 |
| 69 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_JIS 0x0247 | 69 | #define USB_DEVICE_ID_APPLE_WELLSPRING5_JIS 0x0247 |
| 70 | /* MacbookAir4,1 (unibody, July 2011) */ | ||
| 71 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI 0x0249 | ||
| 72 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO 0x024a | ||
| 73 | #define USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS 0x024b | ||
| 70 | /* MacbookAir4,2 (unibody, July 2011) */ | 74 | /* MacbookAir4,2 (unibody, July 2011) */ |
| 71 | #define USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI 0x024c | 75 | #define USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI 0x024c |
| 72 | #define USB_DEVICE_ID_APPLE_WELLSPRING6_ISO 0x024d | 76 | #define USB_DEVICE_ID_APPLE_WELLSPRING6_ISO 0x024d |
| @@ -112,6 +116,10 @@ static const struct usb_device_id bcm5974_table[] = { | |||
| 112 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI), | 116 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_ANSI), |
| 113 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_ISO), | 117 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_ISO), |
| 114 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_JIS), | 118 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING5_JIS), |
| 119 | /* MacbookAir4,1 */ | ||
| 120 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI), | ||
| 121 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO), | ||
| 122 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS), | ||
| 115 | /* MacbookAir4,2 */ | 123 | /* MacbookAir4,2 */ |
| 116 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI), | 124 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6_ANSI), |
| 117 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6_ISO), | 125 | BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING6_ISO), |
| @@ -334,6 +342,18 @@ static const struct bcm5974_config bcm5974_config_table[] = { | |||
| 334 | { DIM_X, DIM_X / SN_COORD, -4750, 5280 }, | 342 | { DIM_X, DIM_X / SN_COORD, -4750, 5280 }, |
| 335 | { DIM_Y, DIM_Y / SN_COORD, -150, 6730 } | 343 | { DIM_Y, DIM_Y / SN_COORD, -150, 6730 } |
| 336 | }, | 344 | }, |
| 345 | { | ||
| 346 | USB_DEVICE_ID_APPLE_WELLSPRING6A_ANSI, | ||
| 347 | USB_DEVICE_ID_APPLE_WELLSPRING6A_ISO, | ||
| 348 | USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS, | ||
| 349 | HAS_INTEGRATED_BUTTON, | ||
| 350 | 0x84, sizeof(struct bt_data), | ||
| 351 | 0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS, | ||
| 352 | { DIM_PRESSURE, DIM_PRESSURE / SN_PRESSURE, 0, 300 }, | ||
| 353 | { DIM_WIDTH, DIM_WIDTH / SN_WIDTH, 0, 2048 }, | ||
| 354 | { DIM_X, DIM_X / SN_COORD, -4620, 5140 }, | ||
| 355 | { DIM_Y, DIM_Y / SN_COORD, -150, 6600 } | ||
| 356 | }, | ||
| 337 | {} | 357 | {} |
| 338 | }; | 358 | }; |
| 339 | 359 | ||
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index d27c9d91630b..958b4eb6369d 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
| @@ -229,13 +229,6 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi | |||
| 229 | get_unaligned_le16(&report[i + 3]); | 229 | get_unaligned_le16(&report[i + 3]); |
| 230 | i += 4; | 230 | i += 4; |
| 231 | } | 231 | } |
| 232 | } else if (usage == WCM_DIGITIZER) { | ||
| 233 | /* max pressure isn't reported | ||
| 234 | features->pressure_max = (unsigned short) | ||
| 235 | (report[i+4] << 8 | report[i + 3]); | ||
| 236 | */ | ||
| 237 | features->pressure_max = 255; | ||
| 238 | i += 4; | ||
| 239 | } | 232 | } |
| 240 | break; | 233 | break; |
| 241 | 234 | ||
| @@ -291,13 +284,6 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi | |||
| 291 | pen = 1; | 284 | pen = 1; |
| 292 | i++; | 285 | i++; |
| 293 | break; | 286 | break; |
| 294 | |||
| 295 | case HID_USAGE_UNDEFINED: | ||
| 296 | if (usage == WCM_DESKTOP && finger) /* capacity */ | ||
| 297 | features->pressure_max = | ||
| 298 | get_unaligned_le16(&report[i + 3]); | ||
| 299 | i += 4; | ||
| 300 | break; | ||
| 301 | } | 287 | } |
| 302 | break; | 288 | break; |
| 303 | 289 | ||
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index c1c2f7b28d89..0dc97ec15c28 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
| @@ -800,25 +800,26 @@ static int wacom_bpt_touch(struct wacom_wac *wacom) | |||
| 800 | int i; | 800 | int i; |
| 801 | 801 | ||
| 802 | for (i = 0; i < 2; i++) { | 802 | for (i = 0; i < 2; i++) { |
| 803 | int p = data[9 * i + 2]; | 803 | int offset = (data[1] & 0x80) ? (8 * i) : (9 * i); |
| 804 | bool touch = p && !wacom->shared->stylus_in_proximity; | 804 | bool touch = data[offset + 3] & 0x80; |
| 805 | 805 | ||
| 806 | input_mt_slot(input, i); | ||
| 807 | input_mt_report_slot_state(input, MT_TOOL_FINGER, touch); | ||
| 808 | /* | 806 | /* |
| 809 | * Touch events need to be disabled while stylus is | 807 | * Touch events need to be disabled while stylus is |
| 810 | * in proximity because user's hand is resting on touchpad | 808 | * in proximity because user's hand is resting on touchpad |
| 811 | * and sending unwanted events. User expects tablet buttons | 809 | * and sending unwanted events. User expects tablet buttons |
| 812 | * to continue working though. | 810 | * to continue working though. |
| 813 | */ | 811 | */ |
| 812 | touch = touch && !wacom->shared->stylus_in_proximity; | ||
| 813 | |||
| 814 | input_mt_slot(input, i); | ||
| 815 | input_mt_report_slot_state(input, MT_TOOL_FINGER, touch); | ||
| 814 | if (touch) { | 816 | if (touch) { |
| 815 | int x = get_unaligned_be16(&data[9 * i + 3]) & 0x7ff; | 817 | int x = get_unaligned_be16(&data[offset + 3]) & 0x7ff; |
| 816 | int y = get_unaligned_be16(&data[9 * i + 5]) & 0x7ff; | 818 | int y = get_unaligned_be16(&data[offset + 5]) & 0x7ff; |
| 817 | if (features->quirks & WACOM_QUIRK_BBTOUCH_LOWRES) { | 819 | if (features->quirks & WACOM_QUIRK_BBTOUCH_LOWRES) { |
| 818 | x <<= 5; | 820 | x <<= 5; |
| 819 | y <<= 5; | 821 | y <<= 5; |
| 820 | } | 822 | } |
| 821 | input_report_abs(input, ABS_MT_PRESSURE, p); | ||
| 822 | input_report_abs(input, ABS_MT_POSITION_X, x); | 823 | input_report_abs(input, ABS_MT_POSITION_X, x); |
| 823 | input_report_abs(input, ABS_MT_POSITION_Y, y); | 824 | input_report_abs(input, ABS_MT_POSITION_Y, y); |
| 824 | } | 825 | } |
| @@ -1056,10 +1057,11 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1056 | features->x_fuzz, 0); | 1057 | features->x_fuzz, 0); |
| 1057 | input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, | 1058 | input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, |
| 1058 | features->y_fuzz, 0); | 1059 | features->y_fuzz, 0); |
| 1059 | input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, | ||
| 1060 | features->pressure_fuzz, 0); | ||
| 1061 | 1060 | ||
| 1062 | if (features->device_type == BTN_TOOL_PEN) { | 1061 | if (features->device_type == BTN_TOOL_PEN) { |
| 1062 | input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, | ||
| 1063 | features->pressure_fuzz, 0); | ||
| 1064 | |||
| 1063 | /* penabled devices have fixed resolution for each model */ | 1065 | /* penabled devices have fixed resolution for each model */ |
| 1064 | input_abs_set_res(input_dev, ABS_X, features->x_resolution); | 1066 | input_abs_set_res(input_dev, ABS_X, features->x_resolution); |
| 1065 | input_abs_set_res(input_dev, ABS_Y, features->y_resolution); | 1067 | input_abs_set_res(input_dev, ABS_Y, features->y_resolution); |
| @@ -1098,6 +1100,8 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1098 | __set_bit(BTN_TOOL_MOUSE, input_dev->keybit); | 1100 | __set_bit(BTN_TOOL_MOUSE, input_dev->keybit); |
| 1099 | __set_bit(BTN_STYLUS, input_dev->keybit); | 1101 | __set_bit(BTN_STYLUS, input_dev->keybit); |
| 1100 | __set_bit(BTN_STYLUS2, input_dev->keybit); | 1102 | __set_bit(BTN_STYLUS2, input_dev->keybit); |
| 1103 | |||
| 1104 | __set_bit(INPUT_PROP_POINTER, input_dev->propbit); | ||
| 1101 | break; | 1105 | break; |
| 1102 | 1106 | ||
| 1103 | case WACOM_21UX2: | 1107 | case WACOM_21UX2: |
| @@ -1126,6 +1130,9 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1126 | } | 1130 | } |
| 1127 | 1131 | ||
| 1128 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); | 1132 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); |
| 1133 | |||
| 1134 | __set_bit(INPUT_PROP_DIRECT, input_dev->propbit); | ||
| 1135 | |||
| 1129 | wacom_setup_cintiq(wacom_wac); | 1136 | wacom_setup_cintiq(wacom_wac); |
| 1130 | break; | 1137 | break; |
| 1131 | 1138 | ||
| @@ -1150,6 +1157,8 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1150 | /* fall through */ | 1157 | /* fall through */ |
| 1151 | 1158 | ||
| 1152 | case INTUOS: | 1159 | case INTUOS: |
| 1160 | __set_bit(INPUT_PROP_POINTER, input_dev->propbit); | ||
| 1161 | |||
| 1153 | wacom_setup_intuos(wacom_wac); | 1162 | wacom_setup_intuos(wacom_wac); |
| 1154 | break; | 1163 | break; |
| 1155 | 1164 | ||
| @@ -1165,6 +1174,8 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1165 | 1174 | ||
| 1166 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); | 1175 | input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0); |
| 1167 | wacom_setup_intuos(wacom_wac); | 1176 | wacom_setup_intuos(wacom_wac); |
| 1177 | |||
| 1178 | __set_bit(INPUT_PROP_POINTER, input_dev->propbit); | ||
| 1168 | break; | 1179 | break; |
| 1169 | 1180 | ||
| 1170 | case TABLETPC2FG: | 1181 | case TABLETPC2FG: |
| @@ -1183,26 +1194,40 @@ void wacom_setup_input_capabilities(struct input_dev *input_dev, | |||
| 1183 | case TABLETPC: | 1194 | case TABLETPC: |
| 1184 | __clear_bit(ABS_MISC, input_dev->absbit); | 1195 | __clear_bit(ABS_MISC, input_dev->absbit); |
| 1185 | 1196 | ||
| 1197 | __set_bit(INPUT_PROP_DIRECT, input_dev->propbit); | ||
| 1198 | |||
| 1186 | if (features->device_type != BTN_TOOL_PEN) | 1199 | if (features->device_type != BTN_TOOL_PEN) |
| 1187 | break; /* no need to process stylus stuff */ | 1200 | break; /* no need to process stylus stuff */ |
| 1188 | 1201 | ||
| 1189 | /* fall through */ | 1202 | /* fall through */ |
| 1190 | 1203 | ||
| 1191 | case PL: | 1204 | case PL: |
| 1192 | case PTU: | ||
| 1193 | case DTU: | 1205 | case DTU: |
| 1194 | __set_bit(BTN_TOOL_PEN, input_dev->keybit); | 1206 | __set_bit(BTN_TOOL_PEN, input_dev->keybit); |
| 1207 | __set_bit(BTN_TOOL_RUBBER, input_dev->keybit); | ||
| 1195 | __set_bit(BTN_STYLUS, input_dev->keybit); | 1208 | __set_bit(BTN_STYLUS, input_dev->keybit); |
| 1196 | __set_bit(BTN_STYLUS2, input_dev->keybit); | 1209 | __set_bit(BTN_STYLUS2, input_dev->keybit); |
| 1210 | |||
| 1211 | __set_bit(INPUT_PROP_DIRECT, input_dev->propbit); | ||
| 1212 | break; | ||
| 1213 | |||
| 1214 | case PTU: | ||
| 1215 | __set_bit(BTN_STYLUS2, input_dev->keybit); | ||
| 1197 | /* fall through */ | 1216 | /* fall through */ |
| 1198 | 1217 | ||
| 1199 | case PENPARTNER: | 1218 | case PENPARTNER: |
| 1219 | __set_bit(BTN_TOOL_PEN, input_dev->keybit); | ||
| 1200 | __set_bit(BTN_TOOL_RUBBER, input_dev->keybit); | 1220 | __set_bit(BTN_TOOL_RUBBER, input_dev->keybit); |
| 1221 | __set_bit(BTN_STYLUS, input_dev->keybit); | ||
| 1222 | |||
| 1223 | __set_bit(INPUT_PROP_POINTER, input_dev->propbit); | ||
| 1201 | break; | 1224 | break; |
| 1202 | 1225 | ||
| 1203 | case BAMBOO_PT: | 1226 | case BAMBOO_PT: |
| 1204 | __clear_bit(ABS_MISC, input_dev->absbit); | 1227 | __clear_bit(ABS_MISC, input_dev->absbit); |
| 1205 | 1228 | ||
| 1229 | __set_bit(INPUT_PROP_POINTER, input_dev->propbit); | ||
| 1230 | |||
| 1206 | if (features->device_type == BTN_TOOL_DOUBLETAP) { | 1231 | if (features->device_type == BTN_TOOL_DOUBLETAP) { |
| 1207 | __set_bit(BTN_LEFT, input_dev->keybit); | 1232 | __set_bit(BTN_LEFT, input_dev->keybit); |
| 1208 | __set_bit(BTN_FORWARD, input_dev->keybit); | 1233 | __set_bit(BTN_FORWARD, input_dev->keybit); |
diff --git a/drivers/input/touchscreen/wacom_w8001.c b/drivers/input/touchscreen/wacom_w8001.c index c14412ef4648..9941d39df43d 100644 --- a/drivers/input/touchscreen/wacom_w8001.c +++ b/drivers/input/touchscreen/wacom_w8001.c | |||
| @@ -383,6 +383,8 @@ static int w8001_setup(struct w8001 *w8001) | |||
| 383 | dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); | 383 | dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); |
| 384 | strlcat(w8001->name, "Wacom Serial", sizeof(w8001->name)); | 384 | strlcat(w8001->name, "Wacom Serial", sizeof(w8001->name)); |
| 385 | 385 | ||
| 386 | __set_bit(INPUT_PROP_DIRECT, dev->propbit); | ||
| 387 | |||
| 386 | /* penabled? */ | 388 | /* penabled? */ |
| 387 | error = w8001_command(w8001, W8001_CMD_QUERY, true); | 389 | error = w8001_command(w8001, W8001_CMD_QUERY, true); |
| 388 | if (!error) { | 390 | if (!error) { |
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index a14f8dc23462..0e4227f457af 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c | |||
| @@ -605,7 +605,9 @@ static void build_inv_all(struct iommu_cmd *cmd) | |||
| 605 | * Writes the command to the IOMMUs command buffer and informs the | 605 | * Writes the command to the IOMMUs command buffer and informs the |
| 606 | * hardware about the new command. | 606 | * hardware about the new command. |
| 607 | */ | 607 | */ |
| 608 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | 608 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
| 609 | struct iommu_cmd *cmd, | ||
| 610 | bool sync) | ||
| 609 | { | 611 | { |
| 610 | u32 left, tail, head, next_tail; | 612 | u32 left, tail, head, next_tail; |
| 611 | unsigned long flags; | 613 | unsigned long flags; |
| @@ -639,13 +641,18 @@ again: | |||
| 639 | copy_cmd_to_buffer(iommu, cmd, tail); | 641 | copy_cmd_to_buffer(iommu, cmd, tail); |
| 640 | 642 | ||
| 641 | /* We need to sync now to make sure all commands are processed */ | 643 | /* We need to sync now to make sure all commands are processed */ |
| 642 | iommu->need_sync = true; | 644 | iommu->need_sync = sync; |
| 643 | 645 | ||
| 644 | spin_unlock_irqrestore(&iommu->lock, flags); | 646 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 645 | 647 | ||
| 646 | return 0; | 648 | return 0; |
| 647 | } | 649 | } |
| 648 | 650 | ||
| 651 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) | ||
| 652 | { | ||
| 653 | return iommu_queue_command_sync(iommu, cmd, true); | ||
| 654 | } | ||
| 655 | |||
| 649 | /* | 656 | /* |
| 650 | * This function queues a completion wait command into the command | 657 | * This function queues a completion wait command into the command |
| 651 | * buffer of an IOMMU | 658 | * buffer of an IOMMU |
| @@ -661,7 +668,7 @@ static int iommu_completion_wait(struct amd_iommu *iommu) | |||
| 661 | 668 | ||
| 662 | build_completion_wait(&cmd, (u64)&sem); | 669 | build_completion_wait(&cmd, (u64)&sem); |
| 663 | 670 | ||
| 664 | ret = iommu_queue_command(iommu, &cmd); | 671 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
| 665 | if (ret) | 672 | if (ret) |
| 666 | return ret; | 673 | return ret; |
| 667 | 674 | ||
| @@ -840,14 +847,9 @@ static void domain_flush_complete(struct protection_domain *domain) | |||
| 840 | static void domain_flush_devices(struct protection_domain *domain) | 847 | static void domain_flush_devices(struct protection_domain *domain) |
| 841 | { | 848 | { |
| 842 | struct iommu_dev_data *dev_data; | 849 | struct iommu_dev_data *dev_data; |
| 843 | unsigned long flags; | ||
| 844 | |||
| 845 | spin_lock_irqsave(&domain->lock, flags); | ||
| 846 | 850 | ||
| 847 | list_for_each_entry(dev_data, &domain->dev_list, list) | 851 | list_for_each_entry(dev_data, &domain->dev_list, list) |
| 848 | device_flush_dte(dev_data); | 852 | device_flush_dte(dev_data); |
| 849 | |||
| 850 | spin_unlock_irqrestore(&domain->lock, flags); | ||
| 851 | } | 853 | } |
| 852 | 854 | ||
| 853 | /**************************************************************************** | 855 | /**************************************************************************** |
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 3dc9befa5aec..6dcc7e2d54de 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c | |||
| @@ -1388,7 +1388,7 @@ int dmar_set_interrupt(struct intel_iommu *iommu) | |||
| 1388 | return ret; | 1388 | return ret; |
| 1389 | } | 1389 | } |
| 1390 | 1390 | ||
| 1391 | ret = request_irq(irq, dmar_fault, 0, iommu->name, iommu); | 1391 | ret = request_irq(irq, dmar_fault, IRQF_NO_THREAD, iommu->name, iommu); |
| 1392 | if (ret) | 1392 | if (ret) |
| 1393 | printk(KERN_ERR "IOMMU: can't request irq\n"); | 1393 | printk(KERN_ERR "IOMMU: can't request irq\n"); |
| 1394 | return ret; | 1394 | return ret; |
diff --git a/drivers/leds/ledtrig-timer.c b/drivers/leds/ledtrig-timer.c index d87c9d02f786..328c64c0841c 100644 --- a/drivers/leds/ledtrig-timer.c +++ b/drivers/leds/ledtrig-timer.c | |||
| @@ -41,6 +41,7 @@ static ssize_t led_delay_on_store(struct device *dev, | |||
| 41 | 41 | ||
| 42 | if (count == size) { | 42 | if (count == size) { |
| 43 | led_blink_set(led_cdev, &state, &led_cdev->blink_delay_off); | 43 | led_blink_set(led_cdev, &state, &led_cdev->blink_delay_off); |
| 44 | led_cdev->blink_delay_on = state; | ||
| 44 | ret = count; | 45 | ret = count; |
| 45 | } | 46 | } |
| 46 | 47 | ||
| @@ -69,6 +70,7 @@ static ssize_t led_delay_off_store(struct device *dev, | |||
| 69 | 70 | ||
| 70 | if (count == size) { | 71 | if (count == size) { |
| 71 | led_blink_set(led_cdev, &led_cdev->blink_delay_on, &state); | 72 | led_blink_set(led_cdev, &led_cdev->blink_delay_on, &state); |
| 73 | led_cdev->blink_delay_off = state; | ||
| 72 | ret = count; | 74 | ret = count; |
| 73 | } | 75 | } |
| 74 | 76 | ||
diff --git a/drivers/md/linear.h b/drivers/md/linear.h index 0ce29b61605a..2f2da05b2ce9 100644 --- a/drivers/md/linear.h +++ b/drivers/md/linear.h | |||
| @@ -10,9 +10,9 @@ typedef struct dev_info dev_info_t; | |||
| 10 | 10 | ||
| 11 | struct linear_private_data | 11 | struct linear_private_data |
| 12 | { | 12 | { |
| 13 | struct rcu_head rcu; | ||
| 13 | sector_t array_sectors; | 14 | sector_t array_sectors; |
| 14 | dev_info_t disks[0]; | 15 | dev_info_t disks[0]; |
| 15 | struct rcu_head rcu; | ||
| 16 | }; | 16 | }; |
| 17 | 17 | ||
| 18 | 18 | ||
diff --git a/drivers/md/md.c b/drivers/md/md.c index 8e221a20f5d9..5404b2295820 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
| @@ -848,7 +848,7 @@ void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev, | |||
| 848 | bio->bi_end_io = super_written; | 848 | bio->bi_end_io = super_written; |
| 849 | 849 | ||
| 850 | atomic_inc(&mddev->pending_writes); | 850 | atomic_inc(&mddev->pending_writes); |
| 851 | submit_bio(REQ_WRITE | REQ_SYNC | REQ_FLUSH | REQ_FUA, bio); | 851 | submit_bio(WRITE_FLUSH_FUA, bio); |
| 852 | } | 852 | } |
| 853 | 853 | ||
| 854 | void md_super_wait(mddev_t *mddev) | 854 | void md_super_wait(mddev_t *mddev) |
| @@ -1138,8 +1138,11 @@ static int super_90_load(mdk_rdev_t *rdev, mdk_rdev_t *refdev, int minor_version | |||
| 1138 | ret = 0; | 1138 | ret = 0; |
| 1139 | } | 1139 | } |
| 1140 | rdev->sectors = rdev->sb_start; | 1140 | rdev->sectors = rdev->sb_start; |
| 1141 | /* Limit to 4TB as metadata cannot record more than that */ | ||
| 1142 | if (rdev->sectors >= (2ULL << 32)) | ||
| 1143 | rdev->sectors = (2ULL << 32) - 2; | ||
| 1141 | 1144 | ||
| 1142 | if (rdev->sectors < sb->size * 2 && sb->level > 1) | 1145 | if (rdev->sectors < ((sector_t)sb->size) * 2 && sb->level >= 1) |
| 1143 | /* "this cannot possibly happen" ... */ | 1146 | /* "this cannot possibly happen" ... */ |
| 1144 | ret = -EINVAL; | 1147 | ret = -EINVAL; |
| 1145 | 1148 | ||
| @@ -1173,7 +1176,7 @@ static int super_90_validate(mddev_t *mddev, mdk_rdev_t *rdev) | |||
| 1173 | mddev->clevel[0] = 0; | 1176 | mddev->clevel[0] = 0; |
| 1174 | mddev->layout = sb->layout; | 1177 | mddev->layout = sb->layout; |
| 1175 | mddev->raid_disks = sb->raid_disks; | 1178 | mddev->raid_disks = sb->raid_disks; |
| 1176 | mddev->dev_sectors = sb->size * 2; | 1179 | mddev->dev_sectors = ((sector_t)sb->size) * 2; |
| 1177 | mddev->events = ev1; | 1180 | mddev->events = ev1; |
| 1178 | mddev->bitmap_info.offset = 0; | 1181 | mddev->bitmap_info.offset = 0; |
| 1179 | mddev->bitmap_info.default_offset = MD_SB_BYTES >> 9; | 1182 | mddev->bitmap_info.default_offset = MD_SB_BYTES >> 9; |
| @@ -1415,6 +1418,11 @@ super_90_rdev_size_change(mdk_rdev_t *rdev, sector_t num_sectors) | |||
| 1415 | rdev->sb_start = calc_dev_sboffset(rdev); | 1418 | rdev->sb_start = calc_dev_sboffset(rdev); |
| 1416 | if (!num_sectors || num_sectors > rdev->sb_start) | 1419 | if (!num_sectors || num_sectors > rdev->sb_start) |
| 1417 | num_sectors = rdev->sb_start; | 1420 | num_sectors = rdev->sb_start; |
| 1421 | /* Limit to 4TB as metadata cannot record more than that. | ||
| 1422 | * 4TB == 2^32 KB, or 2*2^32 sectors. | ||
| 1423 | */ | ||
| 1424 | if (num_sectors >= (2ULL << 32)) | ||
| 1425 | num_sectors = (2ULL << 32) - 2; | ||
| 1418 | md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, | 1426 | md_super_write(rdev->mddev, rdev, rdev->sb_start, rdev->sb_size, |
| 1419 | rdev->sb_page); | 1427 | rdev->sb_page); |
| 1420 | md_super_wait(rdev->mddev); | 1428 | md_super_wait(rdev->mddev); |
| @@ -1738,6 +1746,11 @@ static void super_1_sync(mddev_t *mddev, mdk_rdev_t *rdev) | |||
| 1738 | sb->level = cpu_to_le32(mddev->level); | 1746 | sb->level = cpu_to_le32(mddev->level); |
| 1739 | sb->layout = cpu_to_le32(mddev->layout); | 1747 | sb->layout = cpu_to_le32(mddev->layout); |
| 1740 | 1748 | ||
| 1749 | if (test_bit(WriteMostly, &rdev->flags)) | ||
| 1750 | sb->devflags |= WriteMostly1; | ||
| 1751 | else | ||
| 1752 | sb->devflags &= ~WriteMostly1; | ||
| 1753 | |||
| 1741 | if (mddev->bitmap && mddev->bitmap_info.file == NULL) { | 1754 | if (mddev->bitmap && mddev->bitmap_info.file == NULL) { |
| 1742 | sb->bitmap_offset = cpu_to_le32((__u32)mddev->bitmap_info.offset); | 1755 | sb->bitmap_offset = cpu_to_le32((__u32)mddev->bitmap_info.offset); |
| 1743 | sb->feature_map = cpu_to_le32(MD_FEATURE_BITMAP_OFFSET); | 1756 | sb->feature_map = cpu_to_le32(MD_FEATURE_BITMAP_OFFSET); |
| @@ -2561,7 +2574,10 @@ state_store(mdk_rdev_t *rdev, const char *buf, size_t len) | |||
| 2561 | int err = -EINVAL; | 2574 | int err = -EINVAL; |
| 2562 | if (cmd_match(buf, "faulty") && rdev->mddev->pers) { | 2575 | if (cmd_match(buf, "faulty") && rdev->mddev->pers) { |
| 2563 | md_error(rdev->mddev, rdev); | 2576 | md_error(rdev->mddev, rdev); |
| 2564 | err = 0; | 2577 | if (test_bit(Faulty, &rdev->flags)) |
| 2578 | err = 0; | ||
| 2579 | else | ||
| 2580 | err = -EBUSY; | ||
| 2565 | } else if (cmd_match(buf, "remove")) { | 2581 | } else if (cmd_match(buf, "remove")) { |
| 2566 | if (rdev->raid_disk >= 0) | 2582 | if (rdev->raid_disk >= 0) |
| 2567 | err = -EBUSY; | 2583 | err = -EBUSY; |
| @@ -2584,7 +2600,7 @@ state_store(mdk_rdev_t *rdev, const char *buf, size_t len) | |||
| 2584 | err = 0; | 2600 | err = 0; |
| 2585 | } else if (cmd_match(buf, "-blocked")) { | 2601 | } else if (cmd_match(buf, "-blocked")) { |
| 2586 | if (!test_bit(Faulty, &rdev->flags) && | 2602 | if (!test_bit(Faulty, &rdev->flags) && |
| 2587 | test_bit(BlockedBadBlocks, &rdev->flags)) { | 2603 | rdev->badblocks.unacked_exist) { |
| 2588 | /* metadata handler doesn't understand badblocks, | 2604 | /* metadata handler doesn't understand badblocks, |
| 2589 | * so we need to fail the device | 2605 | * so we need to fail the device |
| 2590 | */ | 2606 | */ |
| @@ -5983,6 +5999,8 @@ static int set_disk_faulty(mddev_t *mddev, dev_t dev) | |||
| 5983 | return -ENODEV; | 5999 | return -ENODEV; |
| 5984 | 6000 | ||
| 5985 | md_error(mddev, rdev); | 6001 | md_error(mddev, rdev); |
| 6002 | if (!test_bit(Faulty, &rdev->flags)) | ||
| 6003 | return -EBUSY; | ||
| 5986 | return 0; | 6004 | return 0; |
| 5987 | } | 6005 | } |
| 5988 | 6006 | ||
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index 32323f0afd89..f4622dd8fc59 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
| @@ -1099,12 +1099,11 @@ read_again: | |||
| 1099 | bio_list_add(&conf->pending_bio_list, mbio); | 1099 | bio_list_add(&conf->pending_bio_list, mbio); |
| 1100 | spin_unlock_irqrestore(&conf->device_lock, flags); | 1100 | spin_unlock_irqrestore(&conf->device_lock, flags); |
| 1101 | } | 1101 | } |
| 1102 | r1_bio_write_done(r1_bio); | 1102 | /* Mustn't call r1_bio_write_done before this next test, |
| 1103 | 1103 | * as it could result in the bio being freed. | |
| 1104 | /* In case raid1d snuck in to freeze_array */ | 1104 | */ |
| 1105 | wake_up(&conf->wait_barrier); | ||
| 1106 | |||
| 1107 | if (sectors_handled < (bio->bi_size >> 9)) { | 1105 | if (sectors_handled < (bio->bi_size >> 9)) { |
| 1106 | r1_bio_write_done(r1_bio); | ||
| 1108 | /* We need another r1_bio. It has already been counted | 1107 | /* We need another r1_bio. It has already been counted |
| 1109 | * in bio->bi_phys_segments | 1108 | * in bio->bi_phys_segments |
| 1110 | */ | 1109 | */ |
| @@ -1117,6 +1116,11 @@ read_again: | |||
| 1117 | goto retry_write; | 1116 | goto retry_write; |
| 1118 | } | 1117 | } |
| 1119 | 1118 | ||
| 1119 | r1_bio_write_done(r1_bio); | ||
| 1120 | |||
| 1121 | /* In case raid1d snuck in to freeze_array */ | ||
| 1122 | wake_up(&conf->wait_barrier); | ||
| 1123 | |||
| 1120 | if (do_sync || !bitmap || !plugged) | 1124 | if (do_sync || !bitmap || !plugged) |
| 1121 | md_wakeup_thread(mddev->thread); | 1125 | md_wakeup_thread(mddev->thread); |
| 1122 | 1126 | ||
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 8b29cd4f01c8..d7a8468ddeab 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
| @@ -337,6 +337,21 @@ static void close_write(r10bio_t *r10_bio) | |||
| 337 | md_write_end(r10_bio->mddev); | 337 | md_write_end(r10_bio->mddev); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | static void one_write_done(r10bio_t *r10_bio) | ||
| 341 | { | ||
| 342 | if (atomic_dec_and_test(&r10_bio->remaining)) { | ||
| 343 | if (test_bit(R10BIO_WriteError, &r10_bio->state)) | ||
| 344 | reschedule_retry(r10_bio); | ||
| 345 | else { | ||
| 346 | close_write(r10_bio); | ||
| 347 | if (test_bit(R10BIO_MadeGood, &r10_bio->state)) | ||
| 348 | reschedule_retry(r10_bio); | ||
| 349 | else | ||
| 350 | raid_end_bio_io(r10_bio); | ||
| 351 | } | ||
| 352 | } | ||
| 353 | } | ||
| 354 | |||
| 340 | static void raid10_end_write_request(struct bio *bio, int error) | 355 | static void raid10_end_write_request(struct bio *bio, int error) |
| 341 | { | 356 | { |
| 342 | int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); | 357 | int uptodate = test_bit(BIO_UPTODATE, &bio->bi_flags); |
| @@ -387,17 +402,7 @@ static void raid10_end_write_request(struct bio *bio, int error) | |||
| 387 | * Let's see if all mirrored write operations have finished | 402 | * Let's see if all mirrored write operations have finished |
| 388 | * already. | 403 | * already. |
| 389 | */ | 404 | */ |
| 390 | if (atomic_dec_and_test(&r10_bio->remaining)) { | 405 | one_write_done(r10_bio); |
| 391 | if (test_bit(R10BIO_WriteError, &r10_bio->state)) | ||
| 392 | reschedule_retry(r10_bio); | ||
| 393 | else { | ||
| 394 | close_write(r10_bio); | ||
| 395 | if (test_bit(R10BIO_MadeGood, &r10_bio->state)) | ||
| 396 | reschedule_retry(r10_bio); | ||
| 397 | else | ||
| 398 | raid_end_bio_io(r10_bio); | ||
| 399 | } | ||
| 400 | } | ||
| 401 | if (dec_rdev) | 406 | if (dec_rdev) |
| 402 | rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); | 407 | rdev_dec_pending(conf->mirrors[dev].rdev, conf->mddev); |
| 403 | } | 408 | } |
| @@ -1127,20 +1132,12 @@ retry_write: | |||
| 1127 | spin_unlock_irqrestore(&conf->device_lock, flags); | 1132 | spin_unlock_irqrestore(&conf->device_lock, flags); |
| 1128 | } | 1133 | } |
| 1129 | 1134 | ||
| 1130 | if (atomic_dec_and_test(&r10_bio->remaining)) { | 1135 | /* Don't remove the bias on 'remaining' (one_write_done) until |
| 1131 | /* This matches the end of raid10_end_write_request() */ | 1136 | * after checking if we need to go around again. |
| 1132 | bitmap_endwrite(r10_bio->mddev->bitmap, r10_bio->sector, | 1137 | */ |
| 1133 | r10_bio->sectors, | ||
| 1134 | !test_bit(R10BIO_Degraded, &r10_bio->state), | ||
| 1135 | 0); | ||
| 1136 | md_write_end(mddev); | ||
| 1137 | raid_end_bio_io(r10_bio); | ||
| 1138 | } | ||
| 1139 | |||
| 1140 | /* In case raid10d snuck in to freeze_array */ | ||
| 1141 | wake_up(&conf->wait_barrier); | ||
| 1142 | 1138 | ||
| 1143 | if (sectors_handled < (bio->bi_size >> 9)) { | 1139 | if (sectors_handled < (bio->bi_size >> 9)) { |
| 1140 | one_write_done(r10_bio); | ||
| 1144 | /* We need another r10_bio. It has already been counted | 1141 | /* We need another r10_bio. It has already been counted |
| 1145 | * in bio->bi_phys_segments. | 1142 | * in bio->bi_phys_segments. |
| 1146 | */ | 1143 | */ |
| @@ -1154,6 +1151,10 @@ retry_write: | |||
| 1154 | r10_bio->state = 0; | 1151 | r10_bio->state = 0; |
| 1155 | goto retry_write; | 1152 | goto retry_write; |
| 1156 | } | 1153 | } |
| 1154 | one_write_done(r10_bio); | ||
| 1155 | |||
| 1156 | /* In case raid10d snuck in to freeze_array */ | ||
| 1157 | wake_up(&conf->wait_barrier); | ||
| 1157 | 1158 | ||
| 1158 | if (do_sync || !mddev->bitmap || !plugged) | 1159 | if (do_sync || !mddev->bitmap || !plugged) |
| 1159 | md_wakeup_thread(mddev->thread); | 1160 | md_wakeup_thread(mddev->thread); |
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index dbae459fb02d..43709fa6b6df 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
| @@ -3336,7 +3336,7 @@ static void handle_stripe(struct stripe_head *sh) | |||
| 3336 | 3336 | ||
| 3337 | finish: | 3337 | finish: |
| 3338 | /* wait for this device to become unblocked */ | 3338 | /* wait for this device to become unblocked */ |
| 3339 | if (unlikely(s.blocked_rdev)) | 3339 | if (conf->mddev->external && unlikely(s.blocked_rdev)) |
| 3340 | md_wait_for_blocked_rdev(s.blocked_rdev, conf->mddev); | 3340 | md_wait_for_blocked_rdev(s.blocked_rdev, conf->mddev); |
| 3341 | 3341 | ||
| 3342 | if (s.handle_bad_blocks) | 3342 | if (s.handle_bad_blocks) |
diff --git a/drivers/media/dvb/dvb-usb/vp7045.c b/drivers/media/dvb/dvb-usb/vp7045.c index 3db89e3cb0bb..536c16c943bd 100644 --- a/drivers/media/dvb/dvb-usb/vp7045.c +++ b/drivers/media/dvb/dvb-usb/vp7045.c | |||
| @@ -224,26 +224,8 @@ static struct dvb_usb_device_properties vp7045_properties; | |||
| 224 | static int vp7045_usb_probe(struct usb_interface *intf, | 224 | static int vp7045_usb_probe(struct usb_interface *intf, |
| 225 | const struct usb_device_id *id) | 225 | const struct usb_device_id *id) |
| 226 | { | 226 | { |
| 227 | struct dvb_usb_device *d; | 227 | return dvb_usb_device_init(intf, &vp7045_properties, |
| 228 | int ret = dvb_usb_device_init(intf, &vp7045_properties, | 228 | THIS_MODULE, NULL, adapter_nr); |
| 229 | THIS_MODULE, &d, adapter_nr); | ||
| 230 | if (ret) | ||
| 231 | return ret; | ||
| 232 | |||
| 233 | d->priv = kmalloc(20, GFP_KERNEL); | ||
| 234 | if (!d->priv) { | ||
| 235 | dvb_usb_device_exit(intf); | ||
| 236 | return -ENOMEM; | ||
| 237 | } | ||
| 238 | |||
| 239 | return ret; | ||
| 240 | } | ||
| 241 | |||
| 242 | static void vp7045_usb_disconnect(struct usb_interface *intf) | ||
| 243 | { | ||
| 244 | struct dvb_usb_device *d = usb_get_intfdata(intf); | ||
| 245 | kfree(d->priv); | ||
| 246 | dvb_usb_device_exit(intf); | ||
| 247 | } | 229 | } |
| 248 | 230 | ||
| 249 | static struct usb_device_id vp7045_usb_table [] = { | 231 | static struct usb_device_id vp7045_usb_table [] = { |
| @@ -258,7 +240,7 @@ MODULE_DEVICE_TABLE(usb, vp7045_usb_table); | |||
| 258 | static struct dvb_usb_device_properties vp7045_properties = { | 240 | static struct dvb_usb_device_properties vp7045_properties = { |
| 259 | .usb_ctrl = CYPRESS_FX2, | 241 | .usb_ctrl = CYPRESS_FX2, |
| 260 | .firmware = "dvb-usb-vp7045-01.fw", | 242 | .firmware = "dvb-usb-vp7045-01.fw", |
| 261 | .size_of_priv = sizeof(u8 *), | 243 | .size_of_priv = 20, |
| 262 | 244 | ||
| 263 | .num_adapters = 1, | 245 | .num_adapters = 1, |
| 264 | .adapter = { | 246 | .adapter = { |
| @@ -305,7 +287,7 @@ static struct dvb_usb_device_properties vp7045_properties = { | |||
| 305 | static struct usb_driver vp7045_usb_driver = { | 287 | static struct usb_driver vp7045_usb_driver = { |
| 306 | .name = "dvb_usb_vp7045", | 288 | .name = "dvb_usb_vp7045", |
| 307 | .probe = vp7045_usb_probe, | 289 | .probe = vp7045_usb_probe, |
| 308 | .disconnect = vp7045_usb_disconnect, | 290 | .disconnect = dvb_usb_device_exit, |
| 309 | .id_table = vp7045_usb_table, | 291 | .id_table = vp7045_usb_table, |
| 310 | }; | 292 | }; |
| 311 | 293 | ||
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c index eae05b500476..144f3f55d765 100644 --- a/drivers/media/rc/nuvoton-cir.c +++ b/drivers/media/rc/nuvoton-cir.c | |||
| @@ -618,7 +618,6 @@ static void nvt_dump_rx_buf(struct nvt_dev *nvt) | |||
| 618 | static void nvt_process_rx_ir_data(struct nvt_dev *nvt) | 618 | static void nvt_process_rx_ir_data(struct nvt_dev *nvt) |
| 619 | { | 619 | { |
| 620 | DEFINE_IR_RAW_EVENT(rawir); | 620 | DEFINE_IR_RAW_EVENT(rawir); |
| 621 | unsigned int count; | ||
| 622 | u32 carrier; | 621 | u32 carrier; |
| 623 | u8 sample; | 622 | u8 sample; |
| 624 | int i; | 623 | int i; |
| @@ -631,65 +630,38 @@ static void nvt_process_rx_ir_data(struct nvt_dev *nvt) | |||
| 631 | if (nvt->carrier_detect_enabled) | 630 | if (nvt->carrier_detect_enabled) |
| 632 | carrier = nvt_rx_carrier_detect(nvt); | 631 | carrier = nvt_rx_carrier_detect(nvt); |
| 633 | 632 | ||
| 634 | count = nvt->pkts; | 633 | nvt_dbg_verbose("Processing buffer of len %d", nvt->pkts); |
| 635 | nvt_dbg_verbose("Processing buffer of len %d", count); | ||
| 636 | 634 | ||
| 637 | init_ir_raw_event(&rawir); | 635 | init_ir_raw_event(&rawir); |
| 638 | 636 | ||
| 639 | for (i = 0; i < count; i++) { | 637 | for (i = 0; i < nvt->pkts; i++) { |
| 640 | nvt->pkts--; | ||
| 641 | sample = nvt->buf[i]; | 638 | sample = nvt->buf[i]; |
| 642 | 639 | ||
| 643 | rawir.pulse = ((sample & BUF_PULSE_BIT) != 0); | 640 | rawir.pulse = ((sample & BUF_PULSE_BIT) != 0); |
| 644 | rawir.duration = US_TO_NS((sample & BUF_LEN_MASK) | 641 | rawir.duration = US_TO_NS((sample & BUF_LEN_MASK) |
| 645 | * SAMPLE_PERIOD); | 642 | * SAMPLE_PERIOD); |
| 646 | 643 | ||
| 647 | if ((sample & BUF_LEN_MASK) == BUF_LEN_MASK) { | 644 | nvt_dbg("Storing %s with duration %d", |
| 648 | if (nvt->rawir.pulse == rawir.pulse) | 645 | rawir.pulse ? "pulse" : "space", rawir.duration); |
| 649 | nvt->rawir.duration += rawir.duration; | ||
| 650 | else { | ||
| 651 | nvt->rawir.duration = rawir.duration; | ||
| 652 | nvt->rawir.pulse = rawir.pulse; | ||
| 653 | } | ||
| 654 | continue; | ||
| 655 | } | ||
| 656 | |||
| 657 | rawir.duration += nvt->rawir.duration; | ||
| 658 | 646 | ||
| 659 | init_ir_raw_event(&nvt->rawir); | 647 | ir_raw_event_store_with_filter(nvt->rdev, &rawir); |
| 660 | nvt->rawir.duration = 0; | ||
| 661 | nvt->rawir.pulse = rawir.pulse; | ||
| 662 | |||
| 663 | if (sample == BUF_PULSE_BIT) | ||
| 664 | rawir.pulse = false; | ||
| 665 | |||
| 666 | if (rawir.duration) { | ||
| 667 | nvt_dbg("Storing %s with duration %d", | ||
| 668 | rawir.pulse ? "pulse" : "space", | ||
| 669 | rawir.duration); | ||
| 670 | |||
| 671 | ir_raw_event_store_with_filter(nvt->rdev, &rawir); | ||
| 672 | } | ||
| 673 | 648 | ||
| 674 | /* | 649 | /* |
| 675 | * BUF_PULSE_BIT indicates end of IR data, BUF_REPEAT_BYTE | 650 | * BUF_PULSE_BIT indicates end of IR data, BUF_REPEAT_BYTE |
| 676 | * indicates end of IR signal, but new data incoming. In both | 651 | * indicates end of IR signal, but new data incoming. In both |
| 677 | * cases, it means we're ready to call ir_raw_event_handle | 652 | * cases, it means we're ready to call ir_raw_event_handle |
| 678 | */ | 653 | */ |
| 679 | if ((sample == BUF_PULSE_BIT) && nvt->pkts) { | 654 | if ((sample == BUF_PULSE_BIT) && (i + 1 < nvt->pkts)) { |
| 680 | nvt_dbg("Calling ir_raw_event_handle (signal end)\n"); | 655 | nvt_dbg("Calling ir_raw_event_handle (signal end)\n"); |
| 681 | ir_raw_event_handle(nvt->rdev); | 656 | ir_raw_event_handle(nvt->rdev); |
| 682 | } | 657 | } |
| 683 | } | 658 | } |
| 684 | 659 | ||
| 660 | nvt->pkts = 0; | ||
| 661 | |||
| 685 | nvt_dbg("Calling ir_raw_event_handle (buffer empty)\n"); | 662 | nvt_dbg("Calling ir_raw_event_handle (buffer empty)\n"); |
| 686 | ir_raw_event_handle(nvt->rdev); | 663 | ir_raw_event_handle(nvt->rdev); |
| 687 | 664 | ||
| 688 | if (nvt->pkts) { | ||
| 689 | nvt_dbg("Odd, pkts should be 0 now... (its %u)", nvt->pkts); | ||
| 690 | nvt->pkts = 0; | ||
| 691 | } | ||
| 692 | |||
| 693 | nvt_dbg_verbose("%s done", __func__); | 665 | nvt_dbg_verbose("%s done", __func__); |
| 694 | } | 666 | } |
| 695 | 667 | ||
| @@ -1048,7 +1020,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id) | |||
| 1048 | 1020 | ||
| 1049 | spin_lock_init(&nvt->nvt_lock); | 1021 | spin_lock_init(&nvt->nvt_lock); |
| 1050 | spin_lock_init(&nvt->tx.lock); | 1022 | spin_lock_init(&nvt->tx.lock); |
| 1051 | init_ir_raw_event(&nvt->rawir); | ||
| 1052 | 1023 | ||
| 1053 | ret = -EBUSY; | 1024 | ret = -EBUSY; |
| 1054 | /* now claim resources */ | 1025 | /* now claim resources */ |
diff --git a/drivers/media/rc/nuvoton-cir.h b/drivers/media/rc/nuvoton-cir.h index 1241fc89a36c..0d5e0872a2ea 100644 --- a/drivers/media/rc/nuvoton-cir.h +++ b/drivers/media/rc/nuvoton-cir.h | |||
| @@ -67,7 +67,6 @@ static int debug; | |||
| 67 | struct nvt_dev { | 67 | struct nvt_dev { |
| 68 | struct pnp_dev *pdev; | 68 | struct pnp_dev *pdev; |
| 69 | struct rc_dev *rdev; | 69 | struct rc_dev *rdev; |
| 70 | struct ir_raw_event rawir; | ||
| 71 | 70 | ||
| 72 | spinlock_t nvt_lock; | 71 | spinlock_t nvt_lock; |
| 73 | 72 | ||
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 0800433b2092..18305c89083c 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
| @@ -2858,7 +2858,6 @@ static void ov7xx0_configure(struct sd *sd) | |||
| 2858 | case 0x60: | 2858 | case 0x60: |
| 2859 | PDEBUG(D_PROBE, "Sensor is a OV7660"); | 2859 | PDEBUG(D_PROBE, "Sensor is a OV7660"); |
| 2860 | sd->sensor = SEN_OV7660; | 2860 | sd->sensor = SEN_OV7660; |
| 2861 | sd->invert_led = 0; | ||
| 2862 | break; | 2861 | break; |
| 2863 | default: | 2862 | default: |
| 2864 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); | 2863 | PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low); |
| @@ -3337,7 +3336,6 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
| 3337 | case BRIDGE_OV519: | 3336 | case BRIDGE_OV519: |
| 3338 | cam->cam_mode = ov519_vga_mode; | 3337 | cam->cam_mode = ov519_vga_mode; |
| 3339 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); | 3338 | cam->nmodes = ARRAY_SIZE(ov519_vga_mode); |
| 3340 | sd->invert_led = !sd->invert_led; | ||
| 3341 | break; | 3339 | break; |
| 3342 | case BRIDGE_OVFX2: | 3340 | case BRIDGE_OVFX2: |
| 3343 | cam->cam_mode = ov519_vga_mode; | 3341 | cam->cam_mode = ov519_vga_mode; |
| @@ -5005,24 +5003,24 @@ static const struct sd_desc sd_desc = { | |||
| 5005 | /* -- module initialisation -- */ | 5003 | /* -- module initialisation -- */ |
| 5006 | static const struct usb_device_id device_table[] = { | 5004 | static const struct usb_device_id device_table[] = { |
| 5007 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, | 5005 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, |
| 5008 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, | 5006 | {USB_DEVICE(0x041e, 0x4052), |
| 5009 | {USB_DEVICE(0x041e, 0x405f), | ||
| 5010 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | 5007 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
| 5008 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | ||
| 5011 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | 5009 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, |
| 5012 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | 5010 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, |
| 5013 | {USB_DEVICE(0x041e, 0x4064), | 5011 | {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 }, |
| 5014 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
| 5015 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, | 5012 | {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 }, |
| 5016 | {USB_DEVICE(0x041e, 0x4068), | 5013 | {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 }, |
| 5014 | {USB_DEVICE(0x045e, 0x028c), | ||
| 5017 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | 5015 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
| 5018 | {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 }, | ||
| 5019 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, | 5016 | {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 }, |
| 5020 | {USB_DEVICE(0x054c, 0x0155), | 5017 | {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 }, |
| 5021 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
| 5022 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, | 5018 | {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 }, |
| 5023 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, | 5019 | {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 }, |
| 5024 | {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 }, | 5020 | {USB_DEVICE(0x05a9, 0x0519), |
| 5025 | {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 }, | 5021 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, |
| 5022 | {USB_DEVICE(0x05a9, 0x0530), | ||
| 5023 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
| 5026 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, | 5024 | {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 }, |
| 5027 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, | 5025 | {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 }, |
| 5028 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, | 5026 | {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 }, |
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c index 81b8a600783b..c477ad11f103 100644 --- a/drivers/media/video/gspca/sonixj.c +++ b/drivers/media/video/gspca/sonixj.c | |||
| @@ -2386,7 +2386,7 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
| 2386 | reg_w1(gspca_dev, 0x01, 0x22); | 2386 | reg_w1(gspca_dev, 0x01, 0x22); |
| 2387 | msleep(100); | 2387 | msleep(100); |
| 2388 | reg01 = SCL_SEL_OD | S_PDN_INV; | 2388 | reg01 = SCL_SEL_OD | S_PDN_INV; |
| 2389 | reg17 &= MCK_SIZE_MASK; | 2389 | reg17 &= ~MCK_SIZE_MASK; |
| 2390 | reg17 |= 0x04; /* clock / 4 */ | 2390 | reg17 |= 0x04; /* clock / 4 */ |
| 2391 | break; | 2391 | break; |
| 2392 | } | 2392 | } |
| @@ -2532,6 +2532,10 @@ static int sd_start(struct gspca_dev *gspca_dev) | |||
| 2532 | if (!mode) { /* if 640x480 */ | 2532 | if (!mode) { /* if 640x480 */ |
| 2533 | reg17 &= ~MCK_SIZE_MASK; | 2533 | reg17 &= ~MCK_SIZE_MASK; |
| 2534 | reg17 |= 0x04; /* clock / 4 */ | 2534 | reg17 |= 0x04; /* clock / 4 */ |
| 2535 | } else { | ||
| 2536 | reg01 &= ~SYS_SEL_48M; /* clk 24Mz */ | ||
| 2537 | reg17 &= ~MCK_SIZE_MASK; | ||
| 2538 | reg17 |= 0x02; /* clock / 2 */ | ||
| 2535 | } | 2539 | } |
| 2536 | break; | 2540 | break; |
| 2537 | case SENSOR_OV7630: | 2541 | case SENSOR_OV7630: |
diff --git a/drivers/media/video/pwc/pwc-v4l.c b/drivers/media/video/pwc/pwc-v4l.c index e9a0e94b9995..8c70e64444e7 100644 --- a/drivers/media/video/pwc/pwc-v4l.c +++ b/drivers/media/video/pwc/pwc-v4l.c | |||
| @@ -338,7 +338,7 @@ int pwc_init_controls(struct pwc_device *pdev) | |||
| 338 | if (pdev->restore_factory) | 338 | if (pdev->restore_factory) |
| 339 | pdev->restore_factory->flags = V4L2_CTRL_FLAG_UPDATE; | 339 | pdev->restore_factory->flags = V4L2_CTRL_FLAG_UPDATE; |
| 340 | 340 | ||
| 341 | if (!pdev->features & FEATURE_MOTOR_PANTILT) | 341 | if (!(pdev->features & FEATURE_MOTOR_PANTILT)) |
| 342 | return hdl->error; | 342 | return hdl->error; |
| 343 | 343 | ||
| 344 | /* Motor pan / tilt / reset */ | 344 | /* Motor pan / tilt / reset */ |
diff --git a/drivers/media/video/via-camera.c b/drivers/media/video/via-camera.c index 85d3048c1d67..bb7f17f2a33c 100644 --- a/drivers/media/video/via-camera.c +++ b/drivers/media/video/via-camera.c | |||
| @@ -1332,6 +1332,8 @@ static __devinit bool viacam_serial_is_enabled(void) | |||
| 1332 | struct pci_bus *pbus = pci_find_bus(0, 0); | 1332 | struct pci_bus *pbus = pci_find_bus(0, 0); |
| 1333 | u8 cbyte; | 1333 | u8 cbyte; |
| 1334 | 1334 | ||
| 1335 | if (!pbus) | ||
| 1336 | return false; | ||
| 1335 | pci_bus_read_config_byte(pbus, VIACAM_SERIAL_DEVFN, | 1337 | pci_bus_read_config_byte(pbus, VIACAM_SERIAL_DEVFN, |
| 1336 | VIACAM_SERIAL_CREG, &cbyte); | 1338 | VIACAM_SERIAL_CREG, &cbyte); |
| 1337 | if ((cbyte & VIACAM_SERIAL_BIT) == 0) | 1339 | if ((cbyte & VIACAM_SERIAL_BIT) == 0) |
diff --git a/drivers/mfd/max8997.c b/drivers/mfd/max8997.c index 5d1fca0277ef..f83103b8970d 100644 --- a/drivers/mfd/max8997.c +++ b/drivers/mfd/max8997.c | |||
| @@ -135,10 +135,13 @@ static int max8997_i2c_probe(struct i2c_client *i2c, | |||
| 135 | max8997->dev = &i2c->dev; | 135 | max8997->dev = &i2c->dev; |
| 136 | max8997->i2c = i2c; | 136 | max8997->i2c = i2c; |
| 137 | max8997->type = id->driver_data; | 137 | max8997->type = id->driver_data; |
| 138 | max8997->irq = i2c->irq; | ||
| 138 | 139 | ||
| 139 | if (!pdata) | 140 | if (!pdata) |
| 140 | goto err; | 141 | goto err; |
| 141 | 142 | ||
| 143 | max8997->irq_base = pdata->irq_base; | ||
| 144 | max8997->ono = pdata->ono; | ||
| 142 | max8997->wakeup = pdata->wakeup; | 145 | max8997->wakeup = pdata->wakeup; |
| 143 | 146 | ||
| 144 | mutex_init(&max8997->iolock); | 147 | mutex_init(&max8997->iolock); |
| @@ -152,6 +155,8 @@ static int max8997_i2c_probe(struct i2c_client *i2c, | |||
| 152 | 155 | ||
| 153 | pm_runtime_set_active(max8997->dev); | 156 | pm_runtime_set_active(max8997->dev); |
| 154 | 157 | ||
| 158 | max8997_irq_init(max8997); | ||
| 159 | |||
| 155 | mfd_add_devices(max8997->dev, -1, max8997_devs, | 160 | mfd_add_devices(max8997->dev, -1, max8997_devs, |
| 156 | ARRAY_SIZE(max8997_devs), | 161 | ARRAY_SIZE(max8997_devs), |
| 157 | NULL, 0); | 162 | NULL, 0); |
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index 29601e7d606d..86e14583a082 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ | 18 | */ |
| 19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
| 20 | #include <linux/module.h> | ||
| 20 | #include <linux/types.h> | 21 | #include <linux/types.h> |
| 21 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
| 22 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
| @@ -676,7 +677,6 @@ static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count) | |||
| 676 | | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF | 677 | | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF |
| 677 | | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); | 678 | | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); |
| 678 | 679 | ||
| 679 | reg |= (1 << (i + 1)); | ||
| 680 | } else | 680 | } else |
| 681 | continue; | 681 | continue; |
| 682 | 682 | ||
diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c index 2bfad5c86cc7..a56be931551c 100644 --- a/drivers/mfd/tps65910-irq.c +++ b/drivers/mfd/tps65910-irq.c | |||
| @@ -178,8 +178,10 @@ int tps65910_irq_init(struct tps65910 *tps65910, int irq, | |||
| 178 | switch (tps65910_chip_id(tps65910)) { | 178 | switch (tps65910_chip_id(tps65910)) { |
| 179 | case TPS65910: | 179 | case TPS65910: |
| 180 | tps65910->irq_num = TPS65910_NUM_IRQ; | 180 | tps65910->irq_num = TPS65910_NUM_IRQ; |
| 181 | break; | ||
| 181 | case TPS65911: | 182 | case TPS65911: |
| 182 | tps65910->irq_num = TPS65911_NUM_IRQ; | 183 | tps65910->irq_num = TPS65911_NUM_IRQ; |
| 184 | break; | ||
| 183 | } | 185 | } |
| 184 | 186 | ||
| 185 | /* Register with genirq */ | 187 | /* Register with genirq */ |
diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c index b5d598c3aa71..7cbf2aa9e64f 100644 --- a/drivers/mfd/twl4030-madc.c +++ b/drivers/mfd/twl4030-madc.c | |||
| @@ -510,8 +510,9 @@ int twl4030_madc_conversion(struct twl4030_madc_request *req) | |||
| 510 | u8 ch_msb, ch_lsb; | 510 | u8 ch_msb, ch_lsb; |
| 511 | int ret; | 511 | int ret; |
| 512 | 512 | ||
| 513 | if (!req) | 513 | if (!req || !twl4030_madc) |
| 514 | return -EINVAL; | 514 | return -EINVAL; |
| 515 | |||
| 515 | mutex_lock(&twl4030_madc->lock); | 516 | mutex_lock(&twl4030_madc->lock); |
| 516 | if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) { | 517 | if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) { |
| 517 | ret = -EINVAL; | 518 | ret = -EINVAL; |
| @@ -706,6 +707,8 @@ static int __devinit twl4030_madc_probe(struct platform_device *pdev) | |||
| 706 | if (!madc) | 707 | if (!madc) |
| 707 | return -ENOMEM; | 708 | return -ENOMEM; |
| 708 | 709 | ||
| 710 | madc->dev = &pdev->dev; | ||
| 711 | |||
| 709 | /* | 712 | /* |
| 710 | * Phoenix provides 2 interrupt lines. The first one is connected to | 713 | * Phoenix provides 2 interrupt lines. The first one is connected to |
| 711 | * the OMAP. The other one can be connected to the other processor such | 714 | * the OMAP. The other one can be connected to the other processor such |
diff --git a/drivers/mfd/wm8350-gpio.c b/drivers/mfd/wm8350-gpio.c index ebf99bef392f..d584f6b4d6e2 100644 --- a/drivers/mfd/wm8350-gpio.c +++ b/drivers/mfd/wm8350-gpio.c | |||
| @@ -37,7 +37,7 @@ static int gpio_set_dir(struct wm8350 *wm8350, int gpio, int dir) | |||
| 37 | return ret; | 37 | return ret; |
| 38 | } | 38 | } |
| 39 | 39 | ||
| 40 | static int gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db) | 40 | static int wm8350_gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db) |
| 41 | { | 41 | { |
| 42 | if (db == WM8350_GPIO_DEBOUNCE_ON) | 42 | if (db == WM8350_GPIO_DEBOUNCE_ON) |
| 43 | return wm8350_set_bits(wm8350, WM8350_GPIO_DEBOUNCE, | 43 | return wm8350_set_bits(wm8350, WM8350_GPIO_DEBOUNCE, |
| @@ -210,7 +210,7 @@ int wm8350_gpio_config(struct wm8350 *wm8350, int gpio, int dir, int func, | |||
| 210 | goto err; | 210 | goto err; |
| 211 | if (gpio_set_polarity(wm8350, gpio, pol)) | 211 | if (gpio_set_polarity(wm8350, gpio, pol)) |
| 212 | goto err; | 212 | goto err; |
| 213 | if (gpio_set_debounce(wm8350, gpio, debounce)) | 213 | if (wm8350_gpio_set_debounce(wm8350, gpio, debounce)) |
| 214 | goto err; | 214 | goto err; |
| 215 | if (gpio_set_dir(wm8350, gpio, dir)) | 215 | if (gpio_set_dir(wm8350, gpio, dir)) |
| 216 | goto err; | 216 | goto err; |
diff --git a/drivers/misc/pti.c b/drivers/misc/pti.c index 06df1877ad0f..0b56e3f43573 100644 --- a/drivers/misc/pti.c +++ b/drivers/misc/pti.c | |||
| @@ -165,6 +165,11 @@ static void pti_write_to_aperture(struct pti_masterchannel *mc, | |||
| 165 | static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc, | 165 | static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc, |
| 166 | const char *thread_name) | 166 | const char *thread_name) |
| 167 | { | 167 | { |
| 168 | /* | ||
| 169 | * Since we access the comm member in current's task_struct, we only | ||
| 170 | * need to be as large as what 'comm' in that structure is. | ||
| 171 | */ | ||
| 172 | char comm[TASK_COMM_LEN]; | ||
| 168 | struct pti_masterchannel mccontrol = {.master = CONTROL_ID, | 173 | struct pti_masterchannel mccontrol = {.master = CONTROL_ID, |
| 169 | .channel = 0}; | 174 | .channel = 0}; |
| 170 | const char *thread_name_p; | 175 | const char *thread_name_p; |
| @@ -172,13 +177,6 @@ static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc, | |||
| 172 | u8 control_frame[CONTROL_FRAME_LEN]; | 177 | u8 control_frame[CONTROL_FRAME_LEN]; |
| 173 | 178 | ||
| 174 | if (!thread_name) { | 179 | if (!thread_name) { |
| 175 | /* | ||
| 176 | * Since we access the comm member in current's task_struct, | ||
| 177 | * we only need to be as large as what 'comm' in that | ||
| 178 | * structure is. | ||
| 179 | */ | ||
| 180 | char comm[TASK_COMM_LEN]; | ||
| 181 | |||
| 182 | if (!in_interrupt()) | 180 | if (!in_interrupt()) |
| 183 | get_task_comm(comm, current); | 181 | get_task_comm(comm, current); |
| 184 | else | 182 | else |
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 91a0a7460ebb..b27b94078c21 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c | |||
| @@ -133,7 +133,7 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |||
| 133 | if (mrq->done) | 133 | if (mrq->done) |
| 134 | mrq->done(mrq); | 134 | mrq->done(mrq); |
| 135 | 135 | ||
| 136 | mmc_host_clk_gate(host); | 136 | mmc_host_clk_release(host); |
| 137 | } | 137 | } |
| 138 | } | 138 | } |
| 139 | 139 | ||
| @@ -192,7 +192,7 @@ mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) | |||
| 192 | mrq->stop->mrq = mrq; | 192 | mrq->stop->mrq = mrq; |
| 193 | } | 193 | } |
| 194 | } | 194 | } |
| 195 | mmc_host_clk_ungate(host); | 195 | mmc_host_clk_hold(host); |
| 196 | led_trigger_event(host->led, LED_FULL); | 196 | led_trigger_event(host->led, LED_FULL); |
| 197 | host->ops->request(host, mrq); | 197 | host->ops->request(host, mrq); |
| 198 | } | 198 | } |
| @@ -728,15 +728,17 @@ static inline void mmc_set_ios(struct mmc_host *host) | |||
| 728 | */ | 728 | */ |
| 729 | void mmc_set_chip_select(struct mmc_host *host, int mode) | 729 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
| 730 | { | 730 | { |
| 731 | mmc_host_clk_hold(host); | ||
| 731 | host->ios.chip_select = mode; | 732 | host->ios.chip_select = mode; |
| 732 | mmc_set_ios(host); | 733 | mmc_set_ios(host); |
| 734 | mmc_host_clk_release(host); | ||
| 733 | } | 735 | } |
| 734 | 736 | ||
| 735 | /* | 737 | /* |
| 736 | * Sets the host clock to the highest possible frequency that | 738 | * Sets the host clock to the highest possible frequency that |
| 737 | * is below "hz". | 739 | * is below "hz". |
| 738 | */ | 740 | */ |
| 739 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | 741 | static void __mmc_set_clock(struct mmc_host *host, unsigned int hz) |
| 740 | { | 742 | { |
| 741 | WARN_ON(hz < host->f_min); | 743 | WARN_ON(hz < host->f_min); |
| 742 | 744 | ||
| @@ -747,6 +749,13 @@ void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |||
| 747 | mmc_set_ios(host); | 749 | mmc_set_ios(host); |
| 748 | } | 750 | } |
| 749 | 751 | ||
| 752 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | ||
| 753 | { | ||
| 754 | mmc_host_clk_hold(host); | ||
| 755 | __mmc_set_clock(host, hz); | ||
| 756 | mmc_host_clk_release(host); | ||
| 757 | } | ||
| 758 | |||
| 750 | #ifdef CONFIG_MMC_CLKGATE | 759 | #ifdef CONFIG_MMC_CLKGATE |
| 751 | /* | 760 | /* |
| 752 | * This gates the clock by setting it to 0 Hz. | 761 | * This gates the clock by setting it to 0 Hz. |
| @@ -779,7 +788,7 @@ void mmc_ungate_clock(struct mmc_host *host) | |||
| 779 | if (host->clk_old) { | 788 | if (host->clk_old) { |
| 780 | BUG_ON(host->ios.clock); | 789 | BUG_ON(host->ios.clock); |
| 781 | /* This call will also set host->clk_gated to false */ | 790 | /* This call will also set host->clk_gated to false */ |
| 782 | mmc_set_clock(host, host->clk_old); | 791 | __mmc_set_clock(host, host->clk_old); |
| 783 | } | 792 | } |
| 784 | } | 793 | } |
| 785 | 794 | ||
| @@ -807,8 +816,10 @@ void mmc_set_ungated(struct mmc_host *host) | |||
| 807 | */ | 816 | */ |
| 808 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | 817 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) |
| 809 | { | 818 | { |
| 819 | mmc_host_clk_hold(host); | ||
| 810 | host->ios.bus_mode = mode; | 820 | host->ios.bus_mode = mode; |
| 811 | mmc_set_ios(host); | 821 | mmc_set_ios(host); |
| 822 | mmc_host_clk_release(host); | ||
| 812 | } | 823 | } |
| 813 | 824 | ||
| 814 | /* | 825 | /* |
| @@ -816,8 +827,10 @@ void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |||
| 816 | */ | 827 | */ |
| 817 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | 828 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) |
| 818 | { | 829 | { |
| 830 | mmc_host_clk_hold(host); | ||
| 819 | host->ios.bus_width = width; | 831 | host->ios.bus_width = width; |
| 820 | mmc_set_ios(host); | 832 | mmc_set_ios(host); |
| 833 | mmc_host_clk_release(host); | ||
| 821 | } | 834 | } |
| 822 | 835 | ||
| 823 | /** | 836 | /** |
| @@ -1015,8 +1028,10 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) | |||
| 1015 | 1028 | ||
| 1016 | ocr &= 3 << bit; | 1029 | ocr &= 3 << bit; |
| 1017 | 1030 | ||
| 1031 | mmc_host_clk_hold(host); | ||
| 1018 | host->ios.vdd = bit; | 1032 | host->ios.vdd = bit; |
| 1019 | mmc_set_ios(host); | 1033 | mmc_set_ios(host); |
| 1034 | mmc_host_clk_release(host); | ||
| 1020 | } else { | 1035 | } else { |
| 1021 | pr_warning("%s: host doesn't support card's voltages\n", | 1036 | pr_warning("%s: host doesn't support card's voltages\n", |
| 1022 | mmc_hostname(host)); | 1037 | mmc_hostname(host)); |
| @@ -1063,8 +1078,10 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, bool cmd11 | |||
| 1063 | */ | 1078 | */ |
| 1064 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) | 1079 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
| 1065 | { | 1080 | { |
| 1081 | mmc_host_clk_hold(host); | ||
| 1066 | host->ios.timing = timing; | 1082 | host->ios.timing = timing; |
| 1067 | mmc_set_ios(host); | 1083 | mmc_set_ios(host); |
| 1084 | mmc_host_clk_release(host); | ||
| 1068 | } | 1085 | } |
| 1069 | 1086 | ||
| 1070 | /* | 1087 | /* |
| @@ -1072,8 +1089,10 @@ void mmc_set_timing(struct mmc_host *host, unsigned int timing) | |||
| 1072 | */ | 1089 | */ |
| 1073 | void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type) | 1090 | void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type) |
| 1074 | { | 1091 | { |
| 1092 | mmc_host_clk_hold(host); | ||
| 1075 | host->ios.drv_type = drv_type; | 1093 | host->ios.drv_type = drv_type; |
| 1076 | mmc_set_ios(host); | 1094 | mmc_set_ios(host); |
| 1095 | mmc_host_clk_release(host); | ||
| 1077 | } | 1096 | } |
| 1078 | 1097 | ||
| 1079 | /* | 1098 | /* |
| @@ -1091,6 +1110,8 @@ static void mmc_power_up(struct mmc_host *host) | |||
| 1091 | { | 1110 | { |
| 1092 | int bit; | 1111 | int bit; |
| 1093 | 1112 | ||
| 1113 | mmc_host_clk_hold(host); | ||
| 1114 | |||
| 1094 | /* If ocr is set, we use it */ | 1115 | /* If ocr is set, we use it */ |
| 1095 | if (host->ocr) | 1116 | if (host->ocr) |
| 1096 | bit = ffs(host->ocr) - 1; | 1117 | bit = ffs(host->ocr) - 1; |
| @@ -1126,10 +1147,14 @@ static void mmc_power_up(struct mmc_host *host) | |||
| 1126 | * time required to reach a stable voltage. | 1147 | * time required to reach a stable voltage. |
| 1127 | */ | 1148 | */ |
| 1128 | mmc_delay(10); | 1149 | mmc_delay(10); |
| 1150 | |||
| 1151 | mmc_host_clk_release(host); | ||
| 1129 | } | 1152 | } |
| 1130 | 1153 | ||
| 1131 | static void mmc_power_off(struct mmc_host *host) | 1154 | static void mmc_power_off(struct mmc_host *host) |
| 1132 | { | 1155 | { |
| 1156 | mmc_host_clk_hold(host); | ||
| 1157 | |||
| 1133 | host->ios.clock = 0; | 1158 | host->ios.clock = 0; |
| 1134 | host->ios.vdd = 0; | 1159 | host->ios.vdd = 0; |
| 1135 | 1160 | ||
| @@ -1147,6 +1172,8 @@ static void mmc_power_off(struct mmc_host *host) | |||
| 1147 | host->ios.bus_width = MMC_BUS_WIDTH_1; | 1172 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
| 1148 | host->ios.timing = MMC_TIMING_LEGACY; | 1173 | host->ios.timing = MMC_TIMING_LEGACY; |
| 1149 | mmc_set_ios(host); | 1174 | mmc_set_ios(host); |
| 1175 | |||
| 1176 | mmc_host_clk_release(host); | ||
| 1150 | } | 1177 | } |
| 1151 | 1178 | ||
| 1152 | /* | 1179 | /* |
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index b29d3e8fd3a2..793d0a0dad8d 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c | |||
| @@ -119,14 +119,14 @@ static void mmc_host_clk_gate_work(struct work_struct *work) | |||
| 119 | } | 119 | } |
| 120 | 120 | ||
| 121 | /** | 121 | /** |
| 122 | * mmc_host_clk_ungate - ungate hardware MCI clocks | 122 | * mmc_host_clk_hold - ungate hardware MCI clocks |
| 123 | * @host: host to ungate. | 123 | * @host: host to ungate. |
| 124 | * | 124 | * |
| 125 | * Makes sure the host ios.clock is restored to a non-zero value | 125 | * Makes sure the host ios.clock is restored to a non-zero value |
| 126 | * past this call. Increase clock reference count and ungate clock | 126 | * past this call. Increase clock reference count and ungate clock |
| 127 | * if we're the first user. | 127 | * if we're the first user. |
| 128 | */ | 128 | */ |
| 129 | void mmc_host_clk_ungate(struct mmc_host *host) | 129 | void mmc_host_clk_hold(struct mmc_host *host) |
| 130 | { | 130 | { |
| 131 | unsigned long flags; | 131 | unsigned long flags; |
| 132 | 132 | ||
| @@ -164,14 +164,14 @@ static bool mmc_host_may_gate_card(struct mmc_card *card) | |||
| 164 | } | 164 | } |
| 165 | 165 | ||
| 166 | /** | 166 | /** |
| 167 | * mmc_host_clk_gate - gate off hardware MCI clocks | 167 | * mmc_host_clk_release - gate off hardware MCI clocks |
| 168 | * @host: host to gate. | 168 | * @host: host to gate. |
| 169 | * | 169 | * |
| 170 | * Calls the host driver with ios.clock set to zero as often as possible | 170 | * Calls the host driver with ios.clock set to zero as often as possible |
| 171 | * in order to gate off hardware MCI clocks. Decrease clock reference | 171 | * in order to gate off hardware MCI clocks. Decrease clock reference |
| 172 | * count and schedule disabling of clock. | 172 | * count and schedule disabling of clock. |
| 173 | */ | 173 | */ |
| 174 | void mmc_host_clk_gate(struct mmc_host *host) | 174 | void mmc_host_clk_release(struct mmc_host *host) |
| 175 | { | 175 | { |
| 176 | unsigned long flags; | 176 | unsigned long flags; |
| 177 | 177 | ||
| @@ -179,7 +179,7 @@ void mmc_host_clk_gate(struct mmc_host *host) | |||
| 179 | host->clk_requests--; | 179 | host->clk_requests--; |
| 180 | if (mmc_host_may_gate_card(host->card) && | 180 | if (mmc_host_may_gate_card(host->card) && |
| 181 | !host->clk_requests) | 181 | !host->clk_requests) |
| 182 | schedule_work(&host->clk_gate_work); | 182 | queue_work(system_nrt_wq, &host->clk_gate_work); |
| 183 | spin_unlock_irqrestore(&host->clk_lock, flags); | 183 | spin_unlock_irqrestore(&host->clk_lock, flags); |
| 184 | } | 184 | } |
| 185 | 185 | ||
| @@ -231,7 +231,7 @@ static inline void mmc_host_clk_exit(struct mmc_host *host) | |||
| 231 | if (cancel_work_sync(&host->clk_gate_work)) | 231 | if (cancel_work_sync(&host->clk_gate_work)) |
| 232 | mmc_host_clk_gate_delayed(host); | 232 | mmc_host_clk_gate_delayed(host); |
| 233 | if (host->clk_gated) | 233 | if (host->clk_gated) |
| 234 | mmc_host_clk_ungate(host); | 234 | mmc_host_clk_hold(host); |
| 235 | /* There should be only one user now */ | 235 | /* There should be only one user now */ |
| 236 | WARN_ON(host->clk_requests > 1); | 236 | WARN_ON(host->clk_requests > 1); |
| 237 | } | 237 | } |
diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h index de199f911928..fb8a5cd2e4a1 100644 --- a/drivers/mmc/core/host.h +++ b/drivers/mmc/core/host.h | |||
| @@ -16,16 +16,16 @@ int mmc_register_host_class(void); | |||
| 16 | void mmc_unregister_host_class(void); | 16 | void mmc_unregister_host_class(void); |
| 17 | 17 | ||
| 18 | #ifdef CONFIG_MMC_CLKGATE | 18 | #ifdef CONFIG_MMC_CLKGATE |
| 19 | void mmc_host_clk_ungate(struct mmc_host *host); | 19 | void mmc_host_clk_hold(struct mmc_host *host); |
| 20 | void mmc_host_clk_gate(struct mmc_host *host); | 20 | void mmc_host_clk_release(struct mmc_host *host); |
| 21 | unsigned int mmc_host_clk_rate(struct mmc_host *host); | 21 | unsigned int mmc_host_clk_rate(struct mmc_host *host); |
| 22 | 22 | ||
| 23 | #else | 23 | #else |
| 24 | static inline void mmc_host_clk_ungate(struct mmc_host *host) | 24 | static inline void mmc_host_clk_hold(struct mmc_host *host) |
| 25 | { | 25 | { |
| 26 | } | 26 | } |
| 27 | 27 | ||
| 28 | static inline void mmc_host_clk_gate(struct mmc_host *host) | 28 | static inline void mmc_host_clk_release(struct mmc_host *host) |
| 29 | { | 29 | { |
| 30 | } | 30 | } |
| 31 | 31 | ||
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 633975ff2bb3..0370e03e3142 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c | |||
| @@ -469,56 +469,75 @@ static int sd_select_driver_type(struct mmc_card *card, u8 *status) | |||
| 469 | return 0; | 469 | return 0; |
| 470 | } | 470 | } |
| 471 | 471 | ||
| 472 | static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) | 472 | static void sd_update_bus_speed_mode(struct mmc_card *card) |
| 473 | { | 473 | { |
| 474 | unsigned int bus_speed = 0, timing = 0; | ||
| 475 | int err; | ||
| 476 | |||
| 477 | /* | 474 | /* |
| 478 | * If the host doesn't support any of the UHS-I modes, fallback on | 475 | * If the host doesn't support any of the UHS-I modes, fallback on |
| 479 | * default speed. | 476 | * default speed. |
| 480 | */ | 477 | */ |
| 481 | if (!(card->host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | | 478 | if (!(card->host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | |
| 482 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))) | 479 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))) { |
| 483 | return 0; | 480 | card->sd_bus_speed = 0; |
| 481 | return; | ||
| 482 | } | ||
| 484 | 483 | ||
| 485 | if ((card->host->caps & MMC_CAP_UHS_SDR104) && | 484 | if ((card->host->caps & MMC_CAP_UHS_SDR104) && |
| 486 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR104)) { | 485 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR104)) { |
| 487 | bus_speed = UHS_SDR104_BUS_SPEED; | 486 | card->sd_bus_speed = UHS_SDR104_BUS_SPEED; |
| 488 | timing = MMC_TIMING_UHS_SDR104; | ||
| 489 | card->sw_caps.uhs_max_dtr = UHS_SDR104_MAX_DTR; | ||
| 490 | } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && | 487 | } else if ((card->host->caps & MMC_CAP_UHS_DDR50) && |
| 491 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_DDR50)) { | 488 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_DDR50)) { |
| 492 | bus_speed = UHS_DDR50_BUS_SPEED; | 489 | card->sd_bus_speed = UHS_DDR50_BUS_SPEED; |
| 493 | timing = MMC_TIMING_UHS_DDR50; | ||
| 494 | card->sw_caps.uhs_max_dtr = UHS_DDR50_MAX_DTR; | ||
| 495 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 490 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
| 496 | MMC_CAP_UHS_SDR50)) && (card->sw_caps.sd3_bus_mode & | 491 | MMC_CAP_UHS_SDR50)) && (card->sw_caps.sd3_bus_mode & |
| 497 | SD_MODE_UHS_SDR50)) { | 492 | SD_MODE_UHS_SDR50)) { |
| 498 | bus_speed = UHS_SDR50_BUS_SPEED; | 493 | card->sd_bus_speed = UHS_SDR50_BUS_SPEED; |
| 499 | timing = MMC_TIMING_UHS_SDR50; | ||
| 500 | card->sw_caps.uhs_max_dtr = UHS_SDR50_MAX_DTR; | ||
| 501 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 494 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
| 502 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25)) && | 495 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25)) && |
| 503 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR25)) { | 496 | (card->sw_caps.sd3_bus_mode & SD_MODE_UHS_SDR25)) { |
| 504 | bus_speed = UHS_SDR25_BUS_SPEED; | 497 | card->sd_bus_speed = UHS_SDR25_BUS_SPEED; |
| 505 | timing = MMC_TIMING_UHS_SDR25; | ||
| 506 | card->sw_caps.uhs_max_dtr = UHS_SDR25_MAX_DTR; | ||
| 507 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | | 498 | } else if ((card->host->caps & (MMC_CAP_UHS_SDR104 | |
| 508 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25 | | 499 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR25 | |
| 509 | MMC_CAP_UHS_SDR12)) && (card->sw_caps.sd3_bus_mode & | 500 | MMC_CAP_UHS_SDR12)) && (card->sw_caps.sd3_bus_mode & |
| 510 | SD_MODE_UHS_SDR12)) { | 501 | SD_MODE_UHS_SDR12)) { |
| 511 | bus_speed = UHS_SDR12_BUS_SPEED; | 502 | card->sd_bus_speed = UHS_SDR12_BUS_SPEED; |
| 512 | timing = MMC_TIMING_UHS_SDR12; | 503 | } |
| 513 | card->sw_caps.uhs_max_dtr = UHS_SDR12_MAX_DTR; | 504 | } |
| 505 | |||
| 506 | static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) | ||
| 507 | { | ||
| 508 | int err; | ||
| 509 | unsigned int timing = 0; | ||
| 510 | |||
| 511 | switch (card->sd_bus_speed) { | ||
| 512 | case UHS_SDR104_BUS_SPEED: | ||
| 513 | timing = MMC_TIMING_UHS_SDR104; | ||
| 514 | card->sw_caps.uhs_max_dtr = UHS_SDR104_MAX_DTR; | ||
| 515 | break; | ||
| 516 | case UHS_DDR50_BUS_SPEED: | ||
| 517 | timing = MMC_TIMING_UHS_DDR50; | ||
| 518 | card->sw_caps.uhs_max_dtr = UHS_DDR50_MAX_DTR; | ||
| 519 | break; | ||
| 520 | case UHS_SDR50_BUS_SPEED: | ||
| 521 | timing = MMC_TIMING_UHS_SDR50; | ||
| 522 | card->sw_caps.uhs_max_dtr = UHS_SDR50_MAX_DTR; | ||
| 523 | break; | ||
| 524 | case UHS_SDR25_BUS_SPEED: | ||
| 525 | timing = MMC_TIMING_UHS_SDR25; | ||
| 526 | card->sw_caps.uhs_max_dtr = UHS_SDR25_MAX_DTR; | ||
| 527 | break; | ||
| 528 | case UHS_SDR12_BUS_SPEED: | ||
| 529 | timing = MMC_TIMING_UHS_SDR12; | ||
| 530 | card->sw_caps.uhs_max_dtr = UHS_SDR12_MAX_DTR; | ||
| 531 | break; | ||
| 532 | default: | ||
| 533 | return 0; | ||
| 514 | } | 534 | } |
| 515 | 535 | ||
| 516 | card->sd_bus_speed = bus_speed; | 536 | err = mmc_sd_switch(card, 1, 0, card->sd_bus_speed, status); |
| 517 | err = mmc_sd_switch(card, 1, 0, bus_speed, status); | ||
| 518 | if (err) | 537 | if (err) |
| 519 | return err; | 538 | return err; |
| 520 | 539 | ||
| 521 | if ((status[16] & 0xF) != bus_speed) | 540 | if ((status[16] & 0xF) != card->sd_bus_speed) |
| 522 | printk(KERN_WARNING "%s: Problem setting bus speed mode!\n", | 541 | printk(KERN_WARNING "%s: Problem setting bus speed mode!\n", |
| 523 | mmc_hostname(card->host)); | 542 | mmc_hostname(card->host)); |
| 524 | else { | 543 | else { |
| @@ -618,18 +637,24 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card) | |||
| 618 | mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); | 637 | mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); |
| 619 | } | 638 | } |
| 620 | 639 | ||
| 640 | /* | ||
| 641 | * Select the bus speed mode depending on host | ||
| 642 | * and card capability. | ||
| 643 | */ | ||
| 644 | sd_update_bus_speed_mode(card); | ||
| 645 | |||
| 621 | /* Set the driver strength for the card */ | 646 | /* Set the driver strength for the card */ |
| 622 | err = sd_select_driver_type(card, status); | 647 | err = sd_select_driver_type(card, status); |
| 623 | if (err) | 648 | if (err) |
| 624 | goto out; | 649 | goto out; |
| 625 | 650 | ||
| 626 | /* Set bus speed mode of the card */ | 651 | /* Set current limit for the card */ |
| 627 | err = sd_set_bus_speed_mode(card, status); | 652 | err = sd_set_current_limit(card, status); |
| 628 | if (err) | 653 | if (err) |
| 629 | goto out; | 654 | goto out; |
| 630 | 655 | ||
| 631 | /* Set current limit for the card */ | 656 | /* Set bus speed mode of the card */ |
| 632 | err = sd_set_current_limit(card, status); | 657 | err = sd_set_bus_speed_mode(card, status); |
| 633 | if (err) | 658 | if (err) |
| 634 | goto out; | 659 | goto out; |
| 635 | 660 | ||
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 0e9780f5a4a9..4dc0028086a3 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #include <linux/err.h> | 16 | #include <linux/err.h> |
| 17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
| 18 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
| 19 | #include <linux/module.h> | ||
| 19 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
| 20 | #include <linux/mmc/host.h> | 21 | #include <linux/mmc/host.h> |
| 21 | #include <linux/mmc/mmc.h> | 22 | #include <linux/mmc/mmc.h> |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2bd7bf4fece7..fe886d6c474a 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
| @@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) | |||
| 302 | ctrl &= ~SDHCI_CTRL_8BITBUS; | 302 | ctrl &= ~SDHCI_CTRL_8BITBUS; |
| 303 | break; | 303 | break; |
| 304 | default: | 304 | default: |
| 305 | ctrl &= ~SDHCI_CTRL_4BITBUS; | ||
| 306 | ctrl &= ~SDHCI_CTRL_8BITBUS; | ||
| 305 | break; | 307 | break; |
| 306 | } | 308 | } |
| 307 | 309 | ||
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 774f6439d7ce..0c4a672f5db6 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c | |||
| @@ -120,11 +120,11 @@ static int __devinit sh_mobile_sdhi_probe(struct platform_device *pdev) | |||
| 120 | mmc_data->hclk = clk_get_rate(priv->clk); | 120 | mmc_data->hclk = clk_get_rate(priv->clk); |
| 121 | mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; | 121 | mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; |
| 122 | mmc_data->get_cd = sh_mobile_sdhi_get_cd; | 122 | mmc_data->get_cd = sh_mobile_sdhi_get_cd; |
| 123 | if (mmc_data->flags & TMIO_MMC_HAS_IDLE_WAIT) | ||
| 124 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; | ||
| 125 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; | 123 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; |
| 126 | if (p) { | 124 | if (p) { |
| 127 | mmc_data->flags = p->tmio_flags; | 125 | mmc_data->flags = p->tmio_flags; |
| 126 | if (mmc_data->flags & TMIO_MMC_HAS_IDLE_WAIT) | ||
| 127 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; | ||
| 128 | mmc_data->ocr_mask = p->tmio_ocr_mask; | 128 | mmc_data->ocr_mask = p->tmio_ocr_mask; |
| 129 | mmc_data->capabilities |= p->tmio_caps; | 129 | mmc_data->capabilities |= p->tmio_caps; |
| 130 | 130 | ||
diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h index 65b5b76cc379..64fbb0021825 100644 --- a/drivers/mtd/ubi/debug.h +++ b/drivers/mtd/ubi/debug.h | |||
| @@ -181,7 +181,7 @@ static inline int ubi_dbg_is_erase_failure(const struct ubi_device *ubi) | |||
| 181 | 181 | ||
| 182 | #define ubi_dbg_msg(fmt, ...) do { \ | 182 | #define ubi_dbg_msg(fmt, ...) do { \ |
| 183 | if (0) \ | 183 | if (0) \ |
| 184 | pr_debug(fmt "\n", ##__VA_ARGS__); \ | 184 | printk(KERN_DEBUG fmt "\n", ##__VA_ARGS__); \ |
| 185 | } while (0) | 185 | } while (0) |
| 186 | 186 | ||
| 187 | #define dbg_msg(fmt, ...) ubi_dbg_msg(fmt, ##__VA_ARGS__) | 187 | #define dbg_msg(fmt, ...) ubi_dbg_msg(fmt, ##__VA_ARGS__) |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 8d0314dbd946..a44874e24f2a 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
| @@ -2535,7 +2535,7 @@ config S6GMAC | |||
| 2535 | source "drivers/net/stmmac/Kconfig" | 2535 | source "drivers/net/stmmac/Kconfig" |
| 2536 | 2536 | ||
| 2537 | config PCH_GBE | 2537 | config PCH_GBE |
| 2538 | tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7223 IOH GbE" | 2538 | tristate "Intel EG20T PCH/OKI SEMICONDUCTOR IOH(ML7223/ML7831) GbE" |
| 2539 | depends on PCI | 2539 | depends on PCI |
| 2540 | select MII | 2540 | select MII |
| 2541 | ---help--- | 2541 | ---help--- |
| @@ -2548,10 +2548,11 @@ config PCH_GBE | |||
| 2548 | This driver enables Gigabit Ethernet function. | 2548 | This driver enables Gigabit Ethernet function. |
| 2549 | 2549 | ||
| 2550 | This driver also can be used for OKI SEMICONDUCTOR IOH(Input/ | 2550 | This driver also can be used for OKI SEMICONDUCTOR IOH(Input/ |
| 2551 | Output Hub), ML7223. | 2551 | Output Hub), ML7223/ML7831. |
| 2552 | ML7223 IOH is for MP(Media Phone) use. | 2552 | ML7223 IOH is for MP(Media Phone) use. ML7831 IOH is for general |
| 2553 | ML7223 is companion chip for Intel Atom E6xx series. | 2553 | purpose use. |
| 2554 | ML7223 is completely compatible for Intel EG20T PCH. | 2554 | ML7223/ML7831 is companion chip for Intel Atom E6xx series. |
| 2555 | ML7223/ML7831 is completely compatible for Intel EG20T PCH. | ||
| 2555 | 2556 | ||
| 2556 | config FTGMAC100 | 2557 | config FTGMAC100 |
| 2557 | tristate "Faraday FTGMAC100 Gigabit Ethernet support" | 2558 | tristate "Faraday FTGMAC100 Gigabit Ethernet support" |
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c index 52fe21e1e2cd..3b1416e3d217 100644 --- a/drivers/net/arm/am79c961a.c +++ b/drivers/net/arm/am79c961a.c | |||
| @@ -308,8 +308,11 @@ static void am79c961_timer(unsigned long data) | |||
| 308 | struct net_device *dev = (struct net_device *)data; | 308 | struct net_device *dev = (struct net_device *)data; |
| 309 | struct dev_priv *priv = netdev_priv(dev); | 309 | struct dev_priv *priv = netdev_priv(dev); |
| 310 | unsigned int lnkstat, carrier; | 310 | unsigned int lnkstat, carrier; |
| 311 | unsigned long flags; | ||
| 311 | 312 | ||
| 313 | spin_lock_irqsave(&priv->chip_lock, flags); | ||
| 312 | lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST; | 314 | lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST; |
| 315 | spin_unlock_irqrestore(&priv->chip_lock, flags); | ||
| 313 | carrier = netif_carrier_ok(dev); | 316 | carrier = netif_carrier_ok(dev); |
| 314 | 317 | ||
| 315 | if (lnkstat && !carrier) { | 318 | if (lnkstat && !carrier) { |
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index c423504a755f..e46df5331c55 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
| @@ -315,6 +315,14 @@ union db_prod { | |||
| 315 | u32 raw; | 315 | u32 raw; |
| 316 | }; | 316 | }; |
| 317 | 317 | ||
| 318 | /* dropless fc FW/HW related params */ | ||
| 319 | #define BRB_SIZE(bp) (CHIP_IS_E3(bp) ? 1024 : 512) | ||
| 320 | #define MAX_AGG_QS(bp) (CHIP_IS_E1(bp) ? \ | ||
| 321 | ETH_MAX_AGGREGATION_QUEUES_E1 :\ | ||
| 322 | ETH_MAX_AGGREGATION_QUEUES_E1H_E2) | ||
| 323 | #define FW_DROP_LEVEL(bp) (3 + MAX_SPQ_PENDING + MAX_AGG_QS(bp)) | ||
| 324 | #define FW_PREFETCH_CNT 16 | ||
| 325 | #define DROPLESS_FC_HEADROOM 100 | ||
| 318 | 326 | ||
| 319 | /* MC hsi */ | 327 | /* MC hsi */ |
| 320 | #define BCM_PAGE_SHIFT 12 | 328 | #define BCM_PAGE_SHIFT 12 |
| @@ -331,15 +339,35 @@ union db_prod { | |||
| 331 | /* SGE ring related macros */ | 339 | /* SGE ring related macros */ |
| 332 | #define NUM_RX_SGE_PAGES 2 | 340 | #define NUM_RX_SGE_PAGES 2 |
| 333 | #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) | 341 | #define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) |
| 334 | #define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) | 342 | #define NEXT_PAGE_SGE_DESC_CNT 2 |
| 343 | #define MAX_RX_SGE_CNT (RX_SGE_CNT - NEXT_PAGE_SGE_DESC_CNT) | ||
| 335 | /* RX_SGE_CNT is promised to be a power of 2 */ | 344 | /* RX_SGE_CNT is promised to be a power of 2 */ |
| 336 | #define RX_SGE_MASK (RX_SGE_CNT - 1) | 345 | #define RX_SGE_MASK (RX_SGE_CNT - 1) |
| 337 | #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) | 346 | #define NUM_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) |
| 338 | #define MAX_RX_SGE (NUM_RX_SGE - 1) | 347 | #define MAX_RX_SGE (NUM_RX_SGE - 1) |
| 339 | #define NEXT_SGE_IDX(x) ((((x) & RX_SGE_MASK) == \ | 348 | #define NEXT_SGE_IDX(x) ((((x) & RX_SGE_MASK) == \ |
| 340 | (MAX_RX_SGE_CNT - 1)) ? (x) + 3 : (x) + 1) | 349 | (MAX_RX_SGE_CNT - 1)) ? \ |
| 350 | (x) + 1 + NEXT_PAGE_SGE_DESC_CNT : \ | ||
| 351 | (x) + 1) | ||
| 341 | #define RX_SGE(x) ((x) & MAX_RX_SGE) | 352 | #define RX_SGE(x) ((x) & MAX_RX_SGE) |
| 342 | 353 | ||
| 354 | /* | ||
| 355 | * Number of required SGEs is the sum of two: | ||
| 356 | * 1. Number of possible opened aggregations (next packet for | ||
| 357 | * these aggregations will probably consume SGE immidiatelly) | ||
| 358 | * 2. Rest of BRB blocks divided by 2 (block will consume new SGE only | ||
| 359 | * after placement on BD for new TPA aggregation) | ||
| 360 | * | ||
| 361 | * Takes into account NEXT_PAGE_SGE_DESC_CNT "next" elements on each page | ||
| 362 | */ | ||
| 363 | #define NUM_SGE_REQ (MAX_AGG_QS(bp) + \ | ||
| 364 | (BRB_SIZE(bp) - MAX_AGG_QS(bp)) / 2) | ||
| 365 | #define NUM_SGE_PG_REQ ((NUM_SGE_REQ + MAX_RX_SGE_CNT - 1) / \ | ||
| 366 | MAX_RX_SGE_CNT) | ||
| 367 | #define SGE_TH_LO(bp) (NUM_SGE_REQ + \ | ||
| 368 | NUM_SGE_PG_REQ * NEXT_PAGE_SGE_DESC_CNT) | ||
| 369 | #define SGE_TH_HI(bp) (SGE_TH_LO(bp) + DROPLESS_FC_HEADROOM) | ||
| 370 | |||
| 343 | /* Manipulate a bit vector defined as an array of u64 */ | 371 | /* Manipulate a bit vector defined as an array of u64 */ |
| 344 | 372 | ||
| 345 | /* Number of bits in one sge_mask array element */ | 373 | /* Number of bits in one sge_mask array element */ |
| @@ -551,24 +579,43 @@ struct bnx2x_fastpath { | |||
| 551 | 579 | ||
| 552 | #define NUM_TX_RINGS 16 | 580 | #define NUM_TX_RINGS 16 |
| 553 | #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) | 581 | #define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) |
| 554 | #define MAX_TX_DESC_CNT (TX_DESC_CNT - 1) | 582 | #define NEXT_PAGE_TX_DESC_CNT 1 |
| 583 | #define MAX_TX_DESC_CNT (TX_DESC_CNT - NEXT_PAGE_TX_DESC_CNT) | ||
| 555 | #define NUM_TX_BD (TX_DESC_CNT * NUM_TX_RINGS) | 584 | #define NUM_TX_BD (TX_DESC_CNT * NUM_TX_RINGS) |
| 556 | #define MAX_TX_BD (NUM_TX_BD - 1) | 585 | #define MAX_TX_BD (NUM_TX_BD - 1) |
| 557 | #define MAX_TX_AVAIL (MAX_TX_DESC_CNT * NUM_TX_RINGS - 2) | 586 | #define MAX_TX_AVAIL (MAX_TX_DESC_CNT * NUM_TX_RINGS - 2) |
| 558 | #define NEXT_TX_IDX(x) ((((x) & MAX_TX_DESC_CNT) == \ | 587 | #define NEXT_TX_IDX(x) ((((x) & MAX_TX_DESC_CNT) == \ |
| 559 | (MAX_TX_DESC_CNT - 1)) ? (x) + 2 : (x) + 1) | 588 | (MAX_TX_DESC_CNT - 1)) ? \ |
| 589 | (x) + 1 + NEXT_PAGE_TX_DESC_CNT : \ | ||
| 590 | (x) + 1) | ||
| 560 | #define TX_BD(x) ((x) & MAX_TX_BD) | 591 | #define TX_BD(x) ((x) & MAX_TX_BD) |
| 561 | #define TX_BD_POFF(x) ((x) & MAX_TX_DESC_CNT) | 592 | #define TX_BD_POFF(x) ((x) & MAX_TX_DESC_CNT) |
| 562 | 593 | ||
| 563 | /* The RX BD ring is special, each bd is 8 bytes but the last one is 16 */ | 594 | /* The RX BD ring is special, each bd is 8 bytes but the last one is 16 */ |
| 564 | #define NUM_RX_RINGS 8 | 595 | #define NUM_RX_RINGS 8 |
| 565 | #define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) | 596 | #define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) |
| 566 | #define MAX_RX_DESC_CNT (RX_DESC_CNT - 2) | 597 | #define NEXT_PAGE_RX_DESC_CNT 2 |
| 598 | #define MAX_RX_DESC_CNT (RX_DESC_CNT - NEXT_PAGE_RX_DESC_CNT) | ||
| 567 | #define RX_DESC_MASK (RX_DESC_CNT - 1) | 599 | #define RX_DESC_MASK (RX_DESC_CNT - 1) |
| 568 | #define NUM_RX_BD (RX_DESC_CNT * NUM_RX_RINGS) | 600 | #define NUM_RX_BD (RX_DESC_CNT * NUM_RX_RINGS) |
| 569 | #define MAX_RX_BD (NUM_RX_BD - 1) | 601 | #define MAX_RX_BD (NUM_RX_BD - 1) |
| 570 | #define MAX_RX_AVAIL (MAX_RX_DESC_CNT * NUM_RX_RINGS - 2) | 602 | #define MAX_RX_AVAIL (MAX_RX_DESC_CNT * NUM_RX_RINGS - 2) |
| 571 | #define MIN_RX_AVAIL 128 | 603 | |
| 604 | /* dropless fc calculations for BDs | ||
| 605 | * | ||
| 606 | * Number of BDs should as number of buffers in BRB: | ||
| 607 | * Low threshold takes into account NEXT_PAGE_RX_DESC_CNT | ||
| 608 | * "next" elements on each page | ||
| 609 | */ | ||
| 610 | #define NUM_BD_REQ BRB_SIZE(bp) | ||
| 611 | #define NUM_BD_PG_REQ ((NUM_BD_REQ + MAX_RX_DESC_CNT - 1) / \ | ||
| 612 | MAX_RX_DESC_CNT) | ||
| 613 | #define BD_TH_LO(bp) (NUM_BD_REQ + \ | ||
| 614 | NUM_BD_PG_REQ * NEXT_PAGE_RX_DESC_CNT + \ | ||
| 615 | FW_DROP_LEVEL(bp)) | ||
| 616 | #define BD_TH_HI(bp) (BD_TH_LO(bp) + DROPLESS_FC_HEADROOM) | ||
| 617 | |||
| 618 | #define MIN_RX_AVAIL ((bp)->dropless_fc ? BD_TH_HI(bp) + 128 : 128) | ||
| 572 | 619 | ||
| 573 | #define MIN_RX_SIZE_TPA_HW (CHIP_IS_E1(bp) ? \ | 620 | #define MIN_RX_SIZE_TPA_HW (CHIP_IS_E1(bp) ? \ |
| 574 | ETH_MIN_RX_CQES_WITH_TPA_E1 : \ | 621 | ETH_MIN_RX_CQES_WITH_TPA_E1 : \ |
| @@ -579,7 +626,9 @@ struct bnx2x_fastpath { | |||
| 579 | MIN_RX_AVAIL)) | 626 | MIN_RX_AVAIL)) |
| 580 | 627 | ||
| 581 | #define NEXT_RX_IDX(x) ((((x) & RX_DESC_MASK) == \ | 628 | #define NEXT_RX_IDX(x) ((((x) & RX_DESC_MASK) == \ |
| 582 | (MAX_RX_DESC_CNT - 1)) ? (x) + 3 : (x) + 1) | 629 | (MAX_RX_DESC_CNT - 1)) ? \ |
| 630 | (x) + 1 + NEXT_PAGE_RX_DESC_CNT : \ | ||
| 631 | (x) + 1) | ||
| 583 | #define RX_BD(x) ((x) & MAX_RX_BD) | 632 | #define RX_BD(x) ((x) & MAX_RX_BD) |
| 584 | 633 | ||
| 585 | /* | 634 | /* |
| @@ -589,14 +638,31 @@ struct bnx2x_fastpath { | |||
| 589 | #define CQE_BD_REL (sizeof(union eth_rx_cqe) / sizeof(struct eth_rx_bd)) | 638 | #define CQE_BD_REL (sizeof(union eth_rx_cqe) / sizeof(struct eth_rx_bd)) |
| 590 | #define NUM_RCQ_RINGS (NUM_RX_RINGS * CQE_BD_REL) | 639 | #define NUM_RCQ_RINGS (NUM_RX_RINGS * CQE_BD_REL) |
| 591 | #define RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) | 640 | #define RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) |
| 592 | #define MAX_RCQ_DESC_CNT (RCQ_DESC_CNT - 1) | 641 | #define NEXT_PAGE_RCQ_DESC_CNT 1 |
| 642 | #define MAX_RCQ_DESC_CNT (RCQ_DESC_CNT - NEXT_PAGE_RCQ_DESC_CNT) | ||
| 593 | #define NUM_RCQ_BD (RCQ_DESC_CNT * NUM_RCQ_RINGS) | 643 | #define NUM_RCQ_BD (RCQ_DESC_CNT * NUM_RCQ_RINGS) |
| 594 | #define MAX_RCQ_BD (NUM_RCQ_BD - 1) | 644 | #define MAX_RCQ_BD (NUM_RCQ_BD - 1) |
| 595 | #define MAX_RCQ_AVAIL (MAX_RCQ_DESC_CNT * NUM_RCQ_RINGS - 2) | 645 | #define MAX_RCQ_AVAIL (MAX_RCQ_DESC_CNT * NUM_RCQ_RINGS - 2) |
| 596 | #define NEXT_RCQ_IDX(x) ((((x) & MAX_RCQ_DESC_CNT) == \ | 646 | #define NEXT_RCQ_IDX(x) ((((x) & MAX_RCQ_DESC_CNT) == \ |
| 597 | (MAX_RCQ_DESC_CNT - 1)) ? (x) + 2 : (x) + 1) | 647 | (MAX_RCQ_DESC_CNT - 1)) ? \ |
| 648 | (x) + 1 + NEXT_PAGE_RCQ_DESC_CNT : \ | ||
| 649 | (x) + 1) | ||
| 598 | #define RCQ_BD(x) ((x) & MAX_RCQ_BD) | 650 | #define RCQ_BD(x) ((x) & MAX_RCQ_BD) |
| 599 | 651 | ||
| 652 | /* dropless fc calculations for RCQs | ||
| 653 | * | ||
| 654 | * Number of RCQs should be as number of buffers in BRB: | ||
| 655 | * Low threshold takes into account NEXT_PAGE_RCQ_DESC_CNT | ||
| 656 | * "next" elements on each page | ||
| 657 | */ | ||
| 658 | #define NUM_RCQ_REQ BRB_SIZE(bp) | ||
| 659 | #define NUM_RCQ_PG_REQ ((NUM_BD_REQ + MAX_RCQ_DESC_CNT - 1) / \ | ||
| 660 | MAX_RCQ_DESC_CNT) | ||
| 661 | #define RCQ_TH_LO(bp) (NUM_RCQ_REQ + \ | ||
| 662 | NUM_RCQ_PG_REQ * NEXT_PAGE_RCQ_DESC_CNT + \ | ||
| 663 | FW_DROP_LEVEL(bp)) | ||
| 664 | #define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) | ||
| 665 | |||
| 600 | 666 | ||
| 601 | /* This is needed for determining of last_max */ | 667 | /* This is needed for determining of last_max */ |
| 602 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) | 668 | #define SUB_S16(a, b) (s16)((s16)(a) - (s16)(b)) |
| @@ -685,24 +751,17 @@ struct bnx2x_fastpath { | |||
| 685 | #define FP_CSB_FUNC_OFF \ | 751 | #define FP_CSB_FUNC_OFF \ |
| 686 | offsetof(struct cstorm_status_block_c, func) | 752 | offsetof(struct cstorm_status_block_c, func) |
| 687 | 753 | ||
| 688 | #define HC_INDEX_TOE_RX_CQ_CONS 0 /* Formerly Ustorm TOE CQ index */ | 754 | #define HC_INDEX_ETH_RX_CQ_CONS 1 |
| 689 | /* (HC_INDEX_U_TOE_RX_CQ_CONS) */ | ||
| 690 | #define HC_INDEX_ETH_RX_CQ_CONS 1 /* Formerly Ustorm ETH CQ index */ | ||
| 691 | /* (HC_INDEX_U_ETH_RX_CQ_CONS) */ | ||
| 692 | #define HC_INDEX_ETH_RX_BD_CONS 2 /* Formerly Ustorm ETH BD index */ | ||
| 693 | /* (HC_INDEX_U_ETH_RX_BD_CONS) */ | ||
| 694 | |||
| 695 | #define HC_INDEX_TOE_TX_CQ_CONS 4 /* Formerly Cstorm TOE CQ index */ | ||
| 696 | /* (HC_INDEX_C_TOE_TX_CQ_CONS) */ | ||
| 697 | #define HC_INDEX_ETH_TX_CQ_CONS_COS0 5 /* Formerly Cstorm ETH CQ index */ | ||
| 698 | /* (HC_INDEX_C_ETH_TX_CQ_CONS) */ | ||
| 699 | #define HC_INDEX_ETH_TX_CQ_CONS_COS1 6 /* Formerly Cstorm ETH CQ index */ | ||
| 700 | /* (HC_INDEX_C_ETH_TX_CQ_CONS) */ | ||
| 701 | #define HC_INDEX_ETH_TX_CQ_CONS_COS2 7 /* Formerly Cstorm ETH CQ index */ | ||
| 702 | /* (HC_INDEX_C_ETH_TX_CQ_CONS) */ | ||
| 703 | 755 | ||
| 704 | #define HC_INDEX_ETH_FIRST_TX_CQ_CONS HC_INDEX_ETH_TX_CQ_CONS_COS0 | 756 | #define HC_INDEX_OOO_TX_CQ_CONS 4 |
| 705 | 757 | ||
| 758 | #define HC_INDEX_ETH_TX_CQ_CONS_COS0 5 | ||
| 759 | |||
| 760 | #define HC_INDEX_ETH_TX_CQ_CONS_COS1 6 | ||
| 761 | |||
| 762 | #define HC_INDEX_ETH_TX_CQ_CONS_COS2 7 | ||
| 763 | |||
| 764 | #define HC_INDEX_ETH_FIRST_TX_CQ_CONS HC_INDEX_ETH_TX_CQ_CONS_COS0 | ||
| 706 | 765 | ||
| 707 | #define BNX2X_RX_SB_INDEX \ | 766 | #define BNX2X_RX_SB_INDEX \ |
| 708 | (&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS]) | 767 | (&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS]) |
| @@ -1100,11 +1159,12 @@ struct bnx2x { | |||
| 1100 | #define BP_PORT(bp) (bp->pfid & 1) | 1159 | #define BP_PORT(bp) (bp->pfid & 1) |
| 1101 | #define BP_FUNC(bp) (bp->pfid) | 1160 | #define BP_FUNC(bp) (bp->pfid) |
| 1102 | #define BP_ABS_FUNC(bp) (bp->pf_num) | 1161 | #define BP_ABS_FUNC(bp) (bp->pf_num) |
| 1103 | #define BP_E1HVN(bp) (bp->pfid >> 1) | 1162 | #define BP_VN(bp) ((bp)->pfid >> 1) |
| 1104 | #define BP_VN(bp) (BP_E1HVN(bp)) /*remove when approved*/ | 1163 | #define BP_MAX_VN_NUM(bp) (CHIP_MODE_IS_4_PORT(bp) ? 2 : 4) |
| 1105 | #define BP_L_ID(bp) (BP_E1HVN(bp) << 2) | 1164 | #define BP_L_ID(bp) (BP_VN(bp) << 2) |
| 1106 | #define BP_FW_MB_IDX(bp) (BP_PORT(bp) +\ | 1165 | #define BP_FW_MB_IDX_VN(bp, vn) (BP_PORT(bp) +\ |
| 1107 | BP_VN(bp) * ((CHIP_IS_E1x(bp) || (CHIP_MODE_IS_4_PORT(bp))) ? 2 : 1)) | 1166 | (vn) * ((CHIP_IS_E1x(bp) || (CHIP_MODE_IS_4_PORT(bp))) ? 2 : 1)) |
| 1167 | #define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp)) | ||
| 1108 | 1168 | ||
| 1109 | struct net_device *dev; | 1169 | struct net_device *dev; |
| 1110 | struct pci_dev *pdev; | 1170 | struct pci_dev *pdev; |
| @@ -1767,7 +1827,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
| 1767 | 1827 | ||
| 1768 | #define MAX_DMAE_C_PER_PORT 8 | 1828 | #define MAX_DMAE_C_PER_PORT 8 |
| 1769 | #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ | 1829 | #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ |
| 1770 | BP_E1HVN(bp)) | 1830 | BP_VN(bp)) |
| 1771 | #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ | 1831 | #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ |
| 1772 | E1HVN_MAX) | 1832 | E1HVN_MAX) |
| 1773 | 1833 | ||
| @@ -1793,7 +1853,7 @@ static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, | |||
| 1793 | 1853 | ||
| 1794 | /* must be used on a CID before placing it on a HW ring */ | 1854 | /* must be used on a CID before placing it on a HW ring */ |
| 1795 | #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ | 1855 | #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ |
| 1796 | (BP_E1HVN(bp) << BNX2X_SWCID_SHIFT) | \ | 1856 | (BP_VN(bp) << BNX2X_SWCID_SHIFT) | \ |
| 1797 | (x)) | 1857 | (x)) |
| 1798 | 1858 | ||
| 1799 | #define SP_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_spe)) | 1859 | #define SP_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_spe)) |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c index 37e5790681ad..c4cbf9736414 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.c +++ b/drivers/net/bnx2x/bnx2x_cmn.c | |||
| @@ -987,8 +987,6 @@ void __bnx2x_link_report(struct bnx2x *bp) | |||
| 987 | void bnx2x_init_rx_rings(struct bnx2x *bp) | 987 | void bnx2x_init_rx_rings(struct bnx2x *bp) |
| 988 | { | 988 | { |
| 989 | int func = BP_FUNC(bp); | 989 | int func = BP_FUNC(bp); |
| 990 | int max_agg_queues = CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 : | ||
| 991 | ETH_MAX_AGGREGATION_QUEUES_E1H_E2; | ||
| 992 | u16 ring_prod; | 990 | u16 ring_prod; |
| 993 | int i, j; | 991 | int i, j; |
| 994 | 992 | ||
| @@ -1001,7 +999,7 @@ void bnx2x_init_rx_rings(struct bnx2x *bp) | |||
| 1001 | 999 | ||
| 1002 | if (!fp->disable_tpa) { | 1000 | if (!fp->disable_tpa) { |
| 1003 | /* Fill the per-aggregtion pool */ | 1001 | /* Fill the per-aggregtion pool */ |
| 1004 | for (i = 0; i < max_agg_queues; i++) { | 1002 | for (i = 0; i < MAX_AGG_QS(bp); i++) { |
| 1005 | struct bnx2x_agg_info *tpa_info = | 1003 | struct bnx2x_agg_info *tpa_info = |
| 1006 | &fp->tpa_info[i]; | 1004 | &fp->tpa_info[i]; |
| 1007 | struct sw_rx_bd *first_buf = | 1005 | struct sw_rx_bd *first_buf = |
| @@ -1041,7 +1039,7 @@ void bnx2x_init_rx_rings(struct bnx2x *bp) | |||
| 1041 | bnx2x_free_rx_sge_range(bp, fp, | 1039 | bnx2x_free_rx_sge_range(bp, fp, |
| 1042 | ring_prod); | 1040 | ring_prod); |
| 1043 | bnx2x_free_tpa_pool(bp, fp, | 1041 | bnx2x_free_tpa_pool(bp, fp, |
| 1044 | max_agg_queues); | 1042 | MAX_AGG_QS(bp)); |
| 1045 | fp->disable_tpa = 1; | 1043 | fp->disable_tpa = 1; |
| 1046 | ring_prod = 0; | 1044 | ring_prod = 0; |
| 1047 | break; | 1045 | break; |
| @@ -1137,9 +1135,7 @@ static void bnx2x_free_rx_skbs(struct bnx2x *bp) | |||
| 1137 | bnx2x_free_rx_bds(fp); | 1135 | bnx2x_free_rx_bds(fp); |
| 1138 | 1136 | ||
| 1139 | if (!fp->disable_tpa) | 1137 | if (!fp->disable_tpa) |
| 1140 | bnx2x_free_tpa_pool(bp, fp, CHIP_IS_E1(bp) ? | 1138 | bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp)); |
| 1141 | ETH_MAX_AGGREGATION_QUEUES_E1 : | ||
| 1142 | ETH_MAX_AGGREGATION_QUEUES_E1H_E2); | ||
| 1143 | } | 1139 | } |
| 1144 | } | 1140 | } |
| 1145 | 1141 | ||
| @@ -3095,15 +3091,20 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index) | |||
| 3095 | struct bnx2x_fastpath *fp = &bp->fp[index]; | 3091 | struct bnx2x_fastpath *fp = &bp->fp[index]; |
| 3096 | int ring_size = 0; | 3092 | int ring_size = 0; |
| 3097 | u8 cos; | 3093 | u8 cos; |
| 3094 | int rx_ring_size = 0; | ||
| 3098 | 3095 | ||
| 3099 | /* if rx_ring_size specified - use it */ | 3096 | /* if rx_ring_size specified - use it */ |
| 3100 | int rx_ring_size = bp->rx_ring_size ? bp->rx_ring_size : | 3097 | if (!bp->rx_ring_size) { |
| 3101 | MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp); | ||
| 3102 | 3098 | ||
| 3103 | /* allocate at least number of buffers required by FW */ | 3099 | rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp); |
| 3104 | rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA : | 3100 | |
| 3105 | MIN_RX_SIZE_TPA, | 3101 | /* allocate at least number of buffers required by FW */ |
| 3106 | rx_ring_size); | 3102 | rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA : |
| 3103 | MIN_RX_SIZE_TPA, rx_ring_size); | ||
| 3104 | |||
| 3105 | bp->rx_ring_size = rx_ring_size; | ||
| 3106 | } else | ||
| 3107 | rx_ring_size = bp->rx_ring_size; | ||
| 3107 | 3108 | ||
| 3108 | /* Common */ | 3109 | /* Common */ |
| 3109 | sb = &bnx2x_fp(bp, index, status_blk); | 3110 | sb = &bnx2x_fp(bp, index, status_blk); |
diff --git a/drivers/net/bnx2x/bnx2x_ethtool.c b/drivers/net/bnx2x/bnx2x_ethtool.c index 221863059dae..cf3e47914dd7 100644 --- a/drivers/net/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/bnx2x/bnx2x_ethtool.c | |||
| @@ -363,13 +363,50 @@ static int bnx2x_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
| 363 | } | 363 | } |
| 364 | 364 | ||
| 365 | /* advertise the requested speed and duplex if supported */ | 365 | /* advertise the requested speed and duplex if supported */ |
| 366 | cmd->advertising &= bp->port.supported[cfg_idx]; | 366 | if (cmd->advertising & ~(bp->port.supported[cfg_idx])) { |
| 367 | DP(NETIF_MSG_LINK, "Advertisement parameters " | ||
| 368 | "are not supported\n"); | ||
| 369 | return -EINVAL; | ||
| 370 | } | ||
| 367 | 371 | ||
| 368 | bp->link_params.req_line_speed[cfg_idx] = SPEED_AUTO_NEG; | 372 | bp->link_params.req_line_speed[cfg_idx] = SPEED_AUTO_NEG; |
| 369 | bp->link_params.req_duplex[cfg_idx] = DUPLEX_FULL; | 373 | bp->link_params.req_duplex[cfg_idx] = cmd->duplex; |
| 370 | bp->port.advertising[cfg_idx] |= (ADVERTISED_Autoneg | | 374 | bp->port.advertising[cfg_idx] = (ADVERTISED_Autoneg | |
| 371 | cmd->advertising); | 375 | cmd->advertising); |
| 376 | if (cmd->advertising) { | ||
| 377 | |||
| 378 | bp->link_params.speed_cap_mask[cfg_idx] = 0; | ||
| 379 | if (cmd->advertising & ADVERTISED_10baseT_Half) { | ||
| 380 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 381 | PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_HALF; | ||
| 382 | } | ||
| 383 | if (cmd->advertising & ADVERTISED_10baseT_Full) | ||
| 384 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 385 | PORT_HW_CFG_SPEED_CAPABILITY_D0_10M_FULL; | ||
| 372 | 386 | ||
| 387 | if (cmd->advertising & ADVERTISED_100baseT_Full) | ||
| 388 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 389 | PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL; | ||
| 390 | |||
| 391 | if (cmd->advertising & ADVERTISED_100baseT_Half) { | ||
| 392 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 393 | PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF; | ||
| 394 | } | ||
| 395 | if (cmd->advertising & ADVERTISED_1000baseT_Half) { | ||
| 396 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 397 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G; | ||
| 398 | } | ||
| 399 | if (cmd->advertising & (ADVERTISED_1000baseT_Full | | ||
| 400 | ADVERTISED_1000baseKX_Full)) | ||
| 401 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 402 | PORT_HW_CFG_SPEED_CAPABILITY_D0_1G; | ||
| 403 | |||
| 404 | if (cmd->advertising & (ADVERTISED_10000baseT_Full | | ||
| 405 | ADVERTISED_10000baseKX4_Full | | ||
| 406 | ADVERTISED_10000baseKR_Full)) | ||
| 407 | bp->link_params.speed_cap_mask[cfg_idx] |= | ||
| 408 | PORT_HW_CFG_SPEED_CAPABILITY_D0_10G; | ||
| 409 | } | ||
| 373 | } else { /* forced speed */ | 410 | } else { /* forced speed */ |
| 374 | /* advertise the requested speed and duplex if supported */ | 411 | /* advertise the requested speed and duplex if supported */ |
| 375 | switch (speed) { | 412 | switch (speed) { |
| @@ -1310,10 +1347,7 @@ static void bnx2x_get_ringparam(struct net_device *dev, | |||
| 1310 | if (bp->rx_ring_size) | 1347 | if (bp->rx_ring_size) |
| 1311 | ering->rx_pending = bp->rx_ring_size; | 1348 | ering->rx_pending = bp->rx_ring_size; |
| 1312 | else | 1349 | else |
| 1313 | if (bp->state == BNX2X_STATE_OPEN && bp->num_queues) | 1350 | ering->rx_pending = MAX_RX_AVAIL; |
| 1314 | ering->rx_pending = MAX_RX_AVAIL/bp->num_queues; | ||
| 1315 | else | ||
| 1316 | ering->rx_pending = MAX_RX_AVAIL; | ||
| 1317 | 1351 | ||
| 1318 | ering->rx_mini_pending = 0; | 1352 | ering->rx_mini_pending = 0; |
| 1319 | ering->rx_jumbo_pending = 0; | 1353 | ering->rx_jumbo_pending = 0; |
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c index d45b1555a602..ba15bdc5a1a9 100644 --- a/drivers/net/bnx2x/bnx2x_link.c +++ b/drivers/net/bnx2x/bnx2x_link.c | |||
| @@ -778,9 +778,9 @@ static int bnx2x_ets_e3b0_set_cos_bw(struct bnx2x *bp, | |||
| 778 | { | 778 | { |
| 779 | u32 nig_reg_adress_crd_weight = 0; | 779 | u32 nig_reg_adress_crd_weight = 0; |
| 780 | u32 pbf_reg_adress_crd_weight = 0; | 780 | u32 pbf_reg_adress_crd_weight = 0; |
| 781 | /* Calculate and set BW for this COS*/ | 781 | /* Calculate and set BW for this COS - use 1 instead of 0 for BW */ |
| 782 | const u32 cos_bw_nig = (bw * min_w_val_nig) / total_bw; | 782 | const u32 cos_bw_nig = ((bw ? bw : 1) * min_w_val_nig) / total_bw; |
| 783 | const u32 cos_bw_pbf = (bw * min_w_val_pbf) / total_bw; | 783 | const u32 cos_bw_pbf = ((bw ? bw : 1) * min_w_val_pbf) / total_bw; |
| 784 | 784 | ||
| 785 | switch (cos_entry) { | 785 | switch (cos_entry) { |
| 786 | case 0: | 786 | case 0: |
| @@ -852,18 +852,12 @@ static int bnx2x_ets_e3b0_get_total_bw( | |||
| 852 | /* Calculate total BW requested */ | 852 | /* Calculate total BW requested */ |
| 853 | for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { | 853 | for (cos_idx = 0; cos_idx < ets_params->num_of_cos; cos_idx++) { |
| 854 | if (bnx2x_cos_state_bw == ets_params->cos[cos_idx].state) { | 854 | if (bnx2x_cos_state_bw == ets_params->cos[cos_idx].state) { |
| 855 | 855 | *total_bw += | |
| 856 | if (0 == ets_params->cos[cos_idx].params.bw_params.bw) { | 856 | ets_params->cos[cos_idx].params.bw_params.bw; |
| 857 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config BW" | ||
| 858 | "was set to 0\n"); | ||
| 859 | return -EINVAL; | ||
| 860 | } | 857 | } |
| 861 | *total_bw += | ||
| 862 | ets_params->cos[cos_idx].params.bw_params.bw; | ||
| 863 | } | ||
| 864 | } | 858 | } |
| 865 | 859 | ||
| 866 | /*Check taotl BW is valid */ | 860 | /* Check total BW is valid */ |
| 867 | if ((100 != *total_bw) || (0 == *total_bw)) { | 861 | if ((100 != *total_bw) || (0 == *total_bw)) { |
| 868 | if (0 == *total_bw) { | 862 | if (0 == *total_bw) { |
| 869 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config toatl BW" | 863 | DP(NETIF_MSG_LINK, "bnx2x_ets_E3B0_config toatl BW" |
| @@ -1726,7 +1720,7 @@ static int bnx2x_xmac_enable(struct link_params *params, | |||
| 1726 | 1720 | ||
| 1727 | /* Check loopback mode */ | 1721 | /* Check loopback mode */ |
| 1728 | if (lb) | 1722 | if (lb) |
| 1729 | val |= XMAC_CTRL_REG_CORE_LOCAL_LPBK; | 1723 | val |= XMAC_CTRL_REG_LINE_LOCAL_LPBK; |
| 1730 | REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); | 1724 | REG_WR(bp, xmac_base + XMAC_REG_CTRL, val); |
| 1731 | bnx2x_set_xumac_nig(params, | 1725 | bnx2x_set_xumac_nig(params, |
| 1732 | ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); | 1726 | ((vars->flow_ctrl & BNX2X_FLOW_CTRL_TX) != 0), 1); |
| @@ -3630,6 +3624,12 @@ static void bnx2x_warpcore_enable_AN_KR(struct bnx2x_phy *phy, | |||
| 3630 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | 3624 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, |
| 3631 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); | 3625 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1, val16); |
| 3632 | 3626 | ||
| 3627 | /* Advertised and set FEC (Forward Error Correction) */ | ||
| 3628 | bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, | ||
| 3629 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2, | ||
| 3630 | (MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY | | ||
| 3631 | MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ)); | ||
| 3632 | |||
| 3633 | /* Enable CL37 BAM */ | 3633 | /* Enable CL37 BAM */ |
| 3634 | if (REG_RD(bp, params->shmem_base + | 3634 | if (REG_RD(bp, params->shmem_base + |
| 3635 | offsetof(struct shmem_region, dev_info. | 3635 | offsetof(struct shmem_region, dev_info. |
| @@ -5924,7 +5924,7 @@ int bnx2x_set_led(struct link_params *params, | |||
| 5924 | (tmp | EMAC_LED_OVERRIDE)); | 5924 | (tmp | EMAC_LED_OVERRIDE)); |
| 5925 | /* | 5925 | /* |
| 5926 | * return here without enabling traffic | 5926 | * return here without enabling traffic |
| 5927 | * LED blink andsetting rate in ON mode. | 5927 | * LED blink and setting rate in ON mode. |
| 5928 | * In oper mode, enabling LED blink | 5928 | * In oper mode, enabling LED blink |
| 5929 | * and setting rate is needed. | 5929 | * and setting rate is needed. |
| 5930 | */ | 5930 | */ |
| @@ -5936,7 +5936,11 @@ int bnx2x_set_led(struct link_params *params, | |||
| 5936 | * This is a work-around for HW issue found when link | 5936 | * This is a work-around for HW issue found when link |
| 5937 | * is up in CL73 | 5937 | * is up in CL73 |
| 5938 | */ | 5938 | */ |
| 5939 | REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); | 5939 | if ((!CHIP_IS_E3(bp)) || |
| 5940 | (CHIP_IS_E3(bp) && | ||
| 5941 | mode == LED_MODE_ON)) | ||
| 5942 | REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); | ||
| 5943 | |||
| 5940 | if (CHIP_IS_E1x(bp) || | 5944 | if (CHIP_IS_E1x(bp) || |
| 5941 | CHIP_IS_E2(bp) || | 5945 | CHIP_IS_E2(bp) || |
| 5942 | (mode == LED_MODE_ON)) | 5946 | (mode == LED_MODE_ON)) |
| @@ -10638,8 +10642,7 @@ static struct bnx2x_phy phy_warpcore = { | |||
| 10638 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, | 10642 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT, |
| 10639 | .addr = 0xff, | 10643 | .addr = 0xff, |
| 10640 | .def_md_devad = 0, | 10644 | .def_md_devad = 0, |
| 10641 | .flags = (FLAGS_HW_LOCK_REQUIRED | | 10645 | .flags = FLAGS_HW_LOCK_REQUIRED, |
| 10642 | FLAGS_TX_ERROR_CHECK), | ||
| 10643 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10646 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10644 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10647 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10645 | .mdio_ctrl = 0, | 10648 | .mdio_ctrl = 0, |
| @@ -10765,8 +10768,7 @@ static struct bnx2x_phy phy_8706 = { | |||
| 10765 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706, | 10768 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706, |
| 10766 | .addr = 0xff, | 10769 | .addr = 0xff, |
| 10767 | .def_md_devad = 0, | 10770 | .def_md_devad = 0, |
| 10768 | .flags = (FLAGS_INIT_XGXS_FIRST | | 10771 | .flags = FLAGS_INIT_XGXS_FIRST, |
| 10769 | FLAGS_TX_ERROR_CHECK), | ||
| 10770 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10772 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10771 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10773 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10772 | .mdio_ctrl = 0, | 10774 | .mdio_ctrl = 0, |
| @@ -10797,8 +10799,7 @@ static struct bnx2x_phy phy_8726 = { | |||
| 10797 | .addr = 0xff, | 10799 | .addr = 0xff, |
| 10798 | .def_md_devad = 0, | 10800 | .def_md_devad = 0, |
| 10799 | .flags = (FLAGS_HW_LOCK_REQUIRED | | 10801 | .flags = (FLAGS_HW_LOCK_REQUIRED | |
| 10800 | FLAGS_INIT_XGXS_FIRST | | 10802 | FLAGS_INIT_XGXS_FIRST), |
| 10801 | FLAGS_TX_ERROR_CHECK), | ||
| 10802 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10803 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10803 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10804 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10804 | .mdio_ctrl = 0, | 10805 | .mdio_ctrl = 0, |
| @@ -10829,8 +10830,7 @@ static struct bnx2x_phy phy_8727 = { | |||
| 10829 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, | 10830 | .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727, |
| 10830 | .addr = 0xff, | 10831 | .addr = 0xff, |
| 10831 | .def_md_devad = 0, | 10832 | .def_md_devad = 0, |
| 10832 | .flags = (FLAGS_FAN_FAILURE_DET_REQ | | 10833 | .flags = FLAGS_FAN_FAILURE_DET_REQ, |
| 10833 | FLAGS_TX_ERROR_CHECK), | ||
| 10834 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10834 | .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10835 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | 10835 | .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, |
| 10836 | .mdio_ctrl = 0, | 10836 | .mdio_ctrl = 0, |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index f74582a22c68..c027e9341a1a 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
| @@ -407,8 +407,8 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, | |||
| 407 | opcode |= (DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET); | 407 | opcode |= (DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET); |
| 408 | 408 | ||
| 409 | opcode |= (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0); | 409 | opcode |= (BP_PORT(bp) ? DMAE_CMD_PORT_1 : DMAE_CMD_PORT_0); |
| 410 | opcode |= ((BP_E1HVN(bp) << DMAE_CMD_E1HVN_SHIFT) | | 410 | opcode |= ((BP_VN(bp) << DMAE_CMD_E1HVN_SHIFT) | |
| 411 | (BP_E1HVN(bp) << DMAE_COMMAND_DST_VN_SHIFT)); | 411 | (BP_VN(bp) << DMAE_COMMAND_DST_VN_SHIFT)); |
| 412 | opcode |= (DMAE_COM_SET_ERR << DMAE_COMMAND_ERR_POLICY_SHIFT); | 412 | opcode |= (DMAE_COM_SET_ERR << DMAE_COMMAND_ERR_POLICY_SHIFT); |
| 413 | 413 | ||
| 414 | #ifdef __BIG_ENDIAN | 414 | #ifdef __BIG_ENDIAN |
| @@ -1419,7 +1419,7 @@ static void bnx2x_hc_int_enable(struct bnx2x *bp) | |||
| 1419 | if (!CHIP_IS_E1(bp)) { | 1419 | if (!CHIP_IS_E1(bp)) { |
| 1420 | /* init leading/trailing edge */ | 1420 | /* init leading/trailing edge */ |
| 1421 | if (IS_MF(bp)) { | 1421 | if (IS_MF(bp)) { |
| 1422 | val = (0xee0f | (1 << (BP_E1HVN(bp) + 4))); | 1422 | val = (0xee0f | (1 << (BP_VN(bp) + 4))); |
| 1423 | if (bp->port.pmf) | 1423 | if (bp->port.pmf) |
| 1424 | /* enable nig and gpio3 attention */ | 1424 | /* enable nig and gpio3 attention */ |
| 1425 | val |= 0x1100; | 1425 | val |= 0x1100; |
| @@ -1471,7 +1471,7 @@ static void bnx2x_igu_int_enable(struct bnx2x *bp) | |||
| 1471 | 1471 | ||
| 1472 | /* init leading/trailing edge */ | 1472 | /* init leading/trailing edge */ |
| 1473 | if (IS_MF(bp)) { | 1473 | if (IS_MF(bp)) { |
| 1474 | val = (0xee0f | (1 << (BP_E1HVN(bp) + 4))); | 1474 | val = (0xee0f | (1 << (BP_VN(bp) + 4))); |
| 1475 | if (bp->port.pmf) | 1475 | if (bp->port.pmf) |
| 1476 | /* enable nig and gpio3 attention */ | 1476 | /* enable nig and gpio3 attention */ |
| 1477 | val |= 0x1100; | 1477 | val |= 0x1100; |
| @@ -2287,7 +2287,7 @@ static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp) | |||
| 2287 | int vn; | 2287 | int vn; |
| 2288 | 2288 | ||
| 2289 | bp->vn_weight_sum = 0; | 2289 | bp->vn_weight_sum = 0; |
| 2290 | for (vn = VN_0; vn < E1HVN_MAX; vn++) { | 2290 | for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { |
| 2291 | u32 vn_cfg = bp->mf_config[vn]; | 2291 | u32 vn_cfg = bp->mf_config[vn]; |
| 2292 | u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> | 2292 | u32 vn_min_rate = ((vn_cfg & FUNC_MF_CFG_MIN_BW_MASK) >> |
| 2293 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; | 2293 | FUNC_MF_CFG_MIN_BW_SHIFT) * 100; |
| @@ -2320,12 +2320,18 @@ static void bnx2x_calc_vn_weight_sum(struct bnx2x *bp) | |||
| 2320 | CMNG_FLAGS_PER_PORT_FAIRNESS_VN; | 2320 | CMNG_FLAGS_PER_PORT_FAIRNESS_VN; |
| 2321 | } | 2321 | } |
| 2322 | 2322 | ||
| 2323 | /* returns func by VN for current port */ | ||
| 2324 | static inline int func_by_vn(struct bnx2x *bp, int vn) | ||
| 2325 | { | ||
| 2326 | return 2 * vn + BP_PORT(bp); | ||
| 2327 | } | ||
| 2328 | |||
| 2323 | static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) | 2329 | static void bnx2x_init_vn_minmax(struct bnx2x *bp, int vn) |
| 2324 | { | 2330 | { |
| 2325 | struct rate_shaping_vars_per_vn m_rs_vn; | 2331 | struct rate_shaping_vars_per_vn m_rs_vn; |
| 2326 | struct fairness_vars_per_vn m_fair_vn; | 2332 | struct fairness_vars_per_vn m_fair_vn; |
| 2327 | u32 vn_cfg = bp->mf_config[vn]; | 2333 | u32 vn_cfg = bp->mf_config[vn]; |
| 2328 | int func = 2*vn + BP_PORT(bp); | 2334 | int func = func_by_vn(bp, vn); |
| 2329 | u16 vn_min_rate, vn_max_rate; | 2335 | u16 vn_min_rate, vn_max_rate; |
| 2330 | int i; | 2336 | int i; |
| 2331 | 2337 | ||
| @@ -2422,7 +2428,7 @@ void bnx2x_read_mf_cfg(struct bnx2x *bp) | |||
| 2422 | * | 2428 | * |
| 2423 | * and there are 2 functions per port | 2429 | * and there are 2 functions per port |
| 2424 | */ | 2430 | */ |
| 2425 | for (vn = VN_0; vn < E1HVN_MAX; vn++) { | 2431 | for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { |
| 2426 | int /*abs*/func = n * (2 * vn + BP_PORT(bp)) + BP_PATH(bp); | 2432 | int /*abs*/func = n * (2 * vn + BP_PORT(bp)) + BP_PATH(bp); |
| 2427 | 2433 | ||
| 2428 | if (func >= E1H_FUNC_MAX) | 2434 | if (func >= E1H_FUNC_MAX) |
| @@ -2454,7 +2460,7 @@ static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) | |||
| 2454 | 2460 | ||
| 2455 | /* calculate and set min-max rate for each vn */ | 2461 | /* calculate and set min-max rate for each vn */ |
| 2456 | if (bp->port.pmf) | 2462 | if (bp->port.pmf) |
| 2457 | for (vn = VN_0; vn < E1HVN_MAX; vn++) | 2463 | for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) |
| 2458 | bnx2x_init_vn_minmax(bp, vn); | 2464 | bnx2x_init_vn_minmax(bp, vn); |
| 2459 | 2465 | ||
| 2460 | /* always enable rate shaping and fairness */ | 2466 | /* always enable rate shaping and fairness */ |
| @@ -2473,16 +2479,15 @@ static void bnx2x_cmng_fns_init(struct bnx2x *bp, u8 read_cfg, u8 cmng_type) | |||
| 2473 | 2479 | ||
| 2474 | static inline void bnx2x_link_sync_notify(struct bnx2x *bp) | 2480 | static inline void bnx2x_link_sync_notify(struct bnx2x *bp) |
| 2475 | { | 2481 | { |
| 2476 | int port = BP_PORT(bp); | ||
| 2477 | int func; | 2482 | int func; |
| 2478 | int vn; | 2483 | int vn; |
| 2479 | 2484 | ||
| 2480 | /* Set the attention towards other drivers on the same port */ | 2485 | /* Set the attention towards other drivers on the same port */ |
| 2481 | for (vn = VN_0; vn < E1HVN_MAX; vn++) { | 2486 | for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { |
| 2482 | if (vn == BP_E1HVN(bp)) | 2487 | if (vn == BP_VN(bp)) |
| 2483 | continue; | 2488 | continue; |
| 2484 | 2489 | ||
| 2485 | func = ((vn << 1) | port); | 2490 | func = func_by_vn(bp, vn); |
| 2486 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + | 2491 | REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + |
| 2487 | (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); | 2492 | (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); |
| 2488 | } | 2493 | } |
| @@ -2577,7 +2582,7 @@ static void bnx2x_pmf_update(struct bnx2x *bp) | |||
| 2577 | bnx2x_dcbx_pmf_update(bp); | 2582 | bnx2x_dcbx_pmf_update(bp); |
| 2578 | 2583 | ||
| 2579 | /* enable nig attention */ | 2584 | /* enable nig attention */ |
| 2580 | val = (0xff0f | (1 << (BP_E1HVN(bp) + 4))); | 2585 | val = (0xff0f | (1 << (BP_VN(bp) + 4))); |
| 2581 | if (bp->common.int_block == INT_BLOCK_HC) { | 2586 | if (bp->common.int_block == INT_BLOCK_HC) { |
| 2582 | REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, val); | 2587 | REG_WR(bp, HC_REG_TRAILING_EDGE_0 + port*8, val); |
| 2583 | REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, val); | 2588 | REG_WR(bp, HC_REG_LEADING_EDGE_0 + port*8, val); |
| @@ -2756,8 +2761,14 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, | |||
| 2756 | u16 tpa_agg_size = 0; | 2761 | u16 tpa_agg_size = 0; |
| 2757 | 2762 | ||
| 2758 | if (!fp->disable_tpa) { | 2763 | if (!fp->disable_tpa) { |
| 2759 | pause->sge_th_hi = 250; | 2764 | pause->sge_th_lo = SGE_TH_LO(bp); |
| 2760 | pause->sge_th_lo = 150; | 2765 | pause->sge_th_hi = SGE_TH_HI(bp); |
| 2766 | |||
| 2767 | /* validate SGE ring has enough to cross high threshold */ | ||
| 2768 | WARN_ON(bp->dropless_fc && | ||
| 2769 | pause->sge_th_hi + FW_PREFETCH_CNT > | ||
| 2770 | MAX_RX_SGE_CNT * NUM_RX_SGE_PAGES); | ||
| 2771 | |||
| 2761 | tpa_agg_size = min_t(u32, | 2772 | tpa_agg_size = min_t(u32, |
| 2762 | (min_t(u32, 8, MAX_SKB_FRAGS) * | 2773 | (min_t(u32, 8, MAX_SKB_FRAGS) * |
| 2763 | SGE_PAGE_SIZE * PAGES_PER_SGE), 0xffff); | 2774 | SGE_PAGE_SIZE * PAGES_PER_SGE), 0xffff); |
| @@ -2771,10 +2782,21 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, | |||
| 2771 | 2782 | ||
| 2772 | /* pause - not for e1 */ | 2783 | /* pause - not for e1 */ |
| 2773 | if (!CHIP_IS_E1(bp)) { | 2784 | if (!CHIP_IS_E1(bp)) { |
| 2774 | pause->bd_th_hi = 350; | 2785 | pause->bd_th_lo = BD_TH_LO(bp); |
| 2775 | pause->bd_th_lo = 250; | 2786 | pause->bd_th_hi = BD_TH_HI(bp); |
| 2776 | pause->rcq_th_hi = 350; | 2787 | |
| 2777 | pause->rcq_th_lo = 250; | 2788 | pause->rcq_th_lo = RCQ_TH_LO(bp); |
| 2789 | pause->rcq_th_hi = RCQ_TH_HI(bp); | ||
| 2790 | /* | ||
| 2791 | * validate that rings have enough entries to cross | ||
| 2792 | * high thresholds | ||
| 2793 | */ | ||
| 2794 | WARN_ON(bp->dropless_fc && | ||
| 2795 | pause->bd_th_hi + FW_PREFETCH_CNT > | ||
| 2796 | bp->rx_ring_size); | ||
| 2797 | WARN_ON(bp->dropless_fc && | ||
| 2798 | pause->rcq_th_hi + FW_PREFETCH_CNT > | ||
| 2799 | NUM_RCQ_RINGS * MAX_RCQ_DESC_CNT); | ||
| 2778 | 2800 | ||
| 2779 | pause->pri_map = 1; | 2801 | pause->pri_map = 1; |
| 2780 | } | 2802 | } |
| @@ -2802,9 +2824,7 @@ static void bnx2x_pf_rx_q_prep(struct bnx2x *bp, | |||
| 2802 | * For PF Clients it should be the maximum avaliable number. | 2824 | * For PF Clients it should be the maximum avaliable number. |
| 2803 | * VF driver(s) may want to define it to a smaller value. | 2825 | * VF driver(s) may want to define it to a smaller value. |
| 2804 | */ | 2826 | */ |
| 2805 | rxq_init->max_tpa_queues = | 2827 | rxq_init->max_tpa_queues = MAX_AGG_QS(bp); |
| 2806 | (CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 : | ||
| 2807 | ETH_MAX_AGGREGATION_QUEUES_E1H_E2); | ||
| 2808 | 2828 | ||
| 2809 | rxq_init->cache_line_log = BNX2X_RX_ALIGN_SHIFT; | 2829 | rxq_init->cache_line_log = BNX2X_RX_ALIGN_SHIFT; |
| 2810 | rxq_init->fw_sb_id = fp->fw_sb_id; | 2830 | rxq_init->fw_sb_id = fp->fw_sb_id; |
| @@ -4808,6 +4828,37 @@ void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, | |||
| 4808 | hc_sm->time_to_expire = 0xFFFFFFFF; | 4828 | hc_sm->time_to_expire = 0xFFFFFFFF; |
| 4809 | } | 4829 | } |
| 4810 | 4830 | ||
| 4831 | |||
| 4832 | /* allocates state machine ids. */ | ||
| 4833 | static inline | ||
| 4834 | void bnx2x_map_sb_state_machines(struct hc_index_data *index_data) | ||
| 4835 | { | ||
| 4836 | /* zero out state machine indices */ | ||
| 4837 | /* rx indices */ | ||
| 4838 | index_data[HC_INDEX_ETH_RX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID; | ||
| 4839 | |||
| 4840 | /* tx indices */ | ||
| 4841 | index_data[HC_INDEX_OOO_TX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID; | ||
| 4842 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags &= ~HC_INDEX_DATA_SM_ID; | ||
| 4843 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags &= ~HC_INDEX_DATA_SM_ID; | ||
| 4844 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags &= ~HC_INDEX_DATA_SM_ID; | ||
| 4845 | |||
| 4846 | /* map indices */ | ||
| 4847 | /* rx indices */ | ||
| 4848 | index_data[HC_INDEX_ETH_RX_CQ_CONS].flags |= | ||
| 4849 | SM_RX_ID << HC_INDEX_DATA_SM_ID_SHIFT; | ||
| 4850 | |||
| 4851 | /* tx indices */ | ||
| 4852 | index_data[HC_INDEX_OOO_TX_CQ_CONS].flags |= | ||
| 4853 | SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; | ||
| 4854 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags |= | ||
| 4855 | SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; | ||
| 4856 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags |= | ||
| 4857 | SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; | ||
| 4858 | index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags |= | ||
| 4859 | SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT; | ||
| 4860 | } | ||
| 4861 | |||
| 4811 | static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, | 4862 | static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, |
| 4812 | u8 vf_valid, int fw_sb_id, int igu_sb_id) | 4863 | u8 vf_valid, int fw_sb_id, int igu_sb_id) |
| 4813 | { | 4864 | { |
| @@ -4839,6 +4890,7 @@ static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, | |||
| 4839 | hc_sm_p = sb_data_e2.common.state_machine; | 4890 | hc_sm_p = sb_data_e2.common.state_machine; |
| 4840 | sb_data_p = (u32 *)&sb_data_e2; | 4891 | sb_data_p = (u32 *)&sb_data_e2; |
| 4841 | data_size = sizeof(struct hc_status_block_data_e2)/sizeof(u32); | 4892 | data_size = sizeof(struct hc_status_block_data_e2)/sizeof(u32); |
| 4893 | bnx2x_map_sb_state_machines(sb_data_e2.index_data); | ||
| 4842 | } else { | 4894 | } else { |
| 4843 | memset(&sb_data_e1x, 0, | 4895 | memset(&sb_data_e1x, 0, |
| 4844 | sizeof(struct hc_status_block_data_e1x)); | 4896 | sizeof(struct hc_status_block_data_e1x)); |
| @@ -4853,6 +4905,7 @@ static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, | |||
| 4853 | hc_sm_p = sb_data_e1x.common.state_machine; | 4905 | hc_sm_p = sb_data_e1x.common.state_machine; |
| 4854 | sb_data_p = (u32 *)&sb_data_e1x; | 4906 | sb_data_p = (u32 *)&sb_data_e1x; |
| 4855 | data_size = sizeof(struct hc_status_block_data_e1x)/sizeof(u32); | 4907 | data_size = sizeof(struct hc_status_block_data_e1x)/sizeof(u32); |
| 4908 | bnx2x_map_sb_state_machines(sb_data_e1x.index_data); | ||
| 4856 | } | 4909 | } |
| 4857 | 4910 | ||
| 4858 | bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_RX_ID], | 4911 | bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_RX_ID], |
| @@ -5802,7 +5855,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp) | |||
| 5802 | * take the UNDI lock to protect undi_unload flow from accessing | 5855 | * take the UNDI lock to protect undi_unload flow from accessing |
| 5803 | * registers while we're resetting the chip | 5856 | * registers while we're resetting the chip |
| 5804 | */ | 5857 | */ |
| 5805 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); | 5858 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); |
| 5806 | 5859 | ||
| 5807 | bnx2x_reset_common(bp); | 5860 | bnx2x_reset_common(bp); |
| 5808 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff); | 5861 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_SET, 0xffffffff); |
| @@ -5814,7 +5867,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp) | |||
| 5814 | } | 5867 | } |
| 5815 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, val); | 5868 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, val); |
| 5816 | 5869 | ||
| 5817 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); | 5870 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET); |
| 5818 | 5871 | ||
| 5819 | bnx2x_init_block(bp, BLOCK_MISC, PHASE_COMMON); | 5872 | bnx2x_init_block(bp, BLOCK_MISC, PHASE_COMMON); |
| 5820 | 5873 | ||
| @@ -6671,12 +6724,16 @@ static int bnx2x_init_hw_func(struct bnx2x *bp) | |||
| 6671 | if (CHIP_MODE_IS_4_PORT(bp)) | 6724 | if (CHIP_MODE_IS_4_PORT(bp)) |
| 6672 | dsb_idx = BP_FUNC(bp); | 6725 | dsb_idx = BP_FUNC(bp); |
| 6673 | else | 6726 | else |
| 6674 | dsb_idx = BP_E1HVN(bp); | 6727 | dsb_idx = BP_VN(bp); |
| 6675 | 6728 | ||
| 6676 | prod_offset = (CHIP_INT_MODE_IS_BC(bp) ? | 6729 | prod_offset = (CHIP_INT_MODE_IS_BC(bp) ? |
| 6677 | IGU_BC_BASE_DSB_PROD + dsb_idx : | 6730 | IGU_BC_BASE_DSB_PROD + dsb_idx : |
| 6678 | IGU_NORM_BASE_DSB_PROD + dsb_idx); | 6731 | IGU_NORM_BASE_DSB_PROD + dsb_idx); |
| 6679 | 6732 | ||
| 6733 | /* | ||
| 6734 | * igu prods come in chunks of E1HVN_MAX (4) - | ||
| 6735 | * does not matters what is the current chip mode | ||
| 6736 | */ | ||
| 6680 | for (i = 0; i < (num_segs * E1HVN_MAX); | 6737 | for (i = 0; i < (num_segs * E1HVN_MAX); |
| 6681 | i += E1HVN_MAX) { | 6738 | i += E1HVN_MAX) { |
| 6682 | addr = IGU_REG_PROD_CONS_MEMORY + | 6739 | addr = IGU_REG_PROD_CONS_MEMORY + |
| @@ -7570,7 +7627,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode) | |||
| 7570 | u32 val; | 7627 | u32 val; |
| 7571 | /* The mac address is written to entries 1-4 to | 7628 | /* The mac address is written to entries 1-4 to |
| 7572 | preserve entry 0 which is used by the PMF */ | 7629 | preserve entry 0 which is used by the PMF */ |
| 7573 | u8 entry = (BP_E1HVN(bp) + 1)*8; | 7630 | u8 entry = (BP_VN(bp) + 1)*8; |
| 7574 | 7631 | ||
| 7575 | val = (mac_addr[0] << 8) | mac_addr[1]; | 7632 | val = (mac_addr[0] << 8) | mac_addr[1]; |
| 7576 | EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry, val); | 7633 | EMAC_WR(bp, EMAC_REG_EMAC_MAC_MATCH + entry, val); |
| @@ -8546,10 +8603,12 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp) | |||
| 8546 | /* Check if there is any driver already loaded */ | 8603 | /* Check if there is any driver already loaded */ |
| 8547 | val = REG_RD(bp, MISC_REG_UNPREPARED); | 8604 | val = REG_RD(bp, MISC_REG_UNPREPARED); |
| 8548 | if (val == 0x1) { | 8605 | if (val == 0x1) { |
| 8549 | /* Check if it is the UNDI driver | 8606 | |
| 8607 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); | ||
| 8608 | /* | ||
| 8609 | * Check if it is the UNDI driver | ||
| 8550 | * UNDI driver initializes CID offset for normal bell to 0x7 | 8610 | * UNDI driver initializes CID offset for normal bell to 0x7 |
| 8551 | */ | 8611 | */ |
| 8552 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); | ||
| 8553 | val = REG_RD(bp, DORQ_REG_NORM_CID_OFST); | 8612 | val = REG_RD(bp, DORQ_REG_NORM_CID_OFST); |
| 8554 | if (val == 0x7) { | 8613 | if (val == 0x7) { |
| 8555 | u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; | 8614 | u32 reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; |
| @@ -8587,9 +8646,6 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp) | |||
| 8587 | bnx2x_fw_command(bp, reset_code, 0); | 8646 | bnx2x_fw_command(bp, reset_code, 0); |
| 8588 | } | 8647 | } |
| 8589 | 8648 | ||
| 8590 | /* now it's safe to release the lock */ | ||
| 8591 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); | ||
| 8592 | |||
| 8593 | bnx2x_undi_int_disable(bp); | 8649 | bnx2x_undi_int_disable(bp); |
| 8594 | port = BP_PORT(bp); | 8650 | port = BP_PORT(bp); |
| 8595 | 8651 | ||
| @@ -8639,8 +8695,10 @@ static void __devinit bnx2x_undi_unload(struct bnx2x *bp) | |||
| 8639 | bp->fw_seq = | 8695 | bp->fw_seq = |
| 8640 | (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) & | 8696 | (SHMEM_RD(bp, func_mb[bp->pf_num].drv_mb_header) & |
| 8641 | DRV_MSG_SEQ_NUMBER_MASK); | 8697 | DRV_MSG_SEQ_NUMBER_MASK); |
| 8642 | } else | 8698 | } |
| 8643 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_UNDI); | 8699 | |
| 8700 | /* now it's safe to release the lock */ | ||
| 8701 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET); | ||
| 8644 | } | 8702 | } |
| 8645 | } | 8703 | } |
| 8646 | 8704 | ||
| @@ -8777,13 +8835,13 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) | |||
| 8777 | static void __devinit bnx2x_get_igu_cam_info(struct bnx2x *bp) | 8835 | static void __devinit bnx2x_get_igu_cam_info(struct bnx2x *bp) |
| 8778 | { | 8836 | { |
| 8779 | int pfid = BP_FUNC(bp); | 8837 | int pfid = BP_FUNC(bp); |
| 8780 | int vn = BP_E1HVN(bp); | ||
| 8781 | int igu_sb_id; | 8838 | int igu_sb_id; |
| 8782 | u32 val; | 8839 | u32 val; |
| 8783 | u8 fid, igu_sb_cnt = 0; | 8840 | u8 fid, igu_sb_cnt = 0; |
| 8784 | 8841 | ||
| 8785 | bp->igu_base_sb = 0xff; | 8842 | bp->igu_base_sb = 0xff; |
| 8786 | if (CHIP_INT_MODE_IS_BC(bp)) { | 8843 | if (CHIP_INT_MODE_IS_BC(bp)) { |
| 8844 | int vn = BP_VN(bp); | ||
| 8787 | igu_sb_cnt = bp->igu_sb_cnt; | 8845 | igu_sb_cnt = bp->igu_sb_cnt; |
| 8788 | bp->igu_base_sb = (CHIP_MODE_IS_4_PORT(bp) ? pfid : vn) * | 8846 | bp->igu_base_sb = (CHIP_MODE_IS_4_PORT(bp) ? pfid : vn) * |
| 8789 | FP_SB_MAX_E1x; | 8847 | FP_SB_MAX_E1x; |
| @@ -9416,6 +9474,10 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
| 9416 | bp->igu_base_sb = 0; | 9474 | bp->igu_base_sb = 0; |
| 9417 | } else { | 9475 | } else { |
| 9418 | bp->common.int_block = INT_BLOCK_IGU; | 9476 | bp->common.int_block = INT_BLOCK_IGU; |
| 9477 | |||
| 9478 | /* do not allow device reset during IGU info preocessing */ | ||
| 9479 | bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_RESET); | ||
| 9480 | |||
| 9419 | val = REG_RD(bp, IGU_REG_BLOCK_CONFIGURATION); | 9481 | val = REG_RD(bp, IGU_REG_BLOCK_CONFIGURATION); |
| 9420 | 9482 | ||
| 9421 | if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) { | 9483 | if (val & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN) { |
| @@ -9447,6 +9509,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
| 9447 | 9509 | ||
| 9448 | bnx2x_get_igu_cam_info(bp); | 9510 | bnx2x_get_igu_cam_info(bp); |
| 9449 | 9511 | ||
| 9512 | bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESET); | ||
| 9450 | } | 9513 | } |
| 9451 | 9514 | ||
| 9452 | /* | 9515 | /* |
| @@ -9473,7 +9536,7 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
| 9473 | 9536 | ||
| 9474 | bp->mf_ov = 0; | 9537 | bp->mf_ov = 0; |
| 9475 | bp->mf_mode = 0; | 9538 | bp->mf_mode = 0; |
| 9476 | vn = BP_E1HVN(bp); | 9539 | vn = BP_VN(bp); |
| 9477 | 9540 | ||
| 9478 | if (!CHIP_IS_E1(bp) && !BP_NOMCP(bp)) { | 9541 | if (!CHIP_IS_E1(bp) && !BP_NOMCP(bp)) { |
| 9479 | BNX2X_DEV_INFO("shmem2base 0x%x, size %d, mfcfg offset %d\n", | 9542 | BNX2X_DEV_INFO("shmem2base 0x%x, size %d, mfcfg offset %d\n", |
| @@ -9593,13 +9656,6 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
| 9593 | /* port info */ | 9656 | /* port info */ |
| 9594 | bnx2x_get_port_hwinfo(bp); | 9657 | bnx2x_get_port_hwinfo(bp); |
| 9595 | 9658 | ||
| 9596 | if (!BP_NOMCP(bp)) { | ||
| 9597 | bp->fw_seq = | ||
| 9598 | (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & | ||
| 9599 | DRV_MSG_SEQ_NUMBER_MASK); | ||
| 9600 | BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); | ||
| 9601 | } | ||
| 9602 | |||
| 9603 | /* Get MAC addresses */ | 9659 | /* Get MAC addresses */ |
| 9604 | bnx2x_get_mac_hwinfo(bp); | 9660 | bnx2x_get_mac_hwinfo(bp); |
| 9605 | 9661 | ||
| @@ -9765,6 +9821,14 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp) | |||
| 9765 | if (!BP_NOMCP(bp)) | 9821 | if (!BP_NOMCP(bp)) |
| 9766 | bnx2x_undi_unload(bp); | 9822 | bnx2x_undi_unload(bp); |
| 9767 | 9823 | ||
| 9824 | /* init fw_seq after undi_unload! */ | ||
| 9825 | if (!BP_NOMCP(bp)) { | ||
| 9826 | bp->fw_seq = | ||
| 9827 | (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) & | ||
| 9828 | DRV_MSG_SEQ_NUMBER_MASK); | ||
| 9829 | BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq); | ||
| 9830 | } | ||
| 9831 | |||
| 9768 | if (CHIP_REV_IS_FPGA(bp)) | 9832 | if (CHIP_REV_IS_FPGA(bp)) |
| 9769 | dev_err(&bp->pdev->dev, "FPGA detected\n"); | 9833 | dev_err(&bp->pdev->dev, "FPGA detected\n"); |
| 9770 | 9834 | ||
| @@ -10259,17 +10323,21 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev, | |||
| 10259 | /* clean indirect addresses */ | 10323 | /* clean indirect addresses */ |
| 10260 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, | 10324 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, |
| 10261 | PCICFG_VENDOR_ID_OFFSET); | 10325 | PCICFG_VENDOR_ID_OFFSET); |
| 10262 | /* Clean the following indirect addresses for all functions since it | 10326 | /* |
| 10327 | * Clean the following indirect addresses for all functions since it | ||
| 10263 | * is not used by the driver. | 10328 | * is not used by the driver. |
| 10264 | */ | 10329 | */ |
| 10265 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0, 0); | 10330 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F0, 0); |
| 10266 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0, 0); | 10331 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F0, 0); |
| 10267 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0); | 10332 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F0, 0); |
| 10268 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0); | 10333 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F0, 0); |
| 10269 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0); | 10334 | |
| 10270 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0); | 10335 | if (CHIP_IS_E1x(bp)) { |
| 10271 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0); | 10336 | REG_WR(bp, PXP2_REG_PGL_ADDR_88_F1, 0); |
| 10272 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F1, 0); | 10337 | REG_WR(bp, PXP2_REG_PGL_ADDR_8C_F1, 0); |
| 10338 | REG_WR(bp, PXP2_REG_PGL_ADDR_90_F1, 0); | ||
| 10339 | REG_WR(bp, PXP2_REG_PGL_ADDR_94_F1, 0); | ||
| 10340 | } | ||
| 10273 | 10341 | ||
| 10274 | /* | 10342 | /* |
| 10275 | * Enable internal target-read (in case we are probed after PF FLR). | 10343 | * Enable internal target-read (in case we are probed after PF FLR). |
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h index 40266c14e6dc..750e8445dac4 100644 --- a/drivers/net/bnx2x/bnx2x_reg.h +++ b/drivers/net/bnx2x/bnx2x_reg.h | |||
| @@ -5320,7 +5320,7 @@ | |||
| 5320 | #define XCM_REG_XX_OVFL_EVNT_ID 0x20058 | 5320 | #define XCM_REG_XX_OVFL_EVNT_ID 0x20058 |
| 5321 | #define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS (0x1<<0) | 5321 | #define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_LOCAL_FAULT_STATUS (0x1<<0) |
| 5322 | #define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS (0x1<<1) | 5322 | #define XMAC_CLEAR_RX_LSS_STATUS_REG_CLEAR_REMOTE_FAULT_STATUS (0x1<<1) |
| 5323 | #define XMAC_CTRL_REG_CORE_LOCAL_LPBK (0x1<<3) | 5323 | #define XMAC_CTRL_REG_LINE_LOCAL_LPBK (0x1<<2) |
| 5324 | #define XMAC_CTRL_REG_RX_EN (0x1<<1) | 5324 | #define XMAC_CTRL_REG_RX_EN (0x1<<1) |
| 5325 | #define XMAC_CTRL_REG_SOFT_RESET (0x1<<6) | 5325 | #define XMAC_CTRL_REG_SOFT_RESET (0x1<<6) |
| 5326 | #define XMAC_CTRL_REG_TX_EN (0x1<<0) | 5326 | #define XMAC_CTRL_REG_TX_EN (0x1<<0) |
| @@ -5766,7 +5766,7 @@ | |||
| 5766 | #define HW_LOCK_RESOURCE_RECOVERY_LEADER_0 8 | 5766 | #define HW_LOCK_RESOURCE_RECOVERY_LEADER_0 8 |
| 5767 | #define HW_LOCK_RESOURCE_RECOVERY_LEADER_1 9 | 5767 | #define HW_LOCK_RESOURCE_RECOVERY_LEADER_1 9 |
| 5768 | #define HW_LOCK_RESOURCE_SPIO 2 | 5768 | #define HW_LOCK_RESOURCE_SPIO 2 |
| 5769 | #define HW_LOCK_RESOURCE_UNDI 5 | 5769 | #define HW_LOCK_RESOURCE_RESET 5 |
| 5770 | #define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) | 5770 | #define AEU_INPUTS_ATTN_BITS_ATC_HW_INTERRUPT (0x1<<4) |
| 5771 | #define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) | 5771 | #define AEU_INPUTS_ATTN_BITS_ATC_PARITY_ERROR (0x1<<5) |
| 5772 | #define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) | 5772 | #define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (0x1<<18) |
| @@ -6853,6 +6853,9 @@ Theotherbitsarereservedandshouldbezero*/ | |||
| 6853 | #define MDIO_WC_REG_IEEE0BLK_AUTONEGNP 0x7 | 6853 | #define MDIO_WC_REG_IEEE0BLK_AUTONEGNP 0x7 |
| 6854 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT0 0x10 | 6854 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT0 0x10 |
| 6855 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1 0x11 | 6855 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT1 0x11 |
| 6856 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADVERTISEMENT2 0x12 | ||
| 6857 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_ABILITY 0x4000 | ||
| 6858 | #define MDIO_WC_REG_AN_IEEE1BLK_AN_ADV2_FEC_REQ 0x8000 | ||
| 6856 | #define MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150 0x96 | 6859 | #define MDIO_WC_REG_PMD_IEEE9BLK_TENGBASE_KR_PMD_CONTROL_REGISTER_150 0x96 |
| 6857 | #define MDIO_WC_REG_XGXSBLK0_XGXSCONTROL 0x8000 | 6860 | #define MDIO_WC_REG_XGXSBLK0_XGXSCONTROL 0x8000 |
| 6858 | #define MDIO_WC_REG_XGXSBLK0_MISCCONTROL1 0x800e | 6861 | #define MDIO_WC_REG_XGXSBLK0_MISCCONTROL1 0x800e |
diff --git a/drivers/net/bnx2x/bnx2x_stats.c b/drivers/net/bnx2x/bnx2x_stats.c index 771f6803b238..9908f2bbcf73 100644 --- a/drivers/net/bnx2x/bnx2x_stats.c +++ b/drivers/net/bnx2x/bnx2x_stats.c | |||
| @@ -710,7 +710,8 @@ static int bnx2x_hw_stats_update(struct bnx2x *bp) | |||
| 710 | break; | 710 | break; |
| 711 | 711 | ||
| 712 | case MAC_TYPE_NONE: /* unreached */ | 712 | case MAC_TYPE_NONE: /* unreached */ |
| 713 | BNX2X_ERR("stats updated by DMAE but no MAC active\n"); | 713 | DP(BNX2X_MSG_STATS, |
| 714 | "stats updated by DMAE but no MAC active\n"); | ||
| 714 | return -1; | 715 | return -1; |
| 715 | 716 | ||
| 716 | default: /* unreached */ | 717 | default: /* unreached */ |
| @@ -1391,7 +1392,7 @@ static void bnx2x_port_stats_base_init(struct bnx2x *bp) | |||
| 1391 | 1392 | ||
| 1392 | static void bnx2x_func_stats_base_init(struct bnx2x *bp) | 1393 | static void bnx2x_func_stats_base_init(struct bnx2x *bp) |
| 1393 | { | 1394 | { |
| 1394 | int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX; | 1395 | int vn, vn_max = IS_MF(bp) ? BP_MAX_VN_NUM(bp) : E1VN_MAX; |
| 1395 | u32 func_stx; | 1396 | u32 func_stx; |
| 1396 | 1397 | ||
| 1397 | /* sanity */ | 1398 | /* sanity */ |
| @@ -1404,7 +1405,7 @@ static void bnx2x_func_stats_base_init(struct bnx2x *bp) | |||
| 1404 | func_stx = bp->func_stx; | 1405 | func_stx = bp->func_stx; |
| 1405 | 1406 | ||
| 1406 | for (vn = VN_0; vn < vn_max; vn++) { | 1407 | for (vn = VN_0; vn < vn_max; vn++) { |
| 1407 | int mb_idx = CHIP_IS_E1x(bp) ? 2*vn + BP_PORT(bp) : vn; | 1408 | int mb_idx = BP_FW_MB_IDX_VN(bp, vn); |
| 1408 | 1409 | ||
| 1409 | bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); | 1410 | bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); |
| 1410 | bnx2x_func_stats_init(bp); | 1411 | bnx2x_func_stats_init(bp); |
diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c index a81249246ece..2adc294f512a 100644 --- a/drivers/net/can/ti_hecc.c +++ b/drivers/net/can/ti_hecc.c | |||
| @@ -46,6 +46,7 @@ | |||
| 46 | #include <linux/skbuff.h> | 46 | #include <linux/skbuff.h> |
| 47 | #include <linux/platform_device.h> | 47 | #include <linux/platform_device.h> |
| 48 | #include <linux/clk.h> | 48 | #include <linux/clk.h> |
| 49 | #include <linux/io.h> | ||
| 49 | 50 | ||
| 50 | #include <linux/can/dev.h> | 51 | #include <linux/can/dev.h> |
| 51 | #include <linux/can/error.h> | 52 | #include <linux/can/error.h> |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 8545c7aa93eb..a5a89ecb6f36 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
| @@ -4026,6 +4026,12 @@ s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw) | |||
| 4026 | checksum += eeprom_data; | 4026 | checksum += eeprom_data; |
| 4027 | } | 4027 | } |
| 4028 | 4028 | ||
| 4029 | #ifdef CONFIG_PARISC | ||
| 4030 | /* This is a signature and not a checksum on HP c8000 */ | ||
| 4031 | if ((hw->subsystem_vendor_id == 0x103C) && (eeprom_data == 0x16d6)) | ||
| 4032 | return E1000_SUCCESS; | ||
| 4033 | |||
| 4034 | #endif | ||
| 4029 | if (checksum == (u16) EEPROM_SUM) | 4035 | if (checksum == (u16) EEPROM_SUM) |
| 4030 | return E1000_SUCCESS; | 4036 | return E1000_SUCCESS; |
| 4031 | else { | 4037 | else { |
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 3e6679269400..8dd5fccef725 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
| @@ -757,7 +757,7 @@ static int ibmveth_set_csum_offload(struct net_device *dev, u32 data) | |||
| 757 | struct ibmveth_adapter *adapter = netdev_priv(dev); | 757 | struct ibmveth_adapter *adapter = netdev_priv(dev); |
| 758 | unsigned long set_attr, clr_attr, ret_attr; | 758 | unsigned long set_attr, clr_attr, ret_attr; |
| 759 | unsigned long set_attr6, clr_attr6; | 759 | unsigned long set_attr6, clr_attr6; |
| 760 | long ret, ret6; | 760 | long ret, ret4, ret6; |
| 761 | int rc1 = 0, rc2 = 0; | 761 | int rc1 = 0, rc2 = 0; |
| 762 | int restart = 0; | 762 | int restart = 0; |
| 763 | 763 | ||
| @@ -770,6 +770,8 @@ static int ibmveth_set_csum_offload(struct net_device *dev, u32 data) | |||
| 770 | 770 | ||
| 771 | set_attr = 0; | 771 | set_attr = 0; |
| 772 | clr_attr = 0; | 772 | clr_attr = 0; |
| 773 | set_attr6 = 0; | ||
| 774 | clr_attr6 = 0; | ||
| 773 | 775 | ||
| 774 | if (data) { | 776 | if (data) { |
| 775 | set_attr = IBMVETH_ILLAN_IPV4_TCP_CSUM; | 777 | set_attr = IBMVETH_ILLAN_IPV4_TCP_CSUM; |
| @@ -784,16 +786,20 @@ static int ibmveth_set_csum_offload(struct net_device *dev, u32 data) | |||
| 784 | if (ret == H_SUCCESS && !(ret_attr & IBMVETH_ILLAN_ACTIVE_TRUNK) && | 786 | if (ret == H_SUCCESS && !(ret_attr & IBMVETH_ILLAN_ACTIVE_TRUNK) && |
| 785 | !(ret_attr & IBMVETH_ILLAN_TRUNK_PRI_MASK) && | 787 | !(ret_attr & IBMVETH_ILLAN_TRUNK_PRI_MASK) && |
| 786 | (ret_attr & IBMVETH_ILLAN_PADDED_PKT_CSUM)) { | 788 | (ret_attr & IBMVETH_ILLAN_PADDED_PKT_CSUM)) { |
| 787 | ret = h_illan_attributes(adapter->vdev->unit_address, clr_attr, | 789 | ret4 = h_illan_attributes(adapter->vdev->unit_address, clr_attr, |
| 788 | set_attr, &ret_attr); | 790 | set_attr, &ret_attr); |
| 789 | 791 | ||
| 790 | if (ret != H_SUCCESS) { | 792 | if (ret4 != H_SUCCESS) { |
| 791 | netdev_err(dev, "unable to change IPv4 checksum " | 793 | netdev_err(dev, "unable to change IPv4 checksum " |
| 792 | "offload settings. %d rc=%ld\n", | 794 | "offload settings. %d rc=%ld\n", |
| 793 | data, ret); | 795 | data, ret4); |
| 796 | |||
| 797 | h_illan_attributes(adapter->vdev->unit_address, | ||
| 798 | set_attr, clr_attr, &ret_attr); | ||
| 799 | |||
| 800 | if (data == 1) | ||
| 801 | dev->features &= ~NETIF_F_IP_CSUM; | ||
| 794 | 802 | ||
| 795 | ret = h_illan_attributes(adapter->vdev->unit_address, | ||
| 796 | set_attr, clr_attr, &ret_attr); | ||
| 797 | } else { | 803 | } else { |
| 798 | adapter->fw_ipv4_csum_support = data; | 804 | adapter->fw_ipv4_csum_support = data; |
| 799 | } | 805 | } |
| @@ -804,15 +810,18 @@ static int ibmveth_set_csum_offload(struct net_device *dev, u32 data) | |||
| 804 | if (ret6 != H_SUCCESS) { | 810 | if (ret6 != H_SUCCESS) { |
| 805 | netdev_err(dev, "unable to change IPv6 checksum " | 811 | netdev_err(dev, "unable to change IPv6 checksum " |
| 806 | "offload settings. %d rc=%ld\n", | 812 | "offload settings. %d rc=%ld\n", |
| 807 | data, ret); | 813 | data, ret6); |
| 814 | |||
| 815 | h_illan_attributes(adapter->vdev->unit_address, | ||
| 816 | set_attr6, clr_attr6, &ret_attr); | ||
| 817 | |||
| 818 | if (data == 1) | ||
| 819 | dev->features &= ~NETIF_F_IPV6_CSUM; | ||
| 808 | 820 | ||
| 809 | ret = h_illan_attributes(adapter->vdev->unit_address, | ||
| 810 | set_attr6, clr_attr6, | ||
| 811 | &ret_attr); | ||
| 812 | } else | 821 | } else |
| 813 | adapter->fw_ipv6_csum_support = data; | 822 | adapter->fw_ipv6_csum_support = data; |
| 814 | 823 | ||
| 815 | if (ret != H_SUCCESS || ret6 != H_SUCCESS) | 824 | if (ret4 == H_SUCCESS || ret6 == H_SUCCESS) |
| 816 | adapter->rx_csum = data; | 825 | adapter->rx_csum = data; |
| 817 | else | 826 | else |
| 818 | rc1 = -EIO; | 827 | rc1 = -EIO; |
| @@ -930,6 +939,7 @@ static netdev_tx_t ibmveth_start_xmit(struct sk_buff *skb, | |||
| 930 | union ibmveth_buf_desc descs[6]; | 939 | union ibmveth_buf_desc descs[6]; |
| 931 | int last, i; | 940 | int last, i; |
| 932 | int force_bounce = 0; | 941 | int force_bounce = 0; |
| 942 | dma_addr_t dma_addr; | ||
| 933 | 943 | ||
| 934 | /* | 944 | /* |
| 935 | * veth handles a maximum of 6 segments including the header, so | 945 | * veth handles a maximum of 6 segments including the header, so |
| @@ -994,17 +1004,16 @@ retry_bounce: | |||
| 994 | } | 1004 | } |
| 995 | 1005 | ||
| 996 | /* Map the header */ | 1006 | /* Map the header */ |
| 997 | descs[0].fields.address = dma_map_single(&adapter->vdev->dev, skb->data, | 1007 | dma_addr = dma_map_single(&adapter->vdev->dev, skb->data, |
| 998 | skb_headlen(skb), | 1008 | skb_headlen(skb), DMA_TO_DEVICE); |
| 999 | DMA_TO_DEVICE); | 1009 | if (dma_mapping_error(&adapter->vdev->dev, dma_addr)) |
| 1000 | if (dma_mapping_error(&adapter->vdev->dev, descs[0].fields.address)) | ||
| 1001 | goto map_failed; | 1010 | goto map_failed; |
| 1002 | 1011 | ||
| 1003 | descs[0].fields.flags_len = desc_flags | skb_headlen(skb); | 1012 | descs[0].fields.flags_len = desc_flags | skb_headlen(skb); |
| 1013 | descs[0].fields.address = dma_addr; | ||
| 1004 | 1014 | ||
| 1005 | /* Map the frags */ | 1015 | /* Map the frags */ |
| 1006 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 1016 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
| 1007 | unsigned long dma_addr; | ||
| 1008 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | 1017 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 1009 | 1018 | ||
| 1010 | dma_addr = dma_map_page(&adapter->vdev->dev, frag->page, | 1019 | dma_addr = dma_map_page(&adapter->vdev->dev, frag->page, |
| @@ -1026,7 +1035,12 @@ retry_bounce: | |||
| 1026 | netdev->stats.tx_bytes += skb->len; | 1035 | netdev->stats.tx_bytes += skb->len; |
| 1027 | } | 1036 | } |
| 1028 | 1037 | ||
| 1029 | for (i = 0; i < skb_shinfo(skb)->nr_frags + 1; i++) | 1038 | dma_unmap_single(&adapter->vdev->dev, |
| 1039 | descs[0].fields.address, | ||
| 1040 | descs[0].fields.flags_len & IBMVETH_BUF_LEN_MASK, | ||
| 1041 | DMA_TO_DEVICE); | ||
| 1042 | |||
| 1043 | for (i = 1; i < skb_shinfo(skb)->nr_frags + 1; i++) | ||
| 1030 | dma_unmap_page(&adapter->vdev->dev, descs[i].fields.address, | 1044 | dma_unmap_page(&adapter->vdev->dev, descs[i].fields.address, |
| 1031 | descs[i].fields.flags_len & IBMVETH_BUF_LEN_MASK, | 1045 | descs[i].fields.flags_len & IBMVETH_BUF_LEN_MASK, |
| 1032 | DMA_TO_DEVICE); | 1046 | DMA_TO_DEVICE); |
diff --git a/drivers/net/pch_gbe/pch_gbe.h b/drivers/net/pch_gbe/pch_gbe.h index 59fac77d0dbb..a09a07197eb5 100644 --- a/drivers/net/pch_gbe/pch_gbe.h +++ b/drivers/net/pch_gbe/pch_gbe.h | |||
| @@ -127,8 +127,8 @@ struct pch_gbe_regs { | |||
| 127 | 127 | ||
| 128 | /* Reset */ | 128 | /* Reset */ |
| 129 | #define PCH_GBE_ALL_RST 0x80000000 /* All reset */ | 129 | #define PCH_GBE_ALL_RST 0x80000000 /* All reset */ |
| 130 | #define PCH_GBE_TX_RST 0x40000000 /* TX MAC, TX FIFO, TX DMA reset */ | 130 | #define PCH_GBE_TX_RST 0x00008000 /* TX MAC, TX FIFO, TX DMA reset */ |
| 131 | #define PCH_GBE_RX_RST 0x04000000 /* RX MAC, RX FIFO, RX DMA reset */ | 131 | #define PCH_GBE_RX_RST 0x00004000 /* RX MAC, RX FIFO, RX DMA reset */ |
| 132 | 132 | ||
| 133 | /* TCP/IP Accelerator Control */ | 133 | /* TCP/IP Accelerator Control */ |
| 134 | #define PCH_GBE_EX_LIST_EN 0x00000008 /* External List Enable */ | 134 | #define PCH_GBE_EX_LIST_EN 0x00000008 /* External List Enable */ |
| @@ -276,6 +276,9 @@ struct pch_gbe_regs { | |||
| 276 | #define PCH_GBE_RX_DMA_EN 0x00000002 /* Enables Receive DMA */ | 276 | #define PCH_GBE_RX_DMA_EN 0x00000002 /* Enables Receive DMA */ |
| 277 | #define PCH_GBE_TX_DMA_EN 0x00000001 /* Enables Transmission DMA */ | 277 | #define PCH_GBE_TX_DMA_EN 0x00000001 /* Enables Transmission DMA */ |
| 278 | 278 | ||
| 279 | /* RX DMA STATUS */ | ||
| 280 | #define PCH_GBE_IDLE_CHECK 0xFFFFFFFE | ||
| 281 | |||
| 279 | /* Wake On LAN Status */ | 282 | /* Wake On LAN Status */ |
| 280 | #define PCH_GBE_WLS_BR 0x00000008 /* Broadcas Address */ | 283 | #define PCH_GBE_WLS_BR 0x00000008 /* Broadcas Address */ |
| 281 | #define PCH_GBE_WLS_MLT 0x00000004 /* Multicast Address */ | 284 | #define PCH_GBE_WLS_MLT 0x00000004 /* Multicast Address */ |
| @@ -471,6 +474,7 @@ struct pch_gbe_tx_desc { | |||
| 471 | struct pch_gbe_buffer { | 474 | struct pch_gbe_buffer { |
| 472 | struct sk_buff *skb; | 475 | struct sk_buff *skb; |
| 473 | dma_addr_t dma; | 476 | dma_addr_t dma; |
| 477 | unsigned char *rx_buffer; | ||
| 474 | unsigned long time_stamp; | 478 | unsigned long time_stamp; |
| 475 | u16 length; | 479 | u16 length; |
| 476 | bool mapped; | 480 | bool mapped; |
| @@ -511,6 +515,9 @@ struct pch_gbe_tx_ring { | |||
| 511 | struct pch_gbe_rx_ring { | 515 | struct pch_gbe_rx_ring { |
| 512 | struct pch_gbe_rx_desc *desc; | 516 | struct pch_gbe_rx_desc *desc; |
| 513 | dma_addr_t dma; | 517 | dma_addr_t dma; |
| 518 | unsigned char *rx_buff_pool; | ||
| 519 | dma_addr_t rx_buff_pool_logic; | ||
| 520 | unsigned int rx_buff_pool_size; | ||
| 514 | unsigned int size; | 521 | unsigned int size; |
| 515 | unsigned int count; | 522 | unsigned int count; |
| 516 | unsigned int next_to_use; | 523 | unsigned int next_to_use; |
| @@ -622,6 +629,7 @@ struct pch_gbe_adapter { | |||
| 622 | unsigned long rx_buffer_len; | 629 | unsigned long rx_buffer_len; |
| 623 | unsigned long tx_queue_len; | 630 | unsigned long tx_queue_len; |
| 624 | bool have_msi; | 631 | bool have_msi; |
| 632 | bool rx_stop_flag; | ||
| 625 | }; | 633 | }; |
| 626 | 634 | ||
| 627 | extern const char pch_driver_version[]; | 635 | extern const char pch_driver_version[]; |
diff --git a/drivers/net/pch_gbe/pch_gbe_main.c b/drivers/net/pch_gbe/pch_gbe_main.c index eac3c5ca9731..567ff10889be 100644 --- a/drivers/net/pch_gbe/pch_gbe_main.c +++ b/drivers/net/pch_gbe/pch_gbe_main.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | 20 | ||
| 21 | #include "pch_gbe.h" | 21 | #include "pch_gbe.h" |
| 22 | #include "pch_gbe_api.h" | 22 | #include "pch_gbe_api.h" |
| 23 | #include <linux/prefetch.h> | ||
| 24 | 23 | ||
| 25 | #define DRV_VERSION "1.00" | 24 | #define DRV_VERSION "1.00" |
| 26 | const char pch_driver_version[] = DRV_VERSION; | 25 | const char pch_driver_version[] = DRV_VERSION; |
| @@ -34,11 +33,15 @@ const char pch_driver_version[] = DRV_VERSION; | |||
| 34 | #define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */ | 33 | #define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */ |
| 35 | #define PCH_GBE_COPYBREAK_DEFAULT 256 | 34 | #define PCH_GBE_COPYBREAK_DEFAULT 256 |
| 36 | #define PCH_GBE_PCI_BAR 1 | 35 | #define PCH_GBE_PCI_BAR 1 |
| 36 | #define PCH_GBE_RESERVE_MEMORY 0x200000 /* 2MB */ | ||
| 37 | 37 | ||
| 38 | /* Macros for ML7223 */ | 38 | /* Macros for ML7223 */ |
| 39 | #define PCI_VENDOR_ID_ROHM 0x10db | 39 | #define PCI_VENDOR_ID_ROHM 0x10db |
| 40 | #define PCI_DEVICE_ID_ROHM_ML7223_GBE 0x8013 | 40 | #define PCI_DEVICE_ID_ROHM_ML7223_GBE 0x8013 |
| 41 | 41 | ||
| 42 | /* Macros for ML7831 */ | ||
| 43 | #define PCI_DEVICE_ID_ROHM_ML7831_GBE 0x8802 | ||
| 44 | |||
| 42 | #define PCH_GBE_TX_WEIGHT 64 | 45 | #define PCH_GBE_TX_WEIGHT 64 |
| 43 | #define PCH_GBE_RX_WEIGHT 64 | 46 | #define PCH_GBE_RX_WEIGHT 64 |
| 44 | #define PCH_GBE_RX_BUFFER_WRITE 16 | 47 | #define PCH_GBE_RX_BUFFER_WRITE 16 |
| @@ -52,6 +55,7 @@ const char pch_driver_version[] = DRV_VERSION; | |||
| 52 | ) | 55 | ) |
| 53 | 56 | ||
| 54 | /* Ethertype field values */ | 57 | /* Ethertype field values */ |
| 58 | #define PCH_GBE_MAX_RX_BUFFER_SIZE 0x2880 | ||
| 55 | #define PCH_GBE_MAX_JUMBO_FRAME_SIZE 10318 | 59 | #define PCH_GBE_MAX_JUMBO_FRAME_SIZE 10318 |
| 56 | #define PCH_GBE_FRAME_SIZE_2048 2048 | 60 | #define PCH_GBE_FRAME_SIZE_2048 2048 |
| 57 | #define PCH_GBE_FRAME_SIZE_4096 4096 | 61 | #define PCH_GBE_FRAME_SIZE_4096 4096 |
| @@ -83,10 +87,12 @@ const char pch_driver_version[] = DRV_VERSION; | |||
| 83 | #define PCH_GBE_INT_ENABLE_MASK ( \ | 87 | #define PCH_GBE_INT_ENABLE_MASK ( \ |
| 84 | PCH_GBE_INT_RX_DMA_CMPLT | \ | 88 | PCH_GBE_INT_RX_DMA_CMPLT | \ |
| 85 | PCH_GBE_INT_RX_DSC_EMP | \ | 89 | PCH_GBE_INT_RX_DSC_EMP | \ |
| 90 | PCH_GBE_INT_RX_FIFO_ERR | \ | ||
| 86 | PCH_GBE_INT_WOL_DET | \ | 91 | PCH_GBE_INT_WOL_DET | \ |
| 87 | PCH_GBE_INT_TX_CMPLT \ | 92 | PCH_GBE_INT_TX_CMPLT \ |
| 88 | ) | 93 | ) |
| 89 | 94 | ||
| 95 | #define PCH_GBE_INT_DISABLE_ALL 0 | ||
| 90 | 96 | ||
| 91 | static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT; | 97 | static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT; |
| 92 | 98 | ||
| @@ -138,6 +144,27 @@ static void pch_gbe_wait_clr_bit(void *reg, u32 bit) | |||
| 138 | if (!tmp) | 144 | if (!tmp) |
| 139 | pr_err("Error: busy bit is not cleared\n"); | 145 | pr_err("Error: busy bit is not cleared\n"); |
| 140 | } | 146 | } |
| 147 | |||
| 148 | /** | ||
| 149 | * pch_gbe_wait_clr_bit_irq - Wait to clear a bit for interrupt context | ||
| 150 | * @reg: Pointer of register | ||
| 151 | * @busy: Busy bit | ||
| 152 | */ | ||
| 153 | static int pch_gbe_wait_clr_bit_irq(void *reg, u32 bit) | ||
| 154 | { | ||
| 155 | u32 tmp; | ||
| 156 | int ret = -1; | ||
| 157 | /* wait busy */ | ||
| 158 | tmp = 20; | ||
| 159 | while ((ioread32(reg) & bit) && --tmp) | ||
| 160 | udelay(5); | ||
| 161 | if (!tmp) | ||
| 162 | pr_err("Error: busy bit is not cleared\n"); | ||
| 163 | else | ||
| 164 | ret = 0; | ||
| 165 | return ret; | ||
| 166 | } | ||
| 167 | |||
| 141 | /** | 168 | /** |
| 142 | * pch_gbe_mac_mar_set - Set MAC address register | 169 | * pch_gbe_mac_mar_set - Set MAC address register |
| 143 | * @hw: Pointer to the HW structure | 170 | * @hw: Pointer to the HW structure |
| @@ -189,6 +216,17 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) | |||
| 189 | return; | 216 | return; |
| 190 | } | 217 | } |
| 191 | 218 | ||
| 219 | static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw) | ||
| 220 | { | ||
| 221 | /* Read the MAC address. and store to the private data */ | ||
| 222 | pch_gbe_mac_read_mac_addr(hw); | ||
| 223 | iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET); | ||
| 224 | pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST); | ||
| 225 | /* Setup the MAC address */ | ||
| 226 | pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); | ||
| 227 | return; | ||
| 228 | } | ||
| 229 | |||
| 192 | /** | 230 | /** |
| 193 | * pch_gbe_mac_init_rx_addrs - Initialize receive address's | 231 | * pch_gbe_mac_init_rx_addrs - Initialize receive address's |
| 194 | * @hw: Pointer to the HW structure | 232 | * @hw: Pointer to the HW structure |
| @@ -671,13 +709,8 @@ static void pch_gbe_setup_rctl(struct pch_gbe_adapter *adapter) | |||
| 671 | 709 | ||
| 672 | tcpip = ioread32(&hw->reg->TCPIP_ACC); | 710 | tcpip = ioread32(&hw->reg->TCPIP_ACC); |
| 673 | 711 | ||
| 674 | if (netdev->features & NETIF_F_RXCSUM) { | 712 | tcpip |= PCH_GBE_RX_TCPIPACC_OFF; |
| 675 | tcpip &= ~PCH_GBE_RX_TCPIPACC_OFF; | 713 | tcpip &= ~PCH_GBE_RX_TCPIPACC_EN; |
| 676 | tcpip |= PCH_GBE_RX_TCPIPACC_EN; | ||
| 677 | } else { | ||
| 678 | tcpip |= PCH_GBE_RX_TCPIPACC_OFF; | ||
| 679 | tcpip &= ~PCH_GBE_RX_TCPIPACC_EN; | ||
| 680 | } | ||
| 681 | iowrite32(tcpip, &hw->reg->TCPIP_ACC); | 714 | iowrite32(tcpip, &hw->reg->TCPIP_ACC); |
| 682 | return; | 715 | return; |
| 683 | } | 716 | } |
| @@ -717,13 +750,6 @@ static void pch_gbe_configure_rx(struct pch_gbe_adapter *adapter) | |||
| 717 | iowrite32(rdba, &hw->reg->RX_DSC_BASE); | 750 | iowrite32(rdba, &hw->reg->RX_DSC_BASE); |
| 718 | iowrite32(rdlen, &hw->reg->RX_DSC_SIZE); | 751 | iowrite32(rdlen, &hw->reg->RX_DSC_SIZE); |
| 719 | iowrite32((rdba + rdlen), &hw->reg->RX_DSC_SW_P); | 752 | iowrite32((rdba + rdlen), &hw->reg->RX_DSC_SW_P); |
| 720 | |||
| 721 | /* Enables Receive DMA */ | ||
| 722 | rxdma = ioread32(&hw->reg->DMA_CTRL); | ||
| 723 | rxdma |= PCH_GBE_RX_DMA_EN; | ||
| 724 | iowrite32(rxdma, &hw->reg->DMA_CTRL); | ||
| 725 | /* Enables Receive */ | ||
| 726 | iowrite32(PCH_GBE_MRE_MAC_RX_EN, &hw->reg->MAC_RX_EN); | ||
| 727 | } | 753 | } |
| 728 | 754 | ||
| 729 | /** | 755 | /** |
| @@ -1097,6 +1123,48 @@ void pch_gbe_update_stats(struct pch_gbe_adapter *adapter) | |||
| 1097 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | 1123 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
| 1098 | } | 1124 | } |
| 1099 | 1125 | ||
| 1126 | static void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter) | ||
| 1127 | { | ||
| 1128 | struct pch_gbe_hw *hw = &adapter->hw; | ||
| 1129 | u32 rxdma; | ||
| 1130 | u16 value; | ||
| 1131 | int ret; | ||
| 1132 | |||
| 1133 | /* Disable Receive DMA */ | ||
| 1134 | rxdma = ioread32(&hw->reg->DMA_CTRL); | ||
| 1135 | rxdma &= ~PCH_GBE_RX_DMA_EN; | ||
| 1136 | iowrite32(rxdma, &hw->reg->DMA_CTRL); | ||
| 1137 | /* Wait Rx DMA BUS is IDLE */ | ||
| 1138 | ret = pch_gbe_wait_clr_bit_irq(&hw->reg->RX_DMA_ST, PCH_GBE_IDLE_CHECK); | ||
| 1139 | if (ret) { | ||
| 1140 | /* Disable Bus master */ | ||
| 1141 | pci_read_config_word(adapter->pdev, PCI_COMMAND, &value); | ||
| 1142 | value &= ~PCI_COMMAND_MASTER; | ||
| 1143 | pci_write_config_word(adapter->pdev, PCI_COMMAND, value); | ||
| 1144 | /* Stop Receive */ | ||
| 1145 | pch_gbe_mac_reset_rx(hw); | ||
| 1146 | /* Enable Bus master */ | ||
| 1147 | value |= PCI_COMMAND_MASTER; | ||
| 1148 | pci_write_config_word(adapter->pdev, PCI_COMMAND, value); | ||
| 1149 | } else { | ||
| 1150 | /* Stop Receive */ | ||
| 1151 | pch_gbe_mac_reset_rx(hw); | ||
| 1152 | } | ||
| 1153 | } | ||
| 1154 | |||
| 1155 | static void pch_gbe_start_receive(struct pch_gbe_hw *hw) | ||
| 1156 | { | ||
| 1157 | u32 rxdma; | ||
| 1158 | |||
| 1159 | /* Enables Receive DMA */ | ||
| 1160 | rxdma = ioread32(&hw->reg->DMA_CTRL); | ||
| 1161 | rxdma |= PCH_GBE_RX_DMA_EN; | ||
| 1162 | iowrite32(rxdma, &hw->reg->DMA_CTRL); | ||
| 1163 | /* Enables Receive */ | ||
| 1164 | iowrite32(PCH_GBE_MRE_MAC_RX_EN, &hw->reg->MAC_RX_EN); | ||
| 1165 | return; | ||
| 1166 | } | ||
| 1167 | |||
| 1100 | /** | 1168 | /** |
| 1101 | * pch_gbe_intr - Interrupt Handler | 1169 | * pch_gbe_intr - Interrupt Handler |
| 1102 | * @irq: Interrupt number | 1170 | * @irq: Interrupt number |
| @@ -1123,7 +1191,15 @@ static irqreturn_t pch_gbe_intr(int irq, void *data) | |||
| 1123 | if (int_st & PCH_GBE_INT_RX_FRAME_ERR) | 1191 | if (int_st & PCH_GBE_INT_RX_FRAME_ERR) |
| 1124 | adapter->stats.intr_rx_frame_err_count++; | 1192 | adapter->stats.intr_rx_frame_err_count++; |
| 1125 | if (int_st & PCH_GBE_INT_RX_FIFO_ERR) | 1193 | if (int_st & PCH_GBE_INT_RX_FIFO_ERR) |
| 1126 | adapter->stats.intr_rx_fifo_err_count++; | 1194 | if (!adapter->rx_stop_flag) { |
| 1195 | adapter->stats.intr_rx_fifo_err_count++; | ||
| 1196 | pr_debug("Rx fifo over run\n"); | ||
| 1197 | adapter->rx_stop_flag = true; | ||
| 1198 | int_en = ioread32(&hw->reg->INT_EN); | ||
| 1199 | iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR), | ||
| 1200 | &hw->reg->INT_EN); | ||
| 1201 | pch_gbe_stop_receive(adapter); | ||
| 1202 | } | ||
| 1127 | if (int_st & PCH_GBE_INT_RX_DMA_ERR) | 1203 | if (int_st & PCH_GBE_INT_RX_DMA_ERR) |
| 1128 | adapter->stats.intr_rx_dma_err_count++; | 1204 | adapter->stats.intr_rx_dma_err_count++; |
| 1129 | if (int_st & PCH_GBE_INT_TX_FIFO_ERR) | 1205 | if (int_st & PCH_GBE_INT_TX_FIFO_ERR) |
| @@ -1135,7 +1211,7 @@ static irqreturn_t pch_gbe_intr(int irq, void *data) | |||
| 1135 | /* When Rx descriptor is empty */ | 1211 | /* When Rx descriptor is empty */ |
| 1136 | if ((int_st & PCH_GBE_INT_RX_DSC_EMP)) { | 1212 | if ((int_st & PCH_GBE_INT_RX_DSC_EMP)) { |
| 1137 | adapter->stats.intr_rx_dsc_empty_count++; | 1213 | adapter->stats.intr_rx_dsc_empty_count++; |
| 1138 | pr_err("Rx descriptor is empty\n"); | 1214 | pr_debug("Rx descriptor is empty\n"); |
| 1139 | int_en = ioread32(&hw->reg->INT_EN); | 1215 | int_en = ioread32(&hw->reg->INT_EN); |
| 1140 | iowrite32((int_en & ~PCH_GBE_INT_RX_DSC_EMP), &hw->reg->INT_EN); | 1216 | iowrite32((int_en & ~PCH_GBE_INT_RX_DSC_EMP), &hw->reg->INT_EN); |
| 1141 | if (hw->mac.tx_fc_enable) { | 1217 | if (hw->mac.tx_fc_enable) { |
| @@ -1185,29 +1261,23 @@ pch_gbe_alloc_rx_buffers(struct pch_gbe_adapter *adapter, | |||
| 1185 | unsigned int i; | 1261 | unsigned int i; |
| 1186 | unsigned int bufsz; | 1262 | unsigned int bufsz; |
| 1187 | 1263 | ||
| 1188 | bufsz = adapter->rx_buffer_len + PCH_GBE_DMA_ALIGN; | 1264 | bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; |
| 1189 | i = rx_ring->next_to_use; | 1265 | i = rx_ring->next_to_use; |
| 1190 | 1266 | ||
| 1191 | while ((cleaned_count--)) { | 1267 | while ((cleaned_count--)) { |
| 1192 | buffer_info = &rx_ring->buffer_info[i]; | 1268 | buffer_info = &rx_ring->buffer_info[i]; |
| 1193 | skb = buffer_info->skb; | 1269 | skb = netdev_alloc_skb(netdev, bufsz); |
| 1194 | if (skb) { | 1270 | if (unlikely(!skb)) { |
| 1195 | skb_trim(skb, 0); | 1271 | /* Better luck next round */ |
| 1196 | } else { | 1272 | adapter->stats.rx_alloc_buff_failed++; |
| 1197 | skb = netdev_alloc_skb(netdev, bufsz); | 1273 | break; |
| 1198 | if (unlikely(!skb)) { | ||
| 1199 | /* Better luck next round */ | ||
| 1200 | adapter->stats.rx_alloc_buff_failed++; | ||
| 1201 | break; | ||
| 1202 | } | ||
| 1203 | /* 64byte align */ | ||
| 1204 | skb_reserve(skb, PCH_GBE_DMA_ALIGN); | ||
| 1205 | |||
| 1206 | buffer_info->skb = skb; | ||
| 1207 | buffer_info->length = adapter->rx_buffer_len; | ||
| 1208 | } | 1274 | } |
| 1275 | /* align */ | ||
| 1276 | skb_reserve(skb, NET_IP_ALIGN); | ||
| 1277 | buffer_info->skb = skb; | ||
| 1278 | |||
| 1209 | buffer_info->dma = dma_map_single(&pdev->dev, | 1279 | buffer_info->dma = dma_map_single(&pdev->dev, |
| 1210 | skb->data, | 1280 | buffer_info->rx_buffer, |
| 1211 | buffer_info->length, | 1281 | buffer_info->length, |
| 1212 | DMA_FROM_DEVICE); | 1282 | DMA_FROM_DEVICE); |
| 1213 | if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) { | 1283 | if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) { |
| @@ -1240,6 +1310,36 @@ pch_gbe_alloc_rx_buffers(struct pch_gbe_adapter *adapter, | |||
| 1240 | return; | 1310 | return; |
| 1241 | } | 1311 | } |
| 1242 | 1312 | ||
| 1313 | static int | ||
| 1314 | pch_gbe_alloc_rx_buffers_pool(struct pch_gbe_adapter *adapter, | ||
| 1315 | struct pch_gbe_rx_ring *rx_ring, int cleaned_count) | ||
| 1316 | { | ||
| 1317 | struct pci_dev *pdev = adapter->pdev; | ||
| 1318 | struct pch_gbe_buffer *buffer_info; | ||
| 1319 | unsigned int i; | ||
| 1320 | unsigned int bufsz; | ||
| 1321 | unsigned int size; | ||
| 1322 | |||
| 1323 | bufsz = adapter->rx_buffer_len; | ||
| 1324 | |||
| 1325 | size = rx_ring->count * bufsz + PCH_GBE_RESERVE_MEMORY; | ||
| 1326 | rx_ring->rx_buff_pool = dma_alloc_coherent(&pdev->dev, size, | ||
| 1327 | &rx_ring->rx_buff_pool_logic, | ||
| 1328 | GFP_KERNEL); | ||
| 1329 | if (!rx_ring->rx_buff_pool) { | ||
| 1330 | pr_err("Unable to allocate memory for the receive poll buffer\n"); | ||
| 1331 | return -ENOMEM; | ||
| 1332 | } | ||
| 1333 | memset(rx_ring->rx_buff_pool, 0, size); | ||
| 1334 | rx_ring->rx_buff_pool_size = size; | ||
| 1335 | for (i = 0; i < rx_ring->count; i++) { | ||
| 1336 | buffer_info = &rx_ring->buffer_info[i]; | ||
| 1337 | buffer_info->rx_buffer = rx_ring->rx_buff_pool + bufsz * i; | ||
| 1338 | buffer_info->length = bufsz; | ||
| 1339 | } | ||
| 1340 | return 0; | ||
| 1341 | } | ||
| 1342 | |||
| 1243 | /** | 1343 | /** |
| 1244 | * pch_gbe_alloc_tx_buffers - Allocate transmit buffers | 1344 | * pch_gbe_alloc_tx_buffers - Allocate transmit buffers |
| 1245 | * @adapter: Board private structure | 1345 | * @adapter: Board private structure |
| @@ -1380,7 +1480,7 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
| 1380 | unsigned int i; | 1480 | unsigned int i; |
| 1381 | unsigned int cleaned_count = 0; | 1481 | unsigned int cleaned_count = 0; |
| 1382 | bool cleaned = false; | 1482 | bool cleaned = false; |
| 1383 | struct sk_buff *skb, *new_skb; | 1483 | struct sk_buff *skb; |
| 1384 | u8 dma_status; | 1484 | u8 dma_status; |
| 1385 | u16 gbec_status; | 1485 | u16 gbec_status; |
| 1386 | u32 tcp_ip_status; | 1486 | u32 tcp_ip_status; |
| @@ -1401,13 +1501,12 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
| 1401 | rx_desc->gbec_status = DSC_INIT16; | 1501 | rx_desc->gbec_status = DSC_INIT16; |
| 1402 | buffer_info = &rx_ring->buffer_info[i]; | 1502 | buffer_info = &rx_ring->buffer_info[i]; |
| 1403 | skb = buffer_info->skb; | 1503 | skb = buffer_info->skb; |
| 1504 | buffer_info->skb = NULL; | ||
| 1404 | 1505 | ||
| 1405 | /* unmap dma */ | 1506 | /* unmap dma */ |
| 1406 | dma_unmap_single(&pdev->dev, buffer_info->dma, | 1507 | dma_unmap_single(&pdev->dev, buffer_info->dma, |
| 1407 | buffer_info->length, DMA_FROM_DEVICE); | 1508 | buffer_info->length, DMA_FROM_DEVICE); |
| 1408 | buffer_info->mapped = false; | 1509 | buffer_info->mapped = false; |
| 1409 | /* Prefetch the packet */ | ||
| 1410 | prefetch(skb->data); | ||
| 1411 | 1510 | ||
| 1412 | pr_debug("RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x " | 1511 | pr_debug("RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x " |
| 1413 | "TCP:0x%08x] BufInf = 0x%p\n", | 1512 | "TCP:0x%08x] BufInf = 0x%p\n", |
| @@ -1427,70 +1526,16 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
| 1427 | pr_err("Receive CRC Error\n"); | 1526 | pr_err("Receive CRC Error\n"); |
| 1428 | } else { | 1527 | } else { |
| 1429 | /* get receive length */ | 1528 | /* get receive length */ |
| 1430 | /* length convert[-3] */ | 1529 | /* length convert[-3], length includes FCS length */ |
| 1431 | length = (rx_desc->rx_words_eob) - 3; | 1530 | length = (rx_desc->rx_words_eob) - 3 - ETH_FCS_LEN; |
| 1432 | 1531 | if (rx_desc->rx_words_eob & 0x02) | |
| 1433 | /* Decide the data conversion method */ | 1532 | length = length - 4; |
| 1434 | if (!(netdev->features & NETIF_F_RXCSUM)) { | 1533 | /* |
| 1435 | /* [Header:14][payload] */ | 1534 | * buffer_info->rx_buffer: [Header:14][payload] |
| 1436 | if (NET_IP_ALIGN) { | 1535 | * skb->data: [Reserve:2][Header:14][payload] |
| 1437 | /* Because alignment differs, | 1536 | */ |
| 1438 | * the new_skb is newly allocated, | 1537 | memcpy(skb->data, buffer_info->rx_buffer, length); |
| 1439 | * and data is copied to new_skb.*/ | 1538 | |
| 1440 | new_skb = netdev_alloc_skb(netdev, | ||
| 1441 | length + NET_IP_ALIGN); | ||
| 1442 | if (!new_skb) { | ||
| 1443 | /* dorrop error */ | ||
| 1444 | pr_err("New skb allocation " | ||
| 1445 | "Error\n"); | ||
| 1446 | goto dorrop; | ||
| 1447 | } | ||
| 1448 | skb_reserve(new_skb, NET_IP_ALIGN); | ||
| 1449 | memcpy(new_skb->data, skb->data, | ||
| 1450 | length); | ||
| 1451 | skb = new_skb; | ||
| 1452 | } else { | ||
| 1453 | /* DMA buffer is used as SKB as it is.*/ | ||
| 1454 | buffer_info->skb = NULL; | ||
| 1455 | } | ||
| 1456 | } else { | ||
| 1457 | /* [Header:14][padding:2][payload] */ | ||
| 1458 | /* The length includes padding length */ | ||
| 1459 | length = length - PCH_GBE_DMA_PADDING; | ||
| 1460 | if ((length < copybreak) || | ||
| 1461 | (NET_IP_ALIGN != PCH_GBE_DMA_PADDING)) { | ||
| 1462 | /* Because alignment differs, | ||
| 1463 | * the new_skb is newly allocated, | ||
| 1464 | * and data is copied to new_skb. | ||
| 1465 | * Padding data is deleted | ||
| 1466 | * at the time of a copy.*/ | ||
| 1467 | new_skb = netdev_alloc_skb(netdev, | ||
| 1468 | length + NET_IP_ALIGN); | ||
| 1469 | if (!new_skb) { | ||
| 1470 | /* dorrop error */ | ||
| 1471 | pr_err("New skb allocation " | ||
| 1472 | "Error\n"); | ||
| 1473 | goto dorrop; | ||
| 1474 | } | ||
| 1475 | skb_reserve(new_skb, NET_IP_ALIGN); | ||
| 1476 | memcpy(new_skb->data, skb->data, | ||
| 1477 | ETH_HLEN); | ||
| 1478 | memcpy(&new_skb->data[ETH_HLEN], | ||
| 1479 | &skb->data[ETH_HLEN + | ||
| 1480 | PCH_GBE_DMA_PADDING], | ||
| 1481 | length - ETH_HLEN); | ||
| 1482 | skb = new_skb; | ||
| 1483 | } else { | ||
| 1484 | /* Padding data is deleted | ||
| 1485 | * by moving header data.*/ | ||
| 1486 | memmove(&skb->data[PCH_GBE_DMA_PADDING], | ||
| 1487 | &skb->data[0], ETH_HLEN); | ||
| 1488 | skb_reserve(skb, NET_IP_ALIGN); | ||
| 1489 | buffer_info->skb = NULL; | ||
| 1490 | } | ||
| 1491 | } | ||
| 1492 | /* The length includes FCS length */ | ||
| 1493 | length = length - ETH_FCS_LEN; | ||
| 1494 | /* update status of driver */ | 1539 | /* update status of driver */ |
| 1495 | adapter->stats.rx_bytes += length; | 1540 | adapter->stats.rx_bytes += length; |
| 1496 | adapter->stats.rx_packets++; | 1541 | adapter->stats.rx_packets++; |
| @@ -1509,7 +1554,6 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, | |||
| 1509 | pr_debug("Receive skb->ip_summed: %d length: %d\n", | 1554 | pr_debug("Receive skb->ip_summed: %d length: %d\n", |
| 1510 | skb->ip_summed, length); | 1555 | skb->ip_summed, length); |
| 1511 | } | 1556 | } |
| 1512 | dorrop: | ||
| 1513 | /* return some buffers to hardware, one at a time is too slow */ | 1557 | /* return some buffers to hardware, one at a time is too slow */ |
| 1514 | if (unlikely(cleaned_count >= PCH_GBE_RX_BUFFER_WRITE)) { | 1558 | if (unlikely(cleaned_count >= PCH_GBE_RX_BUFFER_WRITE)) { |
| 1515 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, | 1559 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, |
| @@ -1714,9 +1758,15 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter) | |||
| 1714 | pr_err("Error: can't bring device up\n"); | 1758 | pr_err("Error: can't bring device up\n"); |
| 1715 | return err; | 1759 | return err; |
| 1716 | } | 1760 | } |
| 1761 | err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count); | ||
| 1762 | if (err) { | ||
| 1763 | pr_err("Error: can't bring device up\n"); | ||
| 1764 | return err; | ||
| 1765 | } | ||
| 1717 | pch_gbe_alloc_tx_buffers(adapter, tx_ring); | 1766 | pch_gbe_alloc_tx_buffers(adapter, tx_ring); |
| 1718 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count); | 1767 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count); |
| 1719 | adapter->tx_queue_len = netdev->tx_queue_len; | 1768 | adapter->tx_queue_len = netdev->tx_queue_len; |
| 1769 | pch_gbe_start_receive(&adapter->hw); | ||
| 1720 | 1770 | ||
| 1721 | mod_timer(&adapter->watchdog_timer, jiffies); | 1771 | mod_timer(&adapter->watchdog_timer, jiffies); |
| 1722 | 1772 | ||
| @@ -1734,6 +1784,7 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter) | |||
| 1734 | void pch_gbe_down(struct pch_gbe_adapter *adapter) | 1784 | void pch_gbe_down(struct pch_gbe_adapter *adapter) |
| 1735 | { | 1785 | { |
| 1736 | struct net_device *netdev = adapter->netdev; | 1786 | struct net_device *netdev = adapter->netdev; |
| 1787 | struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; | ||
| 1737 | 1788 | ||
| 1738 | /* signal that we're down so the interrupt handler does not | 1789 | /* signal that we're down so the interrupt handler does not |
| 1739 | * reschedule our watchdog timer */ | 1790 | * reschedule our watchdog timer */ |
| @@ -1752,6 +1803,12 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter) | |||
| 1752 | pch_gbe_reset(adapter); | 1803 | pch_gbe_reset(adapter); |
| 1753 | pch_gbe_clean_tx_ring(adapter, adapter->tx_ring); | 1804 | pch_gbe_clean_tx_ring(adapter, adapter->tx_ring); |
| 1754 | pch_gbe_clean_rx_ring(adapter, adapter->rx_ring); | 1805 | pch_gbe_clean_rx_ring(adapter, adapter->rx_ring); |
| 1806 | |||
| 1807 | pci_free_consistent(adapter->pdev, rx_ring->rx_buff_pool_size, | ||
| 1808 | rx_ring->rx_buff_pool, rx_ring->rx_buff_pool_logic); | ||
| 1809 | rx_ring->rx_buff_pool_logic = 0; | ||
| 1810 | rx_ring->rx_buff_pool_size = 0; | ||
| 1811 | rx_ring->rx_buff_pool = NULL; | ||
| 1755 | } | 1812 | } |
| 1756 | 1813 | ||
| 1757 | /** | 1814 | /** |
| @@ -2004,6 +2061,8 @@ static int pch_gbe_change_mtu(struct net_device *netdev, int new_mtu) | |||
| 2004 | { | 2061 | { |
| 2005 | struct pch_gbe_adapter *adapter = netdev_priv(netdev); | 2062 | struct pch_gbe_adapter *adapter = netdev_priv(netdev); |
| 2006 | int max_frame; | 2063 | int max_frame; |
| 2064 | unsigned long old_rx_buffer_len = adapter->rx_buffer_len; | ||
| 2065 | int err; | ||
| 2007 | 2066 | ||
| 2008 | max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | 2067 | max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; |
| 2009 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || | 2068 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || |
| @@ -2018,14 +2077,24 @@ static int pch_gbe_change_mtu(struct net_device *netdev, int new_mtu) | |||
| 2018 | else if (max_frame <= PCH_GBE_FRAME_SIZE_8192) | 2077 | else if (max_frame <= PCH_GBE_FRAME_SIZE_8192) |
| 2019 | adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_8192; | 2078 | adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_8192; |
| 2020 | else | 2079 | else |
| 2021 | adapter->rx_buffer_len = PCH_GBE_MAX_JUMBO_FRAME_SIZE; | 2080 | adapter->rx_buffer_len = PCH_GBE_MAX_RX_BUFFER_SIZE; |
| 2022 | netdev->mtu = new_mtu; | ||
| 2023 | adapter->hw.mac.max_frame_size = max_frame; | ||
| 2024 | 2081 | ||
| 2025 | if (netif_running(netdev)) | 2082 | if (netif_running(netdev)) { |
| 2026 | pch_gbe_reinit_locked(adapter); | 2083 | pch_gbe_down(adapter); |
| 2027 | else | 2084 | err = pch_gbe_up(adapter); |
| 2085 | if (err) { | ||
| 2086 | adapter->rx_buffer_len = old_rx_buffer_len; | ||
| 2087 | pch_gbe_up(adapter); | ||
| 2088 | return -ENOMEM; | ||
| 2089 | } else { | ||
| 2090 | netdev->mtu = new_mtu; | ||
| 2091 | adapter->hw.mac.max_frame_size = max_frame; | ||
| 2092 | } | ||
| 2093 | } else { | ||
| 2028 | pch_gbe_reset(adapter); | 2094 | pch_gbe_reset(adapter); |
| 2095 | netdev->mtu = new_mtu; | ||
| 2096 | adapter->hw.mac.max_frame_size = max_frame; | ||
| 2097 | } | ||
| 2029 | 2098 | ||
| 2030 | pr_debug("max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n", | 2099 | pr_debug("max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n", |
| 2031 | max_frame, (u32) adapter->rx_buffer_len, netdev->mtu, | 2100 | max_frame, (u32) adapter->rx_buffer_len, netdev->mtu, |
| @@ -2103,6 +2172,7 @@ static int pch_gbe_napi_poll(struct napi_struct *napi, int budget) | |||
| 2103 | int work_done = 0; | 2172 | int work_done = 0; |
| 2104 | bool poll_end_flag = false; | 2173 | bool poll_end_flag = false; |
| 2105 | bool cleaned = false; | 2174 | bool cleaned = false; |
| 2175 | u32 int_en; | ||
| 2106 | 2176 | ||
| 2107 | pr_debug("budget : %d\n", budget); | 2177 | pr_debug("budget : %d\n", budget); |
| 2108 | 2178 | ||
| @@ -2110,8 +2180,15 @@ static int pch_gbe_napi_poll(struct napi_struct *napi, int budget) | |||
| 2110 | if (!netif_carrier_ok(netdev)) { | 2180 | if (!netif_carrier_ok(netdev)) { |
| 2111 | poll_end_flag = true; | 2181 | poll_end_flag = true; |
| 2112 | } else { | 2182 | } else { |
| 2113 | cleaned = pch_gbe_clean_tx(adapter, adapter->tx_ring); | ||
| 2114 | pch_gbe_clean_rx(adapter, adapter->rx_ring, &work_done, budget); | 2183 | pch_gbe_clean_rx(adapter, adapter->rx_ring, &work_done, budget); |
| 2184 | if (adapter->rx_stop_flag) { | ||
| 2185 | adapter->rx_stop_flag = false; | ||
| 2186 | pch_gbe_start_receive(&adapter->hw); | ||
| 2187 | int_en = ioread32(&adapter->hw.reg->INT_EN); | ||
| 2188 | iowrite32((int_en | PCH_GBE_INT_RX_FIFO_ERR), | ||
| 2189 | &adapter->hw.reg->INT_EN); | ||
| 2190 | } | ||
| 2191 | cleaned = pch_gbe_clean_tx(adapter, adapter->tx_ring); | ||
| 2115 | 2192 | ||
| 2116 | if (cleaned) | 2193 | if (cleaned) |
| 2117 | work_done = budget; | 2194 | work_done = budget; |
| @@ -2452,6 +2529,13 @@ static DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = { | |||
| 2452 | .class = (PCI_CLASS_NETWORK_ETHERNET << 8), | 2529 | .class = (PCI_CLASS_NETWORK_ETHERNET << 8), |
| 2453 | .class_mask = (0xFFFF00) | 2530 | .class_mask = (0xFFFF00) |
| 2454 | }, | 2531 | }, |
| 2532 | {.vendor = PCI_VENDOR_ID_ROHM, | ||
| 2533 | .device = PCI_DEVICE_ID_ROHM_ML7831_GBE, | ||
| 2534 | .subvendor = PCI_ANY_ID, | ||
| 2535 | .subdevice = PCI_ANY_ID, | ||
| 2536 | .class = (PCI_CLASS_NETWORK_ETHERNET << 8), | ||
| 2537 | .class_mask = (0xFFFF00) | ||
| 2538 | }, | ||
| 2455 | /* required last entry */ | 2539 | /* required last entry */ |
| 2456 | {0} | 2540 | {0} |
| 2457 | }; | 2541 | }; |
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c index faca764aa21b..b59abc706d93 100644 --- a/drivers/net/sfc/efx.c +++ b/drivers/net/sfc/efx.c | |||
| @@ -1050,7 +1050,6 @@ static int efx_init_io(struct efx_nic *efx) | |||
| 1050 | { | 1050 | { |
| 1051 | struct pci_dev *pci_dev = efx->pci_dev; | 1051 | struct pci_dev *pci_dev = efx->pci_dev; |
| 1052 | dma_addr_t dma_mask = efx->type->max_dma_mask; | 1052 | dma_addr_t dma_mask = efx->type->max_dma_mask; |
| 1053 | bool use_wc; | ||
| 1054 | int rc; | 1053 | int rc; |
| 1055 | 1054 | ||
| 1056 | netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); | 1055 | netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); |
| @@ -1101,21 +1100,8 @@ static int efx_init_io(struct efx_nic *efx) | |||
| 1101 | rc = -EIO; | 1100 | rc = -EIO; |
| 1102 | goto fail3; | 1101 | goto fail3; |
| 1103 | } | 1102 | } |
| 1104 | 1103 | efx->membase = ioremap_nocache(efx->membase_phys, | |
| 1105 | /* bug22643: If SR-IOV is enabled then tx push over a write combined | 1104 | efx->type->mem_map_size); |
| 1106 | * mapping is unsafe. We need to disable write combining in this case. | ||
| 1107 | * MSI is unsupported when SR-IOV is enabled, and the firmware will | ||
| 1108 | * have removed the MSI capability. So write combining is safe if | ||
| 1109 | * there is an MSI capability. | ||
| 1110 | */ | ||
| 1111 | use_wc = (!EFX_WORKAROUND_22643(efx) || | ||
| 1112 | pci_find_capability(pci_dev, PCI_CAP_ID_MSI)); | ||
| 1113 | if (use_wc) | ||
| 1114 | efx->membase = ioremap_wc(efx->membase_phys, | ||
| 1115 | efx->type->mem_map_size); | ||
| 1116 | else | ||
| 1117 | efx->membase = ioremap_nocache(efx->membase_phys, | ||
| 1118 | efx->type->mem_map_size); | ||
| 1119 | if (!efx->membase) { | 1105 | if (!efx->membase) { |
| 1120 | netif_err(efx, probe, efx->net_dev, | 1106 | netif_err(efx, probe, efx->net_dev, |
| 1121 | "could not map memory BAR at %llx+%x\n", | 1107 | "could not map memory BAR at %llx+%x\n", |
diff --git a/drivers/net/sfc/io.h b/drivers/net/sfc/io.h index cc978803d484..751d1ec112cc 100644 --- a/drivers/net/sfc/io.h +++ b/drivers/net/sfc/io.h | |||
| @@ -103,7 +103,6 @@ static inline void efx_writeo(struct efx_nic *efx, efx_oword_t *value, | |||
| 103 | _efx_writed(efx, value->u32[2], reg + 8); | 103 | _efx_writed(efx, value->u32[2], reg + 8); |
| 104 | _efx_writed(efx, value->u32[3], reg + 12); | 104 | _efx_writed(efx, value->u32[3], reg + 12); |
| 105 | #endif | 105 | #endif |
| 106 | wmb(); | ||
| 107 | mmiowb(); | 106 | mmiowb(); |
| 108 | spin_unlock_irqrestore(&efx->biu_lock, flags); | 107 | spin_unlock_irqrestore(&efx->biu_lock, flags); |
| 109 | } | 108 | } |
| @@ -126,7 +125,6 @@ static inline void efx_sram_writeq(struct efx_nic *efx, void __iomem *membase, | |||
| 126 | __raw_writel((__force u32)value->u32[0], membase + addr); | 125 | __raw_writel((__force u32)value->u32[0], membase + addr); |
| 127 | __raw_writel((__force u32)value->u32[1], membase + addr + 4); | 126 | __raw_writel((__force u32)value->u32[1], membase + addr + 4); |
| 128 | #endif | 127 | #endif |
| 129 | wmb(); | ||
| 130 | mmiowb(); | 128 | mmiowb(); |
| 131 | spin_unlock_irqrestore(&efx->biu_lock, flags); | 129 | spin_unlock_irqrestore(&efx->biu_lock, flags); |
| 132 | } | 130 | } |
| @@ -141,7 +139,6 @@ static inline void efx_writed(struct efx_nic *efx, efx_dword_t *value, | |||
| 141 | 139 | ||
| 142 | /* No lock required */ | 140 | /* No lock required */ |
| 143 | _efx_writed(efx, value->u32[0], reg); | 141 | _efx_writed(efx, value->u32[0], reg); |
| 144 | wmb(); | ||
| 145 | } | 142 | } |
| 146 | 143 | ||
| 147 | /* Read a 128-bit CSR, locking as appropriate. */ | 144 | /* Read a 128-bit CSR, locking as appropriate. */ |
| @@ -152,7 +149,6 @@ static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value, | |||
| 152 | 149 | ||
| 153 | spin_lock_irqsave(&efx->biu_lock, flags); | 150 | spin_lock_irqsave(&efx->biu_lock, flags); |
| 154 | value->u32[0] = _efx_readd(efx, reg + 0); | 151 | value->u32[0] = _efx_readd(efx, reg + 0); |
| 155 | rmb(); | ||
| 156 | value->u32[1] = _efx_readd(efx, reg + 4); | 152 | value->u32[1] = _efx_readd(efx, reg + 4); |
| 157 | value->u32[2] = _efx_readd(efx, reg + 8); | 153 | value->u32[2] = _efx_readd(efx, reg + 8); |
| 158 | value->u32[3] = _efx_readd(efx, reg + 12); | 154 | value->u32[3] = _efx_readd(efx, reg + 12); |
| @@ -175,7 +171,6 @@ static inline void efx_sram_readq(struct efx_nic *efx, void __iomem *membase, | |||
| 175 | value->u64[0] = (__force __le64)__raw_readq(membase + addr); | 171 | value->u64[0] = (__force __le64)__raw_readq(membase + addr); |
| 176 | #else | 172 | #else |
| 177 | value->u32[0] = (__force __le32)__raw_readl(membase + addr); | 173 | value->u32[0] = (__force __le32)__raw_readl(membase + addr); |
| 178 | rmb(); | ||
| 179 | value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4); | 174 | value->u32[1] = (__force __le32)__raw_readl(membase + addr + 4); |
| 180 | #endif | 175 | #endif |
| 181 | spin_unlock_irqrestore(&efx->biu_lock, flags); | 176 | spin_unlock_irqrestore(&efx->biu_lock, flags); |
| @@ -249,7 +244,6 @@ static inline void _efx_writeo_page(struct efx_nic *efx, efx_oword_t *value, | |||
| 249 | _efx_writed(efx, value->u32[2], reg + 8); | 244 | _efx_writed(efx, value->u32[2], reg + 8); |
| 250 | _efx_writed(efx, value->u32[3], reg + 12); | 245 | _efx_writed(efx, value->u32[3], reg + 12); |
| 251 | #endif | 246 | #endif |
| 252 | wmb(); | ||
| 253 | } | 247 | } |
| 254 | #define efx_writeo_page(efx, value, reg, page) \ | 248 | #define efx_writeo_page(efx, value, reg, page) \ |
| 255 | _efx_writeo_page(efx, value, \ | 249 | _efx_writeo_page(efx, value, \ |
diff --git a/drivers/net/sfc/mcdi.c b/drivers/net/sfc/mcdi.c index 3dd45ed61f0a..81a425397468 100644 --- a/drivers/net/sfc/mcdi.c +++ b/drivers/net/sfc/mcdi.c | |||
| @@ -50,20 +50,6 @@ static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx) | |||
| 50 | return &nic_data->mcdi; | 50 | return &nic_data->mcdi; |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | static inline void | ||
| 54 | efx_mcdi_readd(struct efx_nic *efx, efx_dword_t *value, unsigned reg) | ||
| 55 | { | ||
| 56 | struct siena_nic_data *nic_data = efx->nic_data; | ||
| 57 | value->u32[0] = (__force __le32)__raw_readl(nic_data->mcdi_smem + reg); | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline void | ||
| 61 | efx_mcdi_writed(struct efx_nic *efx, const efx_dword_t *value, unsigned reg) | ||
| 62 | { | ||
| 63 | struct siena_nic_data *nic_data = efx->nic_data; | ||
| 64 | __raw_writel((__force u32)value->u32[0], nic_data->mcdi_smem + reg); | ||
| 65 | } | ||
| 66 | |||
| 67 | void efx_mcdi_init(struct efx_nic *efx) | 53 | void efx_mcdi_init(struct efx_nic *efx) |
| 68 | { | 54 | { |
| 69 | struct efx_mcdi_iface *mcdi; | 55 | struct efx_mcdi_iface *mcdi; |
| @@ -84,8 +70,8 @@ static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd, | |||
| 84 | const u8 *inbuf, size_t inlen) | 70 | const u8 *inbuf, size_t inlen) |
| 85 | { | 71 | { |
| 86 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | 72 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 87 | unsigned pdu = MCDI_PDU(efx); | 73 | unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); |
| 88 | unsigned doorbell = MCDI_DOORBELL(efx); | 74 | unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx); |
| 89 | unsigned int i; | 75 | unsigned int i; |
| 90 | efx_dword_t hdr; | 76 | efx_dword_t hdr; |
| 91 | u32 xflags, seqno; | 77 | u32 xflags, seqno; |
| @@ -106,28 +92,29 @@ static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd, | |||
| 106 | MCDI_HEADER_SEQ, seqno, | 92 | MCDI_HEADER_SEQ, seqno, |
| 107 | MCDI_HEADER_XFLAGS, xflags); | 93 | MCDI_HEADER_XFLAGS, xflags); |
| 108 | 94 | ||
| 109 | efx_mcdi_writed(efx, &hdr, pdu); | 95 | efx_writed(efx, &hdr, pdu); |
| 110 | 96 | ||
| 111 | for (i = 0; i < inlen; i += 4) | 97 | for (i = 0; i < inlen; i += 4) |
| 112 | efx_mcdi_writed(efx, (const efx_dword_t *)(inbuf + i), | 98 | _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i); |
| 113 | pdu + 4 + i); | 99 | |
| 100 | /* Ensure the payload is written out before the header */ | ||
| 101 | wmb(); | ||
| 114 | 102 | ||
| 115 | /* ring the doorbell with a distinctive value */ | 103 | /* ring the doorbell with a distinctive value */ |
| 116 | EFX_POPULATE_DWORD_1(hdr, EFX_DWORD_0, 0x45789abc); | 104 | _efx_writed(efx, (__force __le32) 0x45789abc, doorbell); |
| 117 | efx_mcdi_writed(efx, &hdr, doorbell); | ||
| 118 | } | 105 | } |
| 119 | 106 | ||
| 120 | static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen) | 107 | static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen) |
| 121 | { | 108 | { |
| 122 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | 109 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 123 | unsigned int pdu = MCDI_PDU(efx); | 110 | unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); |
| 124 | int i; | 111 | int i; |
| 125 | 112 | ||
| 126 | BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); | 113 | BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT); |
| 127 | BUG_ON(outlen & 3 || outlen >= 0x100); | 114 | BUG_ON(outlen & 3 || outlen >= 0x100); |
| 128 | 115 | ||
| 129 | for (i = 0; i < outlen; i += 4) | 116 | for (i = 0; i < outlen; i += 4) |
| 130 | efx_mcdi_readd(efx, (efx_dword_t *)(outbuf + i), pdu + 4 + i); | 117 | *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i); |
| 131 | } | 118 | } |
| 132 | 119 | ||
| 133 | static int efx_mcdi_poll(struct efx_nic *efx) | 120 | static int efx_mcdi_poll(struct efx_nic *efx) |
| @@ -135,7 +122,7 @@ static int efx_mcdi_poll(struct efx_nic *efx) | |||
| 135 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | 122 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); |
| 136 | unsigned int time, finish; | 123 | unsigned int time, finish; |
| 137 | unsigned int respseq, respcmd, error; | 124 | unsigned int respseq, respcmd, error; |
| 138 | unsigned int pdu = MCDI_PDU(efx); | 125 | unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx); |
| 139 | unsigned int rc, spins; | 126 | unsigned int rc, spins; |
| 140 | efx_dword_t reg; | 127 | efx_dword_t reg; |
| 141 | 128 | ||
| @@ -161,7 +148,8 @@ static int efx_mcdi_poll(struct efx_nic *efx) | |||
| 161 | 148 | ||
| 162 | time = get_seconds(); | 149 | time = get_seconds(); |
| 163 | 150 | ||
| 164 | efx_mcdi_readd(efx, ®, pdu); | 151 | rmb(); |
| 152 | efx_readd(efx, ®, pdu); | ||
| 165 | 153 | ||
| 166 | /* All 1's indicates that shared memory is in reset (and is | 154 | /* All 1's indicates that shared memory is in reset (and is |
| 167 | * not a valid header). Wait for it to come out reset before | 155 | * not a valid header). Wait for it to come out reset before |
| @@ -188,7 +176,7 @@ static int efx_mcdi_poll(struct efx_nic *efx) | |||
| 188 | respseq, mcdi->seqno); | 176 | respseq, mcdi->seqno); |
| 189 | rc = EIO; | 177 | rc = EIO; |
| 190 | } else if (error) { | 178 | } else if (error) { |
| 191 | efx_mcdi_readd(efx, ®, pdu + 4); | 179 | efx_readd(efx, ®, pdu + 4); |
| 192 | switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) { | 180 | switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) { |
| 193 | #define TRANSLATE_ERROR(name) \ | 181 | #define TRANSLATE_ERROR(name) \ |
| 194 | case MC_CMD_ERR_ ## name: \ | 182 | case MC_CMD_ERR_ ## name: \ |
| @@ -222,21 +210,21 @@ out: | |||
| 222 | /* Test and clear MC-rebooted flag for this port/function */ | 210 | /* Test and clear MC-rebooted flag for this port/function */ |
| 223 | int efx_mcdi_poll_reboot(struct efx_nic *efx) | 211 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
| 224 | { | 212 | { |
| 225 | unsigned int addr = MCDI_REBOOT_FLAG(efx); | 213 | unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_REBOOT_FLAG(efx); |
| 226 | efx_dword_t reg; | 214 | efx_dword_t reg; |
| 227 | uint32_t value; | 215 | uint32_t value; |
| 228 | 216 | ||
| 229 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) | 217 | if (efx_nic_rev(efx) < EFX_REV_SIENA_A0) |
| 230 | return false; | 218 | return false; |
| 231 | 219 | ||
| 232 | efx_mcdi_readd(efx, ®, addr); | 220 | efx_readd(efx, ®, addr); |
| 233 | value = EFX_DWORD_FIELD(reg, EFX_DWORD_0); | 221 | value = EFX_DWORD_FIELD(reg, EFX_DWORD_0); |
| 234 | 222 | ||
| 235 | if (value == 0) | 223 | if (value == 0) |
| 236 | return 0; | 224 | return 0; |
| 237 | 225 | ||
| 238 | EFX_ZERO_DWORD(reg); | 226 | EFX_ZERO_DWORD(reg); |
| 239 | efx_mcdi_writed(efx, ®, addr); | 227 | efx_writed(efx, ®, addr); |
| 240 | 228 | ||
| 241 | if (value == MC_STATUS_DWORD_ASSERT) | 229 | if (value == MC_STATUS_DWORD_ASSERT) |
| 242 | return -EINTR; | 230 | return -EINTR; |
diff --git a/drivers/net/sfc/nic.c b/drivers/net/sfc/nic.c index bafa23a6874c..3edfbaf5f022 100644 --- a/drivers/net/sfc/nic.c +++ b/drivers/net/sfc/nic.c | |||
| @@ -1936,13 +1936,6 @@ void efx_nic_get_regs(struct efx_nic *efx, void *buf) | |||
| 1936 | 1936 | ||
| 1937 | size = min_t(size_t, table->step, 16); | 1937 | size = min_t(size_t, table->step, 16); |
| 1938 | 1938 | ||
| 1939 | if (table->offset >= efx->type->mem_map_size) { | ||
| 1940 | /* No longer mapped; return dummy data */ | ||
| 1941 | memcpy(buf, "\xde\xc0\xad\xde", 4); | ||
| 1942 | buf += table->rows * size; | ||
| 1943 | continue; | ||
| 1944 | } | ||
| 1945 | |||
| 1946 | for (i = 0; i < table->rows; i++) { | 1939 | for (i = 0; i < table->rows; i++) { |
| 1947 | switch (table->step) { | 1940 | switch (table->step) { |
| 1948 | case 4: /* 32-bit register or SRAM */ | 1941 | case 4: /* 32-bit register or SRAM */ |
diff --git a/drivers/net/sfc/nic.h b/drivers/net/sfc/nic.h index 4bd1f2839dfe..7443f99c977f 100644 --- a/drivers/net/sfc/nic.h +++ b/drivers/net/sfc/nic.h | |||
| @@ -143,12 +143,10 @@ static inline struct falcon_board *falcon_board(struct efx_nic *efx) | |||
| 143 | /** | 143 | /** |
| 144 | * struct siena_nic_data - Siena NIC state | 144 | * struct siena_nic_data - Siena NIC state |
| 145 | * @mcdi: Management-Controller-to-Driver Interface | 145 | * @mcdi: Management-Controller-to-Driver Interface |
| 146 | * @mcdi_smem: MCDI shared memory mapping. The mapping is always uncacheable. | ||
| 147 | * @wol_filter_id: Wake-on-LAN packet filter id | 146 | * @wol_filter_id: Wake-on-LAN packet filter id |
| 148 | */ | 147 | */ |
| 149 | struct siena_nic_data { | 148 | struct siena_nic_data { |
| 150 | struct efx_mcdi_iface mcdi; | 149 | struct efx_mcdi_iface mcdi; |
| 151 | void __iomem *mcdi_smem; | ||
| 152 | int wol_filter_id; | 150 | int wol_filter_id; |
| 153 | }; | 151 | }; |
| 154 | 152 | ||
diff --git a/drivers/net/sfc/siena.c b/drivers/net/sfc/siena.c index 5735e84c69de..2c3bd93fab54 100644 --- a/drivers/net/sfc/siena.c +++ b/drivers/net/sfc/siena.c | |||
| @@ -250,26 +250,12 @@ static int siena_probe_nic(struct efx_nic *efx) | |||
| 250 | efx_reado(efx, ®, FR_AZ_CS_DEBUG); | 250 | efx_reado(efx, ®, FR_AZ_CS_DEBUG); |
| 251 | efx->net_dev->dev_id = EFX_OWORD_FIELD(reg, FRF_CZ_CS_PORT_NUM) - 1; | 251 | efx->net_dev->dev_id = EFX_OWORD_FIELD(reg, FRF_CZ_CS_PORT_NUM) - 1; |
| 252 | 252 | ||
| 253 | /* Initialise MCDI */ | ||
| 254 | nic_data->mcdi_smem = ioremap_nocache(efx->membase_phys + | ||
| 255 | FR_CZ_MC_TREG_SMEM, | ||
| 256 | FR_CZ_MC_TREG_SMEM_STEP * | ||
| 257 | FR_CZ_MC_TREG_SMEM_ROWS); | ||
| 258 | if (!nic_data->mcdi_smem) { | ||
| 259 | netif_err(efx, probe, efx->net_dev, | ||
| 260 | "could not map MCDI at %llx+%x\n", | ||
| 261 | (unsigned long long)efx->membase_phys + | ||
| 262 | FR_CZ_MC_TREG_SMEM, | ||
| 263 | FR_CZ_MC_TREG_SMEM_STEP * FR_CZ_MC_TREG_SMEM_ROWS); | ||
| 264 | rc = -ENOMEM; | ||
| 265 | goto fail1; | ||
| 266 | } | ||
| 267 | efx_mcdi_init(efx); | 253 | efx_mcdi_init(efx); |
| 268 | 254 | ||
| 269 | /* Recover from a failed assertion before probing */ | 255 | /* Recover from a failed assertion before probing */ |
| 270 | rc = efx_mcdi_handle_assertion(efx); | 256 | rc = efx_mcdi_handle_assertion(efx); |
| 271 | if (rc) | 257 | if (rc) |
| 272 | goto fail2; | 258 | goto fail1; |
| 273 | 259 | ||
| 274 | /* Let the BMC know that the driver is now in charge of link and | 260 | /* Let the BMC know that the driver is now in charge of link and |
| 275 | * filter settings. We must do this before we reset the NIC */ | 261 | * filter settings. We must do this before we reset the NIC */ |
| @@ -324,7 +310,6 @@ fail4: | |||
| 324 | fail3: | 310 | fail3: |
| 325 | efx_mcdi_drv_attach(efx, false, NULL); | 311 | efx_mcdi_drv_attach(efx, false, NULL); |
| 326 | fail2: | 312 | fail2: |
| 327 | iounmap(nic_data->mcdi_smem); | ||
| 328 | fail1: | 313 | fail1: |
| 329 | kfree(efx->nic_data); | 314 | kfree(efx->nic_data); |
| 330 | return rc; | 315 | return rc; |
| @@ -404,8 +389,6 @@ static int siena_init_nic(struct efx_nic *efx) | |||
| 404 | 389 | ||
| 405 | static void siena_remove_nic(struct efx_nic *efx) | 390 | static void siena_remove_nic(struct efx_nic *efx) |
| 406 | { | 391 | { |
| 407 | struct siena_nic_data *nic_data = efx->nic_data; | ||
| 408 | |||
| 409 | efx_nic_free_buffer(efx, &efx->irq_status); | 392 | efx_nic_free_buffer(efx, &efx->irq_status); |
| 410 | 393 | ||
| 411 | siena_reset_hw(efx, RESET_TYPE_ALL); | 394 | siena_reset_hw(efx, RESET_TYPE_ALL); |
| @@ -415,8 +398,7 @@ static void siena_remove_nic(struct efx_nic *efx) | |||
| 415 | efx_mcdi_drv_attach(efx, false, NULL); | 398 | efx_mcdi_drv_attach(efx, false, NULL); |
| 416 | 399 | ||
| 417 | /* Tear down the private nic state */ | 400 | /* Tear down the private nic state */ |
| 418 | iounmap(nic_data->mcdi_smem); | 401 | kfree(efx->nic_data); |
| 419 | kfree(nic_data); | ||
| 420 | efx->nic_data = NULL; | 402 | efx->nic_data = NULL; |
| 421 | } | 403 | } |
| 422 | 404 | ||
| @@ -656,7 +638,8 @@ const struct efx_nic_type siena_a0_nic_type = { | |||
| 656 | .default_mac_ops = &efx_mcdi_mac_operations, | 638 | .default_mac_ops = &efx_mcdi_mac_operations, |
| 657 | 639 | ||
| 658 | .revision = EFX_REV_SIENA_A0, | 640 | .revision = EFX_REV_SIENA_A0, |
| 659 | .mem_map_size = FR_CZ_MC_TREG_SMEM, /* MC_TREG_SMEM mapped separately */ | 641 | .mem_map_size = (FR_CZ_MC_TREG_SMEM + |
| 642 | FR_CZ_MC_TREG_SMEM_STEP * FR_CZ_MC_TREG_SMEM_ROWS), | ||
| 660 | .txd_ptr_tbl_base = FR_BZ_TX_DESC_PTR_TBL, | 643 | .txd_ptr_tbl_base = FR_BZ_TX_DESC_PTR_TBL, |
| 661 | .rxd_ptr_tbl_base = FR_BZ_RX_DESC_PTR_TBL, | 644 | .rxd_ptr_tbl_base = FR_BZ_RX_DESC_PTR_TBL, |
| 662 | .buf_tbl_base = FR_BZ_BUF_FULL_TBL, | 645 | .buf_tbl_base = FR_BZ_BUF_FULL_TBL, |
diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h index 99ff11400cef..e4dd3a7f304b 100644 --- a/drivers/net/sfc/workarounds.h +++ b/drivers/net/sfc/workarounds.h | |||
| @@ -38,8 +38,6 @@ | |||
| 38 | #define EFX_WORKAROUND_15783 EFX_WORKAROUND_ALWAYS | 38 | #define EFX_WORKAROUND_15783 EFX_WORKAROUND_ALWAYS |
| 39 | /* Legacy interrupt storm when interrupt fifo fills */ | 39 | /* Legacy interrupt storm when interrupt fifo fills */ |
| 40 | #define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA | 40 | #define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA |
| 41 | /* Write combining and sriov=enabled are incompatible */ | ||
| 42 | #define EFX_WORKAROUND_22643 EFX_WORKAROUND_SIENA | ||
| 43 | 41 | ||
| 44 | /* Spurious parity errors in TSORT buffers */ | 42 | /* Spurious parity errors in TSORT buffers */ |
| 45 | #define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A | 43 | #define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A |
diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c index 15772b1b6a91..13c1f044b40d 100644 --- a/drivers/net/usb/ipheth.c +++ b/drivers/net/usb/ipheth.c | |||
| @@ -59,6 +59,7 @@ | |||
| 59 | #define USB_PRODUCT_IPHONE_3G 0x1292 | 59 | #define USB_PRODUCT_IPHONE_3G 0x1292 |
| 60 | #define USB_PRODUCT_IPHONE_3GS 0x1294 | 60 | #define USB_PRODUCT_IPHONE_3GS 0x1294 |
| 61 | #define USB_PRODUCT_IPHONE_4 0x1297 | 61 | #define USB_PRODUCT_IPHONE_4 0x1297 |
| 62 | #define USB_PRODUCT_IPHONE_4_VZW 0x129c | ||
| 62 | 63 | ||
| 63 | #define IPHETH_USBINTF_CLASS 255 | 64 | #define IPHETH_USBINTF_CLASS 255 |
| 64 | #define IPHETH_USBINTF_SUBCLASS 253 | 65 | #define IPHETH_USBINTF_SUBCLASS 253 |
| @@ -98,6 +99,10 @@ static struct usb_device_id ipheth_table[] = { | |||
| 98 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4, | 99 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4, |
| 99 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, | 100 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, |
| 100 | IPHETH_USBINTF_PROTO) }, | 101 | IPHETH_USBINTF_PROTO) }, |
| 102 | { USB_DEVICE_AND_INTERFACE_INFO( | ||
| 103 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4_VZW, | ||
| 104 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, | ||
| 105 | IPHETH_USBINTF_PROTO) }, | ||
| 101 | { } | 106 | { } |
| 102 | }; | 107 | }; |
| 103 | MODULE_DEVICE_TABLE(usb, ipheth_table); | 108 | MODULE_DEVICE_TABLE(usb, ipheth_table); |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c index 2d4c0910295b..2d394af82171 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c | |||
| @@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah, | |||
| 41 | case ADC_DC_CAL: | 41 | case ADC_DC_CAL: |
| 42 | /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ | 42 | /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ |
| 43 | if (!IS_CHAN_B(chan) && | 43 | if (!IS_CHAN_B(chan) && |
| 44 | !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan))) | 44 | !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) && |
| 45 | IS_CHAN_HT20(chan))) | ||
| 45 | supported = true; | 46 | supported = true; |
| 46 | break; | 47 | break; |
| 47 | } | 48 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 1baca8e4715d..fcafec0605f4 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
| @@ -671,7 +671,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, | |||
| 671 | REG_WRITE_ARRAY(&ah->iniModesAdditional, | 671 | REG_WRITE_ARRAY(&ah->iniModesAdditional, |
| 672 | modesIndex, regWrites); | 672 | modesIndex, regWrites); |
| 673 | 673 | ||
| 674 | if (AR_SREV_9300(ah)) | 674 | if (AR_SREV_9330(ah)) |
| 675 | REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites); | 675 | REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites); |
| 676 | 676 | ||
| 677 | if (AR_SREV_9340(ah) && !ah->is_clk_25mhz) | 677 | if (AR_SREV_9340(ah) && !ah->is_clk_25mhz) |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 6530694a59ae..722967b86cf1 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
| @@ -2303,6 +2303,12 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop) | |||
| 2303 | mutex_lock(&sc->mutex); | 2303 | mutex_lock(&sc->mutex); |
| 2304 | cancel_delayed_work_sync(&sc->tx_complete_work); | 2304 | cancel_delayed_work_sync(&sc->tx_complete_work); |
| 2305 | 2305 | ||
| 2306 | if (ah->ah_flags & AH_UNPLUGGED) { | ||
| 2307 | ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n"); | ||
| 2308 | mutex_unlock(&sc->mutex); | ||
| 2309 | return; | ||
| 2310 | } | ||
| 2311 | |||
| 2306 | if (sc->sc_flags & SC_OP_INVALID) { | 2312 | if (sc->sc_flags & SC_OP_INVALID) { |
| 2307 | ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); | 2313 | ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); |
| 2308 | mutex_unlock(&sc->mutex); | 2314 | mutex_unlock(&sc->mutex); |
diff --git a/drivers/net/wireless/iwlegacy/iwl-3945-rs.c b/drivers/net/wireless/iwlegacy/iwl-3945-rs.c index 977bd2477c6a..164bcae821f8 100644 --- a/drivers/net/wireless/iwlegacy/iwl-3945-rs.c +++ b/drivers/net/wireless/iwlegacy/iwl-3945-rs.c | |||
| @@ -822,12 +822,15 @@ static void iwl3945_rs_get_rate(void *priv_r, struct ieee80211_sta *sta, | |||
| 822 | 822 | ||
| 823 | out: | 823 | out: |
| 824 | 824 | ||
| 825 | rs_sta->last_txrate_idx = index; | 825 | if (sband->band == IEEE80211_BAND_5GHZ) { |
| 826 | if (sband->band == IEEE80211_BAND_5GHZ) | 826 | if (WARN_ON_ONCE(index < IWL_FIRST_OFDM_RATE)) |
| 827 | info->control.rates[0].idx = rs_sta->last_txrate_idx - | 827 | index = IWL_FIRST_OFDM_RATE; |
| 828 | IWL_FIRST_OFDM_RATE; | 828 | rs_sta->last_txrate_idx = index; |
| 829 | else | 829 | info->control.rates[0].idx = index - IWL_FIRST_OFDM_RATE; |
| 830 | } else { | ||
| 831 | rs_sta->last_txrate_idx = index; | ||
| 830 | info->control.rates[0].idx = rs_sta->last_txrate_idx; | 832 | info->control.rates[0].idx = rs_sta->last_txrate_idx; |
| 833 | } | ||
| 831 | 834 | ||
| 832 | IWL_DEBUG_RATE(priv, "leave: %d\n", index); | 835 | IWL_DEBUG_RATE(priv, "leave: %d\n", index); |
| 833 | } | 836 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c index a895a099d086..56211006a182 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c | |||
| @@ -167,7 +167,7 @@ static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv) | |||
| 167 | 167 | ||
| 168 | memset(&cmd, 0, sizeof(cmd)); | 168 | memset(&cmd, 0, sizeof(cmd)); |
| 169 | iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); | 169 | iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); |
| 170 | memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib)); | 170 | memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib)); |
| 171 | if (!(cmd.radio_sensor_offset)) | 171 | if (!(cmd.radio_sensor_offset)) |
| 172 | cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; | 172 | cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; |
| 173 | 173 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c index a6b2b1db0b1d..222d410c586e 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c +++ b/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c | |||
| @@ -771,6 +771,8 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
| 771 | cmd = txq->cmd[cmd_index]; | 771 | cmd = txq->cmd[cmd_index]; |
| 772 | meta = &txq->meta[cmd_index]; | 772 | meta = &txq->meta[cmd_index]; |
| 773 | 773 | ||
| 774 | txq->time_stamp = jiffies; | ||
| 775 | |||
| 774 | iwlagn_unmap_tfd(priv, meta, &txq->tfds[index], DMA_BIDIRECTIONAL); | 776 | iwlagn_unmap_tfd(priv, meta, &txq->tfds[index], DMA_BIDIRECTIONAL); |
| 775 | 777 | ||
| 776 | /* Input error checking is done when commands are added to queue. */ | 778 | /* Input error checking is done when commands are added to queue. */ |
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c index 1bdc1aa305c0..04c4e9eb6ee6 100644 --- a/drivers/net/wireless/rtlwifi/core.c +++ b/drivers/net/wireless/rtlwifi/core.c | |||
| @@ -610,6 +610,11 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw, | |||
| 610 | 610 | ||
| 611 | mac->link_state = MAC80211_NOLINK; | 611 | mac->link_state = MAC80211_NOLINK; |
| 612 | memset(mac->bssid, 0, 6); | 612 | memset(mac->bssid, 0, 6); |
| 613 | |||
| 614 | /* reset sec info */ | ||
| 615 | rtl_cam_reset_sec_info(hw); | ||
| 616 | |||
| 617 | rtl_cam_reset_all_entry(hw); | ||
| 613 | mac->vendor = PEER_UNKNOWN; | 618 | mac->vendor = PEER_UNKNOWN; |
| 614 | 619 | ||
| 615 | RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, | 620 | RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, |
| @@ -1063,6 +1068,9 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
| 1063 | *or clear all entry here. | 1068 | *or clear all entry here. |
| 1064 | */ | 1069 | */ |
| 1065 | rtl_cam_delete_one_entry(hw, mac_addr, key_idx); | 1070 | rtl_cam_delete_one_entry(hw, mac_addr, key_idx); |
| 1071 | |||
| 1072 | rtl_cam_reset_sec_info(hw); | ||
| 1073 | |||
| 1066 | break; | 1074 | break; |
| 1067 | default: | 1075 | default: |
| 1068 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 1076 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c index 906e7aa55bc3..3e52a5496224 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c | |||
| @@ -549,15 +549,16 @@ void rtl92cu_tx_fill_desc(struct ieee80211_hw *hw, | |||
| 549 | (tcb_desc->rts_use_shortpreamble ? 1 : 0) | 549 | (tcb_desc->rts_use_shortpreamble ? 1 : 0) |
| 550 | : (tcb_desc->rts_use_shortgi ? 1 : 0))); | 550 | : (tcb_desc->rts_use_shortgi ? 1 : 0))); |
| 551 | if (mac->bw_40) { | 551 | if (mac->bw_40) { |
| 552 | if (tcb_desc->packet_bw) { | 552 | if (rate_flag & IEEE80211_TX_RC_DUP_DATA) { |
| 553 | SET_TX_DESC_DATA_BW(txdesc, 1); | 553 | SET_TX_DESC_DATA_BW(txdesc, 1); |
| 554 | SET_TX_DESC_DATA_SC(txdesc, 3); | 554 | SET_TX_DESC_DATA_SC(txdesc, 3); |
| 555 | } else if(rate_flag & IEEE80211_TX_RC_40_MHZ_WIDTH){ | ||
| 556 | SET_TX_DESC_DATA_BW(txdesc, 1); | ||
| 557 | SET_TX_DESC_DATA_SC(txdesc, mac->cur_40_prime_sc); | ||
| 555 | } else { | 558 | } else { |
| 556 | SET_TX_DESC_DATA_BW(txdesc, 0); | 559 | SET_TX_DESC_DATA_BW(txdesc, 0); |
| 557 | if (rate_flag & IEEE80211_TX_RC_DUP_DATA) | 560 | SET_TX_DESC_DATA_SC(txdesc, 0); |
| 558 | SET_TX_DESC_DATA_SC(txdesc, | 561 | } |
| 559 | mac->cur_40_prime_sc); | ||
| 560 | } | ||
| 561 | } else { | 562 | } else { |
| 562 | SET_TX_DESC_DATA_BW(txdesc, 0); | 563 | SET_TX_DESC_DATA_BW(txdesc, 0); |
| 563 | SET_TX_DESC_DATA_SC(txdesc, 0); | 564 | SET_TX_DESC_DATA_SC(txdesc, 0); |
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c index 753b21aaea61..3ffd9c1acc0a 100644 --- a/drivers/pci/hotplug/pcihp_slot.c +++ b/drivers/pci/hotplug/pcihp_slot.c | |||
| @@ -169,7 +169,9 @@ void pci_configure_slot(struct pci_dev *dev) | |||
| 169 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) | 169 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI))) |
| 170 | return; | 170 | return; |
| 171 | 171 | ||
| 172 | pcie_bus_configure_settings(dev->bus, dev->bus->self->pcie_mpss); | 172 | if (dev->bus && dev->bus->self) |
| 173 | pcie_bus_configure_settings(dev->bus, | ||
| 174 | dev->bus->self->pcie_mpss); | ||
| 173 | 175 | ||
| 174 | memset(&hpp, 0, sizeof(hpp)); | 176 | memset(&hpp, 0, sizeof(hpp)); |
| 175 | ret = pci_get_hp_params(dev, &hpp); | 177 | ret = pci_get_hp_params(dev, &hpp); |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0ce67423a0a3..4e84fd4a4312 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
| @@ -77,7 +77,7 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE; | |||
| 77 | unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE; | 77 | unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE; |
| 78 | unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE; | 78 | unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE; |
| 79 | 79 | ||
| 80 | enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_PERFORMANCE; | 80 | enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_SAFE; |
| 81 | 81 | ||
| 82 | /* | 82 | /* |
| 83 | * The default CLS is used if arch didn't set CLS explicitly and not | 83 | * The default CLS is used if arch didn't set CLS explicitly and not |
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 8473727b29fa..f3f94a5c068f 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
| @@ -1351,7 +1351,8 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data) | |||
| 1351 | * will occur as normal. | 1351 | * will occur as normal. |
| 1352 | */ | 1352 | */ |
| 1353 | if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) || | 1353 | if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) || |
| 1354 | dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT)) | 1354 | (dev->bus->self && |
| 1355 | dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT))) | ||
| 1355 | *smpss = 0; | 1356 | *smpss = 0; |
| 1356 | 1357 | ||
| 1357 | if (*smpss > dev->pcie_mpss) | 1358 | if (*smpss > dev->pcie_mpss) |
| @@ -1396,34 +1397,37 @@ static void pcie_write_mps(struct pci_dev *dev, int mps) | |||
| 1396 | 1397 | ||
| 1397 | static void pcie_write_mrrs(struct pci_dev *dev, int mps) | 1398 | static void pcie_write_mrrs(struct pci_dev *dev, int mps) |
| 1398 | { | 1399 | { |
| 1399 | int rc, mrrs; | 1400 | int rc, mrrs, dev_mpss; |
| 1400 | 1401 | ||
| 1401 | if (pcie_bus_config == PCIE_BUS_PERFORMANCE) { | 1402 | /* In the "safe" case, do not configure the MRRS. There appear to be |
| 1402 | int dev_mpss = 128 << dev->pcie_mpss; | 1403 | * issues with setting MRRS to 0 on a number of devices. |
| 1404 | */ | ||
| 1403 | 1405 | ||
| 1404 | /* For Max performance, the MRRS must be set to the largest | 1406 | if (pcie_bus_config != PCIE_BUS_PERFORMANCE) |
| 1405 | * supported value. However, it cannot be configured larger | 1407 | return; |
| 1406 | * than the MPS the device or the bus can support. This assumes | ||
| 1407 | * that the largest MRRS available on the device cannot be | ||
| 1408 | * smaller than the device MPSS. | ||
| 1409 | */ | ||
| 1410 | mrrs = mps < dev_mpss ? mps : dev_mpss; | ||
| 1411 | } else | ||
| 1412 | /* In the "safe" case, configure the MRRS for fairness on the | ||
| 1413 | * bus by making all devices have the same size | ||
| 1414 | */ | ||
| 1415 | mrrs = mps; | ||
| 1416 | 1408 | ||
| 1409 | dev_mpss = 128 << dev->pcie_mpss; | ||
| 1410 | |||
| 1411 | /* For Max performance, the MRRS must be set to the largest supported | ||
| 1412 | * value. However, it cannot be configured larger than the MPS the | ||
| 1413 | * device or the bus can support. This assumes that the largest MRRS | ||
| 1414 | * available on the device cannot be smaller than the device MPSS. | ||
| 1415 | */ | ||
| 1416 | mrrs = min(mps, dev_mpss); | ||
| 1417 | 1417 | ||
| 1418 | /* MRRS is a R/W register. Invalid values can be written, but a | 1418 | /* MRRS is a R/W register. Invalid values can be written, but a |
| 1419 | * subsiquent read will verify if the value is acceptable or not. | 1419 | * subsequent read will verify if the value is acceptable or not. |
| 1420 | * If the MRRS value provided is not acceptable (e.g., too large), | 1420 | * If the MRRS value provided is not acceptable (e.g., too large), |
| 1421 | * shrink the value until it is acceptable to the HW. | 1421 | * shrink the value until it is acceptable to the HW. |
| 1422 | */ | 1422 | */ |
| 1423 | while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) { | 1423 | while (mrrs != pcie_get_readrq(dev) && mrrs >= 128) { |
| 1424 | dev_warn(&dev->dev, "Attempting to modify the PCI-E MRRS value" | ||
| 1425 | " to %d. If any issues are encountered, please try " | ||
| 1426 | "running with pci=pcie_bus_safe\n", mrrs); | ||
| 1424 | rc = pcie_set_readrq(dev, mrrs); | 1427 | rc = pcie_set_readrq(dev, mrrs); |
| 1425 | if (rc) | 1428 | if (rc) |
| 1426 | dev_err(&dev->dev, "Failed attempting to set the MRRS\n"); | 1429 | dev_err(&dev->dev, |
| 1430 | "Failed attempting to set the MRRS\n"); | ||
| 1427 | 1431 | ||
| 1428 | mrrs /= 2; | 1432 | mrrs /= 2; |
| 1429 | } | 1433 | } |
| @@ -1436,13 +1440,13 @@ static int pcie_bus_configure_set(struct pci_dev *dev, void *data) | |||
| 1436 | if (!pci_is_pcie(dev)) | 1440 | if (!pci_is_pcie(dev)) |
| 1437 | return 0; | 1441 | return 0; |
| 1438 | 1442 | ||
| 1439 | dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", | 1443 | dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", |
| 1440 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); | 1444 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); |
| 1441 | 1445 | ||
| 1442 | pcie_write_mps(dev, mps); | 1446 | pcie_write_mps(dev, mps); |
| 1443 | pcie_write_mrrs(dev, mps); | 1447 | pcie_write_mrrs(dev, mps); |
| 1444 | 1448 | ||
| 1445 | dev_info(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", | 1449 | dev_dbg(&dev->dev, "Dev MPS %d MPSS %d MRRS %d\n", |
| 1446 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); | 1450 | pcie_get_mps(dev), 128<<dev->pcie_mpss, pcie_get_readrq(dev)); |
| 1447 | 1451 | ||
| 1448 | return 0; | 1452 | return 0; |
| @@ -1456,9 +1460,6 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss) | |||
| 1456 | { | 1460 | { |
| 1457 | u8 smpss = mpss; | 1461 | u8 smpss = mpss; |
| 1458 | 1462 | ||
| 1459 | if (!bus->self) | ||
| 1460 | return; | ||
| 1461 | |||
| 1462 | if (!pci_is_pcie(bus->self)) | 1463 | if (!pci_is_pcie(bus->self)) |
| 1463 | return; | 1464 | return; |
| 1464 | 1465 | ||
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c index 335551d333b2..14a42a1edc66 100644 --- a/drivers/rtc/rtc-ep93xx.c +++ b/drivers/rtc/rtc-ep93xx.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | */ | 36 | */ |
| 37 | struct ep93xx_rtc { | 37 | struct ep93xx_rtc { |
| 38 | void __iomem *mmio_base; | 38 | void __iomem *mmio_base; |
| 39 | struct rtc_device *rtc; | ||
| 39 | }; | 40 | }; |
| 40 | 41 | ||
| 41 | static int ep93xx_rtc_get_swcomp(struct device *dev, unsigned short *preload, | 42 | static int ep93xx_rtc_get_swcomp(struct device *dev, unsigned short *preload, |
| @@ -130,7 +131,6 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
| 130 | { | 131 | { |
| 131 | struct ep93xx_rtc *ep93xx_rtc; | 132 | struct ep93xx_rtc *ep93xx_rtc; |
| 132 | struct resource *res; | 133 | struct resource *res; |
| 133 | struct rtc_device *rtc; | ||
| 134 | int err; | 134 | int err; |
| 135 | 135 | ||
| 136 | ep93xx_rtc = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_rtc), GFP_KERNEL); | 136 | ep93xx_rtc = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_rtc), GFP_KERNEL); |
| @@ -151,12 +151,12 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
| 151 | return -ENXIO; | 151 | return -ENXIO; |
| 152 | 152 | ||
| 153 | pdev->dev.platform_data = ep93xx_rtc; | 153 | pdev->dev.platform_data = ep93xx_rtc; |
| 154 | platform_set_drvdata(pdev, rtc); | 154 | platform_set_drvdata(pdev, ep93xx_rtc); |
| 155 | 155 | ||
| 156 | rtc = rtc_device_register(pdev->name, | 156 | ep93xx_rtc->rtc = rtc_device_register(pdev->name, |
| 157 | &pdev->dev, &ep93xx_rtc_ops, THIS_MODULE); | 157 | &pdev->dev, &ep93xx_rtc_ops, THIS_MODULE); |
| 158 | if (IS_ERR(rtc)) { | 158 | if (IS_ERR(ep93xx_rtc->rtc)) { |
| 159 | err = PTR_ERR(rtc); | 159 | err = PTR_ERR(ep93xx_rtc->rtc); |
| 160 | goto exit; | 160 | goto exit; |
| 161 | } | 161 | } |
| 162 | 162 | ||
| @@ -167,7 +167,7 @@ static int __init ep93xx_rtc_probe(struct platform_device *pdev) | |||
| 167 | return 0; | 167 | return 0; |
| 168 | 168 | ||
| 169 | fail: | 169 | fail: |
| 170 | rtc_device_unregister(rtc); | 170 | rtc_device_unregister(ep93xx_rtc->rtc); |
| 171 | exit: | 171 | exit: |
| 172 | platform_set_drvdata(pdev, NULL); | 172 | platform_set_drvdata(pdev, NULL); |
| 173 | pdev->dev.platform_data = NULL; | 173 | pdev->dev.platform_data = NULL; |
| @@ -176,11 +176,11 @@ exit: | |||
| 176 | 176 | ||
| 177 | static int __exit ep93xx_rtc_remove(struct platform_device *pdev) | 177 | static int __exit ep93xx_rtc_remove(struct platform_device *pdev) |
| 178 | { | 178 | { |
| 179 | struct rtc_device *rtc = platform_get_drvdata(pdev); | 179 | struct ep93xx_rtc *ep93xx_rtc = platform_get_drvdata(pdev); |
| 180 | 180 | ||
| 181 | sysfs_remove_group(&pdev->dev.kobj, &ep93xx_rtc_sysfs_files); | 181 | sysfs_remove_group(&pdev->dev.kobj, &ep93xx_rtc_sysfs_files); |
| 182 | platform_set_drvdata(pdev, NULL); | 182 | platform_set_drvdata(pdev, NULL); |
| 183 | rtc_device_unregister(rtc); | 183 | rtc_device_unregister(ep93xx_rtc->rtc); |
| 184 | pdev->dev.platform_data = NULL; | 184 | pdev->dev.platform_data = NULL; |
| 185 | 185 | ||
| 186 | return 0; | 186 | return 0; |
diff --git a/drivers/rtc/rtc-imxdi.c b/drivers/rtc/rtc-imxdi.c index 2dd3c0163272..d93a9608b1f0 100644 --- a/drivers/rtc/rtc-imxdi.c +++ b/drivers/rtc/rtc-imxdi.c | |||
| @@ -35,6 +35,7 @@ | |||
| 35 | #include <linux/module.h> | 35 | #include <linux/module.h> |
| 36 | #include <linux/platform_device.h> | 36 | #include <linux/platform_device.h> |
| 37 | #include <linux/rtc.h> | 37 | #include <linux/rtc.h> |
| 38 | #include <linux/sched.h> | ||
| 38 | #include <linux/workqueue.h> | 39 | #include <linux/workqueue.h> |
| 39 | 40 | ||
| 40 | /* DryIce Register Definitions */ | 41 | /* DryIce Register Definitions */ |
diff --git a/drivers/rtc/rtc-lib.c b/drivers/rtc/rtc-lib.c index 075f1708deae..c4cf05731118 100644 --- a/drivers/rtc/rtc-lib.c +++ b/drivers/rtc/rtc-lib.c | |||
| @@ -85,6 +85,8 @@ void rtc_time_to_tm(unsigned long time, struct rtc_time *tm) | |||
| 85 | time -= tm->tm_hour * 3600; | 85 | time -= tm->tm_hour * 3600; |
| 86 | tm->tm_min = time / 60; | 86 | tm->tm_min = time / 60; |
| 87 | tm->tm_sec = time - tm->tm_min * 60; | 87 | tm->tm_sec = time - tm->tm_min * 60; |
| 88 | |||
| 89 | tm->tm_isdst = 0; | ||
| 88 | } | 90 | } |
| 89 | EXPORT_SYMBOL(rtc_time_to_tm); | 91 | EXPORT_SYMBOL(rtc_time_to_tm); |
| 90 | 92 | ||
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index 4e7c04e773e0..7639ab906f02 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c | |||
| @@ -51,6 +51,27 @@ static enum s3c_cpu_type s3c_rtc_cpu_type; | |||
| 51 | 51 | ||
| 52 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | 52 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); |
| 53 | 53 | ||
| 54 | static void s3c_rtc_alarm_clk_enable(bool enable) | ||
| 55 | { | ||
| 56 | static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock); | ||
| 57 | static bool alarm_clk_enabled; | ||
| 58 | unsigned long irq_flags; | ||
| 59 | |||
| 60 | spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags); | ||
| 61 | if (enable) { | ||
| 62 | if (!alarm_clk_enabled) { | ||
| 63 | clk_enable(rtc_clk); | ||
| 64 | alarm_clk_enabled = true; | ||
| 65 | } | ||
| 66 | } else { | ||
| 67 | if (alarm_clk_enabled) { | ||
| 68 | clk_disable(rtc_clk); | ||
| 69 | alarm_clk_enabled = false; | ||
| 70 | } | ||
| 71 | } | ||
| 72 | spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags); | ||
| 73 | } | ||
| 74 | |||
| 54 | /* IRQ Handlers */ | 75 | /* IRQ Handlers */ |
| 55 | 76 | ||
| 56 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) | 77 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
| @@ -64,6 +85,9 @@ static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) | |||
| 64 | writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); | 85 | writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); |
| 65 | 86 | ||
| 66 | clk_disable(rtc_clk); | 87 | clk_disable(rtc_clk); |
| 88 | |||
| 89 | s3c_rtc_alarm_clk_enable(false); | ||
| 90 | |||
| 67 | return IRQ_HANDLED; | 91 | return IRQ_HANDLED; |
| 68 | } | 92 | } |
| 69 | 93 | ||
| @@ -97,6 +121,8 @@ static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) | |||
| 97 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); | 121 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
| 98 | clk_disable(rtc_clk); | 122 | clk_disable(rtc_clk); |
| 99 | 123 | ||
| 124 | s3c_rtc_alarm_clk_enable(enabled); | ||
| 125 | |||
| 100 | return 0; | 126 | return 0; |
| 101 | } | 127 | } |
| 102 | 128 | ||
diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c index 9a81f778d6b2..20687d55e7a7 100644 --- a/drivers/rtc/rtc-twl.c +++ b/drivers/rtc/rtc-twl.c | |||
| @@ -362,14 +362,6 @@ static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) | |||
| 362 | int res; | 362 | int res; |
| 363 | u8 rd_reg; | 363 | u8 rd_reg; |
| 364 | 364 | ||
| 365 | #ifdef CONFIG_LOCKDEP | ||
| 366 | /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which | ||
| 367 | * we don't want and can't tolerate. Although it might be | ||
| 368 | * friendlier not to borrow this thread context... | ||
| 369 | */ | ||
| 370 | local_irq_enable(); | ||
| 371 | #endif | ||
| 372 | |||
| 373 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 365 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
| 374 | if (res) | 366 | if (res) |
| 375 | goto out; | 367 | goto out; |
| @@ -428,24 +420,12 @@ static struct rtc_class_ops twl_rtc_ops = { | |||
| 428 | static int __devinit twl_rtc_probe(struct platform_device *pdev) | 420 | static int __devinit twl_rtc_probe(struct platform_device *pdev) |
| 429 | { | 421 | { |
| 430 | struct rtc_device *rtc; | 422 | struct rtc_device *rtc; |
| 431 | int ret = 0; | 423 | int ret = -EINVAL; |
| 432 | int irq = platform_get_irq(pdev, 0); | 424 | int irq = platform_get_irq(pdev, 0); |
| 433 | u8 rd_reg; | 425 | u8 rd_reg; |
| 434 | 426 | ||
| 435 | if (irq <= 0) | 427 | if (irq <= 0) |
| 436 | return -EINVAL; | 428 | goto out1; |
| 437 | |||
| 438 | rtc = rtc_device_register(pdev->name, | ||
| 439 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
| 440 | if (IS_ERR(rtc)) { | ||
| 441 | ret = PTR_ERR(rtc); | ||
| 442 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
| 443 | PTR_ERR(rtc)); | ||
| 444 | goto out0; | ||
| 445 | |||
| 446 | } | ||
| 447 | |||
| 448 | platform_set_drvdata(pdev, rtc); | ||
| 449 | 429 | ||
| 450 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | 430 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
| 451 | if (ret < 0) | 431 | if (ret < 0) |
| @@ -462,14 +442,6 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | |||
| 462 | if (ret < 0) | 442 | if (ret < 0) |
| 463 | goto out1; | 443 | goto out1; |
| 464 | 444 | ||
| 465 | ret = request_irq(irq, twl_rtc_interrupt, | ||
| 466 | IRQF_TRIGGER_RISING, | ||
| 467 | dev_name(&rtc->dev), rtc); | ||
| 468 | if (ret < 0) { | ||
| 469 | dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
| 470 | goto out1; | ||
| 471 | } | ||
| 472 | |||
| 473 | if (twl_class_is_6030()) { | 445 | if (twl_class_is_6030()) { |
| 474 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, | 446 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
| 475 | REG_INT_MSK_LINE_A); | 447 | REG_INT_MSK_LINE_A); |
| @@ -480,28 +452,44 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | |||
| 480 | /* Check RTC module status, Enable if it is off */ | 452 | /* Check RTC module status, Enable if it is off */ |
| 481 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); | 453 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); |
| 482 | if (ret < 0) | 454 | if (ret < 0) |
| 483 | goto out2; | 455 | goto out1; |
| 484 | 456 | ||
| 485 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { | 457 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { |
| 486 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); | 458 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); |
| 487 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; | 459 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; |
| 488 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); | 460 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); |
| 489 | if (ret < 0) | 461 | if (ret < 0) |
| 490 | goto out2; | 462 | goto out1; |
| 491 | } | 463 | } |
| 492 | 464 | ||
| 493 | /* init cached IRQ enable bits */ | 465 | /* init cached IRQ enable bits */ |
| 494 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); | 466 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); |
| 495 | if (ret < 0) | 467 | if (ret < 0) |
| 468 | goto out1; | ||
| 469 | |||
| 470 | rtc = rtc_device_register(pdev->name, | ||
| 471 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
| 472 | if (IS_ERR(rtc)) { | ||
| 473 | ret = PTR_ERR(rtc); | ||
| 474 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
| 475 | PTR_ERR(rtc)); | ||
| 476 | goto out1; | ||
| 477 | } | ||
| 478 | |||
| 479 | ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, | ||
| 480 | IRQF_TRIGGER_RISING, | ||
| 481 | dev_name(&rtc->dev), rtc); | ||
| 482 | if (ret < 0) { | ||
| 483 | dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
| 496 | goto out2; | 484 | goto out2; |
| 485 | } | ||
| 497 | 486 | ||
| 498 | return ret; | 487 | platform_set_drvdata(pdev, rtc); |
| 488 | return 0; | ||
| 499 | 489 | ||
| 500 | out2: | 490 | out2: |
| 501 | free_irq(irq, rtc); | ||
| 502 | out1: | ||
| 503 | rtc_device_unregister(rtc); | 491 | rtc_device_unregister(rtc); |
| 504 | out0: | 492 | out1: |
| 505 | return ret; | 493 | return ret; |
| 506 | } | 494 | } |
| 507 | 495 | ||
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index 9ae80cd5953b..dba72a4e6a1c 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c | |||
| @@ -563,7 +563,7 @@ int bnx2i_send_iscsi_nopout(struct bnx2i_conn *bnx2i_conn, | |||
| 563 | nopout_wqe->itt = ((u16)task->itt | | 563 | nopout_wqe->itt = ((u16)task->itt | |
| 564 | (ISCSI_TASK_TYPE_MPATH << | 564 | (ISCSI_TASK_TYPE_MPATH << |
| 565 | ISCSI_TMF_REQUEST_TYPE_SHIFT)); | 565 | ISCSI_TMF_REQUEST_TYPE_SHIFT)); |
| 566 | nopout_wqe->ttt = nopout_hdr->ttt; | 566 | nopout_wqe->ttt = be32_to_cpu(nopout_hdr->ttt); |
| 567 | nopout_wqe->flags = 0; | 567 | nopout_wqe->flags = 0; |
| 568 | if (!unsol) | 568 | if (!unsol) |
| 569 | nopout_wqe->flags = ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION; | 569 | nopout_wqe->flags = ISCSI_NOP_OUT_REQUEST_LOCAL_COMPLETION; |
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c index ba710e350ac5..5d0e9a24ae94 100644 --- a/drivers/scsi/fcoe/fcoe.c +++ b/drivers/scsi/fcoe/fcoe.c | |||
| @@ -432,6 +432,8 @@ void fcoe_interface_cleanup(struct fcoe_interface *fcoe) | |||
| 432 | u8 flogi_maddr[ETH_ALEN]; | 432 | u8 flogi_maddr[ETH_ALEN]; |
| 433 | const struct net_device_ops *ops; | 433 | const struct net_device_ops *ops; |
| 434 | 434 | ||
| 435 | rtnl_lock(); | ||
| 436 | |||
| 435 | /* | 437 | /* |
| 436 | * Don't listen for Ethernet packets anymore. | 438 | * Don't listen for Ethernet packets anymore. |
| 437 | * synchronize_net() ensures that the packet handlers are not running | 439 | * synchronize_net() ensures that the packet handlers are not running |
| @@ -461,6 +463,8 @@ void fcoe_interface_cleanup(struct fcoe_interface *fcoe) | |||
| 461 | " specific feature for LLD.\n"); | 463 | " specific feature for LLD.\n"); |
| 462 | } | 464 | } |
| 463 | 465 | ||
| 466 | rtnl_unlock(); | ||
| 467 | |||
| 464 | /* Release the self-reference taken during fcoe_interface_create() */ | 468 | /* Release the self-reference taken during fcoe_interface_create() */ |
| 465 | fcoe_interface_put(fcoe); | 469 | fcoe_interface_put(fcoe); |
| 466 | } | 470 | } |
| @@ -1951,11 +1955,8 @@ static void fcoe_destroy_work(struct work_struct *work) | |||
| 1951 | fcoe_if_destroy(port->lport); | 1955 | fcoe_if_destroy(port->lport); |
| 1952 | 1956 | ||
| 1953 | /* Do not tear down the fcoe interface for NPIV port */ | 1957 | /* Do not tear down the fcoe interface for NPIV port */ |
| 1954 | if (!npiv) { | 1958 | if (!npiv) |
| 1955 | rtnl_lock(); | ||
| 1956 | fcoe_interface_cleanup(fcoe); | 1959 | fcoe_interface_cleanup(fcoe); |
| 1957 | rtnl_unlock(); | ||
| 1958 | } | ||
| 1959 | 1960 | ||
| 1960 | mutex_unlock(&fcoe_config_mutex); | 1961 | mutex_unlock(&fcoe_config_mutex); |
| 1961 | } | 1962 | } |
| @@ -2009,8 +2010,9 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode) | |||
| 2009 | printk(KERN_ERR "fcoe: Failed to create interface (%s)\n", | 2010 | printk(KERN_ERR "fcoe: Failed to create interface (%s)\n", |
| 2010 | netdev->name); | 2011 | netdev->name); |
| 2011 | rc = -EIO; | 2012 | rc = -EIO; |
| 2013 | rtnl_unlock(); | ||
| 2012 | fcoe_interface_cleanup(fcoe); | 2014 | fcoe_interface_cleanup(fcoe); |
| 2013 | goto out_nodev; | 2015 | goto out_nortnl; |
| 2014 | } | 2016 | } |
| 2015 | 2017 | ||
| 2016 | /* Make this the "master" N_Port */ | 2018 | /* Make this the "master" N_Port */ |
| @@ -2027,6 +2029,7 @@ static int fcoe_create(struct net_device *netdev, enum fip_state fip_mode) | |||
| 2027 | 2029 | ||
| 2028 | out_nodev: | 2030 | out_nodev: |
| 2029 | rtnl_unlock(); | 2031 | rtnl_unlock(); |
| 2032 | out_nortnl: | ||
| 2030 | mutex_unlock(&fcoe_config_mutex); | 2033 | mutex_unlock(&fcoe_config_mutex); |
| 2031 | return rc; | 2034 | return rc; |
| 2032 | } | 2035 | } |
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c index ec61bdb833ac..b200b736b000 100644 --- a/drivers/scsi/hpsa.c +++ b/drivers/scsi/hpsa.c | |||
| @@ -676,6 +676,16 @@ static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, | |||
| 676 | BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA); | 676 | BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA); |
| 677 | removed[*nremoved] = h->dev[entry]; | 677 | removed[*nremoved] = h->dev[entry]; |
| 678 | (*nremoved)++; | 678 | (*nremoved)++; |
| 679 | |||
| 680 | /* | ||
| 681 | * New physical devices won't have target/lun assigned yet | ||
| 682 | * so we need to preserve the values in the slot we are replacing. | ||
| 683 | */ | ||
| 684 | if (new_entry->target == -1) { | ||
| 685 | new_entry->target = h->dev[entry]->target; | ||
| 686 | new_entry->lun = h->dev[entry]->lun; | ||
| 687 | } | ||
| 688 | |||
| 679 | h->dev[entry] = new_entry; | 689 | h->dev[entry] = new_entry; |
| 680 | added[*nadded] = new_entry; | 690 | added[*nadded] = new_entry; |
| 681 | (*nadded)++; | 691 | (*nadded)++; |
| @@ -1548,10 +1558,17 @@ static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, | |||
| 1548 | } | 1558 | } |
| 1549 | 1559 | ||
| 1550 | static int hpsa_update_device_info(struct ctlr_info *h, | 1560 | static int hpsa_update_device_info(struct ctlr_info *h, |
| 1551 | unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device) | 1561 | unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, |
| 1562 | unsigned char *is_OBDR_device) | ||
| 1552 | { | 1563 | { |
| 1553 | #define OBDR_TAPE_INQ_SIZE 49 | 1564 | |
| 1565 | #define OBDR_SIG_OFFSET 43 | ||
| 1566 | #define OBDR_TAPE_SIG "$DR-10" | ||
| 1567 | #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) | ||
| 1568 | #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) | ||
| 1569 | |||
| 1554 | unsigned char *inq_buff; | 1570 | unsigned char *inq_buff; |
| 1571 | unsigned char *obdr_sig; | ||
| 1555 | 1572 | ||
| 1556 | inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); | 1573 | inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); |
| 1557 | if (!inq_buff) | 1574 | if (!inq_buff) |
| @@ -1583,6 +1600,16 @@ static int hpsa_update_device_info(struct ctlr_info *h, | |||
| 1583 | else | 1600 | else |
| 1584 | this_device->raid_level = RAID_UNKNOWN; | 1601 | this_device->raid_level = RAID_UNKNOWN; |
| 1585 | 1602 | ||
| 1603 | if (is_OBDR_device) { | ||
| 1604 | /* See if this is a One-Button-Disaster-Recovery device | ||
| 1605 | * by looking for "$DR-10" at offset 43 in inquiry data. | ||
| 1606 | */ | ||
| 1607 | obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; | ||
| 1608 | *is_OBDR_device = (this_device->devtype == TYPE_ROM && | ||
| 1609 | strncmp(obdr_sig, OBDR_TAPE_SIG, | ||
| 1610 | OBDR_SIG_LEN) == 0); | ||
| 1611 | } | ||
| 1612 | |||
| 1586 | kfree(inq_buff); | 1613 | kfree(inq_buff); |
| 1587 | return 0; | 1614 | return 0; |
| 1588 | 1615 | ||
| @@ -1716,7 +1743,7 @@ static int add_msa2xxx_enclosure_device(struct ctlr_info *h, | |||
| 1716 | return 0; | 1743 | return 0; |
| 1717 | } | 1744 | } |
| 1718 | 1745 | ||
| 1719 | if (hpsa_update_device_info(h, scsi3addr, this_device)) | 1746 | if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) |
| 1720 | return 0; | 1747 | return 0; |
| 1721 | (*nmsa2xxx_enclosures)++; | 1748 | (*nmsa2xxx_enclosures)++; |
| 1722 | hpsa_set_bus_target_lun(this_device, bus, target, 0); | 1749 | hpsa_set_bus_target_lun(this_device, bus, target, 0); |
| @@ -1808,7 +1835,6 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1808 | */ | 1835 | */ |
| 1809 | struct ReportLUNdata *physdev_list = NULL; | 1836 | struct ReportLUNdata *physdev_list = NULL; |
| 1810 | struct ReportLUNdata *logdev_list = NULL; | 1837 | struct ReportLUNdata *logdev_list = NULL; |
| 1811 | unsigned char *inq_buff = NULL; | ||
| 1812 | u32 nphysicals = 0; | 1838 | u32 nphysicals = 0; |
| 1813 | u32 nlogicals = 0; | 1839 | u32 nlogicals = 0; |
| 1814 | u32 ndev_allocated = 0; | 1840 | u32 ndev_allocated = 0; |
| @@ -1824,11 +1850,9 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1824 | GFP_KERNEL); | 1850 | GFP_KERNEL); |
| 1825 | physdev_list = kzalloc(reportlunsize, GFP_KERNEL); | 1851 | physdev_list = kzalloc(reportlunsize, GFP_KERNEL); |
| 1826 | logdev_list = kzalloc(reportlunsize, GFP_KERNEL); | 1852 | logdev_list = kzalloc(reportlunsize, GFP_KERNEL); |
| 1827 | inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); | ||
| 1828 | tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); | 1853 | tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); |
| 1829 | 1854 | ||
| 1830 | if (!currentsd || !physdev_list || !logdev_list || | 1855 | if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { |
| 1831 | !inq_buff || !tmpdevice) { | ||
| 1832 | dev_err(&h->pdev->dev, "out of memory\n"); | 1856 | dev_err(&h->pdev->dev, "out of memory\n"); |
| 1833 | goto out; | 1857 | goto out; |
| 1834 | } | 1858 | } |
| @@ -1863,7 +1887,7 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1863 | /* adjust our table of devices */ | 1887 | /* adjust our table of devices */ |
| 1864 | nmsa2xxx_enclosures = 0; | 1888 | nmsa2xxx_enclosures = 0; |
| 1865 | for (i = 0; i < nphysicals + nlogicals + 1; i++) { | 1889 | for (i = 0; i < nphysicals + nlogicals + 1; i++) { |
| 1866 | u8 *lunaddrbytes; | 1890 | u8 *lunaddrbytes, is_OBDR = 0; |
| 1867 | 1891 | ||
| 1868 | /* Figure out where the LUN ID info is coming from */ | 1892 | /* Figure out where the LUN ID info is coming from */ |
| 1869 | lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, | 1893 | lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, |
| @@ -1874,7 +1898,8 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1874 | continue; | 1898 | continue; |
| 1875 | 1899 | ||
| 1876 | /* Get device type, vendor, model, device id */ | 1900 | /* Get device type, vendor, model, device id */ |
| 1877 | if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice)) | 1901 | if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, |
| 1902 | &is_OBDR)) | ||
| 1878 | continue; /* skip it if we can't talk to it. */ | 1903 | continue; /* skip it if we can't talk to it. */ |
| 1879 | figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun, | 1904 | figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun, |
| 1880 | tmpdevice); | 1905 | tmpdevice); |
| @@ -1898,7 +1923,7 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1898 | hpsa_set_bus_target_lun(this_device, bus, target, lun); | 1923 | hpsa_set_bus_target_lun(this_device, bus, target, lun); |
| 1899 | 1924 | ||
| 1900 | switch (this_device->devtype) { | 1925 | switch (this_device->devtype) { |
| 1901 | case TYPE_ROM: { | 1926 | case TYPE_ROM: |
| 1902 | /* We don't *really* support actual CD-ROM devices, | 1927 | /* We don't *really* support actual CD-ROM devices, |
| 1903 | * just "One Button Disaster Recovery" tape drive | 1928 | * just "One Button Disaster Recovery" tape drive |
| 1904 | * which temporarily pretends to be a CD-ROM drive. | 1929 | * which temporarily pretends to be a CD-ROM drive. |
| @@ -1906,15 +1931,8 @@ static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | |||
| 1906 | * device by checking for "$DR-10" in bytes 43-48 of | 1931 | * device by checking for "$DR-10" in bytes 43-48 of |
| 1907 | * the inquiry data. | 1932 | * the inquiry data. |
| 1908 | */ | 1933 | */ |
| 1909 | char obdr_sig[7]; | 1934 | if (is_OBDR) |
| 1910 | #define OBDR_TAPE_SIG "$DR-10" | 1935 | ncurrent++; |
| 1911 | strncpy(obdr_sig, &inq_buff[43], 6); | ||
| 1912 | obdr_sig[6] = '\0'; | ||
| 1913 | if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0) | ||
| 1914 | /* Not OBDR device, ignore it. */ | ||
| 1915 | break; | ||
| 1916 | } | ||
| 1917 | ncurrent++; | ||
| 1918 | break; | 1936 | break; |
| 1919 | case TYPE_DISK: | 1937 | case TYPE_DISK: |
| 1920 | if (i < nphysicals) | 1938 | if (i < nphysicals) |
| @@ -1947,7 +1965,6 @@ out: | |||
| 1947 | for (i = 0; i < ndev_allocated; i++) | 1965 | for (i = 0; i < ndev_allocated; i++) |
| 1948 | kfree(currentsd[i]); | 1966 | kfree(currentsd[i]); |
| 1949 | kfree(currentsd); | 1967 | kfree(currentsd); |
| 1950 | kfree(inq_buff); | ||
| 1951 | kfree(physdev_list); | 1968 | kfree(physdev_list); |
| 1952 | kfree(logdev_list); | 1969 | kfree(logdev_list); |
| 1953 | } | 1970 | } |
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c index 26072f1e9852..6981b773a88d 100644 --- a/drivers/scsi/isci/host.c +++ b/drivers/scsi/isci/host.c | |||
| @@ -531,6 +531,9 @@ static void sci_controller_process_completions(struct isci_host *ihost) | |||
| 531 | break; | 531 | break; |
| 532 | 532 | ||
| 533 | case SCU_COMPLETION_TYPE_EVENT: | 533 | case SCU_COMPLETION_TYPE_EVENT: |
| 534 | sci_controller_event_completion(ihost, ent); | ||
| 535 | break; | ||
| 536 | |||
| 534 | case SCU_COMPLETION_TYPE_NOTIFY: { | 537 | case SCU_COMPLETION_TYPE_NOTIFY: { |
| 535 | event_cycle ^= ((event_get+1) & SCU_MAX_EVENTS) << | 538 | event_cycle ^= ((event_get+1) & SCU_MAX_EVENTS) << |
| 536 | (SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT - SCU_MAX_EVENTS_SHIFT); | 539 | (SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT - SCU_MAX_EVENTS_SHIFT); |
| @@ -1091,6 +1094,7 @@ static void isci_host_completion_routine(unsigned long data) | |||
| 1091 | struct isci_request *request; | 1094 | struct isci_request *request; |
| 1092 | struct isci_request *next_request; | 1095 | struct isci_request *next_request; |
| 1093 | struct sas_task *task; | 1096 | struct sas_task *task; |
| 1097 | u16 active; | ||
| 1094 | 1098 | ||
| 1095 | INIT_LIST_HEAD(&completed_request_list); | 1099 | INIT_LIST_HEAD(&completed_request_list); |
| 1096 | INIT_LIST_HEAD(&errored_request_list); | 1100 | INIT_LIST_HEAD(&errored_request_list); |
| @@ -1181,6 +1185,13 @@ static void isci_host_completion_routine(unsigned long data) | |||
| 1181 | } | 1185 | } |
| 1182 | } | 1186 | } |
| 1183 | 1187 | ||
| 1188 | /* the coalesence timeout doubles at each encoding step, so | ||
| 1189 | * update it based on the ilog2 value of the outstanding requests | ||
| 1190 | */ | ||
| 1191 | active = isci_tci_active(ihost); | ||
| 1192 | writel(SMU_ICC_GEN_VAL(NUMBER, active) | | ||
| 1193 | SMU_ICC_GEN_VAL(TIMER, ISCI_COALESCE_BASE + ilog2(active)), | ||
| 1194 | &ihost->smu_registers->interrupt_coalesce_control); | ||
| 1184 | } | 1195 | } |
| 1185 | 1196 | ||
| 1186 | /** | 1197 | /** |
| @@ -1471,7 +1482,7 @@ static void sci_controller_ready_state_enter(struct sci_base_state_machine *sm) | |||
| 1471 | struct isci_host *ihost = container_of(sm, typeof(*ihost), sm); | 1482 | struct isci_host *ihost = container_of(sm, typeof(*ihost), sm); |
| 1472 | 1483 | ||
| 1473 | /* set the default interrupt coalescence number and timeout value. */ | 1484 | /* set the default interrupt coalescence number and timeout value. */ |
| 1474 | sci_controller_set_interrupt_coalescence(ihost, 0x10, 250); | 1485 | sci_controller_set_interrupt_coalescence(ihost, 0, 0); |
| 1475 | } | 1486 | } |
| 1476 | 1487 | ||
| 1477 | static void sci_controller_ready_state_exit(struct sci_base_state_machine *sm) | 1488 | static void sci_controller_ready_state_exit(struct sci_base_state_machine *sm) |
diff --git a/drivers/scsi/isci/host.h b/drivers/scsi/isci/host.h index 062101a39f79..9f33831a2f04 100644 --- a/drivers/scsi/isci/host.h +++ b/drivers/scsi/isci/host.h | |||
| @@ -369,6 +369,9 @@ static inline struct isci_host *dev_to_ihost(struct domain_device *dev) | |||
| 369 | #define ISCI_TAG_SEQ(tag) (((tag) >> 12) & (SCI_MAX_SEQ-1)) | 369 | #define ISCI_TAG_SEQ(tag) (((tag) >> 12) & (SCI_MAX_SEQ-1)) |
| 370 | #define ISCI_TAG_TCI(tag) ((tag) & (SCI_MAX_IO_REQUESTS-1)) | 370 | #define ISCI_TAG_TCI(tag) ((tag) & (SCI_MAX_IO_REQUESTS-1)) |
| 371 | 371 | ||
| 372 | /* interrupt coalescing baseline: 9 == 3 to 5us interrupt delay per command */ | ||
| 373 | #define ISCI_COALESCE_BASE 9 | ||
| 374 | |||
| 372 | /* expander attached sata devices require 3 rnc slots */ | 375 | /* expander attached sata devices require 3 rnc slots */ |
| 373 | static inline int sci_remote_device_node_count(struct isci_remote_device *idev) | 376 | static inline int sci_remote_device_node_count(struct isci_remote_device *idev) |
| 374 | { | 377 | { |
diff --git a/drivers/scsi/isci/init.c b/drivers/scsi/isci/init.c index 61e0d09e2b57..29aa34efb0f5 100644 --- a/drivers/scsi/isci/init.c +++ b/drivers/scsi/isci/init.c | |||
| @@ -59,10 +59,19 @@ | |||
| 59 | #include <linux/firmware.h> | 59 | #include <linux/firmware.h> |
| 60 | #include <linux/efi.h> | 60 | #include <linux/efi.h> |
| 61 | #include <asm/string.h> | 61 | #include <asm/string.h> |
| 62 | #include <scsi/scsi_host.h> | ||
| 62 | #include "isci.h" | 63 | #include "isci.h" |
| 63 | #include "task.h" | 64 | #include "task.h" |
| 64 | #include "probe_roms.h" | 65 | #include "probe_roms.h" |
| 65 | 66 | ||
| 67 | #define MAJ 1 | ||
| 68 | #define MIN 0 | ||
| 69 | #define BUILD 0 | ||
| 70 | #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \ | ||
| 71 | __stringify(BUILD) | ||
| 72 | |||
| 73 | MODULE_VERSION(DRV_VERSION); | ||
| 74 | |||
| 66 | static struct scsi_transport_template *isci_transport_template; | 75 | static struct scsi_transport_template *isci_transport_template; |
| 67 | 76 | ||
| 68 | static DEFINE_PCI_DEVICE_TABLE(isci_id_table) = { | 77 | static DEFINE_PCI_DEVICE_TABLE(isci_id_table) = { |
| @@ -113,6 +122,22 @@ unsigned char max_concurr_spinup = 1; | |||
| 113 | module_param(max_concurr_spinup, byte, 0); | 122 | module_param(max_concurr_spinup, byte, 0); |
| 114 | MODULE_PARM_DESC(max_concurr_spinup, "Max concurrent device spinup"); | 123 | MODULE_PARM_DESC(max_concurr_spinup, "Max concurrent device spinup"); |
| 115 | 124 | ||
| 125 | static ssize_t isci_show_id(struct device *dev, struct device_attribute *attr, char *buf) | ||
| 126 | { | ||
| 127 | struct Scsi_Host *shost = container_of(dev, typeof(*shost), shost_dev); | ||
| 128 | struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(shost); | ||
| 129 | struct isci_host *ihost = container_of(sas_ha, typeof(*ihost), sas_ha); | ||
| 130 | |||
| 131 | return snprintf(buf, PAGE_SIZE, "%d\n", ihost->id); | ||
| 132 | } | ||
| 133 | |||
| 134 | static DEVICE_ATTR(isci_id, S_IRUGO, isci_show_id, NULL); | ||
| 135 | |||
| 136 | struct device_attribute *isci_host_attrs[] = { | ||
| 137 | &dev_attr_isci_id, | ||
| 138 | NULL | ||
| 139 | }; | ||
| 140 | |||
| 116 | static struct scsi_host_template isci_sht = { | 141 | static struct scsi_host_template isci_sht = { |
| 117 | 142 | ||
| 118 | .module = THIS_MODULE, | 143 | .module = THIS_MODULE, |
| @@ -138,6 +163,7 @@ static struct scsi_host_template isci_sht = { | |||
| 138 | .slave_alloc = sas_slave_alloc, | 163 | .slave_alloc = sas_slave_alloc, |
| 139 | .target_destroy = sas_target_destroy, | 164 | .target_destroy = sas_target_destroy, |
| 140 | .ioctl = sas_ioctl, | 165 | .ioctl = sas_ioctl, |
| 166 | .shost_attrs = isci_host_attrs, | ||
| 141 | }; | 167 | }; |
| 142 | 168 | ||
| 143 | static struct sas_domain_function_template isci_transport_ops = { | 169 | static struct sas_domain_function_template isci_transport_ops = { |
| @@ -232,17 +258,6 @@ static int isci_register_sas_ha(struct isci_host *isci_host) | |||
| 232 | return 0; | 258 | return 0; |
| 233 | } | 259 | } |
| 234 | 260 | ||
| 235 | static ssize_t isci_show_id(struct device *dev, struct device_attribute *attr, char *buf) | ||
| 236 | { | ||
| 237 | struct Scsi_Host *shost = container_of(dev, typeof(*shost), shost_dev); | ||
| 238 | struct sas_ha_struct *sas_ha = SHOST_TO_SAS_HA(shost); | ||
| 239 | struct isci_host *ihost = container_of(sas_ha, typeof(*ihost), sas_ha); | ||
| 240 | |||
| 241 | return snprintf(buf, PAGE_SIZE, "%d\n", ihost->id); | ||
| 242 | } | ||
| 243 | |||
| 244 | static DEVICE_ATTR(isci_id, S_IRUGO, isci_show_id, NULL); | ||
| 245 | |||
| 246 | static void isci_unregister(struct isci_host *isci_host) | 261 | static void isci_unregister(struct isci_host *isci_host) |
| 247 | { | 262 | { |
| 248 | struct Scsi_Host *shost; | 263 | struct Scsi_Host *shost; |
| @@ -251,7 +266,6 @@ static void isci_unregister(struct isci_host *isci_host) | |||
| 251 | return; | 266 | return; |
| 252 | 267 | ||
| 253 | shost = isci_host->shost; | 268 | shost = isci_host->shost; |
| 254 | device_remove_file(&shost->shost_dev, &dev_attr_isci_id); | ||
| 255 | 269 | ||
| 256 | sas_unregister_ha(&isci_host->sas_ha); | 270 | sas_unregister_ha(&isci_host->sas_ha); |
| 257 | 271 | ||
| @@ -415,14 +429,8 @@ static struct isci_host *isci_host_alloc(struct pci_dev *pdev, int id) | |||
| 415 | if (err) | 429 | if (err) |
| 416 | goto err_shost_remove; | 430 | goto err_shost_remove; |
| 417 | 431 | ||
| 418 | err = device_create_file(&shost->shost_dev, &dev_attr_isci_id); | ||
| 419 | if (err) | ||
| 420 | goto err_unregister_ha; | ||
| 421 | |||
| 422 | return isci_host; | 432 | return isci_host; |
| 423 | 433 | ||
| 424 | err_unregister_ha: | ||
| 425 | sas_unregister_ha(&(isci_host->sas_ha)); | ||
| 426 | err_shost_remove: | 434 | err_shost_remove: |
| 427 | scsi_remove_host(shost); | 435 | scsi_remove_host(shost); |
| 428 | err_shost: | 436 | err_shost: |
| @@ -540,7 +548,8 @@ static __init int isci_init(void) | |||
| 540 | { | 548 | { |
| 541 | int err; | 549 | int err; |
| 542 | 550 | ||
| 543 | pr_info("%s: Intel(R) C600 SAS Controller Driver\n", DRV_NAME); | 551 | pr_info("%s: Intel(R) C600 SAS Controller Driver - version %s\n", |
| 552 | DRV_NAME, DRV_VERSION); | ||
| 544 | 553 | ||
| 545 | isci_transport_template = sas_domain_attach_transport(&isci_transport_ops); | 554 | isci_transport_template = sas_domain_attach_transport(&isci_transport_ops); |
| 546 | if (!isci_transport_template) | 555 | if (!isci_transport_template) |
diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c index 79313a7a2356..430fc8ff014a 100644 --- a/drivers/scsi/isci/phy.c +++ b/drivers/scsi/isci/phy.c | |||
| @@ -104,6 +104,7 @@ sci_phy_link_layer_initialization(struct isci_phy *iphy, | |||
| 104 | u32 parity_count = 0; | 104 | u32 parity_count = 0; |
| 105 | u32 llctl, link_rate; | 105 | u32 llctl, link_rate; |
| 106 | u32 clksm_value = 0; | 106 | u32 clksm_value = 0; |
| 107 | u32 sp_timeouts = 0; | ||
| 107 | 108 | ||
| 108 | iphy->link_layer_registers = reg; | 109 | iphy->link_layer_registers = reg; |
| 109 | 110 | ||
| @@ -211,6 +212,18 @@ sci_phy_link_layer_initialization(struct isci_phy *iphy, | |||
| 211 | llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); | 212 | llctl |= SCU_SAS_LLCTL_GEN_VAL(MAX_LINK_RATE, link_rate); |
| 212 | writel(llctl, &iphy->link_layer_registers->link_layer_control); | 213 | writel(llctl, &iphy->link_layer_registers->link_layer_control); |
| 213 | 214 | ||
| 215 | sp_timeouts = readl(&iphy->link_layer_registers->sas_phy_timeouts); | ||
| 216 | |||
| 217 | /* Clear the default 0x36 (54us) RATE_CHANGE timeout value. */ | ||
| 218 | sp_timeouts &= ~SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0xFF); | ||
| 219 | |||
| 220 | /* Set RATE_CHANGE timeout value to 0x3B (59us). This ensures SCU can | ||
| 221 | * lock with 3Gb drive when SCU max rate is set to 1.5Gb. | ||
| 222 | */ | ||
| 223 | sp_timeouts |= SCU_SAS_PHYTOV_GEN_VAL(RATE_CHANGE, 0x3B); | ||
| 224 | |||
| 225 | writel(sp_timeouts, &iphy->link_layer_registers->sas_phy_timeouts); | ||
| 226 | |||
| 214 | if (is_a2(ihost->pdev)) { | 227 | if (is_a2(ihost->pdev)) { |
| 215 | /* Program the max ARB time for the PHY to 700us so we inter-operate with | 228 | /* Program the max ARB time for the PHY to 700us so we inter-operate with |
| 216 | * the PMC expander which shuts down PHYs if the expander PHY generates too | 229 | * the PMC expander which shuts down PHYs if the expander PHY generates too |
diff --git a/drivers/scsi/isci/registers.h b/drivers/scsi/isci/registers.h index 9b266c7428e8..00afc738bbed 100644 --- a/drivers/scsi/isci/registers.h +++ b/drivers/scsi/isci/registers.h | |||
| @@ -1299,6 +1299,18 @@ struct scu_transport_layer_registers { | |||
| 1299 | #define SCU_AFE_XCVRCR_OFFSET 0x00DC | 1299 | #define SCU_AFE_XCVRCR_OFFSET 0x00DC |
| 1300 | #define SCU_AFE_LUTCR_OFFSET 0x00E0 | 1300 | #define SCU_AFE_LUTCR_OFFSET 0x00E0 |
| 1301 | 1301 | ||
| 1302 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_ALIGN_DETECTION_SHIFT (0UL) | ||
| 1303 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_ALIGN_DETECTION_MASK (0x000000FFUL) | ||
| 1304 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_HOT_PLUG_SHIFT (8UL) | ||
| 1305 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_HOT_PLUG_MASK (0x0000FF00UL) | ||
| 1306 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_COMSAS_DETECTION_SHIFT (16UL) | ||
| 1307 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_COMSAS_DETECTION_MASK (0x00FF0000UL) | ||
| 1308 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_RATE_CHANGE_SHIFT (24UL) | ||
| 1309 | #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_RATE_CHANGE_MASK (0xFF000000UL) | ||
| 1310 | |||
| 1311 | #define SCU_SAS_PHYTOV_GEN_VAL(name, value) \ | ||
| 1312 | SCU_GEN_VALUE(SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_##name, value) | ||
| 1313 | |||
| 1302 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_SHIFT (0) | 1314 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_SHIFT (0) |
| 1303 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_MASK (0x00000003) | 1315 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_MASK (0x00000003) |
| 1304 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1 (0) | 1316 | #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1 (0) |
diff --git a/drivers/scsi/isci/request.c b/drivers/scsi/isci/request.c index a46e07ac789f..b5d3a8c4d329 100644 --- a/drivers/scsi/isci/request.c +++ b/drivers/scsi/isci/request.c | |||
| @@ -732,12 +732,20 @@ sci_io_request_terminate(struct isci_request *ireq) | |||
| 732 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); | 732 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
| 733 | return SCI_SUCCESS; | 733 | return SCI_SUCCESS; |
| 734 | case SCI_REQ_TASK_WAIT_TC_RESP: | 734 | case SCI_REQ_TASK_WAIT_TC_RESP: |
| 735 | /* The task frame was already confirmed to have been | ||
| 736 | * sent by the SCU HW. Since the state machine is | ||
| 737 | * now only waiting for the task response itself, | ||
| 738 | * abort the request and complete it immediately | ||
| 739 | * and don't wait for the task response. | ||
| 740 | */ | ||
| 735 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); | 741 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
| 736 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); | 742 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
| 737 | return SCI_SUCCESS; | 743 | return SCI_SUCCESS; |
| 738 | case SCI_REQ_ABORTING: | 744 | case SCI_REQ_ABORTING: |
| 739 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); | 745 | /* If a request has a termination requested twice, return |
| 740 | return SCI_SUCCESS; | 746 | * a failure indication, since HW confirmation of the first |
| 747 | * abort is still outstanding. | ||
| 748 | */ | ||
| 741 | case SCI_REQ_COMPLETED: | 749 | case SCI_REQ_COMPLETED: |
| 742 | default: | 750 | default: |
| 743 | dev_warn(&ireq->owning_controller->pdev->dev, | 751 | dev_warn(&ireq->owning_controller->pdev->dev, |
| @@ -2399,22 +2407,19 @@ static void isci_task_save_for_upper_layer_completion( | |||
| 2399 | } | 2407 | } |
| 2400 | } | 2408 | } |
| 2401 | 2409 | ||
| 2402 | static void isci_request_process_stp_response(struct sas_task *task, | 2410 | static void isci_process_stp_response(struct sas_task *task, struct dev_to_host_fis *fis) |
| 2403 | void *response_buffer) | ||
| 2404 | { | 2411 | { |
| 2405 | struct dev_to_host_fis *d2h_reg_fis = response_buffer; | ||
| 2406 | struct task_status_struct *ts = &task->task_status; | 2412 | struct task_status_struct *ts = &task->task_status; |
| 2407 | struct ata_task_resp *resp = (void *)&ts->buf[0]; | 2413 | struct ata_task_resp *resp = (void *)&ts->buf[0]; |
| 2408 | 2414 | ||
| 2409 | resp->frame_len = le16_to_cpu(*(__le16 *)(response_buffer + 6)); | 2415 | resp->frame_len = sizeof(*fis); |
| 2410 | memcpy(&resp->ending_fis[0], response_buffer + 16, 24); | 2416 | memcpy(resp->ending_fis, fis, sizeof(*fis)); |
| 2411 | ts->buf_valid_size = sizeof(*resp); | 2417 | ts->buf_valid_size = sizeof(*resp); |
| 2412 | 2418 | ||
| 2413 | /** | 2419 | /* If the device fault bit is set in the status register, then |
| 2414 | * If the device fault bit is set in the status register, then | ||
| 2415 | * set the sense data and return. | 2420 | * set the sense data and return. |
| 2416 | */ | 2421 | */ |
| 2417 | if (d2h_reg_fis->status & ATA_DF) | 2422 | if (fis->status & ATA_DF) |
| 2418 | ts->stat = SAS_PROTO_RESPONSE; | 2423 | ts->stat = SAS_PROTO_RESPONSE; |
| 2419 | else | 2424 | else |
| 2420 | ts->stat = SAM_STAT_GOOD; | 2425 | ts->stat = SAM_STAT_GOOD; |
| @@ -2428,7 +2433,6 @@ static void isci_request_io_request_complete(struct isci_host *ihost, | |||
| 2428 | { | 2433 | { |
| 2429 | struct sas_task *task = isci_request_access_task(request); | 2434 | struct sas_task *task = isci_request_access_task(request); |
| 2430 | struct ssp_response_iu *resp_iu; | 2435 | struct ssp_response_iu *resp_iu; |
| 2431 | void *resp_buf; | ||
| 2432 | unsigned long task_flags; | 2436 | unsigned long task_flags; |
| 2433 | struct isci_remote_device *idev = isci_lookup_device(task->dev); | 2437 | struct isci_remote_device *idev = isci_lookup_device(task->dev); |
| 2434 | enum service_response response = SAS_TASK_UNDELIVERED; | 2438 | enum service_response response = SAS_TASK_UNDELIVERED; |
| @@ -2565,9 +2569,7 @@ static void isci_request_io_request_complete(struct isci_host *ihost, | |||
| 2565 | task); | 2569 | task); |
| 2566 | 2570 | ||
| 2567 | if (sas_protocol_ata(task->task_proto)) { | 2571 | if (sas_protocol_ata(task->task_proto)) { |
| 2568 | resp_buf = &request->stp.rsp; | 2572 | isci_process_stp_response(task, &request->stp.rsp); |
| 2569 | isci_request_process_stp_response(task, | ||
| 2570 | resp_buf); | ||
| 2571 | } else if (SAS_PROTOCOL_SSP == task->task_proto) { | 2573 | } else if (SAS_PROTOCOL_SSP == task->task_proto) { |
| 2572 | 2574 | ||
| 2573 | /* crack the iu response buffer. */ | 2575 | /* crack the iu response buffer. */ |
diff --git a/drivers/scsi/isci/unsolicited_frame_control.c b/drivers/scsi/isci/unsolicited_frame_control.c index e9e1e2abacb9..16f88ab939c8 100644 --- a/drivers/scsi/isci/unsolicited_frame_control.c +++ b/drivers/scsi/isci/unsolicited_frame_control.c | |||
| @@ -72,7 +72,7 @@ int sci_unsolicited_frame_control_construct(struct isci_host *ihost) | |||
| 72 | */ | 72 | */ |
| 73 | buf_len = SCU_MAX_UNSOLICITED_FRAMES * SCU_UNSOLICITED_FRAME_BUFFER_SIZE; | 73 | buf_len = SCU_MAX_UNSOLICITED_FRAMES * SCU_UNSOLICITED_FRAME_BUFFER_SIZE; |
| 74 | header_len = SCU_MAX_UNSOLICITED_FRAMES * sizeof(struct scu_unsolicited_frame_header); | 74 | header_len = SCU_MAX_UNSOLICITED_FRAMES * sizeof(struct scu_unsolicited_frame_header); |
| 75 | size = buf_len + header_len + SCU_MAX_UNSOLICITED_FRAMES * sizeof(dma_addr_t); | 75 | size = buf_len + header_len + SCU_MAX_UNSOLICITED_FRAMES * sizeof(uf_control->address_table.array[0]); |
| 76 | 76 | ||
| 77 | /* | 77 | /* |
| 78 | * The Unsolicited Frame buffers are set at the start of the UF | 78 | * The Unsolicited Frame buffers are set at the start of the UF |
diff --git a/drivers/scsi/isci/unsolicited_frame_control.h b/drivers/scsi/isci/unsolicited_frame_control.h index 31cb9506f52d..75d896686f5a 100644 --- a/drivers/scsi/isci/unsolicited_frame_control.h +++ b/drivers/scsi/isci/unsolicited_frame_control.h | |||
| @@ -214,7 +214,7 @@ struct sci_uf_address_table_array { | |||
| 214 | * starting address of the UF address table. | 214 | * starting address of the UF address table. |
| 215 | * 64-bit pointers are required by the hardware. | 215 | * 64-bit pointers are required by the hardware. |
| 216 | */ | 216 | */ |
| 217 | dma_addr_t *array; | 217 | u64 *array; |
| 218 | 218 | ||
| 219 | /** | 219 | /** |
| 220 | * This field specifies the physical address location for the UF | 220 | * This field specifies the physical address location for the UF |
diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c index 01ff082dc34c..d261e982a2fa 100644 --- a/drivers/scsi/libfc/fc_exch.c +++ b/drivers/scsi/libfc/fc_exch.c | |||
| @@ -494,6 +494,9 @@ static int fc_seq_send(struct fc_lport *lport, struct fc_seq *sp, | |||
| 494 | */ | 494 | */ |
| 495 | error = lport->tt.frame_send(lport, fp); | 495 | error = lport->tt.frame_send(lport, fp); |
| 496 | 496 | ||
| 497 | if (fh->fh_type == FC_TYPE_BLS) | ||
| 498 | return error; | ||
| 499 | |||
| 497 | /* | 500 | /* |
| 498 | * Update the exchange and sequence flags, | 501 | * Update the exchange and sequence flags, |
| 499 | * assuming all frames for the sequence have been sent. | 502 | * assuming all frames for the sequence have been sent. |
| @@ -575,42 +578,35 @@ static void fc_seq_set_resp(struct fc_seq *sp, | |||
| 575 | } | 578 | } |
| 576 | 579 | ||
| 577 | /** | 580 | /** |
| 578 | * fc_seq_exch_abort() - Abort an exchange and sequence | 581 | * fc_exch_abort_locked() - Abort an exchange |
| 579 | * @req_sp: The sequence to be aborted | 582 | * @ep: The exchange to be aborted |
| 580 | * @timer_msec: The period of time to wait before aborting | 583 | * @timer_msec: The period of time to wait before aborting |
| 581 | * | 584 | * |
| 582 | * Generally called because of a timeout or an abort from the upper layer. | 585 | * Locking notes: Called with exch lock held |
| 586 | * | ||
| 587 | * Return value: 0 on success else error code | ||
| 583 | */ | 588 | */ |
| 584 | static int fc_seq_exch_abort(const struct fc_seq *req_sp, | 589 | static int fc_exch_abort_locked(struct fc_exch *ep, |
| 585 | unsigned int timer_msec) | 590 | unsigned int timer_msec) |
| 586 | { | 591 | { |
| 587 | struct fc_seq *sp; | 592 | struct fc_seq *sp; |
| 588 | struct fc_exch *ep; | ||
| 589 | struct fc_frame *fp; | 593 | struct fc_frame *fp; |
| 590 | int error; | 594 | int error; |
| 591 | 595 | ||
| 592 | ep = fc_seq_exch(req_sp); | ||
| 593 | |||
| 594 | spin_lock_bh(&ep->ex_lock); | ||
| 595 | if (ep->esb_stat & (ESB_ST_COMPLETE | ESB_ST_ABNORMAL) || | 596 | if (ep->esb_stat & (ESB_ST_COMPLETE | ESB_ST_ABNORMAL) || |
| 596 | ep->state & (FC_EX_DONE | FC_EX_RST_CLEANUP)) { | 597 | ep->state & (FC_EX_DONE | FC_EX_RST_CLEANUP)) |
| 597 | spin_unlock_bh(&ep->ex_lock); | ||
| 598 | return -ENXIO; | 598 | return -ENXIO; |
| 599 | } | ||
| 600 | 599 | ||
| 601 | /* | 600 | /* |
| 602 | * Send the abort on a new sequence if possible. | 601 | * Send the abort on a new sequence if possible. |
| 603 | */ | 602 | */ |
| 604 | sp = fc_seq_start_next_locked(&ep->seq); | 603 | sp = fc_seq_start_next_locked(&ep->seq); |
| 605 | if (!sp) { | 604 | if (!sp) |
| 606 | spin_unlock_bh(&ep->ex_lock); | ||
| 607 | return -ENOMEM; | 605 | return -ENOMEM; |
| 608 | } | ||
| 609 | 606 | ||
| 610 | ep->esb_stat |= ESB_ST_SEQ_INIT | ESB_ST_ABNORMAL; | 607 | ep->esb_stat |= ESB_ST_SEQ_INIT | ESB_ST_ABNORMAL; |
| 611 | if (timer_msec) | 608 | if (timer_msec) |
| 612 | fc_exch_timer_set_locked(ep, timer_msec); | 609 | fc_exch_timer_set_locked(ep, timer_msec); |
| 613 | spin_unlock_bh(&ep->ex_lock); | ||
| 614 | 610 | ||
| 615 | /* | 611 | /* |
| 616 | * If not logged into the fabric, don't send ABTS but leave | 612 | * If not logged into the fabric, don't send ABTS but leave |
| @@ -633,6 +629,28 @@ static int fc_seq_exch_abort(const struct fc_seq *req_sp, | |||
| 633 | } | 629 | } |
| 634 | 630 | ||
| 635 | /** | 631 | /** |
| 632 | * fc_seq_exch_abort() - Abort an exchange and sequence | ||
| 633 | * @req_sp: The sequence to be aborted | ||
| 634 | * @timer_msec: The period of time to wait before aborting | ||
| 635 | * | ||
| 636 | * Generally called because of a timeout or an abort from the upper layer. | ||
| 637 | * | ||
| 638 | * Return value: 0 on success else error code | ||
| 639 | */ | ||
| 640 | static int fc_seq_exch_abort(const struct fc_seq *req_sp, | ||
| 641 | unsigned int timer_msec) | ||
| 642 | { | ||
| 643 | struct fc_exch *ep; | ||
| 644 | int error; | ||
| 645 | |||
| 646 | ep = fc_seq_exch(req_sp); | ||
| 647 | spin_lock_bh(&ep->ex_lock); | ||
| 648 | error = fc_exch_abort_locked(ep, timer_msec); | ||
| 649 | spin_unlock_bh(&ep->ex_lock); | ||
| 650 | return error; | ||
| 651 | } | ||
| 652 | |||
| 653 | /** | ||
| 636 | * fc_exch_timeout() - Handle exchange timer expiration | 654 | * fc_exch_timeout() - Handle exchange timer expiration |
| 637 | * @work: The work_struct identifying the exchange that timed out | 655 | * @work: The work_struct identifying the exchange that timed out |
| 638 | */ | 656 | */ |
| @@ -1715,6 +1733,7 @@ static void fc_exch_reset(struct fc_exch *ep) | |||
| 1715 | int rc = 1; | 1733 | int rc = 1; |
| 1716 | 1734 | ||
| 1717 | spin_lock_bh(&ep->ex_lock); | 1735 | spin_lock_bh(&ep->ex_lock); |
| 1736 | fc_exch_abort_locked(ep, 0); | ||
| 1718 | ep->state |= FC_EX_RST_CLEANUP; | 1737 | ep->state |= FC_EX_RST_CLEANUP; |
| 1719 | if (cancel_delayed_work(&ep->timeout_work)) | 1738 | if (cancel_delayed_work(&ep->timeout_work)) |
| 1720 | atomic_dec(&ep->ex_refcnt); /* drop hold for timer */ | 1739 | atomic_dec(&ep->ex_refcnt); /* drop hold for timer */ |
| @@ -1962,6 +1981,7 @@ static struct fc_seq *fc_exch_seq_send(struct fc_lport *lport, | |||
| 1962 | struct fc_exch *ep; | 1981 | struct fc_exch *ep; |
| 1963 | struct fc_seq *sp = NULL; | 1982 | struct fc_seq *sp = NULL; |
| 1964 | struct fc_frame_header *fh; | 1983 | struct fc_frame_header *fh; |
| 1984 | struct fc_fcp_pkt *fsp = NULL; | ||
| 1965 | int rc = 1; | 1985 | int rc = 1; |
| 1966 | 1986 | ||
| 1967 | ep = fc_exch_alloc(lport, fp); | 1987 | ep = fc_exch_alloc(lport, fp); |
| @@ -1984,8 +2004,10 @@ static struct fc_seq *fc_exch_seq_send(struct fc_lport *lport, | |||
| 1984 | fc_exch_setup_hdr(ep, fp, ep->f_ctl); | 2004 | fc_exch_setup_hdr(ep, fp, ep->f_ctl); |
| 1985 | sp->cnt++; | 2005 | sp->cnt++; |
| 1986 | 2006 | ||
| 1987 | if (ep->xid <= lport->lro_xid && fh->fh_r_ctl == FC_RCTL_DD_UNSOL_CMD) | 2007 | if (ep->xid <= lport->lro_xid && fh->fh_r_ctl == FC_RCTL_DD_UNSOL_CMD) { |
| 2008 | fsp = fr_fsp(fp); | ||
| 1988 | fc_fcp_ddp_setup(fr_fsp(fp), ep->xid); | 2009 | fc_fcp_ddp_setup(fr_fsp(fp), ep->xid); |
| 2010 | } | ||
| 1989 | 2011 | ||
| 1990 | if (unlikely(lport->tt.frame_send(lport, fp))) | 2012 | if (unlikely(lport->tt.frame_send(lport, fp))) |
| 1991 | goto err; | 2013 | goto err; |
| @@ -1999,7 +2021,8 @@ static struct fc_seq *fc_exch_seq_send(struct fc_lport *lport, | |||
| 1999 | spin_unlock_bh(&ep->ex_lock); | 2021 | spin_unlock_bh(&ep->ex_lock); |
| 2000 | return sp; | 2022 | return sp; |
| 2001 | err: | 2023 | err: |
| 2002 | fc_fcp_ddp_done(fr_fsp(fp)); | 2024 | if (fsp) |
| 2025 | fc_fcp_ddp_done(fsp); | ||
| 2003 | rc = fc_exch_done_locked(ep); | 2026 | rc = fc_exch_done_locked(ep); |
| 2004 | spin_unlock_bh(&ep->ex_lock); | 2027 | spin_unlock_bh(&ep->ex_lock); |
| 2005 | if (!rc) | 2028 | if (!rc) |
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c index afb63c843144..4c41ee816f0b 100644 --- a/drivers/scsi/libfc/fc_fcp.c +++ b/drivers/scsi/libfc/fc_fcp.c | |||
| @@ -2019,6 +2019,11 @@ int fc_eh_abort(struct scsi_cmnd *sc_cmd) | |||
| 2019 | struct fc_fcp_internal *si; | 2019 | struct fc_fcp_internal *si; |
| 2020 | int rc = FAILED; | 2020 | int rc = FAILED; |
| 2021 | unsigned long flags; | 2021 | unsigned long flags; |
| 2022 | int rval; | ||
| 2023 | |||
| 2024 | rval = fc_block_scsi_eh(sc_cmd); | ||
| 2025 | if (rval) | ||
| 2026 | return rval; | ||
| 2022 | 2027 | ||
| 2023 | lport = shost_priv(sc_cmd->device->host); | 2028 | lport = shost_priv(sc_cmd->device->host); |
| 2024 | if (lport->state != LPORT_ST_READY) | 2029 | if (lport->state != LPORT_ST_READY) |
| @@ -2068,9 +2073,9 @@ int fc_eh_device_reset(struct scsi_cmnd *sc_cmd) | |||
| 2068 | int rc = FAILED; | 2073 | int rc = FAILED; |
| 2069 | int rval; | 2074 | int rval; |
| 2070 | 2075 | ||
| 2071 | rval = fc_remote_port_chkready(rport); | 2076 | rval = fc_block_scsi_eh(sc_cmd); |
| 2072 | if (rval) | 2077 | if (rval) |
| 2073 | goto out; | 2078 | return rval; |
| 2074 | 2079 | ||
| 2075 | lport = shost_priv(sc_cmd->device->host); | 2080 | lport = shost_priv(sc_cmd->device->host); |
| 2076 | 2081 | ||
| @@ -2116,6 +2121,8 @@ int fc_eh_host_reset(struct scsi_cmnd *sc_cmd) | |||
| 2116 | 2121 | ||
| 2117 | FC_SCSI_DBG(lport, "Resetting host\n"); | 2122 | FC_SCSI_DBG(lport, "Resetting host\n"); |
| 2118 | 2123 | ||
| 2124 | fc_block_scsi_eh(sc_cmd); | ||
| 2125 | |||
| 2119 | lport->tt.lport_reset(lport); | 2126 | lport->tt.lport_reset(lport); |
| 2120 | wait_tmo = jiffies + FC_HOST_RESET_TIMEOUT; | 2127 | wait_tmo = jiffies + FC_HOST_RESET_TIMEOUT; |
| 2121 | while (!fc_fcp_lport_queue_ready(lport) && time_before(jiffies, | 2128 | while (!fc_fcp_lport_queue_ready(lport) && time_before(jiffies, |
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c index e55ed9cf23fb..628f347404f9 100644 --- a/drivers/scsi/libfc/fc_lport.c +++ b/drivers/scsi/libfc/fc_lport.c | |||
| @@ -88,6 +88,7 @@ | |||
| 88 | */ | 88 | */ |
| 89 | 89 | ||
| 90 | #include <linux/timer.h> | 90 | #include <linux/timer.h> |
| 91 | #include <linux/delay.h> | ||
| 91 | #include <linux/slab.h> | 92 | #include <linux/slab.h> |
| 92 | #include <asm/unaligned.h> | 93 | #include <asm/unaligned.h> |
| 93 | 94 | ||
| @@ -1029,8 +1030,16 @@ static void fc_lport_enter_reset(struct fc_lport *lport) | |||
| 1029 | FCH_EVT_LIPRESET, 0); | 1030 | FCH_EVT_LIPRESET, 0); |
| 1030 | fc_vports_linkchange(lport); | 1031 | fc_vports_linkchange(lport); |
| 1031 | fc_lport_reset_locked(lport); | 1032 | fc_lport_reset_locked(lport); |
| 1032 | if (lport->link_up) | 1033 | if (lport->link_up) { |
| 1034 | /* | ||
| 1035 | * Wait upto resource allocation time out before | ||
| 1036 | * doing re-login since incomplete FIP exchanged | ||
| 1037 | * from last session may collide with exchanges | ||
| 1038 | * in new session. | ||
| 1039 | */ | ||
| 1040 | msleep(lport->r_a_tov); | ||
| 1033 | fc_lport_enter_flogi(lport); | 1041 | fc_lport_enter_flogi(lport); |
| 1042 | } | ||
| 1034 | } | 1043 | } |
| 1035 | 1044 | ||
| 1036 | /** | 1045 | /** |
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index 7836eb01c7fc..a31e05f3bfd4 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
| @@ -1786,13 +1786,16 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable) | |||
| 1786 | fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN); | 1786 | fc_vport_set_state(fc_vport, FC_VPORT_LINKDOWN); |
| 1787 | } | 1787 | } |
| 1788 | 1788 | ||
| 1789 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) { | 1789 | if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { |
| 1790 | if (ha->fw_attributes & BIT_4) { | 1790 | if (ha->fw_attributes & BIT_4) { |
| 1791 | int prot = 0; | ||
| 1791 | vha->flags.difdix_supported = 1; | 1792 | vha->flags.difdix_supported = 1; |
| 1792 | ql_dbg(ql_dbg_user, vha, 0x7082, | 1793 | ql_dbg(ql_dbg_user, vha, 0x7082, |
| 1793 | "Registered for DIF/DIX type 1 and 3 protection.\n"); | 1794 | "Registered for DIF/DIX type 1 and 3 protection.\n"); |
| 1795 | if (ql2xenabledif == 1) | ||
| 1796 | prot = SHOST_DIX_TYPE0_PROTECTION; | ||
| 1794 | scsi_host_set_prot(vha->host, | 1797 | scsi_host_set_prot(vha->host, |
| 1795 | SHOST_DIF_TYPE1_PROTECTION | 1798 | prot | SHOST_DIF_TYPE1_PROTECTION |
| 1796 | | SHOST_DIF_TYPE2_PROTECTION | 1799 | | SHOST_DIF_TYPE2_PROTECTION |
| 1797 | | SHOST_DIF_TYPE3_PROTECTION | 1800 | | SHOST_DIF_TYPE3_PROTECTION |
| 1798 | | SHOST_DIX_TYPE1_PROTECTION | 1801 | | SHOST_DIX_TYPE1_PROTECTION |
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 2155071f3100..d79cd8a5f831 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
| @@ -8,24 +8,24 @@ | |||
| 8 | /* | 8 | /* |
| 9 | * Table for showing the current message id in use for particular level | 9 | * Table for showing the current message id in use for particular level |
| 10 | * Change this table for addition of log/debug messages. | 10 | * Change this table for addition of log/debug messages. |
| 11 | * ----------------------------------------------------- | 11 | * ---------------------------------------------------------------------- |
| 12 | * | Level | Last Value Used | | 12 | * | Level | Last Value Used | Holes | |
| 13 | * ----------------------------------------------------- | 13 | * ---------------------------------------------------------------------- |
| 14 | * | Module Init and Probe | 0x0116 | | 14 | * | Module Init and Probe | 0x0116 | | |
| 15 | * | Mailbox commands | 0x111e | | 15 | * | Mailbox commands | 0x1126 | | |
| 16 | * | Device Discovery | 0x2083 | | 16 | * | Device Discovery | 0x2083 | | |
| 17 | * | Queue Command and IO tracing | 0x302e | | 17 | * | Queue Command and IO tracing | 0x302e | 0x3008 | |
| 18 | * | DPC Thread | 0x401c | | 18 | * | DPC Thread | 0x401c | | |
| 19 | * | Async Events | 0x5059 | | 19 | * | Async Events | 0x5059 | | |
| 20 | * | Timer Routines | 0x600d | | 20 | * | Timer Routines | 0x600d | | |
| 21 | * | User Space Interactions | 0x709c | | 21 | * | User Space Interactions | 0x709d | | |
| 22 | * | Task Management | 0x8043 | | 22 | * | Task Management | 0x8041 | | |
| 23 | * | AER/EEH | 0x900f | | 23 | * | AER/EEH | 0x900f | | |
| 24 | * | Virtual Port | 0xa007 | | 24 | * | Virtual Port | 0xa007 | | |
| 25 | * | ISP82XX Specific | 0xb027 | | 25 | * | ISP82XX Specific | 0xb04f | | |
| 26 | * | MultiQ | 0xc00b | | 26 | * | MultiQ | 0xc00b | | |
| 27 | * | Misc | 0xd00b | | 27 | * | Misc | 0xd00b | | |
| 28 | * ----------------------------------------------------- | 28 | * ---------------------------------------------------------------------- |
| 29 | */ | 29 | */ |
| 30 | 30 | ||
| 31 | #include "qla_def.h" | 31 | #include "qla_def.h" |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index cc5a79259d33..a03eaf40f377 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
| @@ -2529,6 +2529,7 @@ struct qla_hw_data { | |||
| 2529 | #define DT_ISP8021 BIT_14 | 2529 | #define DT_ISP8021 BIT_14 |
| 2530 | #define DT_ISP_LAST (DT_ISP8021 << 1) | 2530 | #define DT_ISP_LAST (DT_ISP8021 << 1) |
| 2531 | 2531 | ||
| 2532 | #define DT_T10_PI BIT_25 | ||
| 2532 | #define DT_IIDMA BIT_26 | 2533 | #define DT_IIDMA BIT_26 |
| 2533 | #define DT_FWI2 BIT_27 | 2534 | #define DT_FWI2 BIT_27 |
| 2534 | #define DT_ZIO_SUPPORTED BIT_28 | 2535 | #define DT_ZIO_SUPPORTED BIT_28 |
| @@ -2572,6 +2573,7 @@ struct qla_hw_data { | |||
| 2572 | #define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha)) | 2573 | #define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha)) |
| 2573 | #define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) | 2574 | #define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) |
| 2574 | 2575 | ||
| 2576 | #define IS_T10_PI_CAPABLE(ha) ((ha)->device_type & DT_T10_PI) | ||
| 2575 | #define IS_IIDMA_CAPABLE(ha) ((ha)->device_type & DT_IIDMA) | 2577 | #define IS_IIDMA_CAPABLE(ha) ((ha)->device_type & DT_IIDMA) |
| 2576 | #define IS_FWI2_CAPABLE(ha) ((ha)->device_type & DT_FWI2) | 2578 | #define IS_FWI2_CAPABLE(ha) ((ha)->device_type & DT_FWI2) |
| 2577 | #define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED) | 2579 | #define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED) |
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h index 691783abfb69..aa69486dc064 100644 --- a/drivers/scsi/qla2xxx/qla_fw.h +++ b/drivers/scsi/qla2xxx/qla_fw.h | |||
| @@ -537,6 +537,11 @@ struct sts_entry_24xx { | |||
| 537 | /* | 537 | /* |
| 538 | * If DIF Error is set in comp_status, these additional fields are | 538 | * If DIF Error is set in comp_status, these additional fields are |
| 539 | * defined: | 539 | * defined: |
| 540 | * | ||
| 541 | * !!! NOTE: Firmware sends expected/actual DIF data in big endian | ||
| 542 | * format; but all of the "data" field gets swab32-d in the beginning | ||
| 543 | * of qla2x00_status_entry(). | ||
| 544 | * | ||
| 540 | * &data[10] : uint8_t report_runt_bg[2]; - computed guard | 545 | * &data[10] : uint8_t report_runt_bg[2]; - computed guard |
| 541 | * &data[12] : uint8_t actual_dif[8]; - DIF Data received | 546 | * &data[12] : uint8_t actual_dif[8]; - DIF Data received |
| 542 | * &data[20] : uint8_t expected_dif[8]; - DIF Data computed | 547 | * &data[20] : uint8_t expected_dif[8]; - DIF Data computed |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index def694271bf7..37da04d3db26 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
| @@ -3838,15 +3838,12 @@ qla2x00_loop_resync(scsi_qla_host_t *vha) | |||
| 3838 | req = vha->req; | 3838 | req = vha->req; |
| 3839 | rsp = req->rsp; | 3839 | rsp = req->rsp; |
| 3840 | 3840 | ||
| 3841 | atomic_set(&vha->loop_state, LOOP_UPDATE); | ||
| 3842 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | 3841 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
| 3843 | if (vha->flags.online) { | 3842 | if (vha->flags.online) { |
| 3844 | if (!(rval = qla2x00_fw_ready(vha))) { | 3843 | if (!(rval = qla2x00_fw_ready(vha))) { |
| 3845 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ | 3844 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
| 3846 | wait_time = 256; | 3845 | wait_time = 256; |
| 3847 | do { | 3846 | do { |
| 3848 | atomic_set(&vha->loop_state, LOOP_UPDATE); | ||
| 3849 | |||
| 3850 | /* Issue a marker after FW becomes ready. */ | 3847 | /* Issue a marker after FW becomes ready. */ |
| 3851 | qla2x00_marker(vha, req, rsp, 0, 0, | 3848 | qla2x00_marker(vha, req, rsp, 0, 0, |
| 3852 | MK_SYNC_ALL); | 3849 | MK_SYNC_ALL); |
diff --git a/drivers/scsi/qla2xxx/qla_inline.h b/drivers/scsi/qla2xxx/qla_inline.h index d2e904bc21c0..9902834e0b74 100644 --- a/drivers/scsi/qla2xxx/qla_inline.h +++ b/drivers/scsi/qla2xxx/qla_inline.h | |||
| @@ -102,3 +102,32 @@ qla2x00_set_fcport_state(fc_port_t *fcport, int state) | |||
| 102 | fcport->d_id.b.al_pa); | 102 | fcport->d_id.b.al_pa); |
| 103 | } | 103 | } |
| 104 | } | 104 | } |
| 105 | |||
| 106 | static inline int | ||
| 107 | qla2x00_hba_err_chk_enabled(srb_t *sp) | ||
| 108 | { | ||
| 109 | /* | ||
| 110 | * Uncomment when corresponding SCSI changes are done. | ||
| 111 | * | ||
| 112 | if (!sp->cmd->prot_chk) | ||
| 113 | return 0; | ||
| 114 | * | ||
| 115 | */ | ||
| 116 | |||
| 117 | switch (scsi_get_prot_op(sp->cmd)) { | ||
| 118 | case SCSI_PROT_READ_STRIP: | ||
| 119 | case SCSI_PROT_WRITE_INSERT: | ||
| 120 | if (ql2xenablehba_err_chk >= 1) | ||
| 121 | return 1; | ||
| 122 | break; | ||
| 123 | case SCSI_PROT_READ_PASS: | ||
| 124 | case SCSI_PROT_WRITE_PASS: | ||
| 125 | if (ql2xenablehba_err_chk >= 2) | ||
| 126 | return 1; | ||
| 127 | break; | ||
| 128 | case SCSI_PROT_READ_INSERT: | ||
| 129 | case SCSI_PROT_WRITE_STRIP: | ||
| 130 | return 1; | ||
| 131 | } | ||
| 132 | return 0; | ||
| 133 | } | ||
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index 49d6906af886..dbec89622a0f 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c | |||
| @@ -709,20 +709,28 @@ struct fw_dif_context { | |||
| 709 | * | 709 | * |
| 710 | */ | 710 | */ |
| 711 | static inline void | 711 | static inline void |
| 712 | qla24xx_set_t10dif_tags(struct scsi_cmnd *cmd, struct fw_dif_context *pkt, | 712 | qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt, |
| 713 | unsigned int protcnt) | 713 | unsigned int protcnt) |
| 714 | { | 714 | { |
| 715 | struct sd_dif_tuple *spt; | 715 | struct scsi_cmnd *cmd = sp->cmd; |
| 716 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); | 716 | scsi_qla_host_t *vha = shost_priv(cmd->device->host); |
| 717 | unsigned char op = scsi_get_prot_op(cmd); | ||
| 718 | 717 | ||
| 719 | switch (scsi_get_prot_type(cmd)) { | 718 | switch (scsi_get_prot_type(cmd)) { |
| 720 | /* For TYPE 0 protection: no checking */ | ||
| 721 | case SCSI_PROT_DIF_TYPE0: | 719 | case SCSI_PROT_DIF_TYPE0: |
| 722 | pkt->ref_tag_mask[0] = 0x00; | 720 | /* |
| 723 | pkt->ref_tag_mask[1] = 0x00; | 721 | * No check for ql2xenablehba_err_chk, as it would be an |
| 724 | pkt->ref_tag_mask[2] = 0x00; | 722 | * I/O error if hba tag generation is not done. |
| 725 | pkt->ref_tag_mask[3] = 0x00; | 723 | */ |
| 724 | pkt->ref_tag = cpu_to_le32((uint32_t) | ||
| 725 | (0xffffffff & scsi_get_lba(cmd))); | ||
| 726 | |||
| 727 | if (!qla2x00_hba_err_chk_enabled(sp)) | ||
| 728 | break; | ||
| 729 | |||
| 730 | pkt->ref_tag_mask[0] = 0xff; | ||
| 731 | pkt->ref_tag_mask[1] = 0xff; | ||
| 732 | pkt->ref_tag_mask[2] = 0xff; | ||
| 733 | pkt->ref_tag_mask[3] = 0xff; | ||
| 726 | break; | 734 | break; |
| 727 | 735 | ||
| 728 | /* | 736 | /* |
| @@ -730,20 +738,16 @@ qla24xx_set_t10dif_tags(struct scsi_cmnd *cmd, struct fw_dif_context *pkt, | |||
| 730 | * match LBA in CDB + N | 738 | * match LBA in CDB + N |
| 731 | */ | 739 | */ |
| 732 | case SCSI_PROT_DIF_TYPE2: | 740 | case SCSI_PROT_DIF_TYPE2: |
| 733 | if (!ql2xenablehba_err_chk) | 741 | pkt->app_tag = __constant_cpu_to_le16(0); |
| 734 | break; | 742 | pkt->app_tag_mask[0] = 0x0; |
| 735 | 743 | pkt->app_tag_mask[1] = 0x0; | |
| 736 | if (scsi_prot_sg_count(cmd)) { | ||
| 737 | spt = page_address(sg_page(scsi_prot_sglist(cmd))) + | ||
| 738 | scsi_prot_sglist(cmd)[0].offset; | ||
| 739 | pkt->app_tag = swab32(spt->app_tag); | ||
| 740 | pkt->app_tag_mask[0] = 0xff; | ||
| 741 | pkt->app_tag_mask[1] = 0xff; | ||
| 742 | } | ||
| 743 | 744 | ||
| 744 | pkt->ref_tag = cpu_to_le32((uint32_t) | 745 | pkt->ref_tag = cpu_to_le32((uint32_t) |
| 745 | (0xffffffff & scsi_get_lba(cmd))); | 746 | (0xffffffff & scsi_get_lba(cmd))); |
| 746 | 747 | ||
| 748 | if (!qla2x00_hba_err_chk_enabled(sp)) | ||
| 749 | break; | ||
| 750 | |||
| 747 | /* enable ALL bytes of the ref tag */ | 751 | /* enable ALL bytes of the ref tag */ |
| 748 | pkt->ref_tag_mask[0] = 0xff; | 752 | pkt->ref_tag_mask[0] = 0xff; |
| 749 | pkt->ref_tag_mask[1] = 0xff; | 753 | pkt->ref_tag_mask[1] = 0xff; |
| @@ -763,26 +767,15 @@ qla24xx_set_t10dif_tags(struct scsi_cmnd *cmd, struct fw_dif_context *pkt, | |||
| 763 | * 16 bit app tag. | 767 | * 16 bit app tag. |
| 764 | */ | 768 | */ |
| 765 | case SCSI_PROT_DIF_TYPE1: | 769 | case SCSI_PROT_DIF_TYPE1: |
| 766 | if (!ql2xenablehba_err_chk) | 770 | pkt->ref_tag = cpu_to_le32((uint32_t) |
| 771 | (0xffffffff & scsi_get_lba(cmd))); | ||
| 772 | pkt->app_tag = __constant_cpu_to_le16(0); | ||
| 773 | pkt->app_tag_mask[0] = 0x0; | ||
| 774 | pkt->app_tag_mask[1] = 0x0; | ||
| 775 | |||
| 776 | if (!qla2x00_hba_err_chk_enabled(sp)) | ||
| 767 | break; | 777 | break; |
| 768 | 778 | ||
| 769 | if (protcnt && (op == SCSI_PROT_WRITE_STRIP || | ||
| 770 | op == SCSI_PROT_WRITE_PASS)) { | ||
| 771 | spt = page_address(sg_page(scsi_prot_sglist(cmd))) + | ||
| 772 | scsi_prot_sglist(cmd)[0].offset; | ||
| 773 | ql_dbg(ql_dbg_io, vha, 0x3008, | ||
| 774 | "LBA from user %p, lba = 0x%x for cmd=%p.\n", | ||
| 775 | spt, (int)spt->ref_tag, cmd); | ||
| 776 | pkt->ref_tag = swab32(spt->ref_tag); | ||
| 777 | pkt->app_tag_mask[0] = 0x0; | ||
| 778 | pkt->app_tag_mask[1] = 0x0; | ||
| 779 | } else { | ||
| 780 | pkt->ref_tag = cpu_to_le32((uint32_t) | ||
| 781 | (0xffffffff & scsi_get_lba(cmd))); | ||
| 782 | pkt->app_tag = __constant_cpu_to_le16(0); | ||
| 783 | pkt->app_tag_mask[0] = 0x0; | ||
| 784 | pkt->app_tag_mask[1] = 0x0; | ||
| 785 | } | ||
| 786 | /* enable ALL bytes of the ref tag */ | 779 | /* enable ALL bytes of the ref tag */ |
| 787 | pkt->ref_tag_mask[0] = 0xff; | 780 | pkt->ref_tag_mask[0] = 0xff; |
| 788 | pkt->ref_tag_mask[1] = 0xff; | 781 | pkt->ref_tag_mask[1] = 0xff; |
| @@ -798,8 +791,162 @@ qla24xx_set_t10dif_tags(struct scsi_cmnd *cmd, struct fw_dif_context *pkt, | |||
| 798 | scsi_get_prot_type(cmd), cmd); | 791 | scsi_get_prot_type(cmd), cmd); |
| 799 | } | 792 | } |
| 800 | 793 | ||
| 794 | struct qla2_sgx { | ||
| 795 | dma_addr_t dma_addr; /* OUT */ | ||
| 796 | uint32_t dma_len; /* OUT */ | ||
| 797 | |||
| 798 | uint32_t tot_bytes; /* IN */ | ||
| 799 | struct scatterlist *cur_sg; /* IN */ | ||
| 800 | |||
| 801 | /* for book keeping, bzero on initial invocation */ | ||
| 802 | uint32_t bytes_consumed; | ||
| 803 | uint32_t num_bytes; | ||
| 804 | uint32_t tot_partial; | ||
| 805 | |||
| 806 | /* for debugging */ | ||
| 807 | uint32_t num_sg; | ||
| 808 | srb_t *sp; | ||
| 809 | }; | ||
| 801 | 810 | ||
| 802 | static int | 811 | static int |
| 812 | qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx, | ||
| 813 | uint32_t *partial) | ||
| 814 | { | ||
| 815 | struct scatterlist *sg; | ||
| 816 | uint32_t cumulative_partial, sg_len; | ||
| 817 | dma_addr_t sg_dma_addr; | ||
| 818 | |||
| 819 | if (sgx->num_bytes == sgx->tot_bytes) | ||
| 820 | return 0; | ||
| 821 | |||
| 822 | sg = sgx->cur_sg; | ||
| 823 | cumulative_partial = sgx->tot_partial; | ||
| 824 | |||
| 825 | sg_dma_addr = sg_dma_address(sg); | ||
| 826 | sg_len = sg_dma_len(sg); | ||
| 827 | |||
| 828 | sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed; | ||
| 829 | |||
| 830 | if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) { | ||
| 831 | sgx->dma_len = (blk_sz - cumulative_partial); | ||
| 832 | sgx->tot_partial = 0; | ||
| 833 | sgx->num_bytes += blk_sz; | ||
| 834 | *partial = 0; | ||
| 835 | } else { | ||
| 836 | sgx->dma_len = sg_len - sgx->bytes_consumed; | ||
| 837 | sgx->tot_partial += sgx->dma_len; | ||
| 838 | *partial = 1; | ||
| 839 | } | ||
| 840 | |||
| 841 | sgx->bytes_consumed += sgx->dma_len; | ||
| 842 | |||
| 843 | if (sg_len == sgx->bytes_consumed) { | ||
| 844 | sg = sg_next(sg); | ||
| 845 | sgx->num_sg++; | ||
| 846 | sgx->cur_sg = sg; | ||
| 847 | sgx->bytes_consumed = 0; | ||
| 848 | } | ||
| 849 | |||
| 850 | return 1; | ||
| 851 | } | ||
| 852 | |||
| 853 | static int | ||
| 854 | qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp, | ||
| 855 | uint32_t *dsd, uint16_t tot_dsds) | ||
| 856 | { | ||
| 857 | void *next_dsd; | ||
| 858 | uint8_t avail_dsds = 0; | ||
| 859 | uint32_t dsd_list_len; | ||
| 860 | struct dsd_dma *dsd_ptr; | ||
| 861 | struct scatterlist *sg_prot; | ||
| 862 | uint32_t *cur_dsd = dsd; | ||
| 863 | uint16_t used_dsds = tot_dsds; | ||
| 864 | |||
| 865 | uint32_t prot_int; | ||
| 866 | uint32_t partial; | ||
| 867 | struct qla2_sgx sgx; | ||
| 868 | dma_addr_t sle_dma; | ||
| 869 | uint32_t sle_dma_len, tot_prot_dma_len = 0; | ||
| 870 | struct scsi_cmnd *cmd = sp->cmd; | ||
| 871 | |||
| 872 | prot_int = cmd->device->sector_size; | ||
| 873 | |||
| 874 | memset(&sgx, 0, sizeof(struct qla2_sgx)); | ||
| 875 | sgx.tot_bytes = scsi_bufflen(sp->cmd); | ||
| 876 | sgx.cur_sg = scsi_sglist(sp->cmd); | ||
| 877 | sgx.sp = sp; | ||
| 878 | |||
| 879 | sg_prot = scsi_prot_sglist(sp->cmd); | ||
| 880 | |||
| 881 | while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) { | ||
| 882 | |||
| 883 | sle_dma = sgx.dma_addr; | ||
| 884 | sle_dma_len = sgx.dma_len; | ||
| 885 | alloc_and_fill: | ||
| 886 | /* Allocate additional continuation packets? */ | ||
| 887 | if (avail_dsds == 0) { | ||
| 888 | avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ? | ||
| 889 | QLA_DSDS_PER_IOCB : used_dsds; | ||
| 890 | dsd_list_len = (avail_dsds + 1) * 12; | ||
| 891 | used_dsds -= avail_dsds; | ||
| 892 | |||
| 893 | /* allocate tracking DS */ | ||
| 894 | dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC); | ||
| 895 | if (!dsd_ptr) | ||
| 896 | return 1; | ||
| 897 | |||
| 898 | /* allocate new list */ | ||
| 899 | dsd_ptr->dsd_addr = next_dsd = | ||
| 900 | dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, | ||
| 901 | &dsd_ptr->dsd_list_dma); | ||
| 902 | |||
| 903 | if (!next_dsd) { | ||
| 904 | /* | ||
| 905 | * Need to cleanup only this dsd_ptr, rest | ||
| 906 | * will be done by sp_free_dma() | ||
| 907 | */ | ||
| 908 | kfree(dsd_ptr); | ||
| 909 | return 1; | ||
| 910 | } | ||
| 911 | |||
| 912 | list_add_tail(&dsd_ptr->list, | ||
| 913 | &((struct crc_context *)sp->ctx)->dsd_list); | ||
| 914 | |||
| 915 | sp->flags |= SRB_CRC_CTX_DSD_VALID; | ||
| 916 | |||
| 917 | /* add new list to cmd iocb or last list */ | ||
| 918 | *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma)); | ||
| 919 | *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma)); | ||
| 920 | *cur_dsd++ = dsd_list_len; | ||
| 921 | cur_dsd = (uint32_t *)next_dsd; | ||
| 922 | } | ||
| 923 | *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); | ||
| 924 | *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); | ||
| 925 | *cur_dsd++ = cpu_to_le32(sle_dma_len); | ||
| 926 | avail_dsds--; | ||
| 927 | |||
| 928 | if (partial == 0) { | ||
| 929 | /* Got a full protection interval */ | ||
| 930 | sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len; | ||
| 931 | sle_dma_len = 8; | ||
| 932 | |||
| 933 | tot_prot_dma_len += sle_dma_len; | ||
| 934 | if (tot_prot_dma_len == sg_dma_len(sg_prot)) { | ||
| 935 | tot_prot_dma_len = 0; | ||
| 936 | sg_prot = sg_next(sg_prot); | ||
| 937 | } | ||
| 938 | |||
| 939 | partial = 1; /* So as to not re-enter this block */ | ||
| 940 | goto alloc_and_fill; | ||
| 941 | } | ||
| 942 | } | ||
| 943 | /* Null termination */ | ||
| 944 | *cur_dsd++ = 0; | ||
| 945 | *cur_dsd++ = 0; | ||
| 946 | *cur_dsd++ = 0; | ||
| 947 | return 0; | ||
| 948 | } | ||
| 949 | static int | ||
| 803 | qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, | 950 | qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, |
| 804 | uint16_t tot_dsds) | 951 | uint16_t tot_dsds) |
| 805 | { | 952 | { |
| @@ -981,7 +1128,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 981 | struct scsi_cmnd *cmd; | 1128 | struct scsi_cmnd *cmd; |
| 982 | struct scatterlist *cur_seg; | 1129 | struct scatterlist *cur_seg; |
| 983 | int sgc; | 1130 | int sgc; |
| 984 | uint32_t total_bytes; | 1131 | uint32_t total_bytes = 0; |
| 985 | uint32_t data_bytes; | 1132 | uint32_t data_bytes; |
| 986 | uint32_t dif_bytes; | 1133 | uint32_t dif_bytes; |
| 987 | uint8_t bundling = 1; | 1134 | uint8_t bundling = 1; |
| @@ -1023,8 +1170,10 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 1023 | __constant_cpu_to_le16(CF_READ_DATA); | 1170 | __constant_cpu_to_le16(CF_READ_DATA); |
| 1024 | } | 1171 | } |
| 1025 | 1172 | ||
| 1026 | tot_prot_dsds = scsi_prot_sg_count(cmd); | 1173 | if ((scsi_get_prot_op(sp->cmd) == SCSI_PROT_READ_INSERT) || |
| 1027 | if (!tot_prot_dsds) | 1174 | (scsi_get_prot_op(sp->cmd) == SCSI_PROT_WRITE_STRIP) || |
| 1175 | (scsi_get_prot_op(sp->cmd) == SCSI_PROT_READ_STRIP) || | ||
| 1176 | (scsi_get_prot_op(sp->cmd) == SCSI_PROT_WRITE_INSERT)) | ||
| 1028 | bundling = 0; | 1177 | bundling = 0; |
| 1029 | 1178 | ||
| 1030 | /* Allocate CRC context from global pool */ | 1179 | /* Allocate CRC context from global pool */ |
| @@ -1047,7 +1196,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 1047 | 1196 | ||
| 1048 | INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list); | 1197 | INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list); |
| 1049 | 1198 | ||
| 1050 | qla24xx_set_t10dif_tags(cmd, (struct fw_dif_context *) | 1199 | qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *) |
| 1051 | &crc_ctx_pkt->ref_tag, tot_prot_dsds); | 1200 | &crc_ctx_pkt->ref_tag, tot_prot_dsds); |
| 1052 | 1201 | ||
| 1053 | cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma)); | 1202 | cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma)); |
| @@ -1076,7 +1225,6 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 1076 | fcp_cmnd->additional_cdb_len |= 2; | 1225 | fcp_cmnd->additional_cdb_len |= 2; |
| 1077 | 1226 | ||
| 1078 | int_to_scsilun(sp->cmd->device->lun, &fcp_cmnd->lun); | 1227 | int_to_scsilun(sp->cmd->device->lun, &fcp_cmnd->lun); |
| 1079 | host_to_fcp_swap((uint8_t *)&fcp_cmnd->lun, sizeof(fcp_cmnd->lun)); | ||
| 1080 | memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len); | 1228 | memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len); |
| 1081 | cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len); | 1229 | cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len); |
| 1082 | cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32( | 1230 | cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32( |
| @@ -1107,15 +1255,28 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 1107 | cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */ | 1255 | cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */ |
| 1108 | 1256 | ||
| 1109 | /* Compute dif len and adjust data len to incude protection */ | 1257 | /* Compute dif len and adjust data len to incude protection */ |
| 1110 | total_bytes = data_bytes; | ||
| 1111 | dif_bytes = 0; | 1258 | dif_bytes = 0; |
| 1112 | blk_size = cmd->device->sector_size; | 1259 | blk_size = cmd->device->sector_size; |
| 1113 | if (scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) { | 1260 | dif_bytes = (data_bytes / blk_size) * 8; |
| 1114 | dif_bytes = (data_bytes / blk_size) * 8; | 1261 | |
| 1115 | total_bytes += dif_bytes; | 1262 | switch (scsi_get_prot_op(sp->cmd)) { |
| 1263 | case SCSI_PROT_READ_INSERT: | ||
| 1264 | case SCSI_PROT_WRITE_STRIP: | ||
| 1265 | total_bytes = data_bytes; | ||
| 1266 | data_bytes += dif_bytes; | ||
| 1267 | break; | ||
| 1268 | |||
| 1269 | case SCSI_PROT_READ_STRIP: | ||
| 1270 | case SCSI_PROT_WRITE_INSERT: | ||
| 1271 | case SCSI_PROT_READ_PASS: | ||
| 1272 | case SCSI_PROT_WRITE_PASS: | ||
| 1273 | total_bytes = data_bytes + dif_bytes; | ||
| 1274 | break; | ||
| 1275 | default: | ||
| 1276 | BUG(); | ||
| 1116 | } | 1277 | } |
| 1117 | 1278 | ||
| 1118 | if (!ql2xenablehba_err_chk) | 1279 | if (!qla2x00_hba_err_chk_enabled(sp)) |
| 1119 | fw_prot_opts |= 0x10; /* Disable Guard tag checking */ | 1280 | fw_prot_opts |= 0x10; /* Disable Guard tag checking */ |
| 1120 | 1281 | ||
| 1121 | if (!bundling) { | 1282 | if (!bundling) { |
| @@ -1151,7 +1312,12 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt, | |||
| 1151 | 1312 | ||
| 1152 | cmd_pkt->control_flags |= | 1313 | cmd_pkt->control_flags |= |
| 1153 | __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE); | 1314 | __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE); |
| 1154 | if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd, | 1315 | |
| 1316 | if (!bundling && tot_prot_dsds) { | ||
| 1317 | if (qla24xx_walk_and_build_sglist_no_difb(ha, sp, | ||
| 1318 | cur_dsd, tot_dsds)) | ||
| 1319 | goto crc_queuing_error; | ||
| 1320 | } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd, | ||
| 1155 | (tot_dsds - tot_prot_dsds))) | 1321 | (tot_dsds - tot_prot_dsds))) |
| 1156 | goto crc_queuing_error; | 1322 | goto crc_queuing_error; |
| 1157 | 1323 | ||
| @@ -1414,6 +1580,22 @@ qla24xx_dif_start_scsi(srb_t *sp) | |||
| 1414 | goto queuing_error; | 1580 | goto queuing_error; |
| 1415 | else | 1581 | else |
| 1416 | sp->flags |= SRB_DMA_VALID; | 1582 | sp->flags |= SRB_DMA_VALID; |
| 1583 | |||
| 1584 | if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) || | ||
| 1585 | (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) { | ||
| 1586 | struct qla2_sgx sgx; | ||
| 1587 | uint32_t partial; | ||
| 1588 | |||
| 1589 | memset(&sgx, 0, sizeof(struct qla2_sgx)); | ||
| 1590 | sgx.tot_bytes = scsi_bufflen(cmd); | ||
| 1591 | sgx.cur_sg = scsi_sglist(cmd); | ||
| 1592 | sgx.sp = sp; | ||
| 1593 | |||
| 1594 | nseg = 0; | ||
| 1595 | while (qla24xx_get_one_block_sg( | ||
| 1596 | cmd->device->sector_size, &sgx, &partial)) | ||
| 1597 | nseg++; | ||
| 1598 | } | ||
| 1417 | } else | 1599 | } else |
| 1418 | nseg = 0; | 1600 | nseg = 0; |
| 1419 | 1601 | ||
| @@ -1428,6 +1610,11 @@ qla24xx_dif_start_scsi(srb_t *sp) | |||
| 1428 | goto queuing_error; | 1610 | goto queuing_error; |
| 1429 | else | 1611 | else |
| 1430 | sp->flags |= SRB_CRC_PROT_DMA_VALID; | 1612 | sp->flags |= SRB_CRC_PROT_DMA_VALID; |
| 1613 | |||
| 1614 | if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) || | ||
| 1615 | (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) { | ||
| 1616 | nseg = scsi_bufflen(cmd) / cmd->device->sector_size; | ||
| 1617 | } | ||
| 1431 | } else { | 1618 | } else { |
| 1432 | nseg = 0; | 1619 | nseg = 0; |
| 1433 | } | 1620 | } |
| @@ -1454,6 +1641,7 @@ qla24xx_dif_start_scsi(srb_t *sp) | |||
| 1454 | /* Build header part of command packet (excluding the OPCODE). */ | 1641 | /* Build header part of command packet (excluding the OPCODE). */ |
| 1455 | req->current_outstanding_cmd = handle; | 1642 | req->current_outstanding_cmd = handle; |
| 1456 | req->outstanding_cmds[handle] = sp; | 1643 | req->outstanding_cmds[handle] = sp; |
| 1644 | sp->handle = handle; | ||
| 1457 | sp->cmd->host_scribble = (unsigned char *)(unsigned long)handle; | 1645 | sp->cmd->host_scribble = (unsigned char *)(unsigned long)handle; |
| 1458 | req->cnt -= req_cnt; | 1646 | req->cnt -= req_cnt; |
| 1459 | 1647 | ||
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index b16b7725dee0..646fc5263d50 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
| @@ -719,7 +719,6 @@ skip_rio: | |||
| 719 | vha->flags.rscn_queue_overflow = 1; | 719 | vha->flags.rscn_queue_overflow = 1; |
| 720 | } | 720 | } |
| 721 | 721 | ||
| 722 | atomic_set(&vha->loop_state, LOOP_UPDATE); | ||
| 723 | atomic_set(&vha->loop_down_timer, 0); | 722 | atomic_set(&vha->loop_down_timer, 0); |
| 724 | vha->flags.management_server_logged_in = 0; | 723 | vha->flags.management_server_logged_in = 0; |
| 725 | 724 | ||
| @@ -1435,25 +1434,27 @@ struct scsi_dif_tuple { | |||
| 1435 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | 1434 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST |
| 1436 | * to indicate to the kernel that the HBA detected error. | 1435 | * to indicate to the kernel that the HBA detected error. |
| 1437 | */ | 1436 | */ |
| 1438 | static inline void | 1437 | static inline int |
| 1439 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) | 1438 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
| 1440 | { | 1439 | { |
| 1441 | struct scsi_qla_host *vha = sp->fcport->vha; | 1440 | struct scsi_qla_host *vha = sp->fcport->vha; |
| 1442 | struct scsi_cmnd *cmd = sp->cmd; | 1441 | struct scsi_cmnd *cmd = sp->cmd; |
| 1443 | struct scsi_dif_tuple *ep = | 1442 | uint8_t *ap = &sts24->data[12]; |
| 1444 | (struct scsi_dif_tuple *)&sts24->data[20]; | 1443 | uint8_t *ep = &sts24->data[20]; |
| 1445 | struct scsi_dif_tuple *ap = | ||
| 1446 | (struct scsi_dif_tuple *)&sts24->data[12]; | ||
| 1447 | uint32_t e_ref_tag, a_ref_tag; | 1444 | uint32_t e_ref_tag, a_ref_tag; |
| 1448 | uint16_t e_app_tag, a_app_tag; | 1445 | uint16_t e_app_tag, a_app_tag; |
| 1449 | uint16_t e_guard, a_guard; | 1446 | uint16_t e_guard, a_guard; |
| 1450 | 1447 | ||
| 1451 | e_ref_tag = be32_to_cpu(ep->ref_tag); | 1448 | /* |
| 1452 | a_ref_tag = be32_to_cpu(ap->ref_tag); | 1449 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() |
| 1453 | e_app_tag = be16_to_cpu(ep->app_tag); | 1450 | * would make guard field appear at offset 2 |
| 1454 | a_app_tag = be16_to_cpu(ap->app_tag); | 1451 | */ |
| 1455 | e_guard = be16_to_cpu(ep->guard); | 1452 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); |
| 1456 | a_guard = be16_to_cpu(ap->guard); | 1453 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); |
| 1454 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | ||
| 1455 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | ||
| 1456 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | ||
| 1457 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | ||
| 1457 | 1458 | ||
| 1458 | ql_dbg(ql_dbg_io, vha, 0x3023, | 1459 | ql_dbg(ql_dbg_io, vha, 0x3023, |
| 1459 | "iocb(s) %p Returned STATUS.\n", sts24); | 1460 | "iocb(s) %p Returned STATUS.\n", sts24); |
| @@ -1465,6 +1466,63 @@ qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) | |||
| 1465 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, | 1466 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
| 1466 | a_app_tag, e_app_tag, a_guard, e_guard); | 1467 | a_app_tag, e_app_tag, a_guard, e_guard); |
| 1467 | 1468 | ||
| 1469 | /* | ||
| 1470 | * Ignore sector if: | ||
| 1471 | * For type 3: ref & app tag is all 'f's | ||
| 1472 | * For type 0,1,2: app tag is all 'f's | ||
| 1473 | */ | ||
| 1474 | if ((a_app_tag == 0xffff) && | ||
| 1475 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || | ||
| 1476 | (a_ref_tag == 0xffffffff))) { | ||
| 1477 | uint32_t blocks_done, resid; | ||
| 1478 | sector_t lba_s = scsi_get_lba(cmd); | ||
| 1479 | |||
| 1480 | /* 2TB boundary case covered automatically with this */ | ||
| 1481 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | ||
| 1482 | |||
| 1483 | resid = scsi_bufflen(cmd) - (blocks_done * | ||
| 1484 | cmd->device->sector_size); | ||
| 1485 | |||
| 1486 | scsi_set_resid(cmd, resid); | ||
| 1487 | cmd->result = DID_OK << 16; | ||
| 1488 | |||
| 1489 | /* Update protection tag */ | ||
| 1490 | if (scsi_prot_sg_count(cmd)) { | ||
| 1491 | uint32_t i, j = 0, k = 0, num_ent; | ||
| 1492 | struct scatterlist *sg; | ||
| 1493 | struct sd_dif_tuple *spt; | ||
| 1494 | |||
| 1495 | /* Patch the corresponding protection tags */ | ||
| 1496 | scsi_for_each_prot_sg(cmd, sg, | ||
| 1497 | scsi_prot_sg_count(cmd), i) { | ||
| 1498 | num_ent = sg_dma_len(sg) / 8; | ||
| 1499 | if (k + num_ent < blocks_done) { | ||
| 1500 | k += num_ent; | ||
| 1501 | continue; | ||
| 1502 | } | ||
| 1503 | j = blocks_done - k - 1; | ||
| 1504 | k = blocks_done; | ||
| 1505 | break; | ||
| 1506 | } | ||
| 1507 | |||
| 1508 | if (k != blocks_done) { | ||
| 1509 | qla_printk(KERN_WARNING, sp->fcport->vha->hw, | ||
| 1510 | "unexpected tag values tag:lba=%x:%lx)\n", | ||
| 1511 | e_ref_tag, lba_s); | ||
| 1512 | return 1; | ||
| 1513 | } | ||
| 1514 | |||
| 1515 | spt = page_address(sg_page(sg)) + sg->offset; | ||
| 1516 | spt += j; | ||
| 1517 | |||
| 1518 | spt->app_tag = 0xffff; | ||
| 1519 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) | ||
| 1520 | spt->ref_tag = 0xffffffff; | ||
| 1521 | } | ||
| 1522 | |||
| 1523 | return 0; | ||
| 1524 | } | ||
| 1525 | |||
| 1468 | /* check guard */ | 1526 | /* check guard */ |
| 1469 | if (e_guard != a_guard) { | 1527 | if (e_guard != a_guard) { |
| 1470 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | 1528 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
| @@ -1472,28 +1530,30 @@ qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) | |||
| 1472 | set_driver_byte(cmd, DRIVER_SENSE); | 1530 | set_driver_byte(cmd, DRIVER_SENSE); |
| 1473 | set_host_byte(cmd, DID_ABORT); | 1531 | set_host_byte(cmd, DID_ABORT); |
| 1474 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | 1532 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; |
| 1475 | return; | 1533 | return 1; |
| 1476 | } | 1534 | } |
| 1477 | 1535 | ||
| 1478 | /* check appl tag */ | 1536 | /* check ref tag */ |
| 1479 | if (e_app_tag != a_app_tag) { | 1537 | if (e_ref_tag != a_ref_tag) { |
| 1480 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | 1538 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
| 1481 | 0x10, 0x2); | 1539 | 0x10, 0x3); |
| 1482 | set_driver_byte(cmd, DRIVER_SENSE); | 1540 | set_driver_byte(cmd, DRIVER_SENSE); |
| 1483 | set_host_byte(cmd, DID_ABORT); | 1541 | set_host_byte(cmd, DID_ABORT); |
| 1484 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | 1542 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; |
| 1485 | return; | 1543 | return 1; |
| 1486 | } | 1544 | } |
| 1487 | 1545 | ||
| 1488 | /* check ref tag */ | 1546 | /* check appl tag */ |
| 1489 | if (e_ref_tag != a_ref_tag) { | 1547 | if (e_app_tag != a_app_tag) { |
| 1490 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | 1548 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
| 1491 | 0x10, 0x3); | 1549 | 0x10, 0x2); |
| 1492 | set_driver_byte(cmd, DRIVER_SENSE); | 1550 | set_driver_byte(cmd, DRIVER_SENSE); |
| 1493 | set_host_byte(cmd, DID_ABORT); | 1551 | set_host_byte(cmd, DID_ABORT); |
| 1494 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | 1552 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; |
| 1495 | return; | 1553 | return 1; |
| 1496 | } | 1554 | } |
| 1555 | |||
| 1556 | return 1; | ||
| 1497 | } | 1557 | } |
| 1498 | 1558 | ||
| 1499 | /** | 1559 | /** |
| @@ -1767,7 +1827,7 @@ check_scsi_status: | |||
| 1767 | break; | 1827 | break; |
| 1768 | 1828 | ||
| 1769 | case CS_DIF_ERROR: | 1829 | case CS_DIF_ERROR: |
| 1770 | qla2x00_handle_dif_error(sp, sts24); | 1830 | logit = qla2x00_handle_dif_error(sp, sts24); |
| 1771 | break; | 1831 | break; |
| 1772 | default: | 1832 | default: |
| 1773 | cp->result = DID_ERROR << 16; | 1833 | cp->result = DID_ERROR << 16; |
| @@ -2468,11 +2528,10 @@ qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) | |||
| 2468 | goto skip_msi; | 2528 | goto skip_msi; |
| 2469 | } | 2529 | } |
| 2470 | 2530 | ||
| 2471 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX || | 2531 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
| 2472 | !QLA_MSIX_FW_MODE_1(ha->fw_attributes))) { | ||
| 2473 | ql_log(ql_log_warn, vha, 0x0035, | 2532 | ql_log(ql_log_warn, vha, 0x0035, |
| 2474 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | 2533 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", |
| 2475 | ha->pdev->revision, ha->fw_attributes); | 2534 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
| 2476 | goto skip_msix; | 2535 | goto skip_msix; |
| 2477 | } | 2536 | } |
| 2478 | 2537 | ||
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c index c706ed370000..f488cc69fc79 100644 --- a/drivers/scsi/qla2xxx/qla_mid.c +++ b/drivers/scsi/qla2xxx/qla_mid.c | |||
| @@ -472,7 +472,7 @@ qla24xx_create_vhost(struct fc_vport *fc_vport) | |||
| 472 | host->can_queue = base_vha->req->length + 128; | 472 | host->can_queue = base_vha->req->length + 128; |
| 473 | host->this_id = 255; | 473 | host->this_id = 255; |
| 474 | host->cmd_per_lun = 3; | 474 | host->cmd_per_lun = 3; |
| 475 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) | 475 | if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) |
| 476 | host->max_cmd_len = 32; | 476 | host->max_cmd_len = 32; |
| 477 | else | 477 | else |
| 478 | host->max_cmd_len = MAX_CMDSZ; | 478 | host->max_cmd_len = MAX_CMDSZ; |
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 5cbf33a50b14..049807cda419 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
| @@ -2208,6 +2208,7 @@ qla82xx_msix_rsp_q(int irq, void *dev_id) | |||
| 2208 | struct qla_hw_data *ha; | 2208 | struct qla_hw_data *ha; |
| 2209 | struct rsp_que *rsp; | 2209 | struct rsp_que *rsp; |
| 2210 | struct device_reg_82xx __iomem *reg; | 2210 | struct device_reg_82xx __iomem *reg; |
| 2211 | unsigned long flags; | ||
| 2211 | 2212 | ||
| 2212 | rsp = (struct rsp_que *) dev_id; | 2213 | rsp = (struct rsp_que *) dev_id; |
| 2213 | if (!rsp) { | 2214 | if (!rsp) { |
| @@ -2218,11 +2219,11 @@ qla82xx_msix_rsp_q(int irq, void *dev_id) | |||
| 2218 | 2219 | ||
| 2219 | ha = rsp->hw; | 2220 | ha = rsp->hw; |
| 2220 | reg = &ha->iobase->isp82; | 2221 | reg = &ha->iobase->isp82; |
| 2221 | spin_lock_irq(&ha->hardware_lock); | 2222 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 2222 | vha = pci_get_drvdata(ha->pdev); | 2223 | vha = pci_get_drvdata(ha->pdev); |
| 2223 | qla24xx_process_response_queue(vha, rsp); | 2224 | qla24xx_process_response_queue(vha, rsp); |
| 2224 | WRT_REG_DWORD(®->host_int, 0); | 2225 | WRT_REG_DWORD(®->host_int, 0); |
| 2225 | spin_unlock_irq(&ha->hardware_lock); | 2226 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 2226 | return IRQ_HANDLED; | 2227 | return IRQ_HANDLED; |
| 2227 | } | 2228 | } |
| 2228 | 2229 | ||
| @@ -2838,6 +2839,16 @@ sufficient_dsds: | |||
| 2838 | int_to_scsilun(sp->cmd->device->lun, &cmd_pkt->lun); | 2839 | int_to_scsilun(sp->cmd->device->lun, &cmd_pkt->lun); |
| 2839 | host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun)); | 2840 | host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun)); |
| 2840 | 2841 | ||
| 2842 | /* build FCP_CMND IU */ | ||
| 2843 | memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd)); | ||
| 2844 | int_to_scsilun(sp->cmd->device->lun, &ctx->fcp_cmnd->lun); | ||
| 2845 | ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len; | ||
| 2846 | |||
| 2847 | if (cmd->sc_data_direction == DMA_TO_DEVICE) | ||
| 2848 | ctx->fcp_cmnd->additional_cdb_len |= 1; | ||
| 2849 | else if (cmd->sc_data_direction == DMA_FROM_DEVICE) | ||
| 2850 | ctx->fcp_cmnd->additional_cdb_len |= 2; | ||
| 2851 | |||
| 2841 | /* | 2852 | /* |
| 2842 | * Update tagged queuing modifier -- default is TSK_SIMPLE (0). | 2853 | * Update tagged queuing modifier -- default is TSK_SIMPLE (0). |
| 2843 | */ | 2854 | */ |
| @@ -2854,16 +2865,6 @@ sufficient_dsds: | |||
| 2854 | } | 2865 | } |
| 2855 | } | 2866 | } |
| 2856 | 2867 | ||
| 2857 | /* build FCP_CMND IU */ | ||
| 2858 | memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd)); | ||
| 2859 | int_to_scsilun(sp->cmd->device->lun, &ctx->fcp_cmnd->lun); | ||
| 2860 | ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len; | ||
| 2861 | |||
| 2862 | if (cmd->sc_data_direction == DMA_TO_DEVICE) | ||
| 2863 | ctx->fcp_cmnd->additional_cdb_len |= 1; | ||
| 2864 | else if (cmd->sc_data_direction == DMA_FROM_DEVICE) | ||
| 2865 | ctx->fcp_cmnd->additional_cdb_len |= 2; | ||
| 2866 | |||
| 2867 | memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len); | 2868 | memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len); |
| 2868 | 2869 | ||
| 2869 | fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 + | 2870 | fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 + |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index e02df276804e..4cace3f20c04 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
| @@ -106,17 +106,21 @@ MODULE_PARM_DESC(ql2xmaxqdepth, | |||
| 106 | "Maximum queue depth to report for target devices."); | 106 | "Maximum queue depth to report for target devices."); |
| 107 | 107 | ||
| 108 | /* Do not change the value of this after module load */ | 108 | /* Do not change the value of this after module load */ |
| 109 | int ql2xenabledif = 1; | 109 | int ql2xenabledif = 0; |
| 110 | module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR); | 110 | module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR); |
| 111 | MODULE_PARM_DESC(ql2xenabledif, | 111 | MODULE_PARM_DESC(ql2xenabledif, |
| 112 | " Enable T10-CRC-DIF " | 112 | " Enable T10-CRC-DIF " |
| 113 | " Default is 0 - No DIF Support. 1 - Enable it"); | 113 | " Default is 0 - No DIF Support. 1 - Enable it" |
| 114 | ", 2 - Enable DIF for all types, except Type 0."); | ||
| 114 | 115 | ||
| 115 | int ql2xenablehba_err_chk; | 116 | int ql2xenablehba_err_chk = 2; |
| 116 | module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR); | 117 | module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR); |
| 117 | MODULE_PARM_DESC(ql2xenablehba_err_chk, | 118 | MODULE_PARM_DESC(ql2xenablehba_err_chk, |
| 118 | " Enable T10-CRC-DIF Error isolation by HBA" | 119 | " Enable T10-CRC-DIF Error isolation by HBA:\n" |
| 119 | " Default is 0 - Error isolation disabled, 1 - Enable it"); | 120 | " Default is 1.\n" |
| 121 | " 0 -- Error isolation disabled\n" | ||
| 122 | " 1 -- Error isolation enabled only for DIX Type 0\n" | ||
| 123 | " 2 -- Error isolation enabled for all Types\n"); | ||
| 120 | 124 | ||
| 121 | int ql2xiidmaenable=1; | 125 | int ql2xiidmaenable=1; |
| 122 | module_param(ql2xiidmaenable, int, S_IRUGO); | 126 | module_param(ql2xiidmaenable, int, S_IRUGO); |
| @@ -909,7 +913,14 @@ qla2xxx_eh_abort(struct scsi_cmnd *cmd) | |||
| 909 | "Abort command mbx success.\n"); | 913 | "Abort command mbx success.\n"); |
| 910 | wait = 1; | 914 | wait = 1; |
| 911 | } | 915 | } |
| 916 | |||
| 917 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
| 912 | qla2x00_sp_compl(ha, sp); | 918 | qla2x00_sp_compl(ha, sp); |
| 919 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
| 920 | |||
| 921 | /* Did the command return during mailbox execution? */ | ||
| 922 | if (ret == FAILED && !CMD_SP(cmd)) | ||
| 923 | ret = SUCCESS; | ||
| 913 | 924 | ||
| 914 | /* Wait for the command to be returned. */ | 925 | /* Wait for the command to be returned. */ |
| 915 | if (wait) { | 926 | if (wait) { |
| @@ -2251,7 +2262,7 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
| 2251 | host->this_id = 255; | 2262 | host->this_id = 255; |
| 2252 | host->cmd_per_lun = 3; | 2263 | host->cmd_per_lun = 3; |
| 2253 | host->unique_id = host->host_no; | 2264 | host->unique_id = host->host_no; |
| 2254 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) | 2265 | if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) |
| 2255 | host->max_cmd_len = 32; | 2266 | host->max_cmd_len = 32; |
| 2256 | else | 2267 | else |
| 2257 | host->max_cmd_len = MAX_CMDSZ; | 2268 | host->max_cmd_len = MAX_CMDSZ; |
| @@ -2378,13 +2389,16 @@ skip_dpc: | |||
| 2378 | "Detected hba at address=%p.\n", | 2389 | "Detected hba at address=%p.\n", |
| 2379 | ha); | 2390 | ha); |
| 2380 | 2391 | ||
| 2381 | if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) { | 2392 | if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { |
| 2382 | if (ha->fw_attributes & BIT_4) { | 2393 | if (ha->fw_attributes & BIT_4) { |
| 2394 | int prot = 0; | ||
| 2383 | base_vha->flags.difdix_supported = 1; | 2395 | base_vha->flags.difdix_supported = 1; |
| 2384 | ql_dbg(ql_dbg_init, base_vha, 0x00f1, | 2396 | ql_dbg(ql_dbg_init, base_vha, 0x00f1, |
| 2385 | "Registering for DIF/DIX type 1 and 3 protection.\n"); | 2397 | "Registering for DIF/DIX type 1 and 3 protection.\n"); |
| 2398 | if (ql2xenabledif == 1) | ||
| 2399 | prot = SHOST_DIX_TYPE0_PROTECTION; | ||
| 2386 | scsi_host_set_prot(host, | 2400 | scsi_host_set_prot(host, |
| 2387 | SHOST_DIF_TYPE1_PROTECTION | 2401 | prot | SHOST_DIF_TYPE1_PROTECTION |
| 2388 | | SHOST_DIF_TYPE2_PROTECTION | 2402 | | SHOST_DIF_TYPE2_PROTECTION |
| 2389 | | SHOST_DIF_TYPE3_PROTECTION | 2403 | | SHOST_DIF_TYPE3_PROTECTION |
| 2390 | | SHOST_DIX_TYPE1_PROTECTION | 2404 | | SHOST_DIX_TYPE1_PROTECTION |
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index 062c97bf62f5..13b6357c1fa2 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | /* | 7 | /* |
| 8 | * Driver version | 8 | * Driver version |
| 9 | */ | 9 | */ |
| 10 | #define QLA2XXX_VERSION "8.03.07.03-k" | 10 | #define QLA2XXX_VERSION "8.03.07.07-k" |
| 11 | 11 | ||
| 12 | #define QLA_DRIVER_MAJOR_VER 8 | 12 | #define QLA_DRIVER_MAJOR_VER 8 |
| 13 | #define QLA_DRIVER_MINOR_VER 3 | 13 | #define QLA_DRIVER_MINOR_VER 3 |
diff --git a/drivers/scsi/qla4xxx/Kconfig b/drivers/scsi/qla4xxx/Kconfig index 2c33ce6eac1e..0f5599e0abf6 100644 --- a/drivers/scsi/qla4xxx/Kconfig +++ b/drivers/scsi/qla4xxx/Kconfig | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | config SCSI_QLA_ISCSI | 1 | config SCSI_QLA_ISCSI |
| 2 | tristate "QLogic ISP4XXX and ISP82XX host adapter family support" | 2 | tristate "QLogic ISP4XXX and ISP82XX host adapter family support" |
| 3 | depends on PCI && SCSI | 3 | depends on PCI && SCSI && NET |
| 4 | select SCSI_ISCSI_ATTRS | 4 | select SCSI_ISCSI_ATTRS |
| 5 | ---help--- | 5 | ---help--- |
| 6 | This driver supports the QLogic 40xx (ISP4XXX) and 8022 (ISP82XX) | 6 | This driver supports the QLogic 40xx (ISP4XXX) and 8022 (ISP82XX) |
diff --git a/drivers/staging/comedi/drivers/ni_labpc.c b/drivers/staging/comedi/drivers/ni_labpc.c index 6859af0778cf..7611def97d06 100644 --- a/drivers/staging/comedi/drivers/ni_labpc.c +++ b/drivers/staging/comedi/drivers/ni_labpc.c | |||
| @@ -241,8 +241,10 @@ static int labpc_eeprom_write_insn(struct comedi_device *dev, | |||
| 241 | struct comedi_insn *insn, | 241 | struct comedi_insn *insn, |
| 242 | unsigned int *data); | 242 | unsigned int *data); |
| 243 | static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd); | 243 | static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd); |
| 244 | #ifdef CONFIG_COMEDI_PCI | 244 | #ifdef CONFIG_ISA_DMA_API |
| 245 | static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd); | 245 | static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd); |
| 246 | #endif | ||
| 247 | #ifdef CONFIG_COMEDI_PCI | ||
| 246 | static int labpc_find_device(struct comedi_device *dev, int bus, int slot); | 248 | static int labpc_find_device(struct comedi_device *dev, int bus, int slot); |
| 247 | #endif | 249 | #endif |
| 248 | static int labpc_dio_mem_callback(int dir, int port, int data, | 250 | static int labpc_dio_mem_callback(int dir, int port, int data, |
diff --git a/drivers/target/iscsi/iscsi_target_parameters.c b/drivers/target/iscsi/iscsi_target_parameters.c index 497b2e718a76..5b773160200f 100644 --- a/drivers/target/iscsi/iscsi_target_parameters.c +++ b/drivers/target/iscsi/iscsi_target_parameters.c | |||
| @@ -1430,7 +1430,7 @@ static int iscsi_enforce_integrity_rules( | |||
| 1430 | u8 DataSequenceInOrder = 0; | 1430 | u8 DataSequenceInOrder = 0; |
| 1431 | u8 ErrorRecoveryLevel = 0, SessionType = 0; | 1431 | u8 ErrorRecoveryLevel = 0, SessionType = 0; |
| 1432 | u8 IFMarker = 0, OFMarker = 0; | 1432 | u8 IFMarker = 0, OFMarker = 0; |
| 1433 | u8 IFMarkInt_Reject = 0, OFMarkInt_Reject = 0; | 1433 | u8 IFMarkInt_Reject = 1, OFMarkInt_Reject = 1; |
| 1434 | u32 FirstBurstLength = 0, MaxBurstLength = 0; | 1434 | u32 FirstBurstLength = 0, MaxBurstLength = 0; |
| 1435 | struct iscsi_param *param = NULL; | 1435 | struct iscsi_param *param = NULL; |
| 1436 | 1436 | ||
diff --git a/drivers/target/iscsi/iscsi_target_util.c b/drivers/target/iscsi/iscsi_target_util.c index a0d23bc0fc98..f00137f377b2 100644 --- a/drivers/target/iscsi/iscsi_target_util.c +++ b/drivers/target/iscsi/iscsi_target_util.c | |||
| @@ -875,40 +875,6 @@ void iscsit_inc_session_usage_count(struct iscsi_session *sess) | |||
| 875 | } | 875 | } |
| 876 | 876 | ||
| 877 | /* | 877 | /* |
| 878 | * Used before iscsi_do[rx,tx]_data() to determine iov and [rx,tx]_marker | ||
| 879 | * array counts needed for sync and steering. | ||
| 880 | */ | ||
| 881 | static int iscsit_determine_sync_and_steering_counts( | ||
| 882 | struct iscsi_conn *conn, | ||
| 883 | struct iscsi_data_count *count) | ||
| 884 | { | ||
| 885 | u32 length = count->data_length; | ||
| 886 | u32 marker, markint; | ||
| 887 | |||
| 888 | count->sync_and_steering = 1; | ||
| 889 | |||
| 890 | marker = (count->type == ISCSI_RX_DATA) ? | ||
| 891 | conn->of_marker : conn->if_marker; | ||
| 892 | markint = (count->type == ISCSI_RX_DATA) ? | ||
| 893 | (conn->conn_ops->OFMarkInt * 4) : | ||
| 894 | (conn->conn_ops->IFMarkInt * 4); | ||
| 895 | count->ss_iov_count = count->iov_count; | ||
| 896 | |||
| 897 | while (length > 0) { | ||
| 898 | if (length >= marker) { | ||
| 899 | count->ss_iov_count += 3; | ||
| 900 | count->ss_marker_count += 2; | ||
| 901 | |||
| 902 | length -= marker; | ||
| 903 | marker = markint; | ||
| 904 | } else | ||
| 905 | length = 0; | ||
| 906 | } | ||
| 907 | |||
| 908 | return 0; | ||
| 909 | } | ||
| 910 | |||
| 911 | /* | ||
| 912 | * Setup conn->if_marker and conn->of_marker values based upon | 878 | * Setup conn->if_marker and conn->of_marker values based upon |
| 913 | * the initial marker-less interval. (see iSCSI v19 A.2) | 879 | * the initial marker-less interval. (see iSCSI v19 A.2) |
| 914 | */ | 880 | */ |
| @@ -1290,7 +1256,7 @@ int iscsit_fe_sendpage_sg( | |||
| 1290 | struct kvec iov; | 1256 | struct kvec iov; |
| 1291 | u32 tx_hdr_size, data_len; | 1257 | u32 tx_hdr_size, data_len; |
| 1292 | u32 offset = cmd->first_data_sg_off; | 1258 | u32 offset = cmd->first_data_sg_off; |
| 1293 | int tx_sent; | 1259 | int tx_sent, iov_off; |
| 1294 | 1260 | ||
| 1295 | send_hdr: | 1261 | send_hdr: |
| 1296 | tx_hdr_size = ISCSI_HDR_LEN; | 1262 | tx_hdr_size = ISCSI_HDR_LEN; |
| @@ -1310,9 +1276,19 @@ send_hdr: | |||
| 1310 | } | 1276 | } |
| 1311 | 1277 | ||
| 1312 | data_len = cmd->tx_size - tx_hdr_size - cmd->padding; | 1278 | data_len = cmd->tx_size - tx_hdr_size - cmd->padding; |
| 1313 | if (conn->conn_ops->DataDigest) | 1279 | /* |
| 1280 | * Set iov_off used by padding and data digest tx_data() calls below | ||
| 1281 | * in order to determine proper offset into cmd->iov_data[] | ||
| 1282 | */ | ||
| 1283 | if (conn->conn_ops->DataDigest) { | ||
| 1314 | data_len -= ISCSI_CRC_LEN; | 1284 | data_len -= ISCSI_CRC_LEN; |
| 1315 | 1285 | if (cmd->padding) | |
| 1286 | iov_off = (cmd->iov_data_count - 2); | ||
| 1287 | else | ||
| 1288 | iov_off = (cmd->iov_data_count - 1); | ||
| 1289 | } else { | ||
| 1290 | iov_off = (cmd->iov_data_count - 1); | ||
| 1291 | } | ||
| 1316 | /* | 1292 | /* |
| 1317 | * Perform sendpage() for each page in the scatterlist | 1293 | * Perform sendpage() for each page in the scatterlist |
| 1318 | */ | 1294 | */ |
| @@ -1341,8 +1317,7 @@ send_pg: | |||
| 1341 | 1317 | ||
| 1342 | send_padding: | 1318 | send_padding: |
| 1343 | if (cmd->padding) { | 1319 | if (cmd->padding) { |
| 1344 | struct kvec *iov_p = | 1320 | struct kvec *iov_p = &cmd->iov_data[iov_off++]; |
| 1345 | &cmd->iov_data[cmd->iov_data_count-1]; | ||
| 1346 | 1321 | ||
| 1347 | tx_sent = tx_data(conn, iov_p, 1, cmd->padding); | 1322 | tx_sent = tx_data(conn, iov_p, 1, cmd->padding); |
| 1348 | if (cmd->padding != tx_sent) { | 1323 | if (cmd->padding != tx_sent) { |
| @@ -1356,8 +1331,7 @@ send_padding: | |||
| 1356 | 1331 | ||
| 1357 | send_datacrc: | 1332 | send_datacrc: |
| 1358 | if (conn->conn_ops->DataDigest) { | 1333 | if (conn->conn_ops->DataDigest) { |
| 1359 | struct kvec *iov_d = | 1334 | struct kvec *iov_d = &cmd->iov_data[iov_off]; |
| 1360 | &cmd->iov_data[cmd->iov_data_count]; | ||
| 1361 | 1335 | ||
| 1362 | tx_sent = tx_data(conn, iov_d, 1, ISCSI_CRC_LEN); | 1336 | tx_sent = tx_data(conn, iov_d, 1, ISCSI_CRC_LEN); |
| 1363 | if (ISCSI_CRC_LEN != tx_sent) { | 1337 | if (ISCSI_CRC_LEN != tx_sent) { |
| @@ -1431,8 +1405,7 @@ static int iscsit_do_rx_data( | |||
| 1431 | struct iscsi_data_count *count) | 1405 | struct iscsi_data_count *count) |
| 1432 | { | 1406 | { |
| 1433 | int data = count->data_length, rx_loop = 0, total_rx = 0, iov_len; | 1407 | int data = count->data_length, rx_loop = 0, total_rx = 0, iov_len; |
| 1434 | u32 rx_marker_val[count->ss_marker_count], rx_marker_iov = 0; | 1408 | struct kvec *iov_p; |
| 1435 | struct kvec iov[count->ss_iov_count], *iov_p; | ||
| 1436 | struct msghdr msg; | 1409 | struct msghdr msg; |
| 1437 | 1410 | ||
| 1438 | if (!conn || !conn->sock || !conn->conn_ops) | 1411 | if (!conn || !conn->sock || !conn->conn_ops) |
| @@ -1440,93 +1413,8 @@ static int iscsit_do_rx_data( | |||
| 1440 | 1413 | ||
| 1441 | memset(&msg, 0, sizeof(struct msghdr)); | 1414 | memset(&msg, 0, sizeof(struct msghdr)); |
| 1442 | 1415 | ||
| 1443 | if (count->sync_and_steering) { | 1416 | iov_p = count->iov; |
| 1444 | int size = 0; | 1417 | iov_len = count->iov_count; |
| 1445 | u32 i, orig_iov_count = 0; | ||
| 1446 | u32 orig_iov_len = 0, orig_iov_loc = 0; | ||
| 1447 | u32 iov_count = 0, per_iov_bytes = 0; | ||
| 1448 | u32 *rx_marker, old_rx_marker = 0; | ||
| 1449 | struct kvec *iov_record; | ||
| 1450 | |||
| 1451 | memset(&rx_marker_val, 0, | ||
| 1452 | count->ss_marker_count * sizeof(u32)); | ||
| 1453 | memset(&iov, 0, count->ss_iov_count * sizeof(struct kvec)); | ||
| 1454 | |||
| 1455 | iov_record = count->iov; | ||
| 1456 | orig_iov_count = count->iov_count; | ||
| 1457 | rx_marker = &conn->of_marker; | ||
| 1458 | |||
| 1459 | i = 0; | ||
| 1460 | size = data; | ||
| 1461 | orig_iov_len = iov_record[orig_iov_loc].iov_len; | ||
| 1462 | while (size > 0) { | ||
| 1463 | pr_debug("rx_data: #1 orig_iov_len %u," | ||
| 1464 | " orig_iov_loc %u\n", orig_iov_len, orig_iov_loc); | ||
| 1465 | pr_debug("rx_data: #2 rx_marker %u, size" | ||
| 1466 | " %u\n", *rx_marker, size); | ||
| 1467 | |||
| 1468 | if (orig_iov_len >= *rx_marker) { | ||
| 1469 | iov[iov_count].iov_len = *rx_marker; | ||
| 1470 | iov[iov_count++].iov_base = | ||
| 1471 | (iov_record[orig_iov_loc].iov_base + | ||
| 1472 | per_iov_bytes); | ||
| 1473 | |||
| 1474 | iov[iov_count].iov_len = (MARKER_SIZE / 2); | ||
| 1475 | iov[iov_count++].iov_base = | ||
| 1476 | &rx_marker_val[rx_marker_iov++]; | ||
| 1477 | iov[iov_count].iov_len = (MARKER_SIZE / 2); | ||
| 1478 | iov[iov_count++].iov_base = | ||
| 1479 | &rx_marker_val[rx_marker_iov++]; | ||
| 1480 | old_rx_marker = *rx_marker; | ||
| 1481 | |||
| 1482 | /* | ||
| 1483 | * OFMarkInt is in 32-bit words. | ||
| 1484 | */ | ||
| 1485 | *rx_marker = (conn->conn_ops->OFMarkInt * 4); | ||
| 1486 | size -= old_rx_marker; | ||
| 1487 | orig_iov_len -= old_rx_marker; | ||
| 1488 | per_iov_bytes += old_rx_marker; | ||
| 1489 | |||
| 1490 | pr_debug("rx_data: #3 new_rx_marker" | ||
| 1491 | " %u, size %u\n", *rx_marker, size); | ||
| 1492 | } else { | ||
| 1493 | iov[iov_count].iov_len = orig_iov_len; | ||
| 1494 | iov[iov_count++].iov_base = | ||
| 1495 | (iov_record[orig_iov_loc].iov_base + | ||
| 1496 | per_iov_bytes); | ||
| 1497 | |||
| 1498 | per_iov_bytes = 0; | ||
| 1499 | *rx_marker -= orig_iov_len; | ||
| 1500 | size -= orig_iov_len; | ||
| 1501 | |||
| 1502 | if (size) | ||
| 1503 | orig_iov_len = | ||
| 1504 | iov_record[++orig_iov_loc].iov_len; | ||
| 1505 | |||
| 1506 | pr_debug("rx_data: #4 new_rx_marker" | ||
| 1507 | " %u, size %u\n", *rx_marker, size); | ||
| 1508 | } | ||
| 1509 | } | ||
| 1510 | data += (rx_marker_iov * (MARKER_SIZE / 2)); | ||
| 1511 | |||
| 1512 | iov_p = &iov[0]; | ||
| 1513 | iov_len = iov_count; | ||
| 1514 | |||
| 1515 | if (iov_count > count->ss_iov_count) { | ||
| 1516 | pr_err("iov_count: %d, count->ss_iov_count:" | ||
| 1517 | " %d\n", iov_count, count->ss_iov_count); | ||
| 1518 | return -1; | ||
| 1519 | } | ||
| 1520 | if (rx_marker_iov > count->ss_marker_count) { | ||
| 1521 | pr_err("rx_marker_iov: %d, count->ss_marker" | ||
| 1522 | "_count: %d\n", rx_marker_iov, | ||
| 1523 | count->ss_marker_count); | ||
| 1524 | return -1; | ||
| 1525 | } | ||
| 1526 | } else { | ||
| 1527 | iov_p = count->iov; | ||
| 1528 | iov_len = count->iov_count; | ||
| 1529 | } | ||
| 1530 | 1418 | ||
| 1531 | while (total_rx < data) { | 1419 | while (total_rx < data) { |
| 1532 | rx_loop = kernel_recvmsg(conn->sock, &msg, iov_p, iov_len, | 1420 | rx_loop = kernel_recvmsg(conn->sock, &msg, iov_p, iov_len, |
| @@ -1541,16 +1429,6 @@ static int iscsit_do_rx_data( | |||
| 1541 | rx_loop, total_rx, data); | 1429 | rx_loop, total_rx, data); |
| 1542 | } | 1430 | } |
| 1543 | 1431 | ||
| 1544 | if (count->sync_and_steering) { | ||
| 1545 | int j; | ||
| 1546 | for (j = 0; j < rx_marker_iov; j++) { | ||
| 1547 | pr_debug("rx_data: #5 j: %d, offset: %d\n", | ||
| 1548 | j, rx_marker_val[j]); | ||
| 1549 | conn->of_marker_offset = rx_marker_val[j]; | ||
| 1550 | } | ||
| 1551 | total_rx -= (rx_marker_iov * (MARKER_SIZE / 2)); | ||
| 1552 | } | ||
| 1553 | |||
| 1554 | return total_rx; | 1432 | return total_rx; |
| 1555 | } | 1433 | } |
| 1556 | 1434 | ||
| @@ -1559,8 +1437,7 @@ static int iscsit_do_tx_data( | |||
| 1559 | struct iscsi_data_count *count) | 1437 | struct iscsi_data_count *count) |
| 1560 | { | 1438 | { |
| 1561 | int data = count->data_length, total_tx = 0, tx_loop = 0, iov_len; | 1439 | int data = count->data_length, total_tx = 0, tx_loop = 0, iov_len; |
| 1562 | u32 tx_marker_val[count->ss_marker_count], tx_marker_iov = 0; | 1440 | struct kvec *iov_p; |
| 1563 | struct kvec iov[count->ss_iov_count], *iov_p; | ||
| 1564 | struct msghdr msg; | 1441 | struct msghdr msg; |
| 1565 | 1442 | ||
| 1566 | if (!conn || !conn->sock || !conn->conn_ops) | 1443 | if (!conn || !conn->sock || !conn->conn_ops) |
| @@ -1573,98 +1450,8 @@ static int iscsit_do_tx_data( | |||
| 1573 | 1450 | ||
| 1574 | memset(&msg, 0, sizeof(struct msghdr)); | 1451 | memset(&msg, 0, sizeof(struct msghdr)); |
| 1575 | 1452 | ||
| 1576 | if (count->sync_and_steering) { | 1453 | iov_p = count->iov; |
| 1577 | int size = 0; | 1454 | iov_len = count->iov_count; |
| 1578 | u32 i, orig_iov_count = 0; | ||
| 1579 | u32 orig_iov_len = 0, orig_iov_loc = 0; | ||
| 1580 | u32 iov_count = 0, per_iov_bytes = 0; | ||
| 1581 | u32 *tx_marker, old_tx_marker = 0; | ||
| 1582 | struct kvec *iov_record; | ||
| 1583 | |||
| 1584 | memset(&tx_marker_val, 0, | ||
| 1585 | count->ss_marker_count * sizeof(u32)); | ||
| 1586 | memset(&iov, 0, count->ss_iov_count * sizeof(struct kvec)); | ||
| 1587 | |||
| 1588 | iov_record = count->iov; | ||
| 1589 | orig_iov_count = count->iov_count; | ||
| 1590 | tx_marker = &conn->if_marker; | ||
| 1591 | |||
| 1592 | i = 0; | ||
| 1593 | size = data; | ||
| 1594 | orig_iov_len = iov_record[orig_iov_loc].iov_len; | ||
| 1595 | while (size > 0) { | ||
| 1596 | pr_debug("tx_data: #1 orig_iov_len %u," | ||
| 1597 | " orig_iov_loc %u\n", orig_iov_len, orig_iov_loc); | ||
| 1598 | pr_debug("tx_data: #2 tx_marker %u, size" | ||
| 1599 | " %u\n", *tx_marker, size); | ||
| 1600 | |||
| 1601 | if (orig_iov_len >= *tx_marker) { | ||
| 1602 | iov[iov_count].iov_len = *tx_marker; | ||
| 1603 | iov[iov_count++].iov_base = | ||
| 1604 | (iov_record[orig_iov_loc].iov_base + | ||
| 1605 | per_iov_bytes); | ||
| 1606 | |||
| 1607 | tx_marker_val[tx_marker_iov] = | ||
| 1608 | (size - *tx_marker); | ||
| 1609 | iov[iov_count].iov_len = (MARKER_SIZE / 2); | ||
| 1610 | iov[iov_count++].iov_base = | ||
| 1611 | &tx_marker_val[tx_marker_iov++]; | ||
| 1612 | iov[iov_count].iov_len = (MARKER_SIZE / 2); | ||
| 1613 | iov[iov_count++].iov_base = | ||
| 1614 | &tx_marker_val[tx_marker_iov++]; | ||
| 1615 | old_tx_marker = *tx_marker; | ||
| 1616 | |||
| 1617 | /* | ||
| 1618 | * IFMarkInt is in 32-bit words. | ||
| 1619 | */ | ||
| 1620 | *tx_marker = (conn->conn_ops->IFMarkInt * 4); | ||
| 1621 | size -= old_tx_marker; | ||
| 1622 | orig_iov_len -= old_tx_marker; | ||
| 1623 | per_iov_bytes += old_tx_marker; | ||
| 1624 | |||
| 1625 | pr_debug("tx_data: #3 new_tx_marker" | ||
| 1626 | " %u, size %u\n", *tx_marker, size); | ||
| 1627 | pr_debug("tx_data: #4 offset %u\n", | ||
| 1628 | tx_marker_val[tx_marker_iov-1]); | ||
| 1629 | } else { | ||
| 1630 | iov[iov_count].iov_len = orig_iov_len; | ||
| 1631 | iov[iov_count++].iov_base | ||
| 1632 | = (iov_record[orig_iov_loc].iov_base + | ||
| 1633 | per_iov_bytes); | ||
| 1634 | |||
| 1635 | per_iov_bytes = 0; | ||
| 1636 | *tx_marker -= orig_iov_len; | ||
| 1637 | size -= orig_iov_len; | ||
| 1638 | |||
| 1639 | if (size) | ||
| 1640 | orig_iov_len = | ||
| 1641 | iov_record[++orig_iov_loc].iov_len; | ||
| 1642 | |||
| 1643 | pr_debug("tx_data: #5 new_tx_marker" | ||
| 1644 | " %u, size %u\n", *tx_marker, size); | ||
| 1645 | } | ||
| 1646 | } | ||
| 1647 | |||
| 1648 | data += (tx_marker_iov * (MARKER_SIZE / 2)); | ||
| 1649 | |||
| 1650 | iov_p = &iov[0]; | ||
| 1651 | iov_len = iov_count; | ||
| 1652 | |||
| 1653 | if (iov_count > count->ss_iov_count) { | ||
| 1654 | pr_err("iov_count: %d, count->ss_iov_count:" | ||
| 1655 | " %d\n", iov_count, count->ss_iov_count); | ||
| 1656 | return -1; | ||
| 1657 | } | ||
| 1658 | if (tx_marker_iov > count->ss_marker_count) { | ||
| 1659 | pr_err("tx_marker_iov: %d, count->ss_marker" | ||
| 1660 | "_count: %d\n", tx_marker_iov, | ||
| 1661 | count->ss_marker_count); | ||
| 1662 | return -1; | ||
| 1663 | } | ||
| 1664 | } else { | ||
| 1665 | iov_p = count->iov; | ||
| 1666 | iov_len = count->iov_count; | ||
| 1667 | } | ||
| 1668 | 1455 | ||
| 1669 | while (total_tx < data) { | 1456 | while (total_tx < data) { |
| 1670 | tx_loop = kernel_sendmsg(conn->sock, &msg, iov_p, iov_len, | 1457 | tx_loop = kernel_sendmsg(conn->sock, &msg, iov_p, iov_len, |
| @@ -1679,9 +1466,6 @@ static int iscsit_do_tx_data( | |||
| 1679 | tx_loop, total_tx, data); | 1466 | tx_loop, total_tx, data); |
| 1680 | } | 1467 | } |
| 1681 | 1468 | ||
| 1682 | if (count->sync_and_steering) | ||
| 1683 | total_tx -= (tx_marker_iov * (MARKER_SIZE / 2)); | ||
| 1684 | |||
| 1685 | return total_tx; | 1469 | return total_tx; |
| 1686 | } | 1470 | } |
| 1687 | 1471 | ||
| @@ -1702,12 +1486,6 @@ int rx_data( | |||
| 1702 | c.data_length = data; | 1486 | c.data_length = data; |
| 1703 | c.type = ISCSI_RX_DATA; | 1487 | c.type = ISCSI_RX_DATA; |
| 1704 | 1488 | ||
| 1705 | if (conn->conn_ops->OFMarker && | ||
| 1706 | (conn->conn_state >= TARG_CONN_STATE_LOGGED_IN)) { | ||
| 1707 | if (iscsit_determine_sync_and_steering_counts(conn, &c) < 0) | ||
| 1708 | return -1; | ||
| 1709 | } | ||
| 1710 | |||
| 1711 | return iscsit_do_rx_data(conn, &c); | 1489 | return iscsit_do_rx_data(conn, &c); |
| 1712 | } | 1490 | } |
| 1713 | 1491 | ||
| @@ -1728,12 +1506,6 @@ int tx_data( | |||
| 1728 | c.data_length = data; | 1506 | c.data_length = data; |
| 1729 | c.type = ISCSI_TX_DATA; | 1507 | c.type = ISCSI_TX_DATA; |
| 1730 | 1508 | ||
| 1731 | if (conn->conn_ops->IFMarker && | ||
| 1732 | (conn->conn_state >= TARG_CONN_STATE_LOGGED_IN)) { | ||
| 1733 | if (iscsit_determine_sync_and_steering_counts(conn, &c) < 0) | ||
| 1734 | return -1; | ||
| 1735 | } | ||
| 1736 | |||
| 1737 | return iscsit_do_tx_data(conn, &c); | 1509 | return iscsit_do_tx_data(conn, &c); |
| 1738 | } | 1510 | } |
| 1739 | 1511 | ||
diff --git a/drivers/target/target_core_cdb.c b/drivers/target/target_core_cdb.c index 89ae923c5da6..f04d4ef99dca 100644 --- a/drivers/target/target_core_cdb.c +++ b/drivers/target/target_core_cdb.c | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | */ | 24 | */ |
| 25 | 25 | ||
| 26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
| 27 | #include <linux/ctype.h> | ||
| 27 | #include <asm/unaligned.h> | 28 | #include <asm/unaligned.h> |
| 28 | #include <scsi/scsi.h> | 29 | #include <scsi/scsi.h> |
| 29 | 30 | ||
| @@ -154,6 +155,37 @@ target_emulate_evpd_80(struct se_cmd *cmd, unsigned char *buf) | |||
| 154 | return 0; | 155 | return 0; |
| 155 | } | 156 | } |
| 156 | 157 | ||
| 158 | static void | ||
| 159 | target_parse_naa_6h_vendor_specific(struct se_device *dev, unsigned char *buf_off) | ||
| 160 | { | ||
| 161 | unsigned char *p = &dev->se_sub_dev->t10_wwn.unit_serial[0]; | ||
| 162 | unsigned char *buf = buf_off; | ||
| 163 | int cnt = 0, next = 1; | ||
| 164 | /* | ||
| 165 | * Generate up to 36 bits of VENDOR SPECIFIC IDENTIFIER starting on | ||
| 166 | * byte 3 bit 3-0 for NAA IEEE Registered Extended DESIGNATOR field | ||
| 167 | * format, followed by 64 bits of VENDOR SPECIFIC IDENTIFIER EXTENSION | ||
| 168 | * to complete the payload. These are based from VPD=0x80 PRODUCT SERIAL | ||
| 169 | * NUMBER set via vpd_unit_serial in target_core_configfs.c to ensure | ||
| 170 | * per device uniqeness. | ||
| 171 | */ | ||
| 172 | while (*p != '\0') { | ||
| 173 | if (cnt >= 13) | ||
| 174 | break; | ||
| 175 | if (!isxdigit(*p)) { | ||
| 176 | p++; | ||
| 177 | continue; | ||
| 178 | } | ||
| 179 | if (next != 0) { | ||
| 180 | buf[cnt++] |= hex_to_bin(*p++); | ||
| 181 | next = 0; | ||
| 182 | } else { | ||
| 183 | buf[cnt] = hex_to_bin(*p++) << 4; | ||
| 184 | next = 1; | ||
| 185 | } | ||
| 186 | } | ||
| 187 | } | ||
| 188 | |||
| 157 | /* | 189 | /* |
| 158 | * Device identification VPD, for a complete list of | 190 | * Device identification VPD, for a complete list of |
| 159 | * DESIGNATOR TYPEs see spc4r17 Table 459. | 191 | * DESIGNATOR TYPEs see spc4r17 Table 459. |
| @@ -219,8 +251,7 @@ target_emulate_evpd_83(struct se_cmd *cmd, unsigned char *buf) | |||
| 219 | * VENDOR_SPECIFIC_IDENTIFIER and | 251 | * VENDOR_SPECIFIC_IDENTIFIER and |
| 220 | * VENDOR_SPECIFIC_IDENTIFIER_EXTENTION | 252 | * VENDOR_SPECIFIC_IDENTIFIER_EXTENTION |
| 221 | */ | 253 | */ |
| 222 | buf[off++] |= hex_to_bin(dev->se_sub_dev->t10_wwn.unit_serial[0]); | 254 | target_parse_naa_6h_vendor_specific(dev, &buf[off]); |
| 223 | hex2bin(&buf[off], &dev->se_sub_dev->t10_wwn.unit_serial[1], 12); | ||
| 224 | 255 | ||
| 225 | len = 20; | 256 | len = 20; |
| 226 | off = (len + 4); | 257 | off = (len + 4); |
diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index 8d0c58ea6316..a4b0a8d27f25 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c | |||
| @@ -977,15 +977,17 @@ static void target_qf_do_work(struct work_struct *work) | |||
| 977 | { | 977 | { |
| 978 | struct se_device *dev = container_of(work, struct se_device, | 978 | struct se_device *dev = container_of(work, struct se_device, |
| 979 | qf_work_queue); | 979 | qf_work_queue); |
| 980 | LIST_HEAD(qf_cmd_list); | ||
| 980 | struct se_cmd *cmd, *cmd_tmp; | 981 | struct se_cmd *cmd, *cmd_tmp; |
| 981 | 982 | ||
| 982 | spin_lock_irq(&dev->qf_cmd_lock); | 983 | spin_lock_irq(&dev->qf_cmd_lock); |
| 983 | list_for_each_entry_safe(cmd, cmd_tmp, &dev->qf_cmd_list, se_qf_node) { | 984 | list_splice_init(&dev->qf_cmd_list, &qf_cmd_list); |
| 985 | spin_unlock_irq(&dev->qf_cmd_lock); | ||
| 984 | 986 | ||
| 987 | list_for_each_entry_safe(cmd, cmd_tmp, &qf_cmd_list, se_qf_node) { | ||
| 985 | list_del(&cmd->se_qf_node); | 988 | list_del(&cmd->se_qf_node); |
| 986 | atomic_dec(&dev->dev_qf_count); | 989 | atomic_dec(&dev->dev_qf_count); |
| 987 | smp_mb__after_atomic_dec(); | 990 | smp_mb__after_atomic_dec(); |
| 988 | spin_unlock_irq(&dev->qf_cmd_lock); | ||
| 989 | 991 | ||
| 990 | pr_debug("Processing %s cmd: %p QUEUE_FULL in work queue" | 992 | pr_debug("Processing %s cmd: %p QUEUE_FULL in work queue" |
| 991 | " context: %s\n", cmd->se_tfo->get_fabric_name(), cmd, | 993 | " context: %s\n", cmd->se_tfo->get_fabric_name(), cmd, |
| @@ -997,10 +999,7 @@ static void target_qf_do_work(struct work_struct *work) | |||
| 997 | * has been added to head of queue | 999 | * has been added to head of queue |
| 998 | */ | 1000 | */ |
| 999 | transport_add_cmd_to_queue(cmd, cmd->t_state); | 1001 | transport_add_cmd_to_queue(cmd, cmd->t_state); |
| 1000 | |||
| 1001 | spin_lock_irq(&dev->qf_cmd_lock); | ||
| 1002 | } | 1002 | } |
| 1003 | spin_unlock_irq(&dev->qf_cmd_lock); | ||
| 1004 | } | 1003 | } |
| 1005 | 1004 | ||
| 1006 | unsigned char *transport_dump_cmd_direction(struct se_cmd *cmd) | 1005 | unsigned char *transport_dump_cmd_direction(struct se_cmd *cmd) |
diff --git a/drivers/target/tcm_fc/tcm_fc.h b/drivers/target/tcm_fc/tcm_fc.h index bd4fe21a23b8..3749d8b4b423 100644 --- a/drivers/target/tcm_fc/tcm_fc.h +++ b/drivers/target/tcm_fc/tcm_fc.h | |||
| @@ -98,8 +98,7 @@ struct ft_tpg { | |||
| 98 | struct list_head list; /* linkage in ft_lport_acl tpg_list */ | 98 | struct list_head list; /* linkage in ft_lport_acl tpg_list */ |
| 99 | struct list_head lun_list; /* head of LUNs */ | 99 | struct list_head lun_list; /* head of LUNs */ |
| 100 | struct se_portal_group se_tpg; | 100 | struct se_portal_group se_tpg; |
| 101 | struct task_struct *thread; /* processing thread */ | 101 | struct workqueue_struct *workqueue; |
| 102 | struct se_queue_obj qobj; /* queue for processing thread */ | ||
| 103 | }; | 102 | }; |
| 104 | 103 | ||
| 105 | struct ft_lport_acl { | 104 | struct ft_lport_acl { |
| @@ -110,16 +109,10 @@ struct ft_lport_acl { | |||
| 110 | struct se_wwn fc_lport_wwn; | 109 | struct se_wwn fc_lport_wwn; |
| 111 | }; | 110 | }; |
| 112 | 111 | ||
| 113 | enum ft_cmd_state { | ||
| 114 | FC_CMD_ST_NEW = 0, | ||
| 115 | FC_CMD_ST_REJ | ||
| 116 | }; | ||
| 117 | |||
| 118 | /* | 112 | /* |
| 119 | * Commands | 113 | * Commands |
| 120 | */ | 114 | */ |
| 121 | struct ft_cmd { | 115 | struct ft_cmd { |
| 122 | enum ft_cmd_state state; | ||
| 123 | u32 lun; /* LUN from request */ | 116 | u32 lun; /* LUN from request */ |
| 124 | struct ft_sess *sess; /* session held for cmd */ | 117 | struct ft_sess *sess; /* session held for cmd */ |
| 125 | struct fc_seq *seq; /* sequence in exchange mgr */ | 118 | struct fc_seq *seq; /* sequence in exchange mgr */ |
| @@ -127,7 +120,7 @@ struct ft_cmd { | |||
| 127 | struct fc_frame *req_frame; | 120 | struct fc_frame *req_frame; |
| 128 | unsigned char *cdb; /* pointer to CDB inside frame */ | 121 | unsigned char *cdb; /* pointer to CDB inside frame */ |
| 129 | u32 write_data_len; /* data received on writes */ | 122 | u32 write_data_len; /* data received on writes */ |
| 130 | struct se_queue_req se_req; | 123 | struct work_struct work; |
| 131 | /* Local sense buffer */ | 124 | /* Local sense buffer */ |
| 132 | unsigned char ft_sense_buffer[TRANSPORT_SENSE_BUFFER]; | 125 | unsigned char ft_sense_buffer[TRANSPORT_SENSE_BUFFER]; |
| 133 | u32 was_ddp_setup:1; /* Set only if ddp is setup */ | 126 | u32 was_ddp_setup:1; /* Set only if ddp is setup */ |
| @@ -177,7 +170,6 @@ int ft_is_state_remove(struct se_cmd *); | |||
| 177 | /* | 170 | /* |
| 178 | * other internal functions. | 171 | * other internal functions. |
| 179 | */ | 172 | */ |
| 180 | int ft_thread(void *); | ||
| 181 | void ft_recv_req(struct ft_sess *, struct fc_frame *); | 173 | void ft_recv_req(struct ft_sess *, struct fc_frame *); |
| 182 | struct ft_tpg *ft_lport_find_tpg(struct fc_lport *); | 174 | struct ft_tpg *ft_lport_find_tpg(struct fc_lport *); |
| 183 | struct ft_node_acl *ft_acl_get(struct ft_tpg *, struct fc_rport_priv *); | 175 | struct ft_node_acl *ft_acl_get(struct ft_tpg *, struct fc_rport_priv *); |
diff --git a/drivers/target/tcm_fc/tfc_cmd.c b/drivers/target/tcm_fc/tfc_cmd.c index 5654dc22f7ae..80fbcde00cb6 100644 --- a/drivers/target/tcm_fc/tfc_cmd.c +++ b/drivers/target/tcm_fc/tfc_cmd.c | |||
| @@ -62,8 +62,8 @@ void ft_dump_cmd(struct ft_cmd *cmd, const char *caller) | |||
| 62 | int count; | 62 | int count; |
| 63 | 63 | ||
| 64 | se_cmd = &cmd->se_cmd; | 64 | se_cmd = &cmd->se_cmd; |
| 65 | pr_debug("%s: cmd %p state %d sess %p seq %p se_cmd %p\n", | 65 | pr_debug("%s: cmd %p sess %p seq %p se_cmd %p\n", |
| 66 | caller, cmd, cmd->state, cmd->sess, cmd->seq, se_cmd); | 66 | caller, cmd, cmd->sess, cmd->seq, se_cmd); |
| 67 | pr_debug("%s: cmd %p cdb %p\n", | 67 | pr_debug("%s: cmd %p cdb %p\n", |
| 68 | caller, cmd, cmd->cdb); | 68 | caller, cmd, cmd->cdb); |
| 69 | pr_debug("%s: cmd %p lun %d\n", caller, cmd, cmd->lun); | 69 | pr_debug("%s: cmd %p lun %d\n", caller, cmd, cmd->lun); |
| @@ -90,38 +90,6 @@ void ft_dump_cmd(struct ft_cmd *cmd, const char *caller) | |||
| 90 | 16, 4, cmd->cdb, MAX_COMMAND_SIZE, 0); | 90 | 16, 4, cmd->cdb, MAX_COMMAND_SIZE, 0); |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | static void ft_queue_cmd(struct ft_sess *sess, struct ft_cmd *cmd) | ||
| 94 | { | ||
| 95 | struct ft_tpg *tpg = sess->tport->tpg; | ||
| 96 | struct se_queue_obj *qobj = &tpg->qobj; | ||
| 97 | unsigned long flags; | ||
| 98 | |||
| 99 | qobj = &sess->tport->tpg->qobj; | ||
| 100 | spin_lock_irqsave(&qobj->cmd_queue_lock, flags); | ||
| 101 | list_add_tail(&cmd->se_req.qr_list, &qobj->qobj_list); | ||
| 102 | atomic_inc(&qobj->queue_cnt); | ||
| 103 | spin_unlock_irqrestore(&qobj->cmd_queue_lock, flags); | ||
| 104 | |||
| 105 | wake_up_process(tpg->thread); | ||
| 106 | } | ||
| 107 | |||
| 108 | static struct ft_cmd *ft_dequeue_cmd(struct se_queue_obj *qobj) | ||
| 109 | { | ||
| 110 | unsigned long flags; | ||
| 111 | struct se_queue_req *qr; | ||
| 112 | |||
| 113 | spin_lock_irqsave(&qobj->cmd_queue_lock, flags); | ||
| 114 | if (list_empty(&qobj->qobj_list)) { | ||
| 115 | spin_unlock_irqrestore(&qobj->cmd_queue_lock, flags); | ||
| 116 | return NULL; | ||
| 117 | } | ||
| 118 | qr = list_first_entry(&qobj->qobj_list, struct se_queue_req, qr_list); | ||
| 119 | list_del(&qr->qr_list); | ||
| 120 | atomic_dec(&qobj->queue_cnt); | ||
| 121 | spin_unlock_irqrestore(&qobj->cmd_queue_lock, flags); | ||
| 122 | return container_of(qr, struct ft_cmd, se_req); | ||
| 123 | } | ||
| 124 | |||
| 125 | static void ft_free_cmd(struct ft_cmd *cmd) | 93 | static void ft_free_cmd(struct ft_cmd *cmd) |
| 126 | { | 94 | { |
| 127 | struct fc_frame *fp; | 95 | struct fc_frame *fp; |
| @@ -282,9 +250,7 @@ u32 ft_get_task_tag(struct se_cmd *se_cmd) | |||
| 282 | 250 | ||
| 283 | int ft_get_cmd_state(struct se_cmd *se_cmd) | 251 | int ft_get_cmd_state(struct se_cmd *se_cmd) |
| 284 | { | 252 | { |
| 285 | struct ft_cmd *cmd = container_of(se_cmd, struct ft_cmd, se_cmd); | 253 | return 0; |
| 286 | |||
| 287 | return cmd->state; | ||
| 288 | } | 254 | } |
| 289 | 255 | ||
| 290 | int ft_is_state_remove(struct se_cmd *se_cmd) | 256 | int ft_is_state_remove(struct se_cmd *se_cmd) |
| @@ -505,6 +471,8 @@ int ft_queue_tm_resp(struct se_cmd *se_cmd) | |||
| 505 | return 0; | 471 | return 0; |
| 506 | } | 472 | } |
| 507 | 473 | ||
| 474 | static void ft_send_work(struct work_struct *work); | ||
| 475 | |||
| 508 | /* | 476 | /* |
| 509 | * Handle incoming FCP command. | 477 | * Handle incoming FCP command. |
| 510 | */ | 478 | */ |
| @@ -523,7 +491,9 @@ static void ft_recv_cmd(struct ft_sess *sess, struct fc_frame *fp) | |||
| 523 | goto busy; | 491 | goto busy; |
| 524 | } | 492 | } |
| 525 | cmd->req_frame = fp; /* hold frame during cmd */ | 493 | cmd->req_frame = fp; /* hold frame during cmd */ |
| 526 | ft_queue_cmd(sess, cmd); | 494 | |
| 495 | INIT_WORK(&cmd->work, ft_send_work); | ||
| 496 | queue_work(sess->tport->tpg->workqueue, &cmd->work); | ||
| 527 | return; | 497 | return; |
| 528 | 498 | ||
| 529 | busy: | 499 | busy: |
| @@ -563,12 +533,13 @@ void ft_recv_req(struct ft_sess *sess, struct fc_frame *fp) | |||
| 563 | /* | 533 | /* |
| 564 | * Send new command to target. | 534 | * Send new command to target. |
| 565 | */ | 535 | */ |
| 566 | static void ft_send_cmd(struct ft_cmd *cmd) | 536 | static void ft_send_work(struct work_struct *work) |
| 567 | { | 537 | { |
| 538 | struct ft_cmd *cmd = container_of(work, struct ft_cmd, work); | ||
| 568 | struct fc_frame_header *fh = fc_frame_header_get(cmd->req_frame); | 539 | struct fc_frame_header *fh = fc_frame_header_get(cmd->req_frame); |
| 569 | struct se_cmd *se_cmd; | 540 | struct se_cmd *se_cmd; |
| 570 | struct fcp_cmnd *fcp; | 541 | struct fcp_cmnd *fcp; |
| 571 | int data_dir; | 542 | int data_dir = 0; |
| 572 | u32 data_len; | 543 | u32 data_len; |
| 573 | int task_attr; | 544 | int task_attr; |
| 574 | int ret; | 545 | int ret; |
| @@ -675,42 +646,3 @@ static void ft_send_cmd(struct ft_cmd *cmd) | |||
| 675 | err: | 646 | err: |
| 676 | ft_send_resp_code_and_free(cmd, FCP_CMND_FIELDS_INVALID); | 647 | ft_send_resp_code_and_free(cmd, FCP_CMND_FIELDS_INVALID); |
| 677 | } | 648 | } |
| 678 | |||
| 679 | /* | ||
| 680 | * Handle request in the command thread. | ||
| 681 | */ | ||
| 682 | static void ft_exec_req(struct ft_cmd *cmd) | ||
| 683 | { | ||
| 684 | pr_debug("cmd state %x\n", cmd->state); | ||
| 685 | switch (cmd->state) { | ||
| 686 | case FC_CMD_ST_NEW: | ||
| 687 | ft_send_cmd(cmd); | ||
| 688 | break; | ||
| 689 | default: | ||
| 690 | break; | ||
| 691 | } | ||
| 692 | } | ||
| 693 | |||
| 694 | /* | ||
| 695 | * Processing thread. | ||
| 696 | * Currently one thread per tpg. | ||
| 697 | */ | ||
| 698 | int ft_thread(void *arg) | ||
| 699 | { | ||
| 700 | struct ft_tpg *tpg = arg; | ||
| 701 | struct se_queue_obj *qobj = &tpg->qobj; | ||
| 702 | struct ft_cmd *cmd; | ||
| 703 | |||
| 704 | while (!kthread_should_stop()) { | ||
| 705 | schedule_timeout_interruptible(MAX_SCHEDULE_TIMEOUT); | ||
| 706 | if (kthread_should_stop()) | ||
| 707 | goto out; | ||
| 708 | |||
| 709 | cmd = ft_dequeue_cmd(qobj); | ||
| 710 | if (cmd) | ||
| 711 | ft_exec_req(cmd); | ||
| 712 | } | ||
| 713 | |||
| 714 | out: | ||
| 715 | return 0; | ||
| 716 | } | ||
diff --git a/drivers/target/tcm_fc/tfc_conf.c b/drivers/target/tcm_fc/tfc_conf.c index b15879d43e22..8fa39b74f22c 100644 --- a/drivers/target/tcm_fc/tfc_conf.c +++ b/drivers/target/tcm_fc/tfc_conf.c | |||
| @@ -327,7 +327,6 @@ static struct se_portal_group *ft_add_tpg( | |||
| 327 | tpg->index = index; | 327 | tpg->index = index; |
| 328 | tpg->lport_acl = lacl; | 328 | tpg->lport_acl = lacl; |
| 329 | INIT_LIST_HEAD(&tpg->lun_list); | 329 | INIT_LIST_HEAD(&tpg->lun_list); |
| 330 | transport_init_queue_obj(&tpg->qobj); | ||
| 331 | 330 | ||
| 332 | ret = core_tpg_register(&ft_configfs->tf_ops, wwn, &tpg->se_tpg, | 331 | ret = core_tpg_register(&ft_configfs->tf_ops, wwn, &tpg->se_tpg, |
| 333 | tpg, TRANSPORT_TPG_TYPE_NORMAL); | 332 | tpg, TRANSPORT_TPG_TYPE_NORMAL); |
| @@ -336,8 +335,8 @@ static struct se_portal_group *ft_add_tpg( | |||
| 336 | return NULL; | 335 | return NULL; |
| 337 | } | 336 | } |
| 338 | 337 | ||
| 339 | tpg->thread = kthread_run(ft_thread, tpg, "ft_tpg%lu", index); | 338 | tpg->workqueue = alloc_workqueue("tcm_fc", 0, 1); |
| 340 | if (IS_ERR(tpg->thread)) { | 339 | if (!tpg->workqueue) { |
| 341 | kfree(tpg); | 340 | kfree(tpg); |
| 342 | return NULL; | 341 | return NULL; |
| 343 | } | 342 | } |
| @@ -356,7 +355,7 @@ static void ft_del_tpg(struct se_portal_group *se_tpg) | |||
| 356 | pr_debug("del tpg %s\n", | 355 | pr_debug("del tpg %s\n", |
| 357 | config_item_name(&tpg->se_tpg.tpg_group.cg_item)); | 356 | config_item_name(&tpg->se_tpg.tpg_group.cg_item)); |
| 358 | 357 | ||
| 359 | kthread_stop(tpg->thread); | 358 | destroy_workqueue(tpg->workqueue); |
| 360 | 359 | ||
| 361 | /* Wait for sessions to be freed thru RCU, for BUG_ON below */ | 360 | /* Wait for sessions to be freed thru RCU, for BUG_ON below */ |
| 362 | synchronize_rcu(); | 361 | synchronize_rcu(); |
diff --git a/drivers/target/tcm_fc/tfc_io.c b/drivers/target/tcm_fc/tfc_io.c index c37f4cd96452..d35ea5a3d56c 100644 --- a/drivers/target/tcm_fc/tfc_io.c +++ b/drivers/target/tcm_fc/tfc_io.c | |||
| @@ -219,43 +219,41 @@ void ft_recv_write_data(struct ft_cmd *cmd, struct fc_frame *fp) | |||
| 219 | if (cmd->was_ddp_setup) { | 219 | if (cmd->was_ddp_setup) { |
| 220 | BUG_ON(!ep); | 220 | BUG_ON(!ep); |
| 221 | BUG_ON(!lport); | 221 | BUG_ON(!lport); |
| 222 | } | 222 | /* |
| 223 | 223 | * Since DDP (Large Rx offload) was setup for this request, | |
| 224 | /* | 224 | * payload is expected to be copied directly to user buffers. |
| 225 | * Doesn't expect payload if DDP is setup. Payload | 225 | */ |
| 226 | * is expected to be copied directly to user buffers | 226 | buf = fc_frame_payload_get(fp, 1); |
| 227 | * due to DDP (Large Rx offload), | 227 | if (buf) |
| 228 | */ | 228 | pr_err("%s: xid 0x%x, f_ctl 0x%x, cmd->sg %p, " |
| 229 | buf = fc_frame_payload_get(fp, 1); | ||
| 230 | if (buf) | ||
| 231 | pr_err("%s: xid 0x%x, f_ctl 0x%x, cmd->sg %p, " | ||
| 232 | "cmd->sg_cnt 0x%x. DDP was setup" | 229 | "cmd->sg_cnt 0x%x. DDP was setup" |
| 233 | " hence not expected to receive frame with " | 230 | " hence not expected to receive frame with " |
| 234 | "payload, Frame will be dropped if " | 231 | "payload, Frame will be dropped if" |
| 235 | "'Sequence Initiative' bit in f_ctl is " | 232 | "'Sequence Initiative' bit in f_ctl is" |
| 236 | "not set\n", __func__, ep->xid, f_ctl, | 233 | "not set\n", __func__, ep->xid, f_ctl, |
| 237 | cmd->sg, cmd->sg_cnt); | 234 | cmd->sg, cmd->sg_cnt); |
| 238 | /* | 235 | /* |
| 239 | * Invalidate HW DDP context if it was setup for respective | 236 | * Invalidate HW DDP context if it was setup for respective |
| 240 | * command. Invalidation of HW DDP context is requited in both | 237 | * command. Invalidation of HW DDP context is requited in both |
| 241 | * situation (success and error). | 238 | * situation (success and error). |
| 242 | */ | 239 | */ |
| 243 | ft_invl_hw_context(cmd); | 240 | ft_invl_hw_context(cmd); |
| 244 | 241 | ||
| 245 | /* | 242 | /* |
| 246 | * If "Sequence Initiative (TSI)" bit set in f_ctl, means last | 243 | * If "Sequence Initiative (TSI)" bit set in f_ctl, means last |
| 247 | * write data frame is received successfully where payload is | 244 | * write data frame is received successfully where payload is |
| 248 | * posted directly to user buffer and only the last frame's | 245 | * posted directly to user buffer and only the last frame's |
| 249 | * header is posted in receive queue. | 246 | * header is posted in receive queue. |
| 250 | * | 247 | * |
| 251 | * If "Sequence Initiative (TSI)" bit is not set, means error | 248 | * If "Sequence Initiative (TSI)" bit is not set, means error |
| 252 | * condition w.r.t. DDP, hence drop the packet and let explict | 249 | * condition w.r.t. DDP, hence drop the packet and let explict |
| 253 | * ABORTS from other end of exchange timer trigger the recovery. | 250 | * ABORTS from other end of exchange timer trigger the recovery. |
| 254 | */ | 251 | */ |
| 255 | if (f_ctl & FC_FC_SEQ_INIT) | 252 | if (f_ctl & FC_FC_SEQ_INIT) |
| 256 | goto last_frame; | 253 | goto last_frame; |
| 257 | else | 254 | else |
| 258 | goto drop; | 255 | goto drop; |
| 256 | } | ||
| 259 | 257 | ||
| 260 | rel_off = ntohl(fh->fh_parm_offset); | 258 | rel_off = ntohl(fh->fh_parm_offset); |
| 261 | frame_len = fr_len(fp); | 259 | frame_len = fr_len(fp); |
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c index 225123b37f19..58be715913cd 100644 --- a/drivers/tty/serial/crisv10.c +++ b/drivers/tty/serial/crisv10.c | |||
| @@ -4450,7 +4450,7 @@ static int __init rs_init(void) | |||
| 4450 | 4450 | ||
| 4451 | #if defined(CONFIG_ETRAX_RS485) | 4451 | #if defined(CONFIG_ETRAX_RS485) |
| 4452 | #if defined(CONFIG_ETRAX_RS485_ON_PA) | 4452 | #if defined(CONFIG_ETRAX_RS485_ON_PA) |
| 4453 | if (cris_io_interface_allocate_pins(if_ser0, 'a', rs485_pa_bit, | 4453 | if (cris_io_interface_allocate_pins(if_serial_0, 'a', rs485_pa_bit, |
| 4454 | rs485_pa_bit)) { | 4454 | rs485_pa_bit)) { |
| 4455 | printk(KERN_CRIT "ETRAX100LX serial: Could not allocate " | 4455 | printk(KERN_CRIT "ETRAX100LX serial: Could not allocate " |
| 4456 | "RS485 pin\n"); | 4456 | "RS485 pin\n"); |
| @@ -4459,7 +4459,7 @@ static int __init rs_init(void) | |||
| 4459 | } | 4459 | } |
| 4460 | #endif | 4460 | #endif |
| 4461 | #if defined(CONFIG_ETRAX_RS485_ON_PORT_G) | 4461 | #if defined(CONFIG_ETRAX_RS485_ON_PORT_G) |
| 4462 | if (cris_io_interface_allocate_pins(if_ser0, 'g', rs485_pa_bit, | 4462 | if (cris_io_interface_allocate_pins(if_serial_0, 'g', rs485_pa_bit, |
| 4463 | rs485_port_g_bit)) { | 4463 | rs485_port_g_bit)) { |
| 4464 | printk(KERN_CRIT "ETRAX100LX serial: Could not allocate " | 4464 | printk(KERN_CRIT "ETRAX100LX serial: Could not allocate " |
| 4465 | "RS485 pin\n"); | 4465 | "RS485 pin\n"); |
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index 1e96d1f1fe6b..723f8231193d 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c | |||
| @@ -761,7 +761,7 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) | |||
| 761 | memset(buf, 0, retval); | 761 | memset(buf, 0, retval); |
| 762 | status = 0; | 762 | status = 0; |
| 763 | 763 | ||
| 764 | mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC; | 764 | mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC; |
| 765 | 765 | ||
| 766 | spin_lock_irqsave(&xhci->lock, flags); | 766 | spin_lock_irqsave(&xhci->lock, flags); |
| 767 | /* For each port, did anything change? If so, set that bit in buf. */ | 767 | /* For each port, did anything change? If so, set that bit in buf. */ |
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 54139a2f06ce..952e2ded61af 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
| @@ -1934,8 +1934,10 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
| 1934 | int status = -EINPROGRESS; | 1934 | int status = -EINPROGRESS; |
| 1935 | struct urb_priv *urb_priv; | 1935 | struct urb_priv *urb_priv; |
| 1936 | struct xhci_ep_ctx *ep_ctx; | 1936 | struct xhci_ep_ctx *ep_ctx; |
| 1937 | struct list_head *tmp; | ||
| 1937 | u32 trb_comp_code; | 1938 | u32 trb_comp_code; |
| 1938 | int ret = 0; | 1939 | int ret = 0; |
| 1940 | int td_num = 0; | ||
| 1939 | 1941 | ||
| 1940 | slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); | 1942 | slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); |
| 1941 | xdev = xhci->devs[slot_id]; | 1943 | xdev = xhci->devs[slot_id]; |
| @@ -1957,6 +1959,12 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
| 1957 | return -ENODEV; | 1959 | return -ENODEV; |
| 1958 | } | 1960 | } |
| 1959 | 1961 | ||
| 1962 | /* Count current td numbers if ep->skip is set */ | ||
| 1963 | if (ep->skip) { | ||
| 1964 | list_for_each(tmp, &ep_ring->td_list) | ||
| 1965 | td_num++; | ||
| 1966 | } | ||
| 1967 | |||
| 1960 | event_dma = le64_to_cpu(event->buffer); | 1968 | event_dma = le64_to_cpu(event->buffer); |
| 1961 | trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); | 1969 | trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); |
| 1962 | /* Look for common error cases */ | 1970 | /* Look for common error cases */ |
| @@ -2068,7 +2076,18 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
| 2068 | goto cleanup; | 2076 | goto cleanup; |
| 2069 | } | 2077 | } |
| 2070 | 2078 | ||
| 2079 | /* We've skipped all the TDs on the ep ring when ep->skip set */ | ||
| 2080 | if (ep->skip && td_num == 0) { | ||
| 2081 | ep->skip = false; | ||
| 2082 | xhci_dbg(xhci, "All tds on the ep_ring skipped. " | ||
| 2083 | "Clear skip flag.\n"); | ||
| 2084 | ret = 0; | ||
| 2085 | goto cleanup; | ||
| 2086 | } | ||
| 2087 | |||
| 2071 | td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); | 2088 | td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); |
| 2089 | if (ep->skip) | ||
| 2090 | td_num--; | ||
| 2072 | 2091 | ||
| 2073 | /* Is this a TRB in the currently executing TD? */ | 2092 | /* Is this a TRB in the currently executing TD? */ |
| 2074 | event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, | 2093 | event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, |
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index 80d292fb92d8..7363c1b169e8 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c | |||
| @@ -19,7 +19,7 @@ | |||
| 19 | #include <asm/backlight.h> | 19 | #include <asm/backlight.h> |
| 20 | #endif | 20 | #endif |
| 21 | 21 | ||
| 22 | static const char const *backlight_types[] = { | 22 | static const char *const backlight_types[] = { |
| 23 | [BACKLIGHT_RAW] = "raw", | 23 | [BACKLIGHT_RAW] = "raw", |
| 24 | [BACKLIGHT_PLATFORM] = "platform", | 24 | [BACKLIGHT_PLATFORM] = "platform", |
| 25 | [BACKLIGHT_FIRMWARE] = "firmware", | 25 | [BACKLIGHT_FIRMWARE] = "firmware", |
diff --git a/drivers/xen/events.c b/drivers/xen/events.c index da70f5c32eb9..7523719bf8a4 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c | |||
| @@ -54,7 +54,7 @@ | |||
| 54 | * This lock protects updates to the following mapping and reference-count | 54 | * This lock protects updates to the following mapping and reference-count |
| 55 | * arrays. The lock does not need to be acquired to read the mapping tables. | 55 | * arrays. The lock does not need to be acquired to read the mapping tables. |
| 56 | */ | 56 | */ |
| 57 | static DEFINE_SPINLOCK(irq_mapping_update_lock); | 57 | static DEFINE_MUTEX(irq_mapping_update_lock); |
| 58 | 58 | ||
| 59 | static LIST_HEAD(xen_irq_list_head); | 59 | static LIST_HEAD(xen_irq_list_head); |
| 60 | 60 | ||
| @@ -631,7 +631,7 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, | |||
| 631 | int irq = -1; | 631 | int irq = -1; |
| 632 | struct physdev_irq irq_op; | 632 | struct physdev_irq irq_op; |
| 633 | 633 | ||
| 634 | spin_lock(&irq_mapping_update_lock); | 634 | mutex_lock(&irq_mapping_update_lock); |
| 635 | 635 | ||
| 636 | irq = find_irq_by_gsi(gsi); | 636 | irq = find_irq_by_gsi(gsi); |
| 637 | if (irq != -1) { | 637 | if (irq != -1) { |
| @@ -684,7 +684,7 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, | |||
| 684 | handle_edge_irq, name); | 684 | handle_edge_irq, name); |
| 685 | 685 | ||
| 686 | out: | 686 | out: |
| 687 | spin_unlock(&irq_mapping_update_lock); | 687 | mutex_unlock(&irq_mapping_update_lock); |
| 688 | 688 | ||
| 689 | return irq; | 689 | return irq; |
| 690 | } | 690 | } |
| @@ -710,7 +710,7 @@ int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, | |||
| 710 | { | 710 | { |
| 711 | int irq, ret; | 711 | int irq, ret; |
| 712 | 712 | ||
| 713 | spin_lock(&irq_mapping_update_lock); | 713 | mutex_lock(&irq_mapping_update_lock); |
| 714 | 714 | ||
| 715 | irq = xen_allocate_irq_dynamic(); | 715 | irq = xen_allocate_irq_dynamic(); |
| 716 | if (irq == -1) | 716 | if (irq == -1) |
| @@ -724,10 +724,10 @@ int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, | |||
| 724 | if (ret < 0) | 724 | if (ret < 0) |
| 725 | goto error_irq; | 725 | goto error_irq; |
| 726 | out: | 726 | out: |
| 727 | spin_unlock(&irq_mapping_update_lock); | 727 | mutex_unlock(&irq_mapping_update_lock); |
| 728 | return irq; | 728 | return irq; |
| 729 | error_irq: | 729 | error_irq: |
| 730 | spin_unlock(&irq_mapping_update_lock); | 730 | mutex_unlock(&irq_mapping_update_lock); |
| 731 | xen_free_irq(irq); | 731 | xen_free_irq(irq); |
| 732 | return -1; | 732 | return -1; |
| 733 | } | 733 | } |
| @@ -740,7 +740,7 @@ int xen_destroy_irq(int irq) | |||
| 740 | struct irq_info *info = info_for_irq(irq); | 740 | struct irq_info *info = info_for_irq(irq); |
| 741 | int rc = -ENOENT; | 741 | int rc = -ENOENT; |
| 742 | 742 | ||
| 743 | spin_lock(&irq_mapping_update_lock); | 743 | mutex_lock(&irq_mapping_update_lock); |
| 744 | 744 | ||
| 745 | desc = irq_to_desc(irq); | 745 | desc = irq_to_desc(irq); |
| 746 | if (!desc) | 746 | if (!desc) |
| @@ -766,7 +766,7 @@ int xen_destroy_irq(int irq) | |||
| 766 | xen_free_irq(irq); | 766 | xen_free_irq(irq); |
| 767 | 767 | ||
| 768 | out: | 768 | out: |
| 769 | spin_unlock(&irq_mapping_update_lock); | 769 | mutex_unlock(&irq_mapping_update_lock); |
| 770 | return rc; | 770 | return rc; |
| 771 | } | 771 | } |
| 772 | 772 | ||
| @@ -776,7 +776,7 @@ int xen_irq_from_pirq(unsigned pirq) | |||
| 776 | 776 | ||
| 777 | struct irq_info *info; | 777 | struct irq_info *info; |
| 778 | 778 | ||
| 779 | spin_lock(&irq_mapping_update_lock); | 779 | mutex_lock(&irq_mapping_update_lock); |
| 780 | 780 | ||
| 781 | list_for_each_entry(info, &xen_irq_list_head, list) { | 781 | list_for_each_entry(info, &xen_irq_list_head, list) { |
| 782 | if (info == NULL || info->type != IRQT_PIRQ) | 782 | if (info == NULL || info->type != IRQT_PIRQ) |
| @@ -787,7 +787,7 @@ int xen_irq_from_pirq(unsigned pirq) | |||
| 787 | } | 787 | } |
| 788 | irq = -1; | 788 | irq = -1; |
| 789 | out: | 789 | out: |
| 790 | spin_unlock(&irq_mapping_update_lock); | 790 | mutex_unlock(&irq_mapping_update_lock); |
| 791 | 791 | ||
| 792 | return irq; | 792 | return irq; |
| 793 | } | 793 | } |
| @@ -802,7 +802,7 @@ int bind_evtchn_to_irq(unsigned int evtchn) | |||
| 802 | { | 802 | { |
| 803 | int irq; | 803 | int irq; |
| 804 | 804 | ||
| 805 | spin_lock(&irq_mapping_update_lock); | 805 | mutex_lock(&irq_mapping_update_lock); |
| 806 | 806 | ||
| 807 | irq = evtchn_to_irq[evtchn]; | 807 | irq = evtchn_to_irq[evtchn]; |
| 808 | 808 | ||
| @@ -818,7 +818,7 @@ int bind_evtchn_to_irq(unsigned int evtchn) | |||
| 818 | } | 818 | } |
| 819 | 819 | ||
| 820 | out: | 820 | out: |
| 821 | spin_unlock(&irq_mapping_update_lock); | 821 | mutex_unlock(&irq_mapping_update_lock); |
| 822 | 822 | ||
| 823 | return irq; | 823 | return irq; |
| 824 | } | 824 | } |
| @@ -829,7 +829,7 @@ static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) | |||
| 829 | struct evtchn_bind_ipi bind_ipi; | 829 | struct evtchn_bind_ipi bind_ipi; |
| 830 | int evtchn, irq; | 830 | int evtchn, irq; |
| 831 | 831 | ||
| 832 | spin_lock(&irq_mapping_update_lock); | 832 | mutex_lock(&irq_mapping_update_lock); |
| 833 | 833 | ||
| 834 | irq = per_cpu(ipi_to_irq, cpu)[ipi]; | 834 | irq = per_cpu(ipi_to_irq, cpu)[ipi]; |
| 835 | 835 | ||
| @@ -853,7 +853,7 @@ static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) | |||
| 853 | } | 853 | } |
| 854 | 854 | ||
| 855 | out: | 855 | out: |
| 856 | spin_unlock(&irq_mapping_update_lock); | 856 | mutex_unlock(&irq_mapping_update_lock); |
| 857 | return irq; | 857 | return irq; |
| 858 | } | 858 | } |
| 859 | 859 | ||
| @@ -878,7 +878,7 @@ int bind_virq_to_irq(unsigned int virq, unsigned int cpu) | |||
| 878 | struct evtchn_bind_virq bind_virq; | 878 | struct evtchn_bind_virq bind_virq; |
| 879 | int evtchn, irq; | 879 | int evtchn, irq; |
| 880 | 880 | ||
| 881 | spin_lock(&irq_mapping_update_lock); | 881 | mutex_lock(&irq_mapping_update_lock); |
| 882 | 882 | ||
| 883 | irq = per_cpu(virq_to_irq, cpu)[virq]; | 883 | irq = per_cpu(virq_to_irq, cpu)[virq]; |
| 884 | 884 | ||
| @@ -903,7 +903,7 @@ int bind_virq_to_irq(unsigned int virq, unsigned int cpu) | |||
| 903 | } | 903 | } |
| 904 | 904 | ||
| 905 | out: | 905 | out: |
| 906 | spin_unlock(&irq_mapping_update_lock); | 906 | mutex_unlock(&irq_mapping_update_lock); |
| 907 | 907 | ||
| 908 | return irq; | 908 | return irq; |
| 909 | } | 909 | } |
| @@ -913,7 +913,7 @@ static void unbind_from_irq(unsigned int irq) | |||
| 913 | struct evtchn_close close; | 913 | struct evtchn_close close; |
| 914 | int evtchn = evtchn_from_irq(irq); | 914 | int evtchn = evtchn_from_irq(irq); |
| 915 | 915 | ||
| 916 | spin_lock(&irq_mapping_update_lock); | 916 | mutex_lock(&irq_mapping_update_lock); |
| 917 | 917 | ||
| 918 | if (VALID_EVTCHN(evtchn)) { | 918 | if (VALID_EVTCHN(evtchn)) { |
| 919 | close.port = evtchn; | 919 | close.port = evtchn; |
| @@ -943,7 +943,7 @@ static void unbind_from_irq(unsigned int irq) | |||
| 943 | 943 | ||
| 944 | xen_free_irq(irq); | 944 | xen_free_irq(irq); |
| 945 | 945 | ||
| 946 | spin_unlock(&irq_mapping_update_lock); | 946 | mutex_unlock(&irq_mapping_update_lock); |
| 947 | } | 947 | } |
| 948 | 948 | ||
| 949 | int bind_evtchn_to_irqhandler(unsigned int evtchn, | 949 | int bind_evtchn_to_irqhandler(unsigned int evtchn, |
| @@ -1279,7 +1279,7 @@ void rebind_evtchn_irq(int evtchn, int irq) | |||
| 1279 | will also be masked. */ | 1279 | will also be masked. */ |
| 1280 | disable_irq(irq); | 1280 | disable_irq(irq); |
| 1281 | 1281 | ||
| 1282 | spin_lock(&irq_mapping_update_lock); | 1282 | mutex_lock(&irq_mapping_update_lock); |
| 1283 | 1283 | ||
| 1284 | /* After resume the irq<->evtchn mappings are all cleared out */ | 1284 | /* After resume the irq<->evtchn mappings are all cleared out */ |
| 1285 | BUG_ON(evtchn_to_irq[evtchn] != -1); | 1285 | BUG_ON(evtchn_to_irq[evtchn] != -1); |
| @@ -1289,7 +1289,7 @@ void rebind_evtchn_irq(int evtchn, int irq) | |||
| 1289 | 1289 | ||
| 1290 | xen_irq_info_evtchn_init(irq, evtchn); | 1290 | xen_irq_info_evtchn_init(irq, evtchn); |
| 1291 | 1291 | ||
| 1292 | spin_unlock(&irq_mapping_update_lock); | 1292 | mutex_unlock(&irq_mapping_update_lock); |
| 1293 | 1293 | ||
| 1294 | /* new event channels are always bound to cpu 0 */ | 1294 | /* new event channels are always bound to cpu 0 */ |
| 1295 | irq_set_affinity(irq, cpumask_of(0)); | 1295 | irq_set_affinity(irq, cpumask_of(0)); |
