diff options
author | Jarkko Nikula <jhnikula@gmail.com> | 2010-08-08 13:05:24 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-08-12 05:28:11 -0400 |
commit | 1c888e2e3824a3f7565b4d96ede423cb9a9a28b7 (patch) | |
tree | a323f5512f545882f93be5c6d30039dda202eaa9 /drivers | |
parent | 214044b44ae674d9e3dbe4774ed4b91a53d4e07f (diff) |
mfd: Use macros instead of some constant magic numbers for menelaus
This patch is originally done by Carlos Eduardo Aguiar. Original fix is
commit 3305829b2816072b9c8ed01374b205ae4de74027 in
git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
Author modified the fix for mainline version of menelaus.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Cc: Carlos Eduardo Aguiar <carlos.aguiar@indt.org.br>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mfd/menelaus.c | 75 |
1 files changed, 54 insertions, 21 deletions
diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c index e02b57423ac4..4ba85bbdb4c1 100644 --- a/drivers/mfd/menelaus.c +++ b/drivers/mfd/menelaus.c | |||
@@ -128,6 +128,39 @@ | |||
128 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ | 128 | #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */ |
129 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ | 129 | #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */ |
130 | 130 | ||
131 | /* VCORE_CTRL1 register */ | ||
132 | #define VCORE_CTRL1_BYP_COMP (1 << 5) | ||
133 | #define VCORE_CTRL1_HW_NSW (1 << 7) | ||
134 | |||
135 | /* GPIO_CTRL register */ | ||
136 | #define GPIO_CTRL_SLOTSELEN (1 << 5) | ||
137 | #define GPIO_CTRL_SLPCTLEN (1 << 6) | ||
138 | #define GPIO1_DIR_INPUT (1 << 0) | ||
139 | #define GPIO2_DIR_INPUT (1 << 1) | ||
140 | #define GPIO3_DIR_INPUT (1 << 2) | ||
141 | |||
142 | /* MCT_CTRL1 register */ | ||
143 | #define MCT_CTRL1_S1_CMD_OD (1 << 2) | ||
144 | #define MCT_CTRL1_S2_CMD_OD (1 << 3) | ||
145 | |||
146 | /* MCT_CTRL2 register */ | ||
147 | #define MCT_CTRL2_VS2_SEL_D0 (1 << 0) | ||
148 | #define MCT_CTRL2_VS2_SEL_D1 (1 << 1) | ||
149 | #define MCT_CTRL2_S1CD_BUFEN (1 << 4) | ||
150 | #define MCT_CTRL2_S2CD_BUFEN (1 << 5) | ||
151 | #define MCT_CTRL2_S1CD_DBEN (1 << 6) | ||
152 | #define MCT_CTRL2_S2CD_BEN (1 << 7) | ||
153 | |||
154 | /* MCT_CTRL3 register */ | ||
155 | #define MCT_CTRL3_SLOT1_EN (1 << 0) | ||
156 | #define MCT_CTRL3_SLOT2_EN (1 << 1) | ||
157 | #define MCT_CTRL3_S1_AUTO_EN (1 << 2) | ||
158 | #define MCT_CTRL3_S2_AUTO_EN (1 << 3) | ||
159 | |||
160 | /* MCT_PIN_ST register */ | ||
161 | #define MCT_PIN_ST_S1_CD_ST (1 << 0) | ||
162 | #define MCT_PIN_ST_S2_CD_ST (1 << 1) | ||
163 | |||
131 | static void menelaus_work(struct work_struct *_menelaus); | 164 | static void menelaus_work(struct work_struct *_menelaus); |
132 | 165 | ||
133 | struct menelaus_chip { | 166 | struct menelaus_chip { |
@@ -249,10 +282,10 @@ static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw) | |||
249 | return; | 282 | return; |
250 | 283 | ||
251 | if (!(reg & 0x1)) | 284 | if (!(reg & 0x1)) |
252 | card_mask |= (1 << 0); | 285 | card_mask |= MCT_PIN_ST_S1_CD_ST; |
253 | 286 | ||
254 | if (!(reg & 0x2)) | 287 | if (!(reg & 0x2)) |
255 | card_mask |= (1 << 1); | 288 | card_mask |= MCT_PIN_ST_S2_CD_ST; |
256 | 289 | ||
257 | if (menelaus_hw->mmc_callback) | 290 | if (menelaus_hw->mmc_callback) |
258 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, | 291 | menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data, |
@@ -277,14 +310,14 @@ int menelaus_set_mmc_opendrain(int slot, int enable) | |||
277 | val = ret; | 310 | val = ret; |
278 | if (slot == 1) { | 311 | if (slot == 1) { |
279 | if (enable) | 312 | if (enable) |
280 | val |= 1 << 2; | 313 | val |= MCT_CTRL1_S1_CMD_OD; |
281 | else | 314 | else |
282 | val &= ~(1 << 2); | 315 | val &= ~MCT_CTRL1_S1_CMD_OD; |
283 | } else { | 316 | } else { |
284 | if (enable) | 317 | if (enable) |
285 | val |= 1 << 3; | 318 | val |= MCT_CTRL1_S2_CMD_OD; |
286 | else | 319 | else |
287 | val &= ~(1 << 3); | 320 | val &= ~MCT_CTRL1_S2_CMD_OD; |
288 | } | 321 | } |
289 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val); | 322 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val); |
290 | mutex_unlock(&the_menelaus->lock); | 323 | mutex_unlock(&the_menelaus->lock); |
@@ -301,11 +334,11 @@ int menelaus_set_slot_sel(int enable) | |||
301 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | 334 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
302 | if (ret < 0) | 335 | if (ret < 0) |
303 | goto out; | 336 | goto out; |
304 | ret |= 0x02; | 337 | ret |= GPIO2_DIR_INPUT; |
305 | if (enable) | 338 | if (enable) |
306 | ret |= 1 << 5; | 339 | ret |= GPIO_CTRL_SLOTSELEN; |
307 | else | 340 | else |
308 | ret &= ~(1 << 5); | 341 | ret &= ~GPIO_CTRL_SLOTSELEN; |
309 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); | 342 | ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret); |
310 | out: | 343 | out: |
311 | mutex_unlock(&the_menelaus->lock); | 344 | mutex_unlock(&the_menelaus->lock); |
@@ -330,14 +363,14 @@ int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) | |||
330 | val = ret; | 363 | val = ret; |
331 | if (slot == 1) { | 364 | if (slot == 1) { |
332 | if (cd_en) | 365 | if (cd_en) |
333 | val |= (1 << 4) | (1 << 6); | 366 | val |= MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN; |
334 | else | 367 | else |
335 | val &= ~((1 << 4) | (1 << 6)); | 368 | val &= ~(MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN); |
336 | } else { | 369 | } else { |
337 | if (cd_en) | 370 | if (cd_en) |
338 | val |= (1 << 5) | (1 << 7); | 371 | val |= MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN; |
339 | else | 372 | else |
340 | val &= ~((1 << 5) | (1 << 7)); | 373 | val &= ~(MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN); |
341 | } | 374 | } |
342 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val); | 375 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val); |
343 | if (ret < 0) | 376 | if (ret < 0) |
@@ -349,25 +382,25 @@ int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en) | |||
349 | val = ret; | 382 | val = ret; |
350 | if (slot == 1) { | 383 | if (slot == 1) { |
351 | if (enable) | 384 | if (enable) |
352 | val |= 1 << 0; | 385 | val |= MCT_CTRL3_SLOT1_EN; |
353 | else | 386 | else |
354 | val &= ~(1 << 0); | 387 | val &= ~MCT_CTRL3_SLOT1_EN; |
355 | } else { | 388 | } else { |
356 | int b; | 389 | int b; |
357 | 390 | ||
358 | if (enable) | 391 | if (enable) |
359 | val |= 1 << 1; | 392 | val |= MCT_CTRL3_SLOT2_EN; |
360 | else | 393 | else |
361 | val &= ~(1 << 1); | 394 | val &= ~MCT_CTRL3_SLOT2_EN; |
362 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); | 395 | b = menelaus_read_reg(MENELAUS_MCT_CTRL2); |
363 | b &= ~0x03; | 396 | b &= ~(MCT_CTRL2_VS2_SEL_D0 | MCT_CTRL2_VS2_SEL_D1); |
364 | b |= power; | 397 | b |= power; |
365 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b); | 398 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b); |
366 | if (ret < 0) | 399 | if (ret < 0) |
367 | goto out; | 400 | goto out; |
368 | } | 401 | } |
369 | /* Disable autonomous shutdown */ | 402 | /* Disable autonomous shutdown */ |
370 | val &= ~(0x03 << 2); | 403 | val &= ~(MCT_CTRL3_S1_AUTO_EN | MCT_CTRL3_S2_AUTO_EN); |
371 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val); | 404 | ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val); |
372 | out: | 405 | out: |
373 | mutex_unlock(&the_menelaus->lock); | 406 | mutex_unlock(&the_menelaus->lock); |
@@ -552,7 +585,7 @@ int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV) | |||
552 | if (!the_menelaus->vcore_hw_mode) { | 585 | if (!the_menelaus->vcore_hw_mode) { |
553 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); | 586 | val = menelaus_read_reg(MENELAUS_VCORE_CTRL1); |
554 | /* HW mode, turn OFF byte comparator */ | 587 | /* HW mode, turn OFF byte comparator */ |
555 | val |= ((1 << 7) | (1 << 5)); | 588 | val |= (VCORE_CTRL1_HW_NSW | VCORE_CTRL1_BYP_COMP); |
556 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); | 589 | ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val); |
557 | the_menelaus->vcore_hw_mode = 1; | 590 | the_menelaus->vcore_hw_mode = 1; |
558 | } | 591 | } |
@@ -749,7 +782,7 @@ int menelaus_set_regulator_sleep(int enable, u32 val) | |||
749 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); | 782 | ret = menelaus_read_reg(MENELAUS_GPIO_CTRL); |
750 | if (ret < 0) | 783 | if (ret < 0) |
751 | goto out; | 784 | goto out; |
752 | t = ((1 << 6) | 0x04); | 785 | t = (GPIO_CTRL_SLPCTLEN | GPIO3_DIR_INPUT); |
753 | if (enable) | 786 | if (enable) |
754 | ret |= t; | 787 | ret |= t; |
755 | else | 788 | else |