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authorJesse Brandeburg <jesse.brandeburg@intel.com>2012-07-25 22:31:04 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-08-21 04:24:05 -0400
commit1b556783abe92d3bfedf0d0eb3af2319947739ae (patch)
tree1148d9aebaf777d6b2d6dc6df61e549b8951c67c /drivers
parente86fd89188abcc3288ca760a064000054110b2bb (diff)
igb: implement 580 MDI setting support
In order for igb to support MDI setting support via ethtool this code is needed to allow setting the MDI state via software. This is in regards to the related ethtool patch Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Aaron Brown aaron.f.brown@intel.com Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_phy.c29
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_phy.h5
2 files changed, 30 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.c b/drivers/net/ethernet/intel/igb/e1000_phy.c
index 7be98b6f1052..3404bc79f4ca 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.c
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c
@@ -464,6 +464,32 @@ s32 igb_copper_link_setup_82580(struct e1000_hw *hw)
464 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT; 464 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT;
465 465
466 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); 466 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data);
467 if (ret_val)
468 goto out;
469
470 /* Set MDI/MDIX mode */
471 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data);
472 if (ret_val)
473 goto out;
474 phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
475 /*
476 * Options:
477 * 0 - Auto (default)
478 * 1 - MDI mode
479 * 2 - MDI-X mode
480 */
481 switch (hw->phy.mdix) {
482 case 1:
483 break;
484 case 2:
485 phy_data |= I82580_PHY_CTRL2_MANUAL_MDIX;
486 break;
487 case 0:
488 default:
489 phy_data |= I82580_PHY_CTRL2_AUTO_MDI_MDIX;
490 break;
491 }
492 ret_val = hw->phy.ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
467 493
468out: 494out:
469 return ret_val; 495 return ret_val;
@@ -2246,8 +2272,7 @@ s32 igb_phy_force_speed_duplex_82580(struct e1000_hw *hw)
2246 if (ret_val) 2272 if (ret_val)
2247 goto out; 2273 goto out;
2248 2274
2249 phy_data &= ~I82580_PHY_CTRL2_AUTO_MDIX; 2275 phy_data &= ~I82580_PHY_CTRL2_MDIX_CFG_MASK;
2250 phy_data &= ~I82580_PHY_CTRL2_FORCE_MDI_MDIX;
2251 2276
2252 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); 2277 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data);
2253 if (ret_val) 2278 if (ret_val)
diff --git a/drivers/net/ethernet/intel/igb/e1000_phy.h b/drivers/net/ethernet/intel/igb/e1000_phy.h
index 34e40619f16b..6ac3299bfcb9 100644
--- a/drivers/net/ethernet/intel/igb/e1000_phy.h
+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h
@@ -111,8 +111,9 @@ s32 igb_check_polarity_m88(struct e1000_hw *hw);
111#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100 111#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100
112 112
113/* I82580 PHY Control 2 */ 113/* I82580 PHY Control 2 */
114#define I82580_PHY_CTRL2_AUTO_MDIX 0x0400 114#define I82580_PHY_CTRL2_MANUAL_MDIX 0x0200
115#define I82580_PHY_CTRL2_FORCE_MDI_MDIX 0x0200 115#define I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400
116#define I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600
116 117
117/* I82580 PHY Diagnostics Status */ 118/* I82580 PHY Diagnostics Status */
118#define I82580_DSTATUS_CABLE_LENGTH 0x03FC 119#define I82580_DSTATUS_CABLE_LENGTH 0x03FC