diff options
| author | Michael Chan <mchan@broadcom.com> | 2006-01-23 19:11:03 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2006-01-23 19:11:03 -0500 |
| commit | 1269a8a64a37c8a06af672f4cff4fed16a478734 (patch) | |
| tree | 5d068c5d6af9928eb9652a24862826fd806df869 /drivers | |
| parent | ade2bfe7d1f0ea804d2e63209cc6318ad8bf17ae (diff) | |
[BNX2]: Workaround hw interrupt bug
Add workaround for a hardware interrupt issue. When using INTA,
unmasking of the interrupt and the tag update should be done
separately to avoid some spurious interrupts,
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/bnx2.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index ec08f833c32d..7b99cf26a129 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
| @@ -316,6 +316,10 @@ bnx2_enable_int(struct bnx2 *bp) | |||
| 316 | u32 val; | 316 | u32 val; |
| 317 | 317 | ||
| 318 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, | 318 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, |
| 319 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | | ||
| 320 | BNX2_PCICFG_INT_ACK_CMD_MASK_INT | bp->last_status_idx); | ||
| 321 | |||
| 322 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, | ||
| 319 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | bp->last_status_idx); | 323 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | bp->last_status_idx); |
| 320 | 324 | ||
| 321 | val = REG_RD(bp, BNX2_HC_COMMAND); | 325 | val = REG_RD(bp, BNX2_HC_COMMAND); |
| @@ -1892,9 +1896,20 @@ bnx2_poll(struct net_device *dev, int *budget) | |||
| 1892 | 1896 | ||
| 1893 | if (!bnx2_has_work(bp)) { | 1897 | if (!bnx2_has_work(bp)) { |
| 1894 | netif_rx_complete(dev); | 1898 | netif_rx_complete(dev); |
| 1899 | if (likely(bp->flags & USING_MSI_FLAG)) { | ||
| 1900 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, | ||
| 1901 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | | ||
| 1902 | bp->last_status_idx); | ||
| 1903 | return 0; | ||
| 1904 | } | ||
| 1905 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, | ||
| 1906 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | | ||
| 1907 | BNX2_PCICFG_INT_ACK_CMD_MASK_INT | | ||
| 1908 | bp->last_status_idx); | ||
| 1909 | |||
| 1895 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, | 1910 | REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, |
| 1896 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | | 1911 | BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | |
| 1897 | bp->last_status_idx); | 1912 | bp->last_status_idx); |
| 1898 | return 0; | 1913 | return 0; |
| 1899 | } | 1914 | } |
| 1900 | 1915 | ||
