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authorMatt Carlson <mcarlson@broadcom.com>2010-02-12 09:47:12 -0500
committerDavid S. Miller <davem@davemloft.net>2010-02-12 20:05:55 -0500
commit1061b7c56482310bbb8197045d51e2986afabfce (patch)
tree379f9faa46dc45f1bea5c630ac83090b805bcfcd /drivers
parentc88734054e787542ea093b02120e324e92cad882 (diff)
tg3: Fix AC131 loopback test errors for 5785
The AC131 does not enable the forced transmit clock settings immediately. The workaround is to read the register again to get the setting to take effect. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c8
-rw-r--r--drivers/net/tg3.h3
2 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index cb6967947c30..128126a87c34 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -10822,8 +10822,12 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
10822 10822
10823 mac_mode = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK; 10823 mac_mode = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK;
10824 if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) { 10824 if (tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) {
10825 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 10825 tg3_writephy(tp, MII_TG3_FET_PTEST,
10826 tg3_writephy(tp, MII_TG3_FET_PTEST, 0x1800); 10826 MII_TG3_FET_PTEST_FRC_TX_LINK |
10827 MII_TG3_FET_PTEST_FRC_TX_LOCK);
10828 /* The write needs to be flushed for the AC131 */
10829 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785)
10830 tg3_readphy(tp, MII_TG3_FET_PTEST, &val);
10827 mac_mode |= MAC_MODE_PORT_MODE_MII; 10831 mac_mode |= MAC_MODE_PORT_MODE_MII;
10828 } else 10832 } else
10829 mac_mode |= MAC_MODE_PORT_MODE_GMII; 10833 mac_mode |= MAC_MODE_PORT_MODE_GMII;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index a8fb53aaf742..b4fd59623cfb 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2112,6 +2112,9 @@
2112 2112
2113/* Fast Ethernet Tranceiver definitions */ 2113/* Fast Ethernet Tranceiver definitions */
2114#define MII_TG3_FET_PTEST 0x17 2114#define MII_TG3_FET_PTEST 0x17
2115#define MII_TG3_FET_PTEST_FRC_TX_LINK 0x1000
2116#define MII_TG3_FET_PTEST_FRC_TX_LOCK 0x0800
2117
2115#define MII_TG3_FET_TEST 0x1f 2118#define MII_TG3_FET_TEST 0x1f
2116#define MII_TG3_FET_SHADOW_EN 0x0080 2119#define MII_TG3_FET_SHADOW_EN 0x0080
2117 2120