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authorKenny Hsu <kenny.hsu@intel.com>2012-01-06 16:16:29 -0500
committerJohn W. Linville <linville@tuxdriver.com>2012-01-24 14:08:35 -0500
commit102f097f1937db41f59674caca0a1e38c963baba (patch)
tree73b4018c7ec465459535a9d80f8e0e09653e3790 /drivers
parent2da424b0773cea3db47e1e81db71eeebde8269d4 (diff)
iwlwifi: update testmode command of direct register access
In order to make sure the testcommand function of direct register access can be performed even NIC is asleep, replace corresponding handler iwl_read32 and iwl_write32 by using iwl_direct_read32 and iwl_direct_write32. Signed-off-by: Kenny Hsu <kenny.hsu@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-testmode.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-testmode.c b/drivers/net/wireless/iwlwifi/iwl-testmode.c
index 4a5cddd2d56b..2fc20675dc7b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-testmode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-testmode.c
@@ -299,7 +299,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
299 299
300 switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) { 300 switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
301 case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32: 301 case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
302 val32 = iwl_read32(bus(priv), ofs); 302 val32 = iwl_read_direct32(bus(priv), ofs);
303 IWL_INFO(priv, "32bit value to read 0x%x\n", val32); 303 IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
304 304
305 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20); 305 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
@@ -321,7 +321,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
321 } else { 321 } else {
322 val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]); 322 val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
323 IWL_INFO(priv, "32bit value to write 0x%x\n", val32); 323 IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
324 iwl_write32(bus(priv), ofs, val32); 324 iwl_write_direct32(bus(priv), ofs, val32);
325 } 325 }
326 break; 326 break;
327 case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8: 327 case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8: