diff options
author | Kevin Scott <kevin.c.scott@intel.com> | 2014-06-04 16:41:33 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2014-07-01 02:45:46 -0400 |
commit | 0b9754e9324b268d5ca14a0900ede7f350be489a (patch) | |
tree | fd9e9378b068a736b983bef34ee36401fce40ee9 /drivers | |
parent | 838d41d92a90cc0395893006e20991aa9fd0ac85 (diff) |
i40e: Correct mask assignment value
Make mask value of all 1s. Value of -1 can't be used for u32 type.
Change-ID: I49d58b77639939fe7447a229dbf1f4a1bf7419ce
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c index 5a603a5e9aa8..0d74b46d177f 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c +++ b/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c | |||
@@ -858,7 +858,7 @@ static void i40e_write_dword(u8 *hmc_bits, | |||
858 | if (ce_info->width < 32) | 858 | if (ce_info->width < 32) |
859 | mask = ((u32)1 << ce_info->width) - 1; | 859 | mask = ((u32)1 << ce_info->width) - 1; |
860 | else | 860 | else |
861 | mask = -1; | 861 | mask = 0xFFFFFFFF; |
862 | 862 | ||
863 | /* don't swizzle the bits until after the mask because the mask bits | 863 | /* don't swizzle the bits until after the mask because the mask bits |
864 | * will be in a different bit position on big endian machines | 864 | * will be in a different bit position on big endian machines |
@@ -910,7 +910,7 @@ static void i40e_write_qword(u8 *hmc_bits, | |||
910 | if (ce_info->width < 64) | 910 | if (ce_info->width < 64) |
911 | mask = ((u64)1 << ce_info->width) - 1; | 911 | mask = ((u64)1 << ce_info->width) - 1; |
912 | else | 912 | else |
913 | mask = -1; | 913 | mask = 0xFFFFFFFFFFFFFFFF; |
914 | 914 | ||
915 | /* don't swizzle the bits until after the mask because the mask bits | 915 | /* don't swizzle the bits until after the mask because the mask bits |
916 | * will be in a different bit position on big endian machines | 916 | * will be in a different bit position on big endian machines |