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authorBen Skeggs <bskeggs@redhat.com>2014-08-09 14:10:22 -0400
committerBen Skeggs <bskeggs@redhat.com>2014-08-09 15:13:14 -0400
commit0ad72863ea426d46b2786cba9430e122a40aad0b (patch)
treebbb9346e53a5e0c16674f4e43807cad013c6cc25 /drivers
parent967e7bde8739fe3b215f7537e8f1f39c044902af (diff)
drm/nouveau: port to nvif client/device/objects
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/Makefile1
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/disp.c5
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/hw.c3
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/tvnv04.c2
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/tvnv17.c1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_abi16.c63
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_abi16.h1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c22
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.c110
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.h17
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_display.c32
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_display.h4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.c3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dp.c3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.c149
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.h46
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c11
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.h7
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_hwmon.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_nvif.c133
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sgdma.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sysfs.c22
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sysfs.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_ttm.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fbcon.c29
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.h2
-rw-r--r--drivers/gpu/drm/nouveau/nv17_fence.c16
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c244
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fbcon.c5
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fence.c21
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c8
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_fbcon.c5
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvif/client.c2
40 files changed, 522 insertions, 479 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index 3cddb955aad3..029e0555fa38 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -338,6 +338,7 @@ nouveau-y += nouveau_drm.o nouveau_chan.o nouveau_dma.o nouveau_fence.o
338nouveau-y += nouveau_vga.o nouveau_agp.o 338nouveau-y += nouveau_vga.o nouveau_agp.o
339nouveau-y += nouveau_ttm.o nouveau_sgdma.o nouveau_bo.o nouveau_gem.o 339nouveau-y += nouveau_ttm.o nouveau_sgdma.o nouveau_bo.o nouveau_gem.o
340nouveau-y += nouveau_prime.o nouveau_abi16.o 340nouveau-y += nouveau_prime.o nouveau_abi16.o
341nouveau-y += nouveau_nvif.o
341nouveau-y += nv04_fence.o nv10_fence.o nv17_fence.o 342nouveau-y += nv04_fence.o nv10_fence.o nv17_fence.o
342nouveau-y += nv50_fence.o nv84_fence.o nvc0_fence.o 343nouveau-y += nv50_fence.o nv84_fence.o nvc0_fence.o
343 344
diff --git a/drivers/gpu/drm/nouveau/dispnv04/disp.c b/drivers/gpu/drm/nouveau/dispnv04/disp.c
index e63f5d694c55..0f02df21a18d 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.c
@@ -70,6 +70,8 @@ nv04_display_create(struct drm_device *dev)
70 if (!disp) 70 if (!disp)
71 return -ENOMEM; 71 return -ENOMEM;
72 72
73 nvif_object_map(nvif_object(&drm->device));
74
73 nouveau_display(dev)->priv = disp; 75 nouveau_display(dev)->priv = disp;
74 nouveau_display(dev)->dtor = nv04_display_destroy; 76 nouveau_display(dev)->dtor = nv04_display_destroy;
75 nouveau_display(dev)->init = nv04_display_init; 77 nouveau_display(dev)->init = nv04_display_init;
@@ -144,6 +146,7 @@ void
144nv04_display_destroy(struct drm_device *dev) 146nv04_display_destroy(struct drm_device *dev)
145{ 147{
146 struct nv04_display *disp = nv04_display(dev); 148 struct nv04_display *disp = nv04_display(dev);
149 struct nouveau_drm *drm = nouveau_drm(dev);
147 struct drm_encoder *encoder; 150 struct drm_encoder *encoder;
148 struct drm_crtc *crtc; 151 struct drm_crtc *crtc;
149 152
@@ -170,6 +173,8 @@ nv04_display_destroy(struct drm_device *dev)
170 173
171 nouveau_display(dev)->priv = NULL; 174 nouveau_display(dev)->priv = NULL;
172 kfree(disp); 175 kfree(disp);
176
177 nvif_object_unmap(nvif_object(&drm->device));
173} 178}
174 179
175int 180int
diff --git a/drivers/gpu/drm/nouveau/dispnv04/hw.c b/drivers/gpu/drm/nouveau/dispnv04/hw.c
index c12f3a871da1..c9dc5541acbf 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
@@ -27,9 +27,6 @@
27#include "hw.h" 27#include "hw.h"
28 28
29#include <subdev/bios/pll.h> 29#include <subdev/bios/pll.h>
30#include <subdev/fb.h>
31#include <subdev/clock.h>
32#include <subdev/timer.h>
33 30
34#define CHIPSET_NFORCE 0x01a0 31#define CHIPSET_NFORCE 0x01a0
35#define CHIPSET_NFORCE2 0x01f0 32#define CHIPSET_NFORCE2 0x01f0
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c
index 1ed54c9b5a49..8061d8d0ce79 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c
@@ -35,8 +35,6 @@
35 35
36#include <drm/i2c/ch7006.h> 36#include <drm/i2c/ch7006.h>
37 37
38#include <subdev/i2c.h>
39
40static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = { 38static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
41 { 39 {
42 { 40 {
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
index 28975b732c6a..5210190744a3 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
@@ -37,7 +37,6 @@
37#include <core/device.h> 37#include <core/device.h>
38 38
39#include <subdev/bios/gpio.h> 39#include <subdev/bios/gpio.h>
40#include <subdev/gpio.h>
41 40
42MODULE_PARM_DESC(tv_norm, "Default TV norm.\n" 41MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
43 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n" 42 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c
index 6a6f20f41ae9..ae794625a5b8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
@@ -27,47 +27,34 @@
27#include <core/class.h> 27#include <core/class.h>
28#include <core/mm.h> 28#include <core/mm.h>
29 29
30#include <subdev/fb.h>
31#include <subdev/timer.h>
32#include <subdev/instmem.h>
33#include <engine/graph.h>
34
35#include "nouveau_drm.h" 30#include "nouveau_drm.h"
36#include "nouveau_dma.h" 31#include "nouveau_dma.h"
37#include "nouveau_gem.h" 32#include "nouveau_gem.h"
38#include "nouveau_chan.h" 33#include "nouveau_chan.h"
39#include "nouveau_abi16.h" 34#include "nouveau_abi16.h"
40 35
41void nouveau_drm_hack_device(struct nouveau_drm *, struct nvif_device *);
42
43struct nouveau_abi16 * 36struct nouveau_abi16 *
44nouveau_abi16_get(struct drm_file *file_priv, struct drm_device *dev) 37nouveau_abi16_get(struct drm_file *file_priv, struct drm_device *dev)
45{ 38{
46 struct nouveau_cli *cli = nouveau_cli(file_priv); 39 struct nouveau_cli *cli = nouveau_cli(file_priv);
47 struct nouveau_drm *drm = nouveau_drm(dev);
48 mutex_lock(&cli->mutex); 40 mutex_lock(&cli->mutex);
49 if (!cli->abi16) { 41 if (!cli->abi16) {
50 struct nouveau_abi16 *abi16; 42 struct nouveau_abi16 *abi16;
51 cli->abi16 = abi16 = kzalloc(sizeof(*abi16), GFP_KERNEL); 43 cli->abi16 = abi16 = kzalloc(sizeof(*abi16), GFP_KERNEL);
52 if (cli->abi16) { 44 if (cli->abi16) {
53 INIT_LIST_HEAD(&abi16->channels); 45 INIT_LIST_HEAD(&abi16->channels);
54 abi16->client = nv_object(cli);
55 46
56 /* allocate device object targeting client's default 47 /* allocate device object targeting client's default
57 * device (ie. the one that belongs to the fd it 48 * device (ie. the one that belongs to the fd it
58 * opened) 49 * opened)
59 */ 50 */
60 if (nouveau_object_new(abi16->client, NVDRM_CLIENT, 51 if (nvif_device_init(&cli->base.base, NULL,
61 NVDRM_DEVICE, 0x0080, 52 NVDRM_DEVICE, NV_DEVICE_CLASS,
62 &(struct nv_device_class) { 53 &(struct nv_device_class) {
63 .device = ~0ULL, 54 .device = ~0ULL,
64 }, 55 }, sizeof(struct nv_device_class),
65 sizeof(struct nv_device_class), 56 &abi16->device) == 0)
66 (struct nouveau_object **)
67 &abi16->device.object) == 0) {
68 nouveau_drm_hack_device(drm, &abi16->device);
69 return cli->abi16; 57 return cli->abi16;
70 }
71 58
72 kfree(cli->abi16); 59 kfree(cli->abi16);
73 cli->abi16 = NULL; 60 cli->abi16 = NULL;
@@ -81,7 +68,7 @@ nouveau_abi16_get(struct drm_file *file_priv, struct drm_device *dev)
81int 68int
82nouveau_abi16_put(struct nouveau_abi16 *abi16, int ret) 69nouveau_abi16_put(struct nouveau_abi16 *abi16, int ret)
83{ 70{
84 struct nouveau_cli *cli = (void *)abi16->client; 71 struct nouveau_cli *cli = (void *)nvif_client(&abi16->device.base);
85 mutex_unlock(&cli->mutex); 72 mutex_unlock(&cli->mutex);
86 return ret; 73 return ret;
87} 74}
@@ -144,7 +131,7 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16,
144 131
145 /* destroy channel object, all children will be killed too */ 132 /* destroy channel object, all children will be killed too */
146 if (chan->chan) { 133 if (chan->chan) {
147 abi16->handles &= ~(1ULL << (chan->chan->handle & 0xffff)); 134 abi16->handles &= ~(1ULL << (chan->chan->object->handle & 0xffff));
148 nouveau_channel_del(&chan->chan); 135 nouveau_channel_del(&chan->chan);
149 } 136 }
150 137
@@ -155,7 +142,7 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16,
155void 142void
156nouveau_abi16_fini(struct nouveau_abi16 *abi16) 143nouveau_abi16_fini(struct nouveau_abi16 *abi16)
157{ 144{
158 struct nouveau_cli *cli = (void *)abi16->client; 145 struct nouveau_cli *cli = (void *)nvif_client(&abi16->device.base);
159 struct nouveau_abi16_chan *chan, *temp; 146 struct nouveau_abi16_chan *chan, *temp;
160 147
161 /* cleanup channels */ 148 /* cleanup channels */
@@ -164,7 +151,7 @@ nouveau_abi16_fini(struct nouveau_abi16 *abi16)
164 } 151 }
165 152
166 /* destroy the device object */ 153 /* destroy the device object */
167 nouveau_object_del(abi16->client, NVDRM_CLIENT, NVDRM_DEVICE); 154 nvif_device_fini(&abi16->device);
168 155
169 kfree(cli->abi16); 156 kfree(cli->abi16);
170 cli->abi16 = NULL; 157 cli->abi16 = NULL;
@@ -251,7 +238,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
251 struct nouveau_drm *drm = nouveau_drm(dev); 238 struct nouveau_drm *drm = nouveau_drm(dev);
252 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev); 239 struct nouveau_abi16 *abi16 = nouveau_abi16_get(file_priv, dev);
253 struct nouveau_abi16_chan *chan; 240 struct nouveau_abi16_chan *chan;
254 struct nouveau_client *client;
255 struct nvif_device *device; 241 struct nvif_device *device;
256 struct nouveau_instmem *imem; 242 struct nouveau_instmem *imem;
257 struct nouveau_fb *pfb; 243 struct nouveau_fb *pfb;
@@ -263,7 +249,6 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
263 if (!drm->channel) 249 if (!drm->channel)
264 return nouveau_abi16_put(abi16, -ENODEV); 250 return nouveau_abi16_put(abi16, -ENODEV);
265 251
266 client = nv_client(abi16->client);
267 device = &abi16->device; 252 device = &abi16->device;
268 imem = nvkm_instmem(device); 253 imem = nvkm_instmem(device);
269 pfb = nvkm_fb(device); 254 pfb = nvkm_fb(device);
@@ -298,8 +283,8 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
298 abi16->handles |= (1ULL << init->channel); 283 abi16->handles |= (1ULL << init->channel);
299 284
300 /* create channel object and initialise dma and fence management */ 285 /* create channel object and initialise dma and fence management */
301 ret = nouveau_channel_new(drm, cli, NVDRM_DEVICE, NVDRM_CHAN | 286 ret = nouveau_channel_new(drm, device, NVDRM_CHAN | init->channel,
302 init->channel, init->fb_ctxdma_handle, 287 init->fb_ctxdma_handle,
303 init->tt_ctxdma_handle, &chan->chan); 288 init->tt_ctxdma_handle, &chan->chan);
304 if (ret) 289 if (ret)
305 goto done; 290 goto done;
@@ -330,7 +315,7 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
330 goto done; 315 goto done;
331 316
332 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 317 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
333 ret = nouveau_bo_vma_add(chan->ntfy, client->vm, 318 ret = nouveau_bo_vma_add(chan->ntfy, cli->vm,
334 &chan->ntfy_vma); 319 &chan->ntfy_vma);
335 if (ret) 320 if (ret)
336 goto done; 321 goto done;
@@ -361,7 +346,7 @@ nouveau_abi16_ioctl_channel_free(ABI16_IOCTL_ARGS)
361 return -ENOMEM; 346 return -ENOMEM;
362 347
363 list_for_each_entry(chan, &abi16->channels, head) { 348 list_for_each_entry(chan, &abi16->channels, head) {
364 if (chan->chan->handle == (NVDRM_CHAN | req->channel)) { 349 if (chan->chan->object->handle == (NVDRM_CHAN | req->channel)) {
365 nouveau_abi16_chan_fini(abi16, chan); 350 nouveau_abi16_chan_fini(abi16, chan);
366 return nouveau_abi16_put(abi16, 0); 351 return nouveau_abi16_put(abi16, 0);
367 } 352 }
@@ -392,8 +377,10 @@ nouveau_abi16_ioctl_grobj_alloc(ABI16_IOCTL_ARGS)
392 return nouveau_abi16_put(abi16, 0); 377 return nouveau_abi16_put(abi16, 0);
393 } 378 }
394 379
395 ret = nouveau_object_new(abi16->client, NVDRM_CHAN | init->channel, 380 /*XXX*/
396 init->handle, init->class, NULL, 0, &object); 381 ret = nouveau_object_new(nv_object(nvkm_client(&abi16->device.base)),
382 NVDRM_CHAN | init->channel, init->handle,
383 init->class, NULL, 0, &object);
397 return nouveau_abi16_put(abi16, ret); 384 return nouveau_abi16_put(abi16, ret);
398} 385}
399 386
@@ -418,7 +405,7 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
418 return nouveau_abi16_put(abi16, -EINVAL); 405 return nouveau_abi16_put(abi16, -EINVAL);
419 406
420 list_for_each_entry(temp, &abi16->channels, head) { 407 list_for_each_entry(temp, &abi16->channels, head) {
421 if (temp->chan->handle == (NVDRM_CHAN | info->channel)) { 408 if (temp->chan->object->handle == (NVDRM_CHAN | info->channel)) {
422 chan = temp; 409 chan = temp;
423 break; 410 break;
424 } 411 }
@@ -456,9 +443,11 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS)
456 args.limit += chan->ntfy->bo.offset; 443 args.limit += chan->ntfy->bo.offset;
457 } 444 }
458 445
459 ret = nouveau_object_new(abi16->client, chan->chan->handle, 446 /*XXX*/
460 ntfy->handle, 0x003d, &args, 447 ret = nouveau_object_new(nv_object(nvkm_client(&abi16->device.base)),
461 sizeof(args), &object); 448 NVDRM_CHAN | info->channel, ntfy->handle,
449 NV_DMA_IN_MEMORY_CLASS, &args, sizeof(args),
450 &object);
462 if (ret) 451 if (ret)
463 goto done; 452 goto done;
464 453
@@ -483,7 +472,7 @@ nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS)
483 return -ENOMEM; 472 return -ENOMEM;
484 473
485 list_for_each_entry(temp, &abi16->channels, head) { 474 list_for_each_entry(temp, &abi16->channels, head) {
486 if (temp->chan->handle == (NVDRM_CHAN | fini->channel)) { 475 if (temp->chan->object->handle == (NVDRM_CHAN | fini->channel)) {
487 chan = temp; 476 chan = temp;
488 break; 477 break;
489 } 478 }
@@ -495,7 +484,9 @@ nouveau_abi16_ioctl_gpuobj_free(ABI16_IOCTL_ARGS)
495 /* synchronize with the user channel and destroy the gpu object */ 484 /* synchronize with the user channel and destroy the gpu object */
496 nouveau_channel_idle(chan->chan); 485 nouveau_channel_idle(chan->chan);
497 486
498 ret = nouveau_object_del(abi16->client, chan->chan->handle, fini->handle); 487 /*XXX*/
488 ret = nouveau_object_del(nv_object(nvkm_client(&abi16->device.base)),
489 chan->chan->object->handle, fini->handle);
499 if (ret) 490 if (ret)
500 return nouveau_abi16_put(abi16, ret); 491 return nouveau_abi16_put(abi16, ret);
501 492
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.h b/drivers/gpu/drm/nouveau/nouveau_abi16.h
index de0ee3fbc52f..39844e6bfbff 100644
--- a/drivers/gpu/drm/nouveau/nouveau_abi16.h
+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.h
@@ -28,7 +28,6 @@ struct nouveau_abi16_chan {
28}; 28};
29 29
30struct nouveau_abi16 { 30struct nouveau_abi16 {
31 struct nouveau_object *client;
32 struct nvif_device device; 31 struct nvif_device device;
33 struct list_head channels; 32 struct list_head channels;
34 u64 handles; 33 u64 handles;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 61429b712c3b..ffdf85f7814e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -22,8 +22,6 @@
22 * SOFTWARE. 22 * SOFTWARE.
23 */ 23 */
24 24
25#include <subdev/bios.h>
26
27#include <drm/drmP.h> 25#include <drm/drmP.h>
28 26
29#include "nouveau_drm.h" 27#include "nouveau_drm.h"
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 9c9291b3bfb5..d222875a58d5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -30,10 +30,6 @@
30#include <core/engine.h> 30#include <core/engine.h>
31#include <linux/swiotlb.h> 31#include <linux/swiotlb.h>
32 32
33#include <subdev/fb.h>
34#include <subdev/vm.h>
35#include <subdev/bar.h>
36
37#include "nouveau_drm.h" 33#include "nouveau_drm.h"
38#include "nouveau_dma.h" 34#include "nouveau_dma.h"
39#include "nouveau_fence.h" 35#include "nouveau_fence.h"
@@ -951,6 +947,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
951{ 947{
952 struct nouveau_drm *drm = nouveau_bdev(bo->bdev); 948 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
953 struct nouveau_channel *chan = drm->ttm.chan; 949 struct nouveau_channel *chan = drm->ttm.chan;
950 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base);
954 struct nouveau_fence *fence; 951 struct nouveau_fence *fence;
955 int ret; 952 int ret;
956 953
@@ -964,7 +961,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
964 return ret; 961 return ret;
965 } 962 }
966 963
967 mutex_lock_nested(&chan->cli->mutex, SINGLE_DEPTH_NESTING); 964 mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
968 ret = nouveau_fence_sync(bo->sync_obj, chan); 965 ret = nouveau_fence_sync(bo->sync_obj, chan);
969 if (ret == 0) { 966 if (ret == 0) {
970 ret = drm->ttm.move(chan, bo, &bo->mem, new_mem); 967 ret = drm->ttm.move(chan, bo, &bo->mem, new_mem);
@@ -979,7 +976,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
979 } 976 }
980 } 977 }
981 } 978 }
982 mutex_unlock(&chan->cli->mutex); 979 mutex_unlock(&cli->mutex);
983 return ret; 980 return ret;
984} 981}
985 982
@@ -1011,9 +1008,7 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
1011 int ret; 1008 int ret;
1012 1009
1013 do { 1010 do {
1014 struct nouveau_object *object;
1015 struct nouveau_channel *chan; 1011 struct nouveau_channel *chan;
1016 u32 handle = (mthd->engine << 16) | mthd->oclass;
1017 1012
1018 if (mthd->engine) 1013 if (mthd->engine)
1019 chan = drm->cechan; 1014 chan = drm->cechan;
@@ -1022,13 +1017,14 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
1022 if (chan == NULL) 1017 if (chan == NULL)
1023 continue; 1018 continue;
1024 1019
1025 ret = nouveau_object_new(nv_object(drm), chan->handle, handle, 1020 ret = nvif_object_init(chan->object, NULL,
1026 mthd->oclass, NULL, 0, &object); 1021 mthd->oclass | (mthd->engine << 16),
1022 mthd->oclass, NULL, 0,
1023 &drm->ttm.copy);
1027 if (ret == 0) { 1024 if (ret == 0) {
1028 ret = mthd->init(chan, handle); 1025 ret = mthd->init(chan, drm->ttm.copy.handle);
1029 if (ret) { 1026 if (ret) {
1030 nouveau_object_del(nv_object(drm), 1027 nvif_object_fini(&drm->ttm.copy);
1031 chan->handle, handle);
1032 continue; 1028 continue;
1033 } 1029 }
1034 1030
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 3f450d7295fb..2072518f93fa 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -27,12 +27,6 @@
27#include <core/device.h> 27#include <core/device.h>
28#include <core/class.h> 28#include <core/class.h>
29 29
30#include <subdev/fb.h>
31#include <subdev/vm.h>
32#include <subdev/instmem.h>
33
34#include <engine/software.h>
35
36#include "nouveau_drm.h" 30#include "nouveau_drm.h"
37#include "nouveau_dma.h" 31#include "nouveau_dma.h"
38#include "nouveau_bo.h" 32#include "nouveau_bo.h"
@@ -47,7 +41,7 @@ module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
47int 41int
48nouveau_channel_idle(struct nouveau_channel *chan) 42nouveau_channel_idle(struct nouveau_channel *chan)
49{ 43{
50 struct nouveau_cli *cli = chan->cli; 44 struct nouveau_cli *cli = (void *)nvif_client(chan->object);
51 struct nouveau_fence *fence = NULL; 45 struct nouveau_fence *fence = NULL;
52 int ret; 46 int ret;
53 47
@@ -59,7 +53,7 @@ nouveau_channel_idle(struct nouveau_channel *chan)
59 53
60 if (ret) 54 if (ret)
61 NV_PRINTK(error, cli, "failed to idle channel 0x%08x [%s]\n", 55 NV_PRINTK(error, cli, "failed to idle channel 0x%08x [%s]\n",
62 chan->handle, cli->base.name); 56 chan->object->handle, nvkm_client(&cli->base)->name);
63 return ret; 57 return ret;
64} 58}
65 59
@@ -68,36 +62,36 @@ nouveau_channel_del(struct nouveau_channel **pchan)
68{ 62{
69 struct nouveau_channel *chan = *pchan; 63 struct nouveau_channel *chan = *pchan;
70 if (chan) { 64 if (chan) {
71 struct nouveau_object *client = nv_object(chan->cli);
72 if (chan->fence) { 65 if (chan->fence) {
73 nouveau_channel_idle(chan); 66 nouveau_channel_idle(chan);
74 nouveau_fence(chan->drm)->context_del(chan); 67 nouveau_fence(chan->drm)->context_del(chan);
75 } 68 }
76 nouveau_object_del(client, NVDRM_DEVICE, chan->handle); 69 nvif_object_fini(&chan->nvsw);
77 nouveau_object_del(client, NVDRM_DEVICE, chan->push.handle); 70 nvif_object_fini(&chan->gart);
71 nvif_object_fini(&chan->vram);
72 nvif_object_ref(NULL, &chan->object);
73 nvif_object_fini(&chan->push.ctxdma);
78 nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma); 74 nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma);
79 nouveau_bo_unmap(chan->push.buffer); 75 nouveau_bo_unmap(chan->push.buffer);
80 if (chan->push.buffer && chan->push.buffer->pin_refcnt) 76 if (chan->push.buffer && chan->push.buffer->pin_refcnt)
81 nouveau_bo_unpin(chan->push.buffer); 77 nouveau_bo_unpin(chan->push.buffer);
82 nouveau_bo_ref(NULL, &chan->push.buffer); 78 nouveau_bo_ref(NULL, &chan->push.buffer);
79 nvif_device_ref(NULL, &chan->device);
83 kfree(chan); 80 kfree(chan);
84 } 81 }
85 *pchan = NULL; 82 *pchan = NULL;
86} 83}
87 84
88static int 85static int
89nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli, 86nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
90 u32 parent, u32 handle, u32 size, 87 u32 handle, u32 size, struct nouveau_channel **pchan)
91 struct nouveau_channel **pchan)
92{ 88{
93 struct nvif_device *device = &drm->device; 89 struct nouveau_cli *cli = (void *)nvif_client(&device->base);
94 struct nouveau_instmem *imem = nvkm_instmem(device); 90 struct nouveau_instmem *imem = nvkm_instmem(device);
95 struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); 91 struct nouveau_vmmgr *vmm = nvkm_vmmgr(device);
96 struct nouveau_fb *pfb = nvkm_fb(device); 92 struct nouveau_fb *pfb = nvkm_fb(device);
97 struct nouveau_client *client = &cli->base;
98 struct nv_dma_class args = {}; 93 struct nv_dma_class args = {};
99 struct nouveau_channel *chan; 94 struct nouveau_channel *chan;
100 struct nouveau_object *push;
101 u32 target; 95 u32 target;
102 int ret; 96 int ret;
103 97
@@ -105,9 +99,8 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
105 if (!chan) 99 if (!chan)
106 return -ENOMEM; 100 return -ENOMEM;
107 101
108 chan->cli = cli; 102 nvif_device_ref(device, &chan->device);
109 chan->drm = drm; 103 chan->drm = drm;
110 chan->handle = handle;
111 104
112 /* allocate memory for dma push buffer */ 105 /* allocate memory for dma push buffer */
113 target = TTM_PL_FLAG_TT; 106 target = TTM_PL_FLAG_TT;
@@ -132,10 +125,9 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
132 * we be able to call out to other (indirect) push buffers 125 * we be able to call out to other (indirect) push buffers
133 */ 126 */
134 chan->push.vma.offset = chan->push.buffer->bo.offset; 127 chan->push.vma.offset = chan->push.buffer->bo.offset;
135 chan->push.handle = NVDRM_PUSH | (handle & 0xffff);
136 128
137 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 129 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
138 ret = nouveau_bo_vma_add(chan->push.buffer, client->vm, 130 ret = nouveau_bo_vma_add(chan->push.buffer, cli->vm,
139 &chan->push.vma); 131 &chan->push.vma);
140 if (ret) { 132 if (ret) {
141 nouveau_channel_del(pchan); 133 nouveau_channel_del(pchan);
@@ -144,7 +136,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
144 136
145 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM; 137 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
146 args.start = 0; 138 args.start = 0;
147 args.limit = client->vm->vmm->limit - 1; 139 args.limit = cli->vm->vmm->limit - 1;
148 } else 140 } else
149 if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { 141 if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) {
150 u64 limit = pfb->ram->size - imem->reserved - 1; 142 u64 limit = pfb->ram->size - imem->reserved - 1;
@@ -174,9 +166,9 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
174 } 166 }
175 } 167 }
176 168
177 ret = nouveau_object_new(nv_object(chan->cli), parent, 169 ret = nvif_object_init(nvif_object(device), NULL, NVDRM_PUSH |
178 chan->push.handle, 0x0002, 170 (handle & 0xffff), NV_DMA_FROM_MEMORY_CLASS,
179 &args, sizeof(args), &push); 171 &args, sizeof(args), &chan->push.ctxdma);
180 if (ret) { 172 if (ret) {
181 nouveau_channel_del(pchan); 173 nouveau_channel_del(pchan);
182 return ret; 174 return ret;
@@ -186,9 +178,8 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
186} 178}
187 179
188static int 180static int
189nouveau_channel_ind(struct nouveau_drm *drm, struct nouveau_cli *cli, 181nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
190 u32 parent, u32 handle, u32 engine, 182 u32 handle, u32 engine, struct nouveau_channel **pchan)
191 struct nouveau_channel **pchan)
192{ 183{
193 static const u16 oclasses[] = { NVE0_CHANNEL_IND_CLASS, 184 static const u16 oclasses[] = { NVE0_CHANNEL_IND_CLASS,
194 NVC0_CHANNEL_IND_CLASS, 185 NVC0_CHANNEL_IND_CLASS,
@@ -201,22 +192,20 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nouveau_cli *cli,
201 int ret; 192 int ret;
202 193
203 /* allocate dma push buffer */ 194 /* allocate dma push buffer */
204 ret = nouveau_channel_prep(drm, cli, parent, handle, 0x12000, &chan); 195 ret = nouveau_channel_prep(drm, device, handle, 0x12000, &chan);
205 *pchan = chan; 196 *pchan = chan;
206 if (ret) 197 if (ret)
207 return ret; 198 return ret;
208 199
209 /* create channel object */ 200 /* create channel object */
210 args.pushbuf = chan->push.handle; 201 args.pushbuf = chan->push.ctxdma.handle;
211 args.ioffset = 0x10000 + chan->push.vma.offset; 202 args.ioffset = 0x10000 + chan->push.vma.offset;
212 args.ilength = 0x02000; 203 args.ilength = 0x02000;
213 args.engine = engine; 204 args.engine = engine;
214 205
215 do { 206 do {
216 ret = nouveau_object_new(nv_object(cli), parent, handle, 207 ret = nvif_object_new(nvif_object(device), handle, *oclass++,
217 *oclass++, &args, sizeof(args), 208 &args, sizeof(args), &chan->object);
218 (struct nouveau_object **)
219 &chan->object);
220 if (ret == 0) 209 if (ret == 0)
221 return ret; 210 return ret;
222 } while (*oclass); 211 } while (*oclass);
@@ -226,8 +215,8 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nouveau_cli *cli,
226} 215}
227 216
228static int 217static int
229nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli, 218nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
230 u32 parent, u32 handle, struct nouveau_channel **pchan) 219 u32 handle, struct nouveau_channel **pchan)
231{ 220{
232 static const u16 oclasses[] = { NV40_CHANNEL_DMA_CLASS, 221 static const u16 oclasses[] = { NV40_CHANNEL_DMA_CLASS,
233 NV17_CHANNEL_DMA_CLASS, 222 NV17_CHANNEL_DMA_CLASS,
@@ -240,20 +229,18 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli,
240 int ret; 229 int ret;
241 230
242 /* allocate dma push buffer */ 231 /* allocate dma push buffer */
243 ret = nouveau_channel_prep(drm, cli, parent, handle, 0x10000, &chan); 232 ret = nouveau_channel_prep(drm, device, handle, 0x10000, &chan);
244 *pchan = chan; 233 *pchan = chan;
245 if (ret) 234 if (ret)
246 return ret; 235 return ret;
247 236
248 /* create channel object */ 237 /* create channel object */
249 args.pushbuf = chan->push.handle; 238 args.pushbuf = chan->push.ctxdma.handle;
250 args.offset = chan->push.vma.offset; 239 args.offset = chan->push.vma.offset;
251 240
252 do { 241 do {
253 ret = nouveau_object_new(nv_object(cli), parent, handle, 242 ret = nvif_object_new(nvif_object(device), handle, *oclass++,
254 *oclass++, &args, sizeof(args), 243 &args, sizeof(args), &chan->object);
255 (struct nouveau_object **)
256 &chan->object);
257 if (ret == 0) 244 if (ret == 0)
258 return ret; 245 return ret;
259 } while (ret && *oclass); 246 } while (ret && *oclass);
@@ -265,13 +252,12 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nouveau_cli *cli,
265static int 252static int
266nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) 253nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
267{ 254{
268 struct nouveau_client *client = nv_client(chan->cli); 255 struct nvif_device *device = chan->device;
269 struct nvif_device *device = &chan->drm->device; 256 struct nouveau_cli *cli = (void *)nvif_client(&device->base);
270 struct nouveau_instmem *imem = nvkm_instmem(device); 257 struct nouveau_instmem *imem = nvkm_instmem(device);
271 struct nouveau_vmmgr *vmm = nvkm_vmmgr(device); 258 struct nouveau_vmmgr *vmm = nvkm_vmmgr(device);
272 struct nouveau_fb *pfb = nvkm_fb(device); 259 struct nouveau_fb *pfb = nvkm_fb(device);
273 struct nouveau_software_chan *swch; 260 struct nouveau_software_chan *swch;
274 struct nouveau_object *object;
275 struct nv_dma_class args = {}; 261 struct nv_dma_class args = {};
276 int ret, i; 262 int ret, i;
277 263
@@ -280,22 +266,23 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
280 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 266 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
281 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM; 267 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
282 args.start = 0; 268 args.start = 0;
283 args.limit = client->vm->vmm->limit - 1; 269 args.limit = cli->vm->vmm->limit - 1;
284 } else { 270 } else {
285 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR; 271 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
286 args.start = 0; 272 args.start = 0;
287 args.limit = pfb->ram->size - imem->reserved - 1; 273 args.limit = pfb->ram->size - imem->reserved - 1;
288 } 274 }
289 275
290 ret = nouveau_object_new(nv_object(client), chan->handle, vram, 276 ret = nvif_object_init(chan->object, NULL, vram,
291 0x003d, &args, sizeof(args), &object); 277 NV_DMA_IN_MEMORY_CLASS, &args,
278 sizeof(args), &chan->vram);
292 if (ret) 279 if (ret)
293 return ret; 280 return ret;
294 281
295 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 282 if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
296 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM; 283 args.flags = NV_DMA_TARGET_VM | NV_DMA_ACCESS_VM;
297 args.start = 0; 284 args.start = 0;
298 args.limit = client->vm->vmm->limit - 1; 285 args.limit = cli->vm->vmm->limit - 1;
299 } else 286 } else
300 if (chan->drm->agp.stat == ENABLED) { 287 if (chan->drm->agp.stat == ENABLED) {
301 args.flags = NV_DMA_TARGET_AGP | NV_DMA_ACCESS_RDWR; 288 args.flags = NV_DMA_TARGET_AGP | NV_DMA_ACCESS_RDWR;
@@ -308,17 +295,15 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
308 args.limit = vmm->limit - 1; 295 args.limit = vmm->limit - 1;
309 } 296 }
310 297
311 ret = nouveau_object_new(nv_object(client), chan->handle, gart, 298 ret = nvif_object_init(chan->object, NULL, gart,
312 0x003d, &args, sizeof(args), &object); 299 NV_DMA_IN_MEMORY_CLASS, &args,
300 sizeof(args), &chan->gart);
313 if (ret) 301 if (ret)
314 return ret; 302 return ret;
315
316 chan->vram = vram;
317 chan->gart = gart;
318 } 303 }
319 304
320 /* initialise dma tracking parameters */ 305 /* initialise dma tracking parameters */
321 switch (nv_hclass(chan->object) & 0x00ff) { 306 switch (chan->object->oclass & 0x00ff) {
322 case 0x006b: 307 case 0x006b:
323 case 0x006e: 308 case 0x006e:
324 chan->user_put = 0x40; 309 chan->user_put = 0x40;
@@ -350,12 +335,12 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
350 335
351 /* allocate software object class (used for fences on <= nv05) */ 336 /* allocate software object class (used for fences on <= nv05) */
352 if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { 337 if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) {
353 ret = nouveau_object_new(nv_object(client), chan->handle, 338 ret = nvif_object_init(chan->object, NULL, NvSw, 0x006e,
354 NvSw, 0x006e, NULL, 0, &object); 339 NULL, 0, &chan->nvsw);
355 if (ret) 340 if (ret)
356 return ret; 341 return ret;
357 342
358 swch = (void *)object->parent; 343 swch = (void *)nvkm_object(&chan->nvsw)->parent;
359 swch->flip = nouveau_flip_complete; 344 swch->flip = nouveau_flip_complete;
360 swch->flip_data = chan; 345 swch->flip_data = chan;
361 346
@@ -373,16 +358,17 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
373} 358}
374 359
375int 360int
376nouveau_channel_new(struct nouveau_drm *drm, struct nouveau_cli *cli, 361nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device,
377 u32 parent, u32 handle, u32 arg0, u32 arg1, 362 u32 handle, u32 arg0, u32 arg1,
378 struct nouveau_channel **pchan) 363 struct nouveau_channel **pchan)
379{ 364{
365 struct nouveau_cli *cli = (void *)nvif_client(&device->base);
380 int ret; 366 int ret;
381 367
382 ret = nouveau_channel_ind(drm, cli, parent, handle, arg0, pchan); 368 ret = nouveau_channel_ind(drm, device, handle, arg0, pchan);
383 if (ret) { 369 if (ret) {
384 NV_PRINTK(debug, cli, "ib channel create, %d\n", ret); 370 NV_PRINTK(debug, cli, "ib channel create, %d\n", ret);
385 ret = nouveau_channel_dma(drm, cli, parent, handle, pchan); 371 ret = nouveau_channel_dma(drm, device, handle, pchan);
386 if (ret) { 372 if (ret) {
387 NV_PRINTK(debug, cli, "dma channel create, %d\n", ret); 373 NV_PRINTK(debug, cli, "dma channel create, %d\n", ret);
388 return ret; 374 return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.h b/drivers/gpu/drm/nouveau/nouveau_chan.h
index a3fec949a225..2a02fd56cf18 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.h
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.h
@@ -1,20 +1,21 @@
1#ifndef __NOUVEAU_CHAN_H__ 1#ifndef __NOUVEAU_CHAN_H__
2#define __NOUVEAU_CHAN_H__ 2#define __NOUVEAU_CHAN_H__
3 3
4struct nouveau_cli; 4#include <nvif/object.h>
5struct nvif_device;
5 6
6struct nouveau_channel { 7struct nouveau_channel {
7 struct nouveau_cli *cli; 8 struct nvif_device *device;
8 struct nouveau_drm *drm; 9 struct nouveau_drm *drm;
9 10
10 u32 handle; 11 struct nvif_object vram;
11 u32 vram; 12 struct nvif_object gart;
12 u32 gart; 13 struct nvif_object nvsw;
13 14
14 struct { 15 struct {
15 struct nouveau_bo *buffer; 16 struct nouveau_bo *buffer;
16 struct nouveau_vma vma; 17 struct nouveau_vma vma;
17 u32 handle; 18 struct nvif_object ctxdma;
18 } push; 19 } push;
19 20
20 /* TODO: this will be reworked in the near future */ 21 /* TODO: this will be reworked in the near future */
@@ -38,8 +39,8 @@ struct nouveau_channel {
38}; 39};
39 40
40 41
41int nouveau_channel_new(struct nouveau_drm *, struct nouveau_cli *, 42int nouveau_channel_new(struct nouveau_drm *, struct nvif_device *,
42 u32 parent, u32 handle, u32 arg0, u32 arg1, 43 u32 handle, u32 arg0, u32 arg1,
43 struct nouveau_channel **); 44 struct nouveau_channel **);
44void nouveau_channel_del(struct nouveau_channel **); 45void nouveau_channel_del(struct nouveau_channel **);
45int nouveau_channel_idle(struct nouveau_channel *); 46int nouveau_channel_idle(struct nouveau_channel *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 926f5bf2c83e..1b009f73e85f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -42,10 +42,6 @@
42#include "nouveau_encoder.h" 42#include "nouveau_encoder.h"
43#include "nouveau_crtc.h" 43#include "nouveau_crtc.h"
44 44
45#include <subdev/i2c.h>
46#include <subdev/gpio.h>
47#include <engine/disp.h>
48
49#include <nvif/event.h> 45#include <nvif/event.h>
50 46
51MODULE_PARM_DESC(tv_disable, "Disable TV-out detection"); 47MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index c63615b00d56..897e08503bfb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -37,8 +37,6 @@
37 37
38#include "nouveau_fence.h" 38#include "nouveau_fence.h"
39 39
40#include <engine/disp.h>
41
42#include <core/class.h> 40#include <core/class.h>
43#include <nvif/event.h> 41#include <nvif/event.h>
44 42
@@ -102,7 +100,7 @@ nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
102 int ret, retry = 1; 100 int ret, retry = 1;
103 101
104 do { 102 do {
105 ret = nv_exec(disp->core, mthd, &args, sizeof(args)); 103 ret = nvif_exec(&disp->disp, mthd, &args, sizeof(args));
106 if (ret != 0) 104 if (ret != 0)
107 return 0; 105 return 0;
108 106
@@ -399,10 +397,10 @@ nouveau_display_create_properties(struct drm_device *dev)
399 struct nouveau_display *disp = nouveau_display(dev); 397 struct nouveau_display *disp = nouveau_display(dev);
400 int gen; 398 int gen;
401 399
402 if (nv_mclass(disp->core) < NV50_DISP_CLASS) 400 if (disp->disp.oclass < NV50_DISP_CLASS)
403 gen = 0; 401 gen = 0;
404 else 402 else
405 if (nv_mclass(disp->core) < NVD0_DISP_CLASS) 403 if (disp->disp.oclass < NVD0_DISP_CLASS)
406 gen = 1; 404 gen = 1;
407 else 405 else
408 gen = 2; 406 gen = 2;
@@ -488,14 +486,14 @@ nouveau_display_create(struct drm_device *dev)
488 int i; 486 int i;
489 487
490 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { 488 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
491 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE, 489 ret = nvif_object_init(nvif_object(&drm->device), NULL,
492 NVDRM_DISPLAY, oclass[i], 490 NVDRM_DISPLAY, oclass[i],
493 NULL, 0, &disp->core); 491 NULL, 0, &disp->disp);
494 } 492 }
495 493
496 if (ret == 0) { 494 if (ret == 0) {
497 nouveau_display_create_properties(dev); 495 nouveau_display_create_properties(dev);
498 if (nv_mclass(disp->core) < NV50_DISP_CLASS) 496 if (disp->disp.oclass < NV50_DISP_CLASS)
499 ret = nv04_display_create(dev); 497 ret = nv04_display_create(dev);
500 else 498 else
501 ret = nv50_display_create(dev); 499 ret = nv50_display_create(dev);
@@ -528,7 +526,6 @@ void
528nouveau_display_destroy(struct drm_device *dev) 526nouveau_display_destroy(struct drm_device *dev)
529{ 527{
530 struct nouveau_display *disp = nouveau_display(dev); 528 struct nouveau_display *disp = nouveau_display(dev);
531 struct nouveau_drm *drm = nouveau_drm(dev);
532 529
533 nouveau_backlight_exit(dev); 530 nouveau_backlight_exit(dev);
534 nouveau_display_vblank_fini(dev); 531 nouveau_display_vblank_fini(dev);
@@ -539,7 +536,7 @@ nouveau_display_destroy(struct drm_device *dev)
539 if (disp->dtor) 536 if (disp->dtor)
540 disp->dtor(dev); 537 disp->dtor(dev);
541 538
542 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY); 539 nvif_object_fini(&disp->disp);
543 540
544 nouveau_drm(dev)->display = NULL; 541 nouveau_drm(dev)->display = NULL;
545 kfree(disp); 542 kfree(disp);
@@ -690,12 +687,15 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
690 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; 687 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
691 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; 688 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
692 struct nouveau_page_flip_state *s; 689 struct nouveau_page_flip_state *s;
693 struct nouveau_channel *chan = drm->channel; 690 struct nouveau_channel *chan;
691 struct nouveau_cli *cli;
694 struct nouveau_fence *fence; 692 struct nouveau_fence *fence;
695 int ret; 693 int ret;
696 694
697 if (!drm->channel) 695 chan = drm->channel;
696 if (!chan)
698 return -ENODEV; 697 return -ENODEV;
698 cli = (void *)nvif_client(&chan->device->base);
699 699
700 s = kzalloc(sizeof(*s), GFP_KERNEL); 700 s = kzalloc(sizeof(*s), GFP_KERNEL);
701 if (!s) 701 if (!s)
@@ -707,7 +707,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
707 goto fail_free; 707 goto fail_free;
708 } 708 }
709 709
710 mutex_lock(&chan->cli->mutex); 710 mutex_lock(&cli->mutex);
711 711
712 /* synchronise rendering channel with the kernel's channel */ 712 /* synchronise rendering channel with the kernel's channel */
713 spin_lock(&new_bo->bo.bdev->fence_lock); 713 spin_lock(&new_bo->bo.bdev->fence_lock);
@@ -761,7 +761,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
761 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); 761 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
762 if (ret) 762 if (ret)
763 goto fail_unreserve; 763 goto fail_unreserve;
764 mutex_unlock(&chan->cli->mutex); 764 mutex_unlock(&cli->mutex);
765 765
766 /* Update the crtc struct and cleanup */ 766 /* Update the crtc struct and cleanup */
767 crtc->primary->fb = fb; 767 crtc->primary->fb = fb;
@@ -777,7 +777,7 @@ fail_unreserve:
777 drm_vblank_put(dev, nouveau_crtc(crtc)->index); 777 drm_vblank_put(dev, nouveau_crtc(crtc)->index);
778 ttm_bo_unreserve(&old_bo->bo); 778 ttm_bo_unreserve(&old_bo->bo);
779fail_unpin: 779fail_unpin:
780 mutex_unlock(&chan->cli->mutex); 780 mutex_unlock(&cli->mutex);
781 if (old_bo != new_bo) 781 if (old_bo != new_bo)
782 nouveau_bo_unpin(new_bo); 782 nouveau_bo_unpin(new_bo);
783fail_free: 783fail_free:
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.h b/drivers/gpu/drm/nouveau/nouveau_display.h
index 37bf0d224a4c..88ca177cb1c7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.h
+++ b/drivers/gpu/drm/nouveau/nouveau_display.h
@@ -12,6 +12,8 @@ struct nouveau_framebuffer {
12 u32 r_handle; 12 u32 r_handle;
13 u32 r_format; 13 u32 r_format;
14 u32 r_pitch; 14 u32 r_pitch;
15 struct nvif_object h_base[4];
16 struct nvif_object h_core;
15}; 17};
16 18
17static inline struct nouveau_framebuffer * 19static inline struct nouveau_framebuffer *
@@ -39,7 +41,7 @@ struct nouveau_display {
39 int (*fb_ctor)(struct drm_framebuffer *); 41 int (*fb_ctor)(struct drm_framebuffer *);
40 void (*fb_dtor)(struct drm_framebuffer *); 42 void (*fb_dtor)(struct drm_framebuffer *);
41 43
42 struct nouveau_object *core; 44 struct nvif_object disp;
43 45
44 struct drm_property *dithering_mode; 46 struct drm_property *dithering_mode;
45 struct drm_property *dithering_depth; 47 struct drm_property *dithering_depth;
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index da773abe6307..aafdd278ae3f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -84,12 +84,13 @@ void
84nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, 84nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo,
85 int delta, int length) 85 int delta, int length)
86{ 86{
87 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base);
87 struct nouveau_bo *pb = chan->push.buffer; 88 struct nouveau_bo *pb = chan->push.buffer;
88 struct nouveau_vma *vma; 89 struct nouveau_vma *vma;
89 int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base; 90 int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
90 u64 offset; 91 u64 offset;
91 92
92 vma = nouveau_bo_vma_find(bo, nv_client(chan->cli)->vm); 93 vma = nouveau_bo_vma_find(bo, cli->vm);
93 BUG_ON(!vma); 94 BUG_ON(!vma);
94 offset = vma->offset + delta; 95 offset = vma->offset + delta;
95 96
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c
index 5675ffc175ae..29cd1a9010a4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -32,9 +32,6 @@
32 32
33#include <core/class.h> 33#include <core/class.h>
34 34
35#include <subdev/gpio.h>
36#include <subdev/i2c.h>
37
38static void 35static void
39nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch, 36nouveau_dp_probe_oui(struct drm_device *dev, struct nouveau_i2c_port *auxch,
40 u8 *dpcd) 37 u8 *dpcd)
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 051e7104106d..309be93de597 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -30,18 +30,10 @@
30#include "drmP.h" 30#include "drmP.h"
31#include "drm_crtc_helper.h" 31#include "drm_crtc_helper.h"
32#include <core/device.h> 32#include <core/device.h>
33#include <core/client.h>
34#include <core/gpuobj.h> 33#include <core/gpuobj.h>
35#include <core/class.h> 34#include <core/class.h>
36#include <core/option.h> 35#include <core/option.h>
37 36
38#include <engine/device.h>
39#include <engine/disp.h>
40#include <engine/fifo.h>
41#include <engine/software.h>
42
43#include <subdev/vm.h>
44
45#include "nouveau_drm.h" 37#include "nouveau_drm.h"
46#include "nouveau_dma.h" 38#include "nouveau_dma.h"
47#include "nouveau_ttm.h" 39#include "nouveau_ttm.h"
@@ -109,40 +101,34 @@ static int
109nouveau_cli_create(u64 name, const char *sname, 101nouveau_cli_create(u64 name, const char *sname,
110 int size, void **pcli) 102 int size, void **pcli)
111{ 103{
112 struct nouveau_cli *cli; 104 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
113 int ret; 105 if (cli) {
114 106 int ret = nvif_client_init(NULL, NULL, sname, name,
115 *pcli = NULL; 107 nouveau_config, nouveau_debug,
116 ret = nouveau_client_create_(sname, name, nouveau_config, 108 &cli->base);
117 nouveau_debug, size, pcli); 109 if (ret == 0)
118 cli = *pcli; 110 mutex_init(&cli->mutex);
119 if (ret) {
120 if (cli)
121 nouveau_client_destroy(&cli->base);
122 *pcli = NULL;
123 return ret; 111 return ret;
124 } 112 }
125 113 return -ENOMEM;
126 mutex_init(&cli->mutex);
127 return 0;
128} 114}
129 115
130static void 116static void
131nouveau_cli_destroy(struct nouveau_cli *cli) 117nouveau_cli_destroy(struct nouveau_cli *cli)
132{ 118{
133 struct nouveau_object *client = nv_object(cli); 119 nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL);
134 nouveau_vm_ref(NULL, &cli->base.vm, NULL); 120 nvif_client_fini(&cli->base);
135 nouveau_client_fini(&cli->base, false);
136 atomic_set(&client->refcount, 1);
137 nouveau_object_ref(NULL, &client);
138} 121}
139 122
140static void 123static void
141nouveau_accel_fini(struct nouveau_drm *drm) 124nouveau_accel_fini(struct nouveau_drm *drm)
142{ 125{
143 nouveau_gpuobj_ref(NULL, &drm->notify);
144 nouveau_channel_del(&drm->channel); 126 nouveau_channel_del(&drm->channel);
127 nvif_object_fini(&drm->ntfy);
128 nouveau_gpuobj_ref(NULL, &drm->notify);
129 nvif_object_fini(&drm->nvsw);
145 nouveau_channel_del(&drm->cechan); 130 nouveau_channel_del(&drm->cechan);
131 nvif_object_fini(&drm->ttm.copy);
146 if (drm->fence) 132 if (drm->fence)
147 nouveau_fence(drm)->dtor(drm); 133 nouveau_fence(drm)->dtor(drm);
148} 134}
@@ -151,7 +137,6 @@ static void
151nouveau_accel_init(struct nouveau_drm *drm) 137nouveau_accel_init(struct nouveau_drm *drm)
152{ 138{
153 struct nvif_device *device = &drm->device; 139 struct nvif_device *device = &drm->device;
154 struct nouveau_object *object;
155 u32 arg0, arg1; 140 u32 arg0, arg1;
156 u32 sclass[16]; 141 u32 sclass[16];
157 int ret, i; 142 int ret, i;
@@ -163,8 +148,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
163 /*XXX: this is crap, but the fence/channel stuff is a little 148 /*XXX: this is crap, but the fence/channel stuff is a little
164 * backwards in some places. this will be fixed. 149 * backwards in some places. this will be fixed.
165 */ 150 */
166 ret = nouveau_parent_lclass(nvkm_object(device), sclass, 151 ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
167 ARRAY_SIZE(sclass));
168 if (ret < 0) 152 if (ret < 0)
169 return; 153 return;
170 154
@@ -202,8 +186,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
202 } 186 }
203 187
204 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { 188 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
205 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, 189 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
206 NVDRM_CHAN + 1,
207 NVE0_CHANNEL_IND_ENGINE_CE0 | 190 NVE0_CHANNEL_IND_ENGINE_CE0 |
208 NVE0_CHANNEL_IND_ENGINE_CE1, 0, 191 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
209 &drm->cechan); 192 &drm->cechan);
@@ -216,9 +199,8 @@ nouveau_accel_init(struct nouveau_drm *drm)
216 if (device->info.chipset >= 0xa3 && 199 if (device->info.chipset >= 0xa3 &&
217 device->info.chipset != 0xaa && 200 device->info.chipset != 0xaa &&
218 device->info.chipset != 0xac) { 201 device->info.chipset != 0xac) {
219 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, 202 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
220 NVDRM_CHAN + 1, NvDmaFB, NvDmaTT, 203 NvDmaFB, NvDmaTT, &drm->cechan);
221 &drm->cechan);
222 if (ret) 204 if (ret)
223 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 205 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
224 206
@@ -229,18 +211,18 @@ nouveau_accel_init(struct nouveau_drm *drm)
229 arg1 = NvDmaTT; 211 arg1 = NvDmaTT;
230 } 212 }
231 213
232 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, 214 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
233 arg0, arg1, &drm->channel); 215 &drm->channel);
234 if (ret) { 216 if (ret) {
235 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 217 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
236 nouveau_accel_fini(drm); 218 nouveau_accel_fini(drm);
237 return; 219 return;
238 } 220 }
239 221
240 ret = nouveau_object_new(nv_object(drm), NVDRM_CHAN, NVDRM_NVSW, 222 ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
241 nouveau_abi16_swclass(drm), NULL, 0, &object); 223 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
242 if (ret == 0) { 224 if (ret == 0) {
243 struct nouveau_software_chan *swch = (void *)object->parent; 225 struct nouveau_software_chan *swch;
244 ret = RING_SPACE(drm->channel, 2); 226 ret = RING_SPACE(drm->channel, 2);
245 if (ret == 0) { 227 if (ret == 0) {
246 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 228 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
@@ -252,7 +234,7 @@ nouveau_accel_init(struct nouveau_drm *drm)
252 OUT_RING (drm->channel, 0x001f0000); 234 OUT_RING (drm->channel, 0x001f0000);
253 } 235 }
254 } 236 }
255 swch = (void *)object->parent; 237 swch = (void *)nvkm_object(&drm->nvsw)->parent;
256 swch->flip = nouveau_flip_complete; 238 swch->flip = nouveau_flip_complete;
257 swch->flip_data = drm->channel; 239 swch->flip_data = drm->channel;
258 } 240 }
@@ -272,15 +254,15 @@ nouveau_accel_init(struct nouveau_drm *drm)
272 return; 254 return;
273 } 255 }
274 256
275 ret = nouveau_object_new(nv_object(drm), 257 ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
276 drm->channel->handle, NvNotify0, 258 NV_DMA_IN_MEMORY_CLASS,
277 0x003d, &(struct nv_dma_class) { 259 &(struct nv_dma_class) {
278 .flags = NV_DMA_TARGET_VRAM | 260 .flags = NV_DMA_TARGET_VRAM |
279 NV_DMA_ACCESS_RDWR, 261 NV_DMA_ACCESS_RDWR,
280 .start = drm->notify->addr, 262 .start = drm->notify->addr,
281 .limit = drm->notify->addr + 31 263 .limit = drm->notify->addr + 31
282 }, sizeof(struct nv_dma_class), 264 }, sizeof(struct nv_dma_class),
283 &object); 265 &drm->ntfy);
284 if (ret) { 266 if (ret) {
285 nouveau_accel_fini(drm); 267 nouveau_accel_fini(drm);
286 return; 268 return;
@@ -373,27 +355,6 @@ nouveau_get_hdmi_dev(struct nouveau_drm *drm)
373 } 355 }
374} 356}
375 357
376void
377nouveau_drm_hack_device(struct nouveau_drm *drm, struct nvif_device *device)
378{
379 drm->device.info.chipset = nvkm_device(&drm->device)->chipset;
380 switch (nvkm_device(&drm->device)->card_type) {
381 case NV_04: device->info.family = NV_DEVICE_INFO_V0_TNT; break;
382 case NV_10: device->info.family = NV_DEVICE_INFO_V0_CELSIUS; break;
383 case NV_11: device->info.family = NV_DEVICE_INFO_V0_CELSIUS; break;
384 case NV_20: device->info.family = NV_DEVICE_INFO_V0_KELVIN; break;
385 case NV_30: device->info.family = NV_DEVICE_INFO_V0_RANKINE; break;
386 case NV_40: device->info.family = NV_DEVICE_INFO_V0_CURIE; break;
387 case NV_50: device->info.family = NV_DEVICE_INFO_V0_TESLA; break;
388 case NV_C0: device->info.family = NV_DEVICE_INFO_V0_FERMI; break;
389 case NV_E0: device->info.family = NV_DEVICE_INFO_V0_KEPLER; break;
390 case GM100: device->info.family = NV_DEVICE_INFO_V0_MAXWELL; break;
391 default:
392 BUG_ON(1);
393 break;
394 }
395}
396
397static int 358static int
398nouveau_drm_load(struct drm_device *dev, unsigned long flags) 359nouveau_drm_load(struct drm_device *dev, unsigned long flags)
399{ 360{
@@ -408,7 +369,8 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
408 369
409 dev->dev_private = drm; 370 dev->dev_private = drm;
410 drm->dev = dev; 371 drm->dev = dev;
411 nouveau_client(drm)->debug = nouveau_dbgopt(nouveau_debug, "DRM"); 372 nvkm_client(&drm->client.base)->debug =
373 nouveau_dbgopt(nouveau_debug, "DRM");
412 374
413 INIT_LIST_HEAD(&drm->clients); 375 INIT_LIST_HEAD(&drm->clients);
414 spin_lock_init(&drm->tile.lock); 376 spin_lock_init(&drm->tile.lock);
@@ -422,39 +384,34 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
422 /* dummy device object, doesn't init anything, but allows 384 /* dummy device object, doesn't init anything, but allows
423 * agp code access to registers 385 * agp code access to registers
424 */ 386 */
425 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, 387 ret = nvif_device_init(&drm->client.base.base, NULL,
426 NVDRM_DEVICE, 0x0080, 388 NVDRM_DEVICE, NV_DEVICE_CLASS,
427 &(struct nv_device_class) { 389 &(struct nv_device_class) {
428 .device = ~0, 390 .device = ~0,
429 .disable = 391 .disable =
430 ~(NV_DEVICE_DISABLE_MMIO | 392 ~(NV_DEVICE_DISABLE_MMIO |
431 NV_DEVICE_DISABLE_IDENTIFY), 393 NV_DEVICE_DISABLE_IDENTIFY),
432 .debug0 = ~0, 394 .debug0 = ~0,
433 }, sizeof(struct nv_device_class), 395 }, sizeof(struct nv_device_class),
434 (struct nouveau_object **) 396 &drm->device);
435 &drm->device.object);
436 if (ret) 397 if (ret)
437 goto fail_device; 398 goto fail_device;
438 399
439 nouveau_drm_hack_device(drm, &drm->device);
440
441 nouveau_agp_reset(drm); 400 nouveau_agp_reset(drm);
442 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); 401 nvif_device_fini(&drm->device);
443 } 402 }
444 403
445 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, 404 ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
446 0x0080, &(struct nv_device_class) { 405 NV_DEVICE_CLASS,
406 &(struct nv_device_class) {
447 .device = ~0, 407 .device = ~0,
448 .disable = 0, 408 .disable = 0,
449 .debug0 = 0, 409 .debug0 = 0,
450 }, sizeof(struct nv_device_class), 410 }, sizeof(struct nv_device_class),
451 (struct nouveau_object **) 411 &drm->device);
452 &drm->device.object);
453 if (ret) 412 if (ret)
454 goto fail_device; 413 goto fail_device;
455 414
456 nouveau_drm_hack_device(drm, &drm->device);
457
458 dev->irq_enabled = true; 415 dev->irq_enabled = true;
459 416
460 /* workaround an odd issue on nvc1 by disabling the device's 417 /* workaround an odd issue on nvc1 by disabling the device's
@@ -473,7 +430,7 @@ nouveau_drm_load(struct drm_device *dev, unsigned long flags)
473 if (ret) 430 if (ret)
474 goto fail_device; 431 goto fail_device;
475 432
476 drm->client.base.vm = drm->client.vm; 433 nvkm_client(&drm->client.base)->vm = drm->client.vm;
477 } 434 }
478 435
479 ret = nouveau_ttm_init(drm); 436 ret = nouveau_ttm_init(drm);
@@ -519,6 +476,7 @@ fail_ttm:
519 nouveau_agp_fini(drm); 476 nouveau_agp_fini(drm);
520 nouveau_vga_fini(drm); 477 nouveau_vga_fini(drm);
521fail_device: 478fail_device:
479 nvif_device_fini(&drm->device);
522 nouveau_cli_destroy(&drm->client); 480 nouveau_cli_destroy(&drm->client);
523 return ret; 481 return ret;
524} 482}
@@ -544,6 +502,7 @@ nouveau_drm_unload(struct drm_device *dev)
544 nouveau_agp_fini(drm); 502 nouveau_agp_fini(drm);
545 nouveau_vga_fini(drm); 503 nouveau_vga_fini(drm);
546 504
505 nvif_device_fini(&drm->device);
547 if (drm->hdmi_device) 506 if (drm->hdmi_device)
548 pci_dev_put(drm->hdmi_device); 507 pci_dev_put(drm->hdmi_device);
549 nouveau_cli_destroy(&drm->client); 508 nouveau_cli_destroy(&drm->client);
@@ -554,10 +513,12 @@ void
554nouveau_drm_device_remove(struct drm_device *dev) 513nouveau_drm_device_remove(struct drm_device *dev)
555{ 514{
556 struct nouveau_drm *drm = nouveau_drm(dev); 515 struct nouveau_drm *drm = nouveau_drm(dev);
516 struct nouveau_client *client;
557 struct nouveau_object *device; 517 struct nouveau_object *device;
558 518
559 dev->irq_enabled = false; 519 dev->irq_enabled = false;
560 device = drm->client.base.device; 520 client = nvkm_client(&drm->client.base);
521 device = client->device;
561 drm_put_dev(dev); 522 drm_put_dev(dev);
562 523
563 nouveau_object_ref(NULL, &device); 524 nouveau_object_ref(NULL, &device);
@@ -612,13 +573,13 @@ nouveau_do_suspend(struct drm_device *dev, bool runtime)
612 } 573 }
613 574
614 list_for_each_entry(cli, &drm->clients, head) { 575 list_for_each_entry(cli, &drm->clients, head) {
615 ret = nouveau_client_fini(&cli->base, true); 576 ret = nvif_client_suspend(&cli->base);
616 if (ret) 577 if (ret)
617 goto fail_client; 578 goto fail_client;
618 } 579 }
619 580
620 NV_INFO(drm, "suspending kernel object tree...\n"); 581 NV_INFO(drm, "suspending kernel object tree...\n");
621 ret = nouveau_client_fini(&drm->client.base, true); 582 ret = nvif_client_suspend(&drm->client.base);
622 if (ret) 583 if (ret)
623 goto fail_client; 584 goto fail_client;
624 585
@@ -627,7 +588,7 @@ nouveau_do_suspend(struct drm_device *dev, bool runtime)
627 588
628fail_client: 589fail_client:
629 list_for_each_entry_continue_reverse(cli, &drm->clients, head) { 590 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
630 nouveau_client_init(&cli->base); 591 nvif_client_resume(&cli->base);
631 } 592 }
632 593
633 if (drm->fence && nouveau_fence(drm)->resume) 594 if (drm->fence && nouveau_fence(drm)->resume)
@@ -675,7 +636,7 @@ nouveau_do_resume(struct drm_device *dev)
675 nouveau_agp_reset(drm); 636 nouveau_agp_reset(drm);
676 637
677 NV_INFO(drm, "resuming kernel object tree...\n"); 638 NV_INFO(drm, "resuming kernel object tree...\n");
678 nouveau_client_init(&drm->client.base); 639 nvif_client_resume(&drm->client.base);
679 nouveau_agp_init(drm); 640 nouveau_agp_init(drm);
680 641
681 NV_INFO(drm, "resuming client object trees...\n"); 642 NV_INFO(drm, "resuming client object trees...\n");
@@ -683,7 +644,7 @@ nouveau_do_resume(struct drm_device *dev)
683 nouveau_fence(drm)->resume(drm); 644 nouveau_fence(drm)->resume(drm);
684 645
685 list_for_each_entry(cli, &drm->clients, head) { 646 list_for_each_entry(cli, &drm->clients, head) {
686 nouveau_client_init(&cli->base); 647 nvif_client_resume(&cli->base);
687 } 648 }
688 649
689 nouveau_run_vbios_init(dev); 650 nouveau_run_vbios_init(dev);
@@ -779,6 +740,8 @@ nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
779 if (ret) 740 if (ret)
780 goto out_suspend; 741 goto out_suspend;
781 742
743 cli->base.super = false;
744
782 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { 745 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
783 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40), 746 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
784 0x1000, &cli->vm); 747 0x1000, &cli->vm);
@@ -787,7 +750,7 @@ nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
787 goto out_suspend; 750 goto out_suspend;
788 } 751 }
789 752
790 cli->base.vm = cli->vm; 753 nvkm_client(&cli->base)->vm = cli->vm;
791 } 754 }
792 755
793 fpriv->driver_priv = cli; 756 fpriv->driver_priv = cli;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.h b/drivers/gpu/drm/nouveau/nouveau_drm.h
index 07e9c734cc46..a29fd210e4c6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.h
@@ -28,6 +28,9 @@
28#include <core/client.h> 28#include <core/client.h>
29#include <core/event.h> 29#include <core/event.h>
30 30
31#include <nvif/client.h>
32#include <nvif/device.h>
33
31#include <subdev/vm.h> 34#include <subdev/vm.h>
32 35
33#include <drmP.h> 36#include <drmP.h>
@@ -53,6 +56,17 @@ struct nouveau_drm_tile {
53 bool used; 56 bool used;
54}; 57};
55 58
59enum nouveau_drm_object_route {
60 NVDRM_OBJECT_NVIF = 0,
61 NVDRM_OBJECT_USIF,
62 NVDRM_OBJECT_ABI16,
63};
64
65enum nouveau_drm_notify_route {
66 NVDRM_NOTIFY_NVIF = 0,
67 NVDRM_NOTIFY_USIF
68};
69
56enum nouveau_drm_handle { 70enum nouveau_drm_handle {
57 NVDRM_CLIENT = 0xffffffff, 71 NVDRM_CLIENT = 0xffffffff,
58 NVDRM_DEVICE = 0xdddddddd, 72 NVDRM_DEVICE = 0xdddddddd,
@@ -64,7 +78,7 @@ enum nouveau_drm_handle {
64}; 78};
65 79
66struct nouveau_cli { 80struct nouveau_cli {
67 struct nouveau_client base; 81 struct nvif_client base;
68 struct nouveau_vm *vm; /*XXX*/ 82 struct nouveau_vm *vm; /*XXX*/
69 struct list_head head; 83 struct list_head head;
70 struct mutex mutex; 84 struct mutex mutex;
@@ -78,31 +92,6 @@ nouveau_cli(struct drm_file *fpriv)
78} 92}
79 93
80#include <nvif/object.h> 94#include <nvif/object.h>
81#undef nvif_object
82#undef nvif_rd08
83#undef nvif_rd16
84#undef nvif_rd32
85#undef nvif_wr08
86#undef nvif_wr16
87#undef nvif_wr32
88#undef nvif_mask
89#undef nvkm_object
90#undef nvif_exec
91
92#define nvif_object(a) ({ \
93 struct nvif_object *_object = (a)->object; \
94 (struct nouveau_object *)_object; \
95})
96#define nvif_rd08(a,b) nv_ro08(nvif_object(a), (b))
97#define nvif_rd16(a,b) nv_ro16(nvif_object(a), (b))
98#define nvif_rd32(a,b) nv_ro32(nvif_object(a), (b))
99#define nvif_wr08(a,b,c) nv_wo08(nvif_object(a), (b), (c))
100#define nvif_wr16(a,b,c) nv_wo16(nvif_object(a), (b), (c))
101#define nvif_wr32(a,b,c) nv_wo32(nvif_object(a), (b), (c))
102#define nvif_mask(a,b,c,d) nv_mo32(nvif_object(a), (b), (c), (d))
103#define nvkm_object(a) nvif_object(a)
104#define nvif_exec(a,b,c,d) nv_exec(nvkm_object(a), (b), (c), (d))
105
106#include <nvif/device.h> 95#include <nvif/device.h>
107 96
108extern int nouveau_runtime_pm; 97extern int nouveau_runtime_pm;
@@ -134,6 +123,7 @@ struct nouveau_drm {
134 struct ttm_buffer_object *, 123 struct ttm_buffer_object *,
135 struct ttm_mem_reg *, struct ttm_mem_reg *); 124 struct ttm_mem_reg *, struct ttm_mem_reg *);
136 struct nouveau_channel *chan; 125 struct nouveau_channel *chan;
126 struct nvif_object copy;
137 int mtrr; 127 int mtrr;
138 } ttm; 128 } ttm;
139 129
@@ -151,6 +141,8 @@ struct nouveau_drm {
151 struct nouveau_channel *channel; 141 struct nouveau_channel *channel;
152 struct nouveau_gpuobj *notify; 142 struct nouveau_gpuobj *notify;
153 struct nouveau_fbdev *fbcon; 143 struct nouveau_fbdev *fbcon;
144 struct nvif_object nvsw;
145 struct nvif_object ntfy;
154 146
155 /* nv10-nv40 tiling regions */ 147 /* nv10-nv40 tiling regions */
156 struct { 148 struct {
@@ -192,7 +184,7 @@ void nouveau_drm_device_remove(struct drm_device *dev);
192 184
193#define NV_PRINTK(l,c,f,a...) do { \ 185#define NV_PRINTK(l,c,f,a...) do { \
194 struct nouveau_cli *_cli = (c); \ 186 struct nouveau_cli *_cli = (c); \
195 nv_##l(_cli, f, ##a); \ 187 nv_##l(_cli->base.base.priv, f, ##a); \
196} while(0) 188} while(0)
197#define NV_FATAL(drm,f,a...) NV_PRINTK(fatal, &(drm)->client, f, ##a) 189#define NV_FATAL(drm,f,a...) NV_PRINTK(fatal, &(drm)->client, f, ##a)
198#define NV_ERROR(drm,f,a...) NV_PRINTK(error, &(drm)->client, f, ##a) 190#define NV_ERROR(drm,f,a...) NV_PRINTK(error, &(drm)->client, f, ##a)
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index b4d911e26ec8..6864e0361163 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -54,8 +54,6 @@
54#include <core/client.h> 54#include <core/client.h>
55#include <core/device.h> 55#include <core/device.h>
56 56
57#include <subdev/fb.h>
58
59MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration"); 57MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
60static int nouveau_nofbaccel = 0; 58static int nouveau_nofbaccel = 0;
61module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400); 59module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
@@ -241,6 +239,13 @@ nouveau_fbcon_accel_fini(struct drm_device *dev)
241 fbcon->helper.fbdev->flags |= FBINFO_HWACCEL_DISABLED; 239 fbcon->helper.fbdev->flags |= FBINFO_HWACCEL_DISABLED;
242 console_unlock(); 240 console_unlock();
243 nouveau_channel_idle(drm->channel); 241 nouveau_channel_idle(drm->channel);
242 nvif_object_fini(&fbcon->twod);
243 nvif_object_fini(&fbcon->blit);
244 nvif_object_fini(&fbcon->gdi);
245 nvif_object_fini(&fbcon->patt);
246 nvif_object_fini(&fbcon->rop);
247 nvif_object_fini(&fbcon->clip);
248 nvif_object_fini(&fbcon->surf2d);
244 } 249 }
245} 250}
246 251
@@ -352,7 +357,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper,
352 357
353 chan = nouveau_nofbaccel ? NULL : drm->channel; 358 chan = nouveau_nofbaccel ? NULL : drm->channel;
354 if (chan && device->info.family >= NV_DEVICE_INFO_V0_TESLA) { 359 if (chan && device->info.family >= NV_DEVICE_INFO_V0_TESLA) {
355 ret = nouveau_bo_vma_add(nvbo, nv_client(chan->cli)->vm, 360 ret = nouveau_bo_vma_add(nvbo, drm->client.vm,
356 &fbcon->nouveau_fb.vma); 361 &fbcon->nouveau_fb.vma);
357 if (ret) { 362 if (ret) {
358 NV_ERROR(drm, "failed to map fb into chan: %d\n", ret); 363 NV_ERROR(drm, "failed to map fb into chan: %d\n", ret);
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index 6d857e2869c9..34658cfa8f5d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -37,6 +37,13 @@ struct nouveau_fbdev {
37 struct list_head fbdev_list; 37 struct list_head fbdev_list;
38 struct drm_device *dev; 38 struct drm_device *dev;
39 unsigned int saved_flags; 39 unsigned int saved_flags;
40 struct nvif_object surf2d;
41 struct nvif_object clip;
42 struct nvif_object rop;
43 struct nvif_object patt;
44 struct nvif_object gdi;
45 struct nvif_object blit;
46 struct nvif_object twod;
40}; 47};
41 48
42void nouveau_fbcon_restore(void); 49void nouveau_fbcon_restore(void);
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 35e32e1710bf..ace42ec92a72 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -33,8 +33,6 @@
33#include "nouveau_dma.h" 33#include "nouveau_dma.h"
34#include "nouveau_fence.h" 34#include "nouveau_fence.h"
35 35
36#include <engine/fifo.h>
37
38struct fence_work { 36struct fence_work {
39 struct work_struct base; 37 struct work_struct base;
40 struct list_head head; 38 struct list_head head;
@@ -184,7 +182,7 @@ nouveau_fence_wait_uevent(struct nouveau_fence *fence, bool intr)
184 182
185{ 183{
186 struct nouveau_channel *chan = fence->channel; 184 struct nouveau_channel *chan = fence->channel;
187 struct nouveau_fifo *pfifo = nvkm_fifo(&chan->drm->device); 185 struct nouveau_fifo *pfifo = nvkm_fifo(chan->device);
188 struct nouveau_fence_priv *priv = chan->drm->fence; 186 struct nouveau_fence_priv *priv = chan->drm->fence;
189 struct nouveau_fence_wait wait = { .priv = priv }; 187 struct nouveau_fence_wait wait = { .priv = priv };
190 int ret = 0; 188 int ret = 0;
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 49320219df91..292a677bfed4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -24,8 +24,6 @@
24 * 24 *
25 */ 25 */
26 26
27#include <subdev/fb.h>
28
29#include "nouveau_drm.h" 27#include "nouveau_drm.h"
30#include "nouveau_dma.h" 28#include "nouveau_dma.h"
31#include "nouveau_fence.h" 29#include "nouveau_fence.h"
@@ -696,7 +694,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
696 return -ENOMEM; 694 return -ENOMEM;
697 695
698 list_for_each_entry(temp, &abi16->channels, head) { 696 list_for_each_entry(temp, &abi16->channels, head) {
699 if (temp->chan->handle == (NVDRM_CHAN | req->channel)) { 697 if (temp->chan->object->handle == (NVDRM_CHAN | req->channel)) {
700 chan = temp->chan; 698 chan = temp->chan;
701 break; 699 break;
702 } 700 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_hwmon.c b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
index 817d41a8a0a4..afb36d66e78d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_hwmon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_hwmon.c
@@ -34,10 +34,6 @@
34#include "nouveau_drm.h" 34#include "nouveau_drm.h"
35#include "nouveau_hwmon.h" 35#include "nouveau_hwmon.h"
36 36
37#include <subdev/gpio.h>
38#include <subdev/timer.h>
39#include <subdev/therm.h>
40
41#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE)) 37#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
42static ssize_t 38static ssize_t
43nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf) 39nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf)
diff --git a/drivers/gpu/drm/nouveau/nouveau_nvif.c b/drivers/gpu/drm/nouveau/nouveau_nvif.c
new file mode 100644
index 000000000000..c3838bffe24f
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_nvif.c
@@ -0,0 +1,133 @@
1/*
2 * Copyright 2014 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24
25/*******************************************************************************
26 * NVIF client driver - NVKM directly linked
27 ******************************************************************************/
28
29#include <core/client.h>
30#include <core/notify.h>
31#include <core/ioctl.h>
32
33#include <nvif/client.h>
34#include <nvif/driver.h>
35#include <nvif/notify.h>
36#include <nvif/event.h>
37#include <nvif/ioctl.h>
38
39#include "nouveau_drm.h"
40
41static void
42nvkm_client_unmap(void *priv, void *ptr, u32 size)
43{
44 iounmap(ptr);
45}
46
47static void *
48nvkm_client_map(void *priv, u64 handle, u32 size)
49{
50 return ioremap(handle, size);
51}
52
53static int
54nvkm_client_ioctl(void *priv, bool super, void *data, u32 size, void **hack)
55{
56 return nvkm_ioctl(priv, super, data, size, hack);
57}
58
59static int
60nvkm_client_resume(void *priv)
61{
62 return nouveau_client_init(priv);
63}
64
65static int
66nvkm_client_suspend(void *priv)
67{
68 return nouveau_client_fini(priv, true);
69}
70
71static void
72nvkm_client_fini(void *priv)
73{
74 struct nouveau_object *client = priv;
75 nouveau_client_fini(nv_client(client), false);
76 atomic_set(&client->refcount, 1);
77 nouveau_object_ref(NULL, &client);
78}
79
80static int
81nvkm_client_ntfy(const void *header, u32 length, const void *data, u32 size)
82{
83 const union {
84 struct nvif_notify_req_v0 v0;
85 } *args = header;
86 u8 route;
87
88 if (length == sizeof(args->v0) && args->v0.version == 0) {
89 route = args->v0.route;
90 } else {
91 WARN_ON(1);
92 return NVKM_NOTIFY_DROP;
93 }
94
95 switch (route) {
96 case NVDRM_NOTIFY_NVIF:
97 return nvif_notify(header, length, data, size);
98 default:
99 WARN_ON(1);
100 break;
101 }
102
103 return NVKM_NOTIFY_DROP;
104}
105
106static int
107nvkm_client_init(const char *name, u64 device, const char *cfg,
108 const char *dbg, void **ppriv)
109{
110 struct nouveau_client *client;
111 int ret;
112
113 ret = nouveau_client_create(name, device, cfg, dbg, &client);
114 *ppriv = client;
115 if (ret)
116 return ret;
117
118 client->ntfy = nvkm_client_ntfy;
119 return 0;
120}
121
122const struct nvif_driver
123nvif_driver_nvkm = {
124 .name = "nvkm",
125 .init = nvkm_client_init,
126 .fini = nvkm_client_fini,
127 .suspend = nvkm_client_suspend,
128 .resume = nvkm_client_resume,
129 .ioctl = nvkm_client_ioctl,
130 .map = nvkm_client_map,
131 .unmap = nvkm_client_unmap,
132 .keep = false,
133};
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index ff10ef5eb298..01707e7deaf5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -1,8 +1,6 @@
1#include <linux/pagemap.h> 1#include <linux/pagemap.h>
2#include <linux/slab.h> 2#include <linux/slab.h>
3 3
4#include <subdev/fb.h>
5
6#include "nouveau_drm.h" 4#include "nouveau_drm.h"
7#include "nouveau_ttm.h" 5#include "nouveau_ttm.h"
8 6
diff --git a/drivers/gpu/drm/nouveau/nouveau_sysfs.c b/drivers/gpu/drm/nouveau/nouveau_sysfs.c
index 29b6606abeaa..80f30d7c2c02 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sysfs.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sysfs.c
@@ -48,7 +48,8 @@ nouveau_sysfs_pstate_get(struct device *d, struct device_attribute *a, char *b)
48 char *buf = b; 48 char *buf = b;
49 int ret, i; 49 int ret, i;
50 50
51 ret = nv_exec(sysfs->ctrl, NV_CONTROL_PSTATE_INFO, &info, sizeof(info)); 51 ret = nvif_exec(&sysfs->ctrl, NV_CONTROL_PSTATE_INFO,
52 &info, sizeof(info));
52 if (ret) 53 if (ret)
53 return ret; 54 return ret;
54 55
@@ -60,8 +61,8 @@ nouveau_sysfs_pstate_get(struct device *d, struct device_attribute *a, char *b)
60 .index = 0, 61 .index = 0,
61 }; 62 };
62 63
63 ret = nv_exec(sysfs->ctrl, NV_CONTROL_PSTATE_ATTR, 64 ret = nvif_exec(&sysfs->ctrl, NV_CONTROL_PSTATE_ATTR,
64 &attr, sizeof(attr)); 65 &attr, sizeof(attr));
65 if (ret) 66 if (ret)
66 return ret; 67 return ret;
67 68
@@ -75,8 +76,8 @@ nouveau_sysfs_pstate_get(struct device *d, struct device_attribute *a, char *b)
75 attr.index = 0; 76 attr.index = 0;
76 do { 77 do {
77 attr.state = state; 78 attr.state = state;
78 ret = nv_exec(sysfs->ctrl, NV_CONTROL_PSTATE_ATTR, 79 ret = nvif_exec(&sysfs->ctrl, NV_CONTROL_PSTATE_ATTR,
79 &attr, sizeof(attr)); 80 &attr, sizeof(attr));
80 if (ret) 81 if (ret)
81 return ret; 82 return ret;
82 83
@@ -139,7 +140,8 @@ nouveau_sysfs_pstate_set(struct device *d, struct device_attribute *a,
139 args.ustate = value; 140 args.ustate = value;
140 } 141 }
141 142
142 ret = nv_exec(sysfs->ctrl, NV_CONTROL_PSTATE_USER, &args, sizeof(args)); 143 ret = nvif_exec(&sysfs->ctrl, NV_CONTROL_PSTATE_USER,
144 &args, sizeof(args));
143 if (ret < 0) 145 if (ret < 0)
144 return ret; 146 return ret;
145 147
@@ -156,9 +158,9 @@ nouveau_sysfs_fini(struct drm_device *dev)
156 struct nouveau_drm *drm = nouveau_drm(dev); 158 struct nouveau_drm *drm = nouveau_drm(dev);
157 struct nvif_device *device = &drm->device; 159 struct nvif_device *device = &drm->device;
158 160
159 if (sysfs->ctrl) { 161 if (sysfs->ctrl.priv) {
160 device_remove_file(nv_device_base(nvkm_device(device)), &dev_attr_pstate); 162 device_remove_file(nv_device_base(nvkm_device(device)), &dev_attr_pstate);
161 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_CONTROL); 163 nvif_object_fini(&sysfs->ctrl);
162 } 164 }
163 165
164 drm->sysfs = NULL; 166 drm->sysfs = NULL;
@@ -177,8 +179,8 @@ nouveau_sysfs_init(struct drm_device *dev)
177 if (!sysfs) 179 if (!sysfs)
178 return -ENOMEM; 180 return -ENOMEM;
179 181
180 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE, NVDRM_CONTROL, 182 ret = nvif_object_init(nvif_object(&drm->device), NULL, NVDRM_CONTROL,
181 NV_CONTROL_CLASS, NULL, 0, &sysfs->ctrl); 183 NV_CONTROL_CLASS, NULL, 0, &sysfs->ctrl);
182 if (ret == 0) 184 if (ret == 0)
183 device_create_file(nv_device_base(nvkm_device(device)), &dev_attr_pstate); 185 device_create_file(nv_device_base(nvkm_device(device)), &dev_attr_pstate);
184 186
diff --git a/drivers/gpu/drm/nouveau/nouveau_sysfs.h b/drivers/gpu/drm/nouveau/nouveau_sysfs.h
index 74b47f1e01ed..f973378160f8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sysfs.h
+++ b/drivers/gpu/drm/nouveau/nouveau_sysfs.h
@@ -4,7 +4,7 @@
4#include "nouveau_drm.h" 4#include "nouveau_drm.h"
5 5
6struct nouveau_sysfs { 6struct nouveau_sysfs {
7 struct nouveau_object *ctrl; 7 struct nvif_object ctrl;
8}; 8};
9 9
10static inline struct nouveau_sysfs * 10static inline struct nouveau_sysfs *
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 8739e4d00c6d..245eebd0632d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -24,10 +24,6 @@
24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */ 25 */
26 26
27#include <subdev/fb.h>
28#include <subdev/vm.h>
29#include <subdev/instmem.h>
30
31#include "nouveau_drm.h" 27#include "nouveau_drm.h"
32#include "nouveau_ttm.h" 28#include "nouveau_ttm.h"
33#include "nouveau_gem.h" 29#include "nouveau_gem.h"
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index d3b9c7c24f49..b8ab117a8462 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -142,7 +142,6 @@ nv04_fbcon_accel_init(struct fb_info *info)
142 struct nouveau_drm *drm = nouveau_drm(dev); 142 struct nouveau_drm *drm = nouveau_drm(dev);
143 struct nouveau_channel *chan = drm->channel; 143 struct nouveau_channel *chan = drm->channel;
144 struct nvif_device *device = &drm->device; 144 struct nvif_device *device = &drm->device;
145 struct nouveau_object *object;
146 int surface_fmt, pattern_fmt, rect_fmt; 145 int surface_fmt, pattern_fmt, rect_fmt;
147 int ret; 146 int ret;
148 147
@@ -174,35 +173,35 @@ nv04_fbcon_accel_init(struct fb_info *info)
174 return -EINVAL; 173 return -EINVAL;
175 } 174 }
176 175
177 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvCtxSurf2D, 176 ret = nvif_object_init(chan->object, NULL, NvCtxSurf2D,
178 device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ? 0x0062 : 0x0042, 177 device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ?
179 NULL, 0, &object); 178 0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d);
180 if (ret) 179 if (ret)
181 return ret; 180 return ret;
182 181
183 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvClipRect, 182 ret = nvif_object_init(chan->object, NULL, NvClipRect, 0x0019, NULL, 0,
184 0x0019, NULL, 0, &object); 183 &nfbdev->clip);
185 if (ret) 184 if (ret)
186 return ret; 185 return ret;
187 186
188 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvRop, 187 ret = nvif_object_init(chan->object, NULL, NvRop, 0x0043, NULL, 0,
189 0x0043, NULL, 0, &object); 188 &nfbdev->rop);
190 if (ret) 189 if (ret)
191 return ret; 190 return ret;
192 191
193 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImagePatt, 192 ret = nvif_object_init(chan->object, NULL, NvImagePatt, 0x0044, NULL, 0,
194 0x0044, NULL, 0, &object); 193 &nfbdev->patt);
195 if (ret) 194 if (ret)
196 return ret; 195 return ret;
197 196
198 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvGdiRect, 197 ret = nvif_object_init(chan->object, NULL, NvGdiRect, 0x004a, NULL, 0,
199 0x004a, NULL, 0, &object); 198 &nfbdev->gdi);
200 if (ret) 199 if (ret)
201 return ret; 200 return ret;
202 201
203 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImageBlit, 202 ret = nvif_object_init(chan->object, NULL, NvImageBlit,
204 device->info.chipset >= 0x11 ? 0x009f : 0x005f, 203 device->info.chipset >= 0x11 ? 0x009f : 0x005f,
205 NULL, 0, &object); 204 NULL, 0, &nfbdev->blit);
206 if (ret) 205 if (ret)
207 return ret; 206 return ret;
208 207
diff --git a/drivers/gpu/drm/nouveau/nv04_fence.c b/drivers/gpu/drm/nouveau/nv04_fence.c
index 724b815d1517..239c2c5a9615 100644
--- a/drivers/gpu/drm/nouveau/nv04_fence.c
+++ b/drivers/gpu/drm/nouveau/nv04_fence.c
@@ -22,8 +22,6 @@
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24 24
25#include <engine/fifo.h>
26
27#include "nouveau_drm.h" 25#include "nouveau_drm.h"
28#include "nouveau_dma.h" 26#include "nouveau_dma.h"
29#include "nouveau_fence.h" 27#include "nouveau_fence.h"
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index 2d38673fc2c2..fa507817185a 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -60,7 +60,11 @@ void
60nv10_fence_context_del(struct nouveau_channel *chan) 60nv10_fence_context_del(struct nouveau_channel *chan)
61{ 61{
62 struct nv10_fence_chan *fctx = chan->fence; 62 struct nv10_fence_chan *fctx = chan->fence;
63 int i;
63 nouveau_fence_context_del(&fctx->base); 64 nouveau_fence_context_del(&fctx->base);
65 for (i = 0; i < ARRAY_SIZE(fctx->head); i++)
66 nvif_object_fini(&fctx->head[i]);
67 nvif_object_fini(&fctx->sema);
64 chan->fence = NULL; 68 chan->fence = NULL;
65 kfree(fctx); 69 kfree(fctx);
66} 70}
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.h b/drivers/gpu/drm/nouveau/nv10_fence.h
index e5d9204826c2..27d1c9d2df47 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.h
+++ b/drivers/gpu/drm/nouveau/nv10_fence.h
@@ -7,6 +7,8 @@
7 7
8struct nv10_fence_chan { 8struct nv10_fence_chan {
9 struct nouveau_fence_chan base; 9 struct nouveau_fence_chan base;
10 struct nvif_object sema;
11 struct nvif_object head[4];
10}; 12};
11 13
12struct nv10_fence_priv { 14struct nv10_fence_priv {
diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c
index 22aa9963ea6f..4dde5320db05 100644
--- a/drivers/gpu/drm/nouveau/nv17_fence.c
+++ b/drivers/gpu/drm/nouveau/nv17_fence.c
@@ -33,11 +33,12 @@ int
33nv17_fence_sync(struct nouveau_fence *fence, 33nv17_fence_sync(struct nouveau_fence *fence,
34 struct nouveau_channel *prev, struct nouveau_channel *chan) 34 struct nouveau_channel *prev, struct nouveau_channel *chan)
35{ 35{
36 struct nouveau_cli *cli = (void *)nvif_client(&prev->device->base);
36 struct nv10_fence_priv *priv = chan->drm->fence; 37 struct nv10_fence_priv *priv = chan->drm->fence;
37 u32 value; 38 u32 value;
38 int ret; 39 int ret;
39 40
40 if (!mutex_trylock(&prev->cli->mutex)) 41 if (!mutex_trylock(&cli->mutex))
41 return -EBUSY; 42 return -EBUSY;
42 43
43 spin_lock(&priv->lock); 44 spin_lock(&priv->lock);
@@ -64,7 +65,7 @@ nv17_fence_sync(struct nouveau_fence *fence,
64 FIRE_RING (chan); 65 FIRE_RING (chan);
65 } 66 }
66 67
67 mutex_unlock(&prev->cli->mutex); 68 mutex_unlock(&cli->mutex);
68 return 0; 69 return 0;
69} 70}
70 71
@@ -74,7 +75,6 @@ nv17_fence_context_new(struct nouveau_channel *chan)
74 struct nv10_fence_priv *priv = chan->drm->fence; 75 struct nv10_fence_priv *priv = chan->drm->fence;
75 struct nv10_fence_chan *fctx; 76 struct nv10_fence_chan *fctx;
76 struct ttm_mem_reg *mem = &priv->bo->bo.mem; 77 struct ttm_mem_reg *mem = &priv->bo->bo.mem;
77 struct nouveau_object *object;
78 u32 start = mem->start * PAGE_SIZE; 78 u32 start = mem->start * PAGE_SIZE;
79 u32 limit = start + mem->size - 1; 79 u32 limit = start + mem->size - 1;
80 int ret = 0; 80 int ret = 0;
@@ -88,15 +88,15 @@ nv17_fence_context_new(struct nouveau_channel *chan)
88 fctx->base.read = nv10_fence_read; 88 fctx->base.read = nv10_fence_read;
89 fctx->base.sync = nv17_fence_sync; 89 fctx->base.sync = nv17_fence_sync;
90 90
91 ret = nouveau_object_new(nv_object(chan->cli), chan->handle, 91 ret = nvif_object_init(chan->object, NULL, NvSema,
92 NvSema, 0x0002, 92 NV_DMA_FROM_MEMORY_CLASS,
93 &(struct nv_dma_class) { 93 &(struct nv_dma_class) {
94 .flags = NV_DMA_TARGET_VRAM | 94 .flags = NV_DMA_TARGET_VRAM |
95 NV_DMA_ACCESS_RDWR, 95 NV_DMA_ACCESS_RDWR,
96 .start = start, 96 .start = start,
97 .limit = limit, 97 .limit = limit,
98 }, sizeof(struct nv_dma_class), 98 }, sizeof(struct nv_dma_class),
99 &object); 99 &fctx->sema);
100 if (ret) 100 if (ret)
101 nv10_fence_context_del(chan); 101 nv10_fence_context_del(chan);
102 return ret; 102 return ret;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 376b23530c00..ca8c1db0ccb4 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -37,15 +37,8 @@
37#include "nouveau_fence.h" 37#include "nouveau_fence.h"
38#include "nv50_display.h" 38#include "nv50_display.h"
39 39
40#include <core/client.h>
41#include <core/gpuobj.h>
42#include <core/class.h> 40#include <core/class.h>
43 41
44#include <subdev/timer.h>
45#include <subdev/bar.h>
46#include <subdev/fb.h>
47#include <subdev/i2c.h>
48
49#define EVO_DMA_NR 9 42#define EVO_DMA_NR 9
50 43
51#define EVO_MASTER (0x00) 44#define EVO_MASTER (0x00)
@@ -62,7 +55,7 @@
62 55
63#define EVO_CORE_HANDLE (0xd1500000) 56#define EVO_CORE_HANDLE (0xd1500000)
64#define EVO_CHAN_HANDLE(t,i) (0xd15c0000 | (((t) & 0x00ff) << 8) | (i)) 57#define EVO_CHAN_HANDLE(t,i) (0xd15c0000 | (((t) & 0x00ff) << 8) | (i))
65#define EVO_CHAN_OCLASS(t,c) ((nv_hclass(c) & 0xff00) | ((t) & 0x00ff)) 58#define EVO_CHAN_OCLASS(t,c) (((c)->oclass & 0xff00) | ((t) & 0x00ff))
66#define EVO_PUSH_HANDLE(t,i) (0xd15b0000 | (i) | \ 59#define EVO_PUSH_HANDLE(t,i) (0xd15b0000 | (i) | \
67 (((NV50_DISP_##t##_CLASS) & 0x00ff) << 8)) 60 (((NV50_DISP_##t##_CLASS) & 0x00ff) << 8))
68 61
@@ -71,34 +64,29 @@
71 *****************************************************************************/ 64 *****************************************************************************/
72 65
73struct nv50_chan { 66struct nv50_chan {
74 struct nouveau_object *user; 67 struct nvif_object user;
75 u32 handle;
76}; 68};
77 69
78static int 70static int
79nv50_chan_create(struct nouveau_object *core, u32 bclass, u8 head, 71nv50_chan_create(struct nvif_object *disp, u32 bclass, u8 head,
80 void *data, u32 size, struct nv50_chan *chan) 72 void *data, u32 size, struct nv50_chan *chan)
81{ 73{
82 struct nouveau_object *client = nv_pclass(core, NV_CLIENT_CLASS); 74 const u32 oclass = EVO_CHAN_OCLASS(bclass, disp);
83 const u32 oclass = EVO_CHAN_OCLASS(bclass, core);
84 const u32 handle = EVO_CHAN_HANDLE(bclass, head); 75 const u32 handle = EVO_CHAN_HANDLE(bclass, head);
85 int ret; 76 int ret;
86 77
87 ret = nouveau_object_new(client, EVO_CORE_HANDLE, handle, 78 ret = nvif_object_init(disp, NULL, handle, oclass, data, size,
88 oclass, data, size, &chan->user); 79 &chan->user);
89 if (ret) 80 if (ret)
90 return ret; 81 return ret;
91 82
92 chan->handle = handle;
93 return 0; 83 return 0;
94} 84}
95 85
96static void 86static void
97nv50_chan_destroy(struct nouveau_object *core, struct nv50_chan *chan) 87nv50_chan_destroy(struct nv50_chan *chan)
98{ 88{
99 struct nouveau_object *client = nv_pclass(core, NV_CLIENT_CLASS); 89 nvif_object_fini(&chan->user);
100 if (chan->handle)
101 nouveau_object_del(client, EVO_CORE_HANDLE, chan->handle);
102} 90}
103 91
104/****************************************************************************** 92/******************************************************************************
@@ -110,16 +98,16 @@ struct nv50_pioc {
110}; 98};
111 99
112static void 100static void
113nv50_pioc_destroy(struct nouveau_object *core, struct nv50_pioc *pioc) 101nv50_pioc_destroy(struct nv50_pioc *pioc)
114{ 102{
115 nv50_chan_destroy(core, &pioc->base); 103 nv50_chan_destroy(&pioc->base);
116} 104}
117 105
118static int 106static int
119nv50_pioc_create(struct nouveau_object *core, u32 bclass, u8 head, 107nv50_pioc_create(struct nvif_object *disp, u32 bclass, u8 head,
120 void *data, u32 size, struct nv50_pioc *pioc) 108 void *data, u32 size, struct nv50_pioc *pioc)
121{ 109{
122 return nv50_chan_create(core, bclass, head, data, size, &pioc->base); 110 return nv50_chan_create(disp, bclass, head, data, size, &pioc->base);
123} 111}
124 112
125/****************************************************************************** 113/******************************************************************************
@@ -131,6 +119,9 @@ struct nv50_dmac {
131 dma_addr_t handle; 119 dma_addr_t handle;
132 u32 *ptr; 120 u32 *ptr;
133 121
122 struct nvif_object sync;
123 struct nvif_object vram;
124
134 /* Protects against concurrent pushbuf access to this channel, lock is 125 /* Protects against concurrent pushbuf access to this channel, lock is
135 * grabbed by evo_wait (if the pushbuf reservation is successful) and 126 * grabbed by evo_wait (if the pushbuf reservation is successful) and
136 * dropped again by evo_kick. */ 127 * dropped again by evo_kick. */
@@ -138,68 +129,73 @@ struct nv50_dmac {
138}; 129};
139 130
140static void 131static void
141nv50_dmac_destroy(struct nouveau_object *core, struct nv50_dmac *dmac) 132nv50_dmac_destroy(struct nv50_dmac *dmac, struct nvif_object *disp)
142{ 133{
134 nvif_object_fini(&dmac->vram);
135 nvif_object_fini(&dmac->sync);
136
137 nv50_chan_destroy(&dmac->base);
138
143 if (dmac->ptr) { 139 if (dmac->ptr) {
144 struct pci_dev *pdev = nv_device(core)->pdev; 140 struct pci_dev *pdev = nvkm_device(nvif_device(disp))->pdev;
145 pci_free_consistent(pdev, PAGE_SIZE, dmac->ptr, dmac->handle); 141 pci_free_consistent(pdev, PAGE_SIZE, dmac->ptr, dmac->handle);
146 } 142 }
147
148 nv50_chan_destroy(core, &dmac->base);
149} 143}
150 144
151static int 145static int
152nv50_dmac_create(struct nouveau_object *core, u32 bclass, u8 head, 146nv50_dmac_create(struct nvif_object *disp, u32 bclass, u8 head,
153 void *data, u32 size, u64 syncbuf, 147 void *data, u32 size, u64 syncbuf,
154 struct nv50_dmac *dmac) 148 struct nv50_dmac *dmac)
155{ 149{
156 struct nouveau_fb *pfb = nouveau_fb(core); 150 struct nouveau_fb *pfb = nvkm_fb(nvif_device(disp));
157 struct nouveau_object *client = nv_pclass(core, NV_CLIENT_CLASS); 151 struct nvif_object pushbuf;
158 struct nouveau_object *object; 152 u32 handle = *(u32 *)data;
159 u32 pushbuf = *(u32 *)data;
160 int ret; 153 int ret;
161 154
162 mutex_init(&dmac->lock); 155 mutex_init(&dmac->lock);
163 156
164 dmac->ptr = pci_alloc_consistent(nv_device(core)->pdev, PAGE_SIZE, 157 dmac->ptr = pci_alloc_consistent(nvkm_device(nvif_device(disp))->pdev,
165 &dmac->handle); 158 PAGE_SIZE, &dmac->handle);
166 if (!dmac->ptr) 159 if (!dmac->ptr)
167 return -ENOMEM; 160 return -ENOMEM;
168 161
169 ret = nouveau_object_new(client, NVDRM_DEVICE, pushbuf, 162 ret = nvif_object_init(nvif_object(nvif_device(disp)), NULL, handle,
170 NV_DMA_FROM_MEMORY_CLASS, 163 NV_DMA_FROM_MEMORY_CLASS,
171 &(struct nv_dma_class) { 164 &(struct nv_dma_class) {
172 .flags = NV_DMA_TARGET_PCI_US | 165 .flags = NV_DMA_TARGET_PCI_US |
173 NV_DMA_ACCESS_RD, 166 NV_DMA_ACCESS_RD,
174 .start = dmac->handle + 0x0000, 167 .start = dmac->handle + 0x0000,
175 .limit = dmac->handle + 0x0fff, 168 .limit = dmac->handle + 0x0fff,
176 }, sizeof(struct nv_dma_class), &object); 169 }, sizeof(struct nv_dma_class), &pushbuf);
177 if (ret) 170 if (ret)
178 return ret; 171 return ret;
179 172
180 ret = nv50_chan_create(core, bclass, head, data, size, &dmac->base); 173 ret = nv50_chan_create(disp, bclass, head, data, size, &dmac->base);
174 nvif_object_fini(&pushbuf);
181 if (ret) 175 if (ret)
182 return ret; 176 return ret;
183 177
184 ret = nouveau_object_new(client, dmac->base.handle, NvEvoSync, 178 ret = nvif_object_init(&dmac->base.user, NULL, NvEvoSync,
185 NV_DMA_IN_MEMORY_CLASS, 179 NV_DMA_IN_MEMORY_CLASS,
186 &(struct nv_dma_class) { 180 &(struct nv_dma_class) {
187 .flags = NV_DMA_TARGET_VRAM | 181 .flags = NV_DMA_TARGET_VRAM |
188 NV_DMA_ACCESS_RDWR, 182 NV_DMA_ACCESS_RDWR,
189 .start = syncbuf + 0x0000, 183 .start = syncbuf + 0x0000,
190 .limit = syncbuf + 0x0fff, 184 .limit = syncbuf + 0x0fff,
191 }, sizeof(struct nv_dma_class), &object); 185 }, sizeof(struct nv_dma_class),
186 &dmac->sync);
192 if (ret) 187 if (ret)
193 return ret; 188 return ret;
194 189
195 ret = nouveau_object_new(client, dmac->base.handle, NvEvoVRAM, 190 ret = nvif_object_init(&dmac->base.user, NULL, NvEvoVRAM,
196 NV_DMA_IN_MEMORY_CLASS, 191 NV_DMA_IN_MEMORY_CLASS,
197 &(struct nv_dma_class) { 192 &(struct nv_dma_class) {
198 .flags = NV_DMA_TARGET_VRAM | 193 .flags = NV_DMA_TARGET_VRAM |
199 NV_DMA_ACCESS_RDWR, 194 NV_DMA_ACCESS_RDWR,
200 .start = 0, 195 .start = 0,
201 .limit = pfb->ram->size - 1, 196 .limit = pfb->ram->size - 1,
202 }, sizeof(struct nv_dma_class), &object); 197 }, sizeof(struct nv_dma_class),
198 &dmac->vram);
203 if (ret) 199 if (ret)
204 return ret; 200 return ret;
205 201
@@ -243,10 +239,16 @@ struct nv50_head {
243#define nv50_ovly(c) (&nv50_head(c)->ovly) 239#define nv50_ovly(c) (&nv50_head(c)->ovly)
244#define nv50_oimm(c) (&nv50_head(c)->oimm) 240#define nv50_oimm(c) (&nv50_head(c)->oimm)
245#define nv50_chan(c) (&(c)->base.base) 241#define nv50_chan(c) (&(c)->base.base)
246#define nv50_vers(c) nv_mclass(nv50_chan(c)->user) 242#define nv50_vers(c) nv50_chan(c)->user.oclass
243
244struct nv50_fbdma {
245 struct list_head head;
246 struct nvif_object core;
247 struct nvif_object base[4];
248};
247 249
248struct nv50_disp { 250struct nv50_disp {
249 struct nouveau_object *core; 251 struct nvif_object *disp;
250 struct nv50_mast mast; 252 struct nv50_mast mast;
251 253
252 struct list_head fbdma; 254 struct list_head fbdma;
@@ -275,16 +277,16 @@ static u32 *
275evo_wait(void *evoc, int nr) 277evo_wait(void *evoc, int nr)
276{ 278{
277 struct nv50_dmac *dmac = evoc; 279 struct nv50_dmac *dmac = evoc;
278 u32 put = nv_ro32(dmac->base.user, 0x0000) / 4; 280 u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
279 281
280 mutex_lock(&dmac->lock); 282 mutex_lock(&dmac->lock);
281 if (put + nr >= (PAGE_SIZE / 4) - 8) { 283 if (put + nr >= (PAGE_SIZE / 4) - 8) {
282 dmac->ptr[put] = 0x20000000; 284 dmac->ptr[put] = 0x20000000;
283 285
284 nv_wo32(dmac->base.user, 0x0000, 0x00000000); 286 nvif_wr32(&dmac->base.user, 0x0000, 0x00000000);
285 if (!nv_wait(dmac->base.user, 0x0004, ~0, 0x00000000)) { 287 if (!nvkm_wait(&dmac->base.user, 0x0004, ~0, 0x00000000)) {
286 mutex_unlock(&dmac->lock); 288 mutex_unlock(&dmac->lock);
287 nv_error(dmac->base.user, "channel stalled\n"); 289 nv_error(nvkm_object(&dmac->base.user), "channel stalled\n");
288 return NULL; 290 return NULL;
289 } 291 }
290 292
@@ -298,7 +300,7 @@ static void
298evo_kick(u32 *push, void *evoc) 300evo_kick(u32 *push, void *evoc)
299{ 301{
300 struct nv50_dmac *dmac = evoc; 302 struct nv50_dmac *dmac = evoc;
301 nv_wo32(dmac->base.user, 0x0000, (push - dmac->ptr) << 2); 303 nvif_wr32(&dmac->base.user, 0x0000, (push - dmac->ptr) << 2);
302 mutex_unlock(&dmac->lock); 304 mutex_unlock(&dmac->lock);
303} 305}
304 306
@@ -408,7 +410,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
408 if (unlikely(push == NULL)) 410 if (unlikely(push == NULL))
409 return -EBUSY; 411 return -EBUSY;
410 412
411 if (chan && nv_mclass(chan->object) < NV84_CHANNEL_IND_CLASS) { 413 if (chan && chan->object->oclass < NV84_CHANNEL_IND_CLASS) {
412 ret = RING_SPACE(chan, 8); 414 ret = RING_SPACE(chan, 8);
413 if (ret) 415 if (ret)
414 return ret; 416 return ret;
@@ -422,14 +424,14 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
422 OUT_RING (chan, sync->addr); 424 OUT_RING (chan, sync->addr);
423 OUT_RING (chan, sync->data); 425 OUT_RING (chan, sync->data);
424 } else 426 } else
425 if (chan && nv_mclass(chan->object) < NVC0_CHANNEL_IND_CLASS) { 427 if (chan && chan->object->oclass < NVC0_CHANNEL_IND_CLASS) {
426 u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr; 428 u64 addr = nv84_fence_crtc(chan, nv_crtc->index) + sync->addr;
427 ret = RING_SPACE(chan, 12); 429 ret = RING_SPACE(chan, 12);
428 if (ret) 430 if (ret)
429 return ret; 431 return ret;
430 432
431 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); 433 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
432 OUT_RING (chan, chan->vram); 434 OUT_RING (chan, chan->vram.handle);
433 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); 435 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
434 OUT_RING (chan, upper_32_bits(addr ^ 0x10)); 436 OUT_RING (chan, upper_32_bits(addr ^ 0x10));
435 OUT_RING (chan, lower_32_bits(addr ^ 0x10)); 437 OUT_RING (chan, lower_32_bits(addr ^ 0x10));
@@ -1066,7 +1068,7 @@ nv50_crtc_lut_load(struct drm_crtc *crtc)
1066 u16 g = nv_crtc->lut.g[i] >> 2; 1068 u16 g = nv_crtc->lut.g[i] >> 2;
1067 u16 b = nv_crtc->lut.b[i] >> 2; 1069 u16 b = nv_crtc->lut.b[i] >> 2;
1068 1070
1069 if (nv_mclass(disp->core) < NVD0_DISP_CLASS) { 1071 if (disp->disp->oclass < NVD0_DISP_CLASS) {
1070 writew(r + 0x0000, lut + (i * 0x08) + 0); 1072 writew(r + 0x0000, lut + (i * 0x08) + 0);
1071 writew(g + 0x0000, lut + (i * 0x08) + 2); 1073 writew(g + 0x0000, lut + (i * 0x08) + 2);
1072 writew(b + 0x0000, lut + (i * 0x08) + 4); 1074 writew(b + 0x0000, lut + (i * 0x08) + 4);
@@ -1133,8 +1135,8 @@ nv50_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
1133{ 1135{
1134 struct nv50_curs *curs = nv50_curs(crtc); 1136 struct nv50_curs *curs = nv50_curs(crtc);
1135 struct nv50_chan *chan = nv50_chan(curs); 1137 struct nv50_chan *chan = nv50_chan(curs);
1136 nv_wo32(chan->user, 0x0084, (y << 16) | (x & 0xffff)); 1138 nvif_wr32(&chan->user, 0x0084, (y << 16) | (x & 0xffff));
1137 nv_wo32(chan->user, 0x0080, 0x00000000); 1139 nvif_wr32(&chan->user, 0x0080, 0x00000000);
1138 return 0; 1140 return 0;
1139} 1141}
1140 1142
@@ -1161,11 +1163,16 @@ nv50_crtc_destroy(struct drm_crtc *crtc)
1161 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 1163 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
1162 struct nv50_disp *disp = nv50_disp(crtc->dev); 1164 struct nv50_disp *disp = nv50_disp(crtc->dev);
1163 struct nv50_head *head = nv50_head(crtc); 1165 struct nv50_head *head = nv50_head(crtc);
1166 struct nv50_fbdma *fbdma;
1164 1167
1165 nv50_dmac_destroy(disp->core, &head->ovly.base); 1168 list_for_each_entry(fbdma, &disp->fbdma, head) {
1166 nv50_pioc_destroy(disp->core, &head->oimm.base); 1169 nvif_object_fini(&fbdma->base[nv_crtc->index]);
1167 nv50_dmac_destroy(disp->core, &head->sync.base); 1170 }
1168 nv50_pioc_destroy(disp->core, &head->curs.base); 1171
1172 nv50_dmac_destroy(&head->ovly.base, disp->disp);
1173 nv50_pioc_destroy(&head->oimm.base);
1174 nv50_dmac_destroy(&head->sync.base, disp->disp);
1175 nv50_pioc_destroy(&head->curs.base);
1169 1176
1170 /*XXX: this shouldn't be necessary, but the core doesn't call 1177 /*XXX: this shouldn't be necessary, but the core doesn't call
1171 * disconnect() during the cleanup paths 1178 * disconnect() during the cleanup paths
@@ -1220,7 +1227,7 @@ nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
1220} 1227}
1221 1228
1222static int 1229static int
1223nv50_crtc_create(struct drm_device *dev, struct nouveau_object *core, int index) 1230nv50_crtc_create(struct drm_device *dev, int index)
1224{ 1231{
1225 struct nv50_disp *disp = nv50_disp(dev); 1232 struct nv50_disp *disp = nv50_disp(dev);
1226 struct nv50_head *head; 1233 struct nv50_head *head;
@@ -1269,7 +1276,7 @@ nv50_crtc_create(struct drm_device *dev, struct nouveau_object *core, int index)
1269 nv50_crtc_lut_load(crtc); 1276 nv50_crtc_lut_load(crtc);
1270 1277
1271 /* allocate cursor resources */ 1278 /* allocate cursor resources */
1272 ret = nv50_pioc_create(disp->core, NV50_DISP_CURS_CLASS, index, 1279 ret = nv50_pioc_create(disp->disp, NV50_DISP_CURS_CLASS, index,
1273 &(struct nv50_display_curs_class) { 1280 &(struct nv50_display_curs_class) {
1274 .head = index, 1281 .head = index,
1275 }, sizeof(struct nv50_display_curs_class), 1282 }, sizeof(struct nv50_display_curs_class),
@@ -1294,7 +1301,7 @@ nv50_crtc_create(struct drm_device *dev, struct nouveau_object *core, int index)
1294 goto out; 1301 goto out;
1295 1302
1296 /* allocate page flip / sync resources */ 1303 /* allocate page flip / sync resources */
1297 ret = nv50_dmac_create(disp->core, NV50_DISP_SYNC_CLASS, index, 1304 ret = nv50_dmac_create(disp->disp, NV50_DISP_SYNC_CLASS, index,
1298 &(struct nv50_display_sync_class) { 1305 &(struct nv50_display_sync_class) {
1299 .pushbuf = EVO_PUSH_HANDLE(SYNC, index), 1306 .pushbuf = EVO_PUSH_HANDLE(SYNC, index),
1300 .head = index, 1307 .head = index,
@@ -1307,7 +1314,7 @@ nv50_crtc_create(struct drm_device *dev, struct nouveau_object *core, int index)
1307 head->sync.data = 0x00000000; 1314 head->sync.data = 0x00000000;
1308 1315
1309 /* allocate overlay resources */ 1316 /* allocate overlay resources */
1310 ret = nv50_pioc_create(disp->core, NV50_DISP_OIMM_CLASS, index, 1317 ret = nv50_pioc_create(disp->disp, NV50_DISP_OIMM_CLASS, index,
1311 &(struct nv50_display_oimm_class) { 1318 &(struct nv50_display_oimm_class) {
1312 .head = index, 1319 .head = index,
1313 }, sizeof(struct nv50_display_oimm_class), 1320 }, sizeof(struct nv50_display_oimm_class),
@@ -1315,7 +1322,7 @@ nv50_crtc_create(struct drm_device *dev, struct nouveau_object *core, int index)
1315 if (ret) 1322 if (ret)
1316 goto out; 1323 goto out;
1317 1324
1318 ret = nv50_dmac_create(disp->core, NV50_DISP_OVLY_CLASS, index, 1325 ret = nv50_dmac_create(disp->disp, NV50_DISP_OVLY_CLASS, index,
1319 &(struct nv50_display_ovly_class) { 1326 &(struct nv50_display_ovly_class) {
1320 .pushbuf = EVO_PUSH_HANDLE(OVLY, index), 1327 .pushbuf = EVO_PUSH_HANDLE(OVLY, index),
1321 .head = index, 1328 .head = index,
@@ -1347,7 +1354,7 @@ nv50_dac_dpms(struct drm_encoder *encoder, int mode)
1347 if (mode == DRM_MODE_DPMS_SUSPEND || mode == DRM_MODE_DPMS_OFF) 1354 if (mode == DRM_MODE_DPMS_SUSPEND || mode == DRM_MODE_DPMS_OFF)
1348 dpms_ctrl |= 0x00000004; 1355 dpms_ctrl |= 0x00000004;
1349 1356
1350 nv_call(disp->core, NV50_DISP_DAC_PWR + or, dpms_ctrl); 1357 nvif_exec(disp->disp, NV50_DISP_DAC_PWR + or, &dpms_ctrl, sizeof(dpms_ctrl));
1351} 1358}
1352 1359
1353static bool 1360static bool
@@ -1460,7 +1467,7 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
1460 if (load == 0) 1467 if (load == 0)
1461 load = 340; 1468 load = 340;
1462 1469
1463 ret = nv_exec(disp->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load)); 1470 ret = nvif_exec(disp->disp, NV50_DISP_DAC_LOAD + or, &load, sizeof(load));
1464 if (ret || !load) 1471 if (ret || !load)
1465 return connector_status_disconnected; 1472 return connector_status_disconnected;
1466 1473
@@ -1531,9 +1538,9 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
1531 1538
1532 drm_edid_to_eld(&nv_connector->base, nv_connector->edid); 1539 drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
1533 1540
1534 nv_exec(disp->core, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or, 1541 nvif_exec(disp->disp, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or,
1535 nv_connector->base.eld, 1542 nv_connector->base.eld,
1536 nv_connector->base.eld[2] * 4); 1543 nv_connector->base.eld[2] * 4);
1537} 1544}
1538 1545
1539static void 1546static void
@@ -1542,7 +1549,7 @@ nv50_audio_disconnect(struct drm_encoder *encoder)
1542 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 1549 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1543 struct nv50_disp *disp = nv50_disp(encoder->dev); 1550 struct nv50_disp *disp = nv50_disp(encoder->dev);
1544 1551
1545 nv_exec(disp->core, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or, NULL, 0); 1552 nvif_exec(disp->disp, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or, NULL, 0);
1546} 1553}
1547 1554
1548/****************************************************************************** 1555/******************************************************************************
@@ -1558,6 +1565,7 @@ nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
1558 const u32 moff = (nv_crtc->index << 3) | nv_encoder->or; 1565 const u32 moff = (nv_crtc->index << 3) | nv_encoder->or;
1559 u32 rekey = 56; /* binary driver, and tegra constant */ 1566 u32 rekey = 56; /* binary driver, and tegra constant */
1560 u32 max_ac_packet; 1567 u32 max_ac_packet;
1568 u32 data;
1561 1569
1562 nv_connector = nouveau_encoder_connector_get(nv_encoder); 1570 nv_connector = nouveau_encoder_connector_get(nv_encoder);
1563 if (!drm_detect_hdmi_monitor(nv_connector->edid)) 1571 if (!drm_detect_hdmi_monitor(nv_connector->edid))
@@ -1568,9 +1576,8 @@ nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
1568 max_ac_packet -= 18; /* constant from tegra */ 1576 max_ac_packet -= 18; /* constant from tegra */
1569 max_ac_packet /= 32; 1577 max_ac_packet /= 32;
1570 1578
1571 nv_call(disp->core, NV84_DISP_SOR_HDMI_PWR + moff, 1579 data = NV84_DISP_SOR_HDMI_PWR_STATE_ON | (max_ac_packet << 16) | rekey;
1572 NV84_DISP_SOR_HDMI_PWR_STATE_ON | 1580 nvif_exec(disp->disp, NV84_DISP_SOR_HDMI_PWR + moff, &data, sizeof(data));
1573 (max_ac_packet << 16) | rekey);
1574 1581
1575 nv50_audio_mode_set(encoder, mode); 1582 nv50_audio_mode_set(encoder, mode);
1576} 1583}
@@ -1581,10 +1588,11 @@ nv50_hdmi_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc)
1581 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 1588 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1582 struct nv50_disp *disp = nv50_disp(encoder->dev); 1589 struct nv50_disp *disp = nv50_disp(encoder->dev);
1583 const u32 moff = (nv_crtc->index << 3) | nv_encoder->or; 1590 const u32 moff = (nv_crtc->index << 3) | nv_encoder->or;
1591 u32 data = 0;
1584 1592
1585 nv50_audio_disconnect(encoder); 1593 nv50_audio_disconnect(encoder);
1586 1594
1587 nv_call(disp->core, NV84_DISP_SOR_HDMI_PWR + moff, 0x00000000); 1595 nvif_exec(disp->disp, NV84_DISP_SOR_HDMI_PWR + moff, &data, sizeof(data));
1588} 1596}
1589 1597
1590/****************************************************************************** 1598/******************************************************************************
@@ -1597,7 +1605,7 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
1597 struct drm_device *dev = encoder->dev; 1605 struct drm_device *dev = encoder->dev;
1598 struct nv50_disp *disp = nv50_disp(dev); 1606 struct nv50_disp *disp = nv50_disp(dev);
1599 struct drm_encoder *partner; 1607 struct drm_encoder *partner;
1600 u32 mthd; 1608 u32 mthd, data;
1601 1609
1602 nv_encoder->last_dpms = mode; 1610 nv_encoder->last_dpms = mode;
1603 1611
@@ -1620,13 +1628,15 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
1620 mthd |= nv_encoder->or; 1628 mthd |= nv_encoder->or;
1621 1629
1622 if (nv_encoder->dcb->type == DCB_OUTPUT_DP) { 1630 if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {
1623 nv_call(disp->core, NV50_DISP_SOR_PWR | mthd, 1); 1631 data = 1;
1632 nvif_exec(disp->disp, NV50_DISP_SOR_PWR | mthd, &data, sizeof(data));
1624 mthd |= NV94_DISP_SOR_DP_PWR; 1633 mthd |= NV94_DISP_SOR_DP_PWR;
1625 } else { 1634 } else {
1626 mthd |= NV50_DISP_SOR_PWR; 1635 mthd |= NV50_DISP_SOR_PWR;
1627 } 1636 }
1628 1637
1629 nv_call(disp->core, mthd, (mode == DRM_MODE_DPMS_ON)); 1638 data = (mode == DRM_MODE_DPMS_ON);
1639 nvif_exec(disp->disp, mthd, &data, sizeof(data));
1630} 1640}
1631 1641
1632static bool 1642static bool
@@ -1749,7 +1759,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
1749 lvds |= 0x0200; 1759 lvds |= 0x0200;
1750 } 1760 }
1751 1761
1752 nv_call(disp->core, NV50_DISP_SOR_LVDS_SCRIPT + nv_encoder->or, lvds); 1762 nvif_exec(disp->disp, NV50_DISP_SOR_LVDS_SCRIPT + nv_encoder->or, &lvds, sizeof(lvds));
1753 break; 1763 break;
1754 case DCB_OUTPUT_DP: 1764 case DCB_OUTPUT_DP:
1755 if (nv_connector->base.display_info.bpc == 6) { 1765 if (nv_connector->base.display_info.bpc == 6) {
@@ -1878,7 +1888,7 @@ nv50_pior_dpms(struct drm_encoder *encoder, int mode)
1878 struct nv50_disp *disp = nv50_disp(encoder->dev); 1888 struct nv50_disp *disp = nv50_disp(encoder->dev);
1879 u32 mthd = (nv_encoder->dcb->type << 12) | nv_encoder->or; 1889 u32 mthd = (nv_encoder->dcb->type << 12) | nv_encoder->or;
1880 u32 ctrl = (mode == DRM_MODE_DPMS_ON); 1890 u32 ctrl = (mode == DRM_MODE_DPMS_ON);
1881 nv_call(disp->core, NV50_DISP_PIOR_PWR + mthd, ctrl); 1891 nvif_exec(disp->disp, NV50_DISP_PIOR_PWR + mthd, &ctrl, sizeof(ctrl));
1882} 1892}
1883 1893
1884static bool 1894static bool
@@ -2046,25 +2056,13 @@ nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
2046 * Framebuffer 2056 * Framebuffer
2047 *****************************************************************************/ 2057 *****************************************************************************/
2048 2058
2049struct nv50_fbdma {
2050 struct list_head head;
2051 u32 name;
2052};
2053
2054static void 2059static void
2055nv50_fbdma_fini(struct drm_device *dev, struct nv50_fbdma *fbdma) 2060nv50_fbdma_fini(struct nv50_fbdma *fbdma)
2056{ 2061{
2057 struct nv50_disp *disp = nv50_disp(dev); 2062 int i;
2058 struct nv50_mast *mast = nv50_mast(dev); 2063 for (i = 0; i < ARRAY_SIZE(fbdma->base); i++)
2059 struct nouveau_object *client = nv_pclass(disp->core, NV_CLIENT_CLASS); 2064 nvif_object_fini(&fbdma->base[i]);
2060 struct drm_crtc *crtc; 2065 nvif_object_fini(&fbdma->core);
2061
2062 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2063 struct nv50_sync *sync = nv50_sync(crtc);
2064 nouveau_object_del(client, sync->base.base.handle, fbdma->name);
2065 }
2066
2067 nouveau_object_del(client, mast->base.base.handle, fbdma->name);
2068 list_del(&fbdma->head); 2066 list_del(&fbdma->head);
2069 kfree(fbdma); 2067 kfree(fbdma);
2070} 2068}
@@ -2075,15 +2073,13 @@ nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kin
2075 struct nouveau_drm *drm = nouveau_drm(dev); 2073 struct nouveau_drm *drm = nouveau_drm(dev);
2076 struct nv50_disp *disp = nv50_disp(dev); 2074 struct nv50_disp *disp = nv50_disp(dev);
2077 struct nv50_mast *mast = nv50_mast(dev); 2075 struct nv50_mast *mast = nv50_mast(dev);
2078 struct nouveau_object *client = nv_pclass(disp->core, NV_CLIENT_CLASS);
2079 struct nouveau_object *object;
2080 struct nv_dma_class args; 2076 struct nv_dma_class args;
2081 struct nv50_fbdma *fbdma; 2077 struct nv50_fbdma *fbdma;
2082 struct drm_crtc *crtc; 2078 struct drm_crtc *crtc;
2083 int ret; 2079 int ret;
2084 2080
2085 list_for_each_entry(fbdma, &disp->fbdma, head) { 2081 list_for_each_entry(fbdma, &disp->fbdma, head) {
2086 if (fbdma->name == name) 2082 if (fbdma->core.handle == name)
2087 return 0; 2083 return 0;
2088 } 2084 }
2089 2085
@@ -2091,7 +2087,6 @@ nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kin
2091 if (!fbdma) 2087 if (!fbdma)
2092 return -ENOMEM; 2088 return -ENOMEM;
2093 list_add(&fbdma->head, &disp->fbdma); 2089 list_add(&fbdma->head, &disp->fbdma);
2094 fbdma->name = name;
2095 2090
2096 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR; 2091 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
2097 args.start = offset; 2092 args.start = offset;
@@ -2114,23 +2109,22 @@ nv50_fbdma_init(struct drm_device *dev, u32 name, u64 offset, u64 length, u8 kin
2114 } 2109 }
2115 2110
2116 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2111 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2117 struct nv50_sync *sync = nv50_sync(crtc); 2112 struct nv50_head *head = nv50_head(crtc);
2118 ret = nouveau_object_new(client, sync->base.base.handle, 2113 int ret = nvif_object_init(&head->sync.base.base.user, NULL,
2119 fbdma->name, NV_DMA_IN_MEMORY_CLASS, 2114 name, NV_DMA_IN_MEMORY_CLASS,
2120 &args, sizeof(args), &object); 2115 &args, sizeof(args),
2116 &fbdma->base[head->base.index]);
2121 if (ret) { 2117 if (ret) {
2122 printk(KERN_ERR "fail %d %08x %d\n", nv50_head(crtc)->base.index, fbdma->name, ret); 2118 nv50_fbdma_fini(fbdma);
2123 nv50_fbdma_fini(dev, fbdma);
2124 return ret; 2119 return ret;
2125 } 2120 }
2126 } 2121 }
2127 2122
2128 ret = nouveau_object_new(client, mast->base.base.handle, fbdma->name, 2123 ret = nvif_object_init(&mast->base.base.user, NULL, name,
2129 NV_DMA_IN_MEMORY_CLASS, &args, sizeof(args), 2124 NV_DMA_IN_MEMORY_CLASS, &args, sizeof(args),
2130 &object); 2125 &fbdma->core);
2131 if (ret) { 2126 if (ret) {
2132 printk(KERN_ERR "fail %08x %d\n", fbdma->name, ret); 2127 nv50_fbdma_fini(fbdma);
2133 nv50_fbdma_fini(dev, fbdma);
2134 return ret; 2128 return ret;
2135 } 2129 }
2136 2130
@@ -2173,12 +2167,12 @@ nv50_fb_ctor(struct drm_framebuffer *fb)
2173 return -EINVAL; 2167 return -EINVAL;
2174 } 2168 }
2175 2169
2176 if (nv_mclass(disp->core) < NV84_DISP_CLASS) { 2170 if (disp->disp->oclass < NV84_DISP_CLASS) {
2177 nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) : 2171 nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) :
2178 (fb->pitches[0] | 0x00100000); 2172 (fb->pitches[0] | 0x00100000);
2179 nv_fb->r_format |= kind << 16; 2173 nv_fb->r_format |= kind << 16;
2180 } else 2174 } else
2181 if (nv_mclass(disp->core) < NVD0_DISP_CLASS) { 2175 if (disp->disp->oclass < NVD0_DISP_CLASS) {
2182 nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) : 2176 nv_fb->r_pitch = kind ? (((fb->pitches[0] / 4) << 4) | tile) :
2183 (fb->pitches[0] | 0x00100000); 2177 (fb->pitches[0] | 0x00100000);
2184 } else { 2178 } else {
@@ -2228,10 +2222,10 @@ nv50_display_destroy(struct drm_device *dev)
2228 struct nv50_fbdma *fbdma, *fbtmp; 2222 struct nv50_fbdma *fbdma, *fbtmp;
2229 2223
2230 list_for_each_entry_safe(fbdma, fbtmp, &disp->fbdma, head) { 2224 list_for_each_entry_safe(fbdma, fbtmp, &disp->fbdma, head) {
2231 nv50_fbdma_fini(dev, fbdma); 2225 nv50_fbdma_fini(fbdma);
2232 } 2226 }
2233 2227
2234 nv50_dmac_destroy(disp->core, &disp->mast.base); 2228 nv50_dmac_destroy(&disp->mast.base, disp->disp);
2235 2229
2236 nouveau_bo_unmap(disp->sync); 2230 nouveau_bo_unmap(disp->sync);
2237 if (disp->sync) 2231 if (disp->sync)
@@ -2264,7 +2258,7 @@ nv50_display_create(struct drm_device *dev)
2264 nouveau_display(dev)->fini = nv50_display_fini; 2258 nouveau_display(dev)->fini = nv50_display_fini;
2265 nouveau_display(dev)->fb_ctor = nv50_fb_ctor; 2259 nouveau_display(dev)->fb_ctor = nv50_fb_ctor;
2266 nouveau_display(dev)->fb_dtor = nv50_fb_dtor; 2260 nouveau_display(dev)->fb_dtor = nv50_fb_dtor;
2267 disp->core = nouveau_display(dev)->core; 2261 disp->disp = &nouveau_display(dev)->disp;
2268 2262
2269 /* small shared memory area we use for notifiers and semaphores */ 2263 /* small shared memory area we use for notifiers and semaphores */
2270 ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM, 2264 ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
@@ -2284,7 +2278,7 @@ nv50_display_create(struct drm_device *dev)
2284 goto out; 2278 goto out;
2285 2279
2286 /* allocate master evo channel */ 2280 /* allocate master evo channel */
2287 ret = nv50_dmac_create(disp->core, NV50_DISP_MAST_CLASS, 0, 2281 ret = nv50_dmac_create(disp->disp, NV50_DISP_MAST_CLASS, 0,
2288 &(struct nv50_display_mast_class) { 2282 &(struct nv50_display_mast_class) {
2289 .pushbuf = EVO_PUSH_HANDLE(MAST, 0), 2283 .pushbuf = EVO_PUSH_HANDLE(MAST, 0),
2290 }, sizeof(struct nv50_display_mast_class), 2284 }, sizeof(struct nv50_display_mast_class),
@@ -2293,13 +2287,13 @@ nv50_display_create(struct drm_device *dev)
2293 goto out; 2287 goto out;
2294 2288
2295 /* create crtc objects to represent the hw heads */ 2289 /* create crtc objects to represent the hw heads */
2296 if (nv_mclass(disp->core) >= NVD0_DISP_CLASS) 2290 if (disp->disp->oclass >= NVD0_DISP_CLASS)
2297 crtcs = nvif_rd32(device, 0x022448); 2291 crtcs = nvif_rd32(device, 0x022448);
2298 else 2292 else
2299 crtcs = 2; 2293 crtcs = 2;
2300 2294
2301 for (i = 0; i < crtcs; i++) { 2295 for (i = 0; i < crtcs; i++) {
2302 ret = nv50_crtc_create(dev, disp->core, i); 2296 ret = nv50_crtc_create(dev, i);
2303 if (ret) 2297 if (ret)
2304 goto out; 2298 goto out;
2305 } 2299 }
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 52068a0910dc..a92008c9d203 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -154,7 +154,6 @@ nv50_fbcon_accel_init(struct fb_info *info)
154 struct drm_device *dev = nfbdev->dev; 154 struct drm_device *dev = nfbdev->dev;
155 struct nouveau_drm *drm = nouveau_drm(dev); 155 struct nouveau_drm *drm = nouveau_drm(dev);
156 struct nouveau_channel *chan = drm->channel; 156 struct nouveau_channel *chan = drm->channel;
157 struct nouveau_object *object;
158 int ret, format; 157 int ret, format;
159 158
160 switch (info->var.bits_per_pixel) { 159 switch (info->var.bits_per_pixel) {
@@ -184,8 +183,8 @@ nv50_fbcon_accel_init(struct fb_info *info)
184 return -EINVAL; 183 return -EINVAL;
185 } 184 }
186 185
187 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, Nv2D, 186 ret = nvif_object_init(chan->object, NULL, Nv2D, 0x502d, NULL, 0,
188 0x502d, NULL, 0, &object); 187 &nfbdev->twod);
189 if (ret) 188 if (ret)
190 return ret; 189 return ret;
191 190
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index 0ee363840035..d5d88a97d1b9 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -38,7 +38,6 @@ nv50_fence_context_new(struct nouveau_channel *chan)
38 struct nv10_fence_priv *priv = chan->drm->fence; 38 struct nv10_fence_priv *priv = chan->drm->fence;
39 struct nv10_fence_chan *fctx; 39 struct nv10_fence_chan *fctx;
40 struct ttm_mem_reg *mem = &priv->bo->bo.mem; 40 struct ttm_mem_reg *mem = &priv->bo->bo.mem;
41 struct nouveau_object *object;
42 u32 start = mem->start * PAGE_SIZE; 41 u32 start = mem->start * PAGE_SIZE;
43 u32 limit = start + mem->size - 1; 42 u32 limit = start + mem->size - 1;
44 int ret, i; 43 int ret, i;
@@ -52,15 +51,15 @@ nv50_fence_context_new(struct nouveau_channel *chan)
52 fctx->base.read = nv10_fence_read; 51 fctx->base.read = nv10_fence_read;
53 fctx->base.sync = nv17_fence_sync; 52 fctx->base.sync = nv17_fence_sync;
54 53
55 ret = nouveau_object_new(nv_object(chan->cli), chan->handle, 54 ret = nvif_object_init(chan->object, NULL, NvSema,
56 NvSema, 0x003d, 55 NV_DMA_IN_MEMORY_CLASS,
57 &(struct nv_dma_class) { 56 &(struct nv_dma_class) {
58 .flags = NV_DMA_TARGET_VRAM | 57 .flags = NV_DMA_TARGET_VRAM |
59 NV_DMA_ACCESS_RDWR, 58 NV_DMA_ACCESS_RDWR,
60 .start = start, 59 .start = start,
61 .limit = limit, 60 .limit = limit,
62 }, sizeof(struct nv_dma_class), 61 }, sizeof(struct nv_dma_class),
63 &object); 62 &fctx->sema);
64 63
65 /* dma objects for display sync channel semaphore blocks */ 64 /* dma objects for display sync channel semaphore blocks */
66 for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) { 65 for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) {
@@ -68,15 +67,15 @@ nv50_fence_context_new(struct nouveau_channel *chan)
68 u32 start = bo->bo.mem.start * PAGE_SIZE; 67 u32 start = bo->bo.mem.start * PAGE_SIZE;
69 u32 limit = start + bo->bo.mem.size - 1; 68 u32 limit = start + bo->bo.mem.size - 1;
70 69
71 ret = nouveau_object_new(nv_object(chan->cli), chan->handle, 70 ret = nvif_object_init(chan->object, NULL, NvEvoSema0 + i,
72 NvEvoSema0 + i, 0x003d, 71 NV_DMA_IN_MEMORY_CLASS,
73 &(struct nv_dma_class) { 72 &(struct nv_dma_class) {
74 .flags = NV_DMA_TARGET_VRAM | 73 .flags = NV_DMA_TARGET_VRAM |
75 NV_DMA_ACCESS_RDWR, 74 NV_DMA_ACCESS_RDWR,
76 .start = start, 75 .start = start,
77 .limit = limit, 76 .limit = limit,
78 }, sizeof(struct nv_dma_class), 77 }, sizeof(struct nv_dma_class),
79 &object); 78 &fctx->head[i]);
80 } 79 }
81 80
82 if (ret) 81 if (ret)
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 94184a94a763..28cf3b417fea 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -26,8 +26,6 @@
26#include <core/client.h> 26#include <core/client.h>
27#include <core/class.h> 27#include <core/class.h>
28 28
29#include <engine/fifo.h>
30
31#include "nouveau_drm.h" 29#include "nouveau_drm.h"
32#include "nouveau_dma.h" 30#include "nouveau_dma.h"
33#include "nouveau_fence.h" 31#include "nouveau_fence.h"
@@ -47,7 +45,7 @@ nv84_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32 sequence)
47 int ret = RING_SPACE(chan, 8); 45 int ret = RING_SPACE(chan, 8);
48 if (ret == 0) { 46 if (ret == 0) {
49 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); 47 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
50 OUT_RING (chan, chan->vram); 48 OUT_RING (chan, chan->vram.handle);
51 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5); 49 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5);
52 OUT_RING (chan, upper_32_bits(virtual)); 50 OUT_RING (chan, upper_32_bits(virtual));
53 OUT_RING (chan, lower_32_bits(virtual)); 51 OUT_RING (chan, lower_32_bits(virtual));
@@ -65,7 +63,7 @@ nv84_fence_sync32(struct nouveau_channel *chan, u64 virtual, u32 sequence)
65 int ret = RING_SPACE(chan, 7); 63 int ret = RING_SPACE(chan, 7);
66 if (ret == 0) { 64 if (ret == 0) {
67 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1); 65 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
68 OUT_RING (chan, chan->vram); 66 OUT_RING (chan, chan->vram.handle);
69 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4); 67 BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
70 OUT_RING (chan, upper_32_bits(virtual)); 68 OUT_RING (chan, upper_32_bits(virtual));
71 OUT_RING (chan, lower_32_bits(virtual)); 69 OUT_RING (chan, lower_32_bits(virtual));
@@ -140,7 +138,7 @@ int
140nv84_fence_context_new(struct nouveau_channel *chan) 138nv84_fence_context_new(struct nouveau_channel *chan)
141{ 139{
142 struct nouveau_fifo_chan *fifo = nvkm_fifo_chan(chan); 140 struct nouveau_fifo_chan *fifo = nvkm_fifo_chan(chan);
143 struct nouveau_cli *cli = chan->cli; 141 struct nouveau_cli *cli = (void *)nvif_client(&chan->device->base);
144 struct nv84_fence_priv *priv = chan->drm->fence; 142 struct nv84_fence_priv *priv = chan->drm->fence;
145 struct nv84_fence_chan *fctx; 143 struct nv84_fence_chan *fctx;
146 int ret, i; 144 int ret, i;
diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
index 9dcd30f3e1e0..93e7b697ee95 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
@@ -154,11 +154,10 @@ nvc0_fbcon_accel_init(struct fb_info *info)
154 struct nouveau_framebuffer *fb = &nfbdev->nouveau_fb; 154 struct nouveau_framebuffer *fb = &nfbdev->nouveau_fb;
155 struct nouveau_drm *drm = nouveau_drm(dev); 155 struct nouveau_drm *drm = nouveau_drm(dev);
156 struct nouveau_channel *chan = drm->channel; 156 struct nouveau_channel *chan = drm->channel;
157 struct nouveau_object *object;
158 int ret, format; 157 int ret, format;
159 158
160 ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, Nv2D, 159 ret = nvif_object_init(chan->object, NULL, Nv2D, 0x902d, NULL, 0,
161 0x902d, NULL, 0, &object); 160 &nfbdev->twod);
162 if (ret) 161 if (ret)
163 return ret; 162 return ret;
164 163
diff --git a/drivers/gpu/drm/nouveau/nvc0_fence.c b/drivers/gpu/drm/nouveau/nvc0_fence.c
index 9566267fbc42..341323b6beb2 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fence.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fence.c
@@ -26,8 +26,6 @@
26#include <core/client.h> 26#include <core/client.h>
27#include <core/class.h> 27#include <core/class.h>
28 28
29#include <engine/fifo.h>
30
31#include "nouveau_drm.h" 29#include "nouveau_drm.h"
32#include "nouveau_dma.h" 30#include "nouveau_dma.h"
33#include "nouveau_fence.h" 31#include "nouveau_fence.h"
diff --git a/drivers/gpu/drm/nouveau/nvif/client.c b/drivers/gpu/drm/nouveau/nvif/client.c
index 7048fd91be28..20fb38688b93 100644
--- a/drivers/gpu/drm/nouveau/nvif/client.c
+++ b/drivers/gpu/drm/nouveau/nvif/client.c
@@ -58,9 +58,7 @@ nvif_client_fini(struct nvif_client *client)
58const struct nvif_driver * 58const struct nvif_driver *
59nvif_drivers[] = { 59nvif_drivers[] = {
60#ifdef __KERNEL__ 60#ifdef __KERNEL__
61#if 0
62 &nvif_driver_nvkm, 61 &nvif_driver_nvkm,
63#endif
64#else 62#else
65 &nvif_driver_lib, 63 &nvif_driver_lib,
66#endif 64#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-14 16:27:41 -0400