diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-11 23:58:20 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-11 23:58:20 -0500 |
commit | 053fe57ac249a9531c396175778160d9e9509399 (patch) | |
tree | 4e4e8acbf0bd01bedef3c733fdd9d7433f0748a0 /drivers | |
parent | 92340ee3198a2afd7664ed2f5472fa072b15fa32 (diff) | |
parent | 501706565b2d4d2d40d0d301d5411ede099b8a6f (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (75 commits)
net: Handle NETREG_UNINITIALIZED devices correctly
can: add the driver for Analog Devices Blackfin on-chip CAN controllers
xfrm: Fix truncation length of authentication algorithms installed via PF_KEY
net: use compat helper functions in compat_sys_recvmmsg
net: fix compat_sys_recvmmsg parameter type
cxgb3: Fixing EEH handlers
cnic: Zero out status block and Event Queue indices.
cnic: Send delete command when shutting down iSCSI ring.
net: smc91x: Fix up type mismatch in smc_drv_resume().
smc91x: fix unused flags warnings on UP systems
MAINTAINERS: Transfering maintainership of cdc-ether
net: Add missing TST_CFG_WRITE bits around sky2_pci_write
net: Fix Yukon-2 Optima TCP offload setup
net: niu uses crc32, so select CRC32
wireless: update old static regulatory domain rules
mac80211: Revert 'Use correct sign for mesh active path refresh'
mac80211: Fixed bug in mesh portal paths
net/mac80211: Correct size given to memset
b43: Remove reset after fatal DMA error
rtl8187: add radio led and fix warnings on suspend
...
Diffstat (limited to 'drivers')
41 files changed, 1346 insertions, 401 deletions
diff --git a/drivers/atm/he.c b/drivers/atm/he.c index e90665876c47..e8c6529dc366 100644 --- a/drivers/atm/he.c +++ b/drivers/atm/he.c | |||
@@ -2505,7 +2505,7 @@ he_close(struct atm_vcc *vcc) | |||
2505 | * TBRQ, the host issues the close command to the adapter. | 2505 | * TBRQ, the host issues the close command to the adapter. |
2506 | */ | 2506 | */ |
2507 | 2507 | ||
2508 | while (((tx_inuse = atomic_read(&sk_atm(vcc)->sk_wmem_alloc)) > 0) && | 2508 | while (((tx_inuse = atomic_read(&sk_atm(vcc)->sk_wmem_alloc)) > 1) && |
2509 | (retry < MAX_RETRY)) { | 2509 | (retry < MAX_RETRY)) { |
2510 | msleep(sleep); | 2510 | msleep(sleep); |
2511 | if (sleep < 250) | 2511 | if (sleep < 250) |
@@ -2514,7 +2514,7 @@ he_close(struct atm_vcc *vcc) | |||
2514 | ++retry; | 2514 | ++retry; |
2515 | } | 2515 | } |
2516 | 2516 | ||
2517 | if (tx_inuse) | 2517 | if (tx_inuse > 1) |
2518 | hprintk("close tx cid 0x%x tx_inuse = %d\n", cid, tx_inuse); | 2518 | hprintk("close tx cid 0x%x tx_inuse = %d\n", cid, tx_inuse); |
2519 | 2519 | ||
2520 | /* 2.3.1.1 generic close operations with flush */ | 2520 | /* 2.3.1.1 generic close operations with flush */ |
diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c index 82ed1cd14ff5..664b0c519c3e 100644 --- a/drivers/isdn/gigaset/common.c +++ b/drivers/isdn/gigaset/common.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #endif | 29 | #endif |
30 | 30 | ||
31 | /* Module parameters */ | 31 | /* Module parameters */ |
32 | int gigaset_debuglevel = DEBUG_DEFAULT; | 32 | int gigaset_debuglevel; |
33 | EXPORT_SYMBOL_GPL(gigaset_debuglevel); | 33 | EXPORT_SYMBOL_GPL(gigaset_debuglevel); |
34 | module_param_named(debug, gigaset_debuglevel, int, S_IRUGO|S_IWUSR); | 34 | module_param_named(debug, gigaset_debuglevel, int, S_IRUGO|S_IWUSR); |
35 | MODULE_PARM_DESC(debug, "debug level"); | 35 | MODULE_PARM_DESC(debug, "debug level"); |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 0bbd5ae49862..a5be9ac6405c 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -2696,6 +2696,7 @@ config NETXEN_NIC | |||
2696 | config NIU | 2696 | config NIU |
2697 | tristate "Sun Neptune 10Gbit Ethernet support" | 2697 | tristate "Sun Neptune 10Gbit Ethernet support" |
2698 | depends on PCI | 2698 | depends on PCI |
2699 | select CRC32 | ||
2699 | help | 2700 | help |
2700 | This enables support for cards based upon Sun's | 2701 | This enables support for cards based upon Sun's |
2701 | Neptune chipset. | 2702 | Neptune chipset. |
diff --git a/drivers/net/atl1c/atl1c.h b/drivers/net/atl1c/atl1c.h index a348a22551d9..efe5435bc3d3 100644 --- a/drivers/net/atl1c/atl1c.h +++ b/drivers/net/atl1c/atl1c.h | |||
@@ -479,6 +479,9 @@ struct atl1c_buffer { | |||
479 | #define ATL1C_PCIMAP_PAGE 0x0008 | 479 | #define ATL1C_PCIMAP_PAGE 0x0008 |
480 | #define ATL1C_PCIMAP_TYPE_MASK 0x000C | 480 | #define ATL1C_PCIMAP_TYPE_MASK 0x000C |
481 | 481 | ||
482 | #define ATL1C_PCIMAP_TODEVICE 0x0010 | ||
483 | #define ATL1C_PCIMAP_FROMDEVICE 0x0020 | ||
484 | #define ATL1C_PCIMAP_DIRECTION_MASK 0x0030 | ||
482 | dma_addr_t dma; | 485 | dma_addr_t dma; |
483 | }; | 486 | }; |
484 | 487 | ||
@@ -487,9 +490,11 @@ struct atl1c_buffer { | |||
487 | ((buff)->flags) |= (state); \ | 490 | ((buff)->flags) |= (state); \ |
488 | } while (0) | 491 | } while (0) |
489 | 492 | ||
490 | #define ATL1C_SET_PCIMAP_TYPE(buff, type) do { \ | 493 | #define ATL1C_SET_PCIMAP_TYPE(buff, type, direction) do { \ |
491 | ((buff)->flags) &= ~ATL1C_PCIMAP_TYPE_MASK; \ | 494 | ((buff)->flags) &= ~ATL1C_PCIMAP_TYPE_MASK; \ |
492 | ((buff)->flags) |= (type); \ | 495 | ((buff)->flags) |= (type); \ |
496 | ((buff)->flags) &= ~ATL1C_PCIMAP_DIRECTION_MASK; \ | ||
497 | ((buff)->flags) |= (direction); \ | ||
493 | } while (0) | 498 | } while (0) |
494 | 499 | ||
495 | /* transimit packet descriptor (tpd) ring */ | 500 | /* transimit packet descriptor (tpd) ring */ |
@@ -550,6 +555,9 @@ struct atl1c_adapter { | |||
550 | #define __AT_TESTING 0x0001 | 555 | #define __AT_TESTING 0x0001 |
551 | #define __AT_RESETTING 0x0002 | 556 | #define __AT_RESETTING 0x0002 |
552 | #define __AT_DOWN 0x0003 | 557 | #define __AT_DOWN 0x0003 |
558 | u8 work_event; | ||
559 | #define ATL1C_WORK_EVENT_RESET 0x01 | ||
560 | #define ATL1C_WORK_EVENT_LINK_CHANGE 0x02 | ||
553 | u32 msg_enable; | 561 | u32 msg_enable; |
554 | 562 | ||
555 | bool have_msi; | 563 | bool have_msi; |
@@ -561,8 +569,7 @@ struct atl1c_adapter { | |||
561 | spinlock_t tx_lock; | 569 | spinlock_t tx_lock; |
562 | atomic_t irq_sem; | 570 | atomic_t irq_sem; |
563 | 571 | ||
564 | struct work_struct reset_task; | 572 | struct work_struct common_task; |
565 | struct work_struct link_chg_task; | ||
566 | struct timer_list watchdog_timer; | 573 | struct timer_list watchdog_timer; |
567 | struct timer_list phy_config_timer; | 574 | struct timer_list phy_config_timer; |
568 | 575 | ||
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c index 6eb9241cee0a..2f4be59b9c0b 100644 --- a/drivers/net/atl1c/atl1c_main.c +++ b/drivers/net/atl1c/atl1c_main.c | |||
@@ -198,27 +198,12 @@ static void atl1c_phy_config(unsigned long data) | |||
198 | 198 | ||
199 | void atl1c_reinit_locked(struct atl1c_adapter *adapter) | 199 | void atl1c_reinit_locked(struct atl1c_adapter *adapter) |
200 | { | 200 | { |
201 | |||
202 | WARN_ON(in_interrupt()); | 201 | WARN_ON(in_interrupt()); |
203 | atl1c_down(adapter); | 202 | atl1c_down(adapter); |
204 | atl1c_up(adapter); | 203 | atl1c_up(adapter); |
205 | clear_bit(__AT_RESETTING, &adapter->flags); | 204 | clear_bit(__AT_RESETTING, &adapter->flags); |
206 | } | 205 | } |
207 | 206 | ||
208 | static void atl1c_reset_task(struct work_struct *work) | ||
209 | { | ||
210 | struct atl1c_adapter *adapter; | ||
211 | struct net_device *netdev; | ||
212 | |||
213 | adapter = container_of(work, struct atl1c_adapter, reset_task); | ||
214 | netdev = adapter->netdev; | ||
215 | |||
216 | netif_device_detach(netdev); | ||
217 | atl1c_down(adapter); | ||
218 | atl1c_up(adapter); | ||
219 | netif_device_attach(netdev); | ||
220 | } | ||
221 | |||
222 | static void atl1c_check_link_status(struct atl1c_adapter *adapter) | 207 | static void atl1c_check_link_status(struct atl1c_adapter *adapter) |
223 | { | 208 | { |
224 | struct atl1c_hw *hw = &adapter->hw; | 209 | struct atl1c_hw *hw = &adapter->hw; |
@@ -275,18 +260,6 @@ static void atl1c_check_link_status(struct atl1c_adapter *adapter) | |||
275 | } | 260 | } |
276 | } | 261 | } |
277 | 262 | ||
278 | /* | ||
279 | * atl1c_link_chg_task - deal with link change event Out of interrupt context | ||
280 | * @netdev: network interface device structure | ||
281 | */ | ||
282 | static void atl1c_link_chg_task(struct work_struct *work) | ||
283 | { | ||
284 | struct atl1c_adapter *adapter; | ||
285 | |||
286 | adapter = container_of(work, struct atl1c_adapter, link_chg_task); | ||
287 | atl1c_check_link_status(adapter); | ||
288 | } | ||
289 | |||
290 | static void atl1c_link_chg_event(struct atl1c_adapter *adapter) | 263 | static void atl1c_link_chg_event(struct atl1c_adapter *adapter) |
291 | { | 264 | { |
292 | struct net_device *netdev = adapter->netdev; | 265 | struct net_device *netdev = adapter->netdev; |
@@ -311,20 +284,40 @@ static void atl1c_link_chg_event(struct atl1c_adapter *adapter) | |||
311 | adapter->link_speed = SPEED_0; | 284 | adapter->link_speed = SPEED_0; |
312 | } | 285 | } |
313 | } | 286 | } |
314 | schedule_work(&adapter->link_chg_task); | 287 | |
288 | adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE; | ||
289 | schedule_work(&adapter->common_task); | ||
315 | } | 290 | } |
316 | 291 | ||
317 | static void atl1c_del_timer(struct atl1c_adapter *adapter) | 292 | static void atl1c_common_task(struct work_struct *work) |
318 | { | 293 | { |
319 | del_timer_sync(&adapter->phy_config_timer); | 294 | struct atl1c_adapter *adapter; |
295 | struct net_device *netdev; | ||
296 | |||
297 | adapter = container_of(work, struct atl1c_adapter, common_task); | ||
298 | netdev = adapter->netdev; | ||
299 | |||
300 | if (adapter->work_event & ATL1C_WORK_EVENT_RESET) { | ||
301 | netif_device_detach(netdev); | ||
302 | atl1c_down(adapter); | ||
303 | atl1c_up(adapter); | ||
304 | netif_device_attach(netdev); | ||
305 | return; | ||
306 | } | ||
307 | |||
308 | if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE) | ||
309 | atl1c_check_link_status(adapter); | ||
310 | |||
311 | return; | ||
320 | } | 312 | } |
321 | 313 | ||
322 | static void atl1c_cancel_work(struct atl1c_adapter *adapter) | 314 | |
315 | static void atl1c_del_timer(struct atl1c_adapter *adapter) | ||
323 | { | 316 | { |
324 | cancel_work_sync(&adapter->reset_task); | 317 | del_timer_sync(&adapter->phy_config_timer); |
325 | cancel_work_sync(&adapter->link_chg_task); | ||
326 | } | 318 | } |
327 | 319 | ||
320 | |||
328 | /* | 321 | /* |
329 | * atl1c_tx_timeout - Respond to a Tx Hang | 322 | * atl1c_tx_timeout - Respond to a Tx Hang |
330 | * @netdev: network interface device structure | 323 | * @netdev: network interface device structure |
@@ -334,7 +327,8 @@ static void atl1c_tx_timeout(struct net_device *netdev) | |||
334 | struct atl1c_adapter *adapter = netdev_priv(netdev); | 327 | struct atl1c_adapter *adapter = netdev_priv(netdev); |
335 | 328 | ||
336 | /* Do the reset outside of interrupt context */ | 329 | /* Do the reset outside of interrupt context */ |
337 | schedule_work(&adapter->reset_task); | 330 | adapter->work_event |= ATL1C_WORK_EVENT_RESET; |
331 | schedule_work(&adapter->common_task); | ||
338 | } | 332 | } |
339 | 333 | ||
340 | /* | 334 | /* |
@@ -713,15 +707,21 @@ static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) | |||
713 | static inline void atl1c_clean_buffer(struct pci_dev *pdev, | 707 | static inline void atl1c_clean_buffer(struct pci_dev *pdev, |
714 | struct atl1c_buffer *buffer_info, int in_irq) | 708 | struct atl1c_buffer *buffer_info, int in_irq) |
715 | { | 709 | { |
710 | u16 pci_driection; | ||
716 | if (buffer_info->flags & ATL1C_BUFFER_FREE) | 711 | if (buffer_info->flags & ATL1C_BUFFER_FREE) |
717 | return; | 712 | return; |
718 | if (buffer_info->dma) { | 713 | if (buffer_info->dma) { |
714 | if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) | ||
715 | pci_driection = PCI_DMA_FROMDEVICE; | ||
716 | else | ||
717 | pci_driection = PCI_DMA_TODEVICE; | ||
718 | |||
719 | if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) | 719 | if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) |
720 | pci_unmap_single(pdev, buffer_info->dma, | 720 | pci_unmap_single(pdev, buffer_info->dma, |
721 | buffer_info->length, PCI_DMA_TODEVICE); | 721 | buffer_info->length, pci_driection); |
722 | else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) | 722 | else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) |
723 | pci_unmap_page(pdev, buffer_info->dma, | 723 | pci_unmap_page(pdev, buffer_info->dma, |
724 | buffer_info->length, PCI_DMA_TODEVICE); | 724 | buffer_info->length, pci_driection); |
725 | } | 725 | } |
726 | if (buffer_info->skb) { | 726 | if (buffer_info->skb) { |
727 | if (in_irq) | 727 | if (in_irq) |
@@ -1533,7 +1533,8 @@ static irqreturn_t atl1c_intr(int irq, void *data) | |||
1533 | /* reset MAC */ | 1533 | /* reset MAC */ |
1534 | hw->intr_mask &= ~ISR_ERROR; | 1534 | hw->intr_mask &= ~ISR_ERROR; |
1535 | AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); | 1535 | AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); |
1536 | schedule_work(&adapter->reset_task); | 1536 | adapter->work_event |= ATL1C_WORK_EVENT_RESET; |
1537 | schedule_work(&adapter->common_task); | ||
1537 | break; | 1538 | break; |
1538 | } | 1539 | } |
1539 | 1540 | ||
@@ -1606,7 +1607,8 @@ static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid | |||
1606 | buffer_info->dma = pci_map_single(pdev, vir_addr, | 1607 | buffer_info->dma = pci_map_single(pdev, vir_addr, |
1607 | buffer_info->length, | 1608 | buffer_info->length, |
1608 | PCI_DMA_FROMDEVICE); | 1609 | PCI_DMA_FROMDEVICE); |
1609 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE); | 1610 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, |
1611 | ATL1C_PCIMAP_FROMDEVICE); | ||
1610 | rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | 1612 | rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); |
1611 | rfd_next_to_use = next_next; | 1613 | rfd_next_to_use = next_next; |
1612 | if (++next_next == rfd_ring->count) | 1614 | if (++next_next == rfd_ring->count) |
@@ -1967,7 +1969,8 @@ static void atl1c_tx_map(struct atl1c_adapter *adapter, | |||
1967 | buffer_info->dma = pci_map_single(adapter->pdev, | 1969 | buffer_info->dma = pci_map_single(adapter->pdev, |
1968 | skb->data, hdr_len, PCI_DMA_TODEVICE); | 1970 | skb->data, hdr_len, PCI_DMA_TODEVICE); |
1969 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); | 1971 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); |
1970 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE); | 1972 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, |
1973 | ATL1C_PCIMAP_TODEVICE); | ||
1971 | mapped_len += map_len; | 1974 | mapped_len += map_len; |
1972 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); | 1975 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); |
1973 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); | 1976 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); |
@@ -1988,7 +1991,8 @@ static void atl1c_tx_map(struct atl1c_adapter *adapter, | |||
1988 | pci_map_single(adapter->pdev, skb->data + mapped_len, | 1991 | pci_map_single(adapter->pdev, skb->data + mapped_len, |
1989 | buffer_info->length, PCI_DMA_TODEVICE); | 1992 | buffer_info->length, PCI_DMA_TODEVICE); |
1990 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); | 1993 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); |
1991 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE); | 1994 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, |
1995 | ATL1C_PCIMAP_TODEVICE); | ||
1992 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); | 1996 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); |
1993 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); | 1997 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); |
1994 | } | 1998 | } |
@@ -2009,7 +2013,8 @@ static void atl1c_tx_map(struct atl1c_adapter *adapter, | |||
2009 | buffer_info->length, | 2013 | buffer_info->length, |
2010 | PCI_DMA_TODEVICE); | 2014 | PCI_DMA_TODEVICE); |
2011 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); | 2015 | ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); |
2012 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE); | 2016 | ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, |
2017 | ATL1C_PCIMAP_TODEVICE); | ||
2013 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); | 2018 | use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); |
2014 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); | 2019 | use_tpd->buffer_len = cpu_to_le16(buffer_info->length); |
2015 | } | 2020 | } |
@@ -2198,8 +2203,7 @@ void atl1c_down(struct atl1c_adapter *adapter) | |||
2198 | struct net_device *netdev = adapter->netdev; | 2203 | struct net_device *netdev = adapter->netdev; |
2199 | 2204 | ||
2200 | atl1c_del_timer(adapter); | 2205 | atl1c_del_timer(adapter); |
2201 | atl1c_cancel_work(adapter); | 2206 | adapter->work_event = 0; /* clear all event */ |
2202 | |||
2203 | /* signal that we're down so the interrupt handler does not | 2207 | /* signal that we're down so the interrupt handler does not |
2204 | * reschedule our watchdog timer */ | 2208 | * reschedule our watchdog timer */ |
2205 | set_bit(__AT_DOWN, &adapter->flags); | 2209 | set_bit(__AT_DOWN, &adapter->flags); |
@@ -2599,8 +2603,8 @@ static int __devinit atl1c_probe(struct pci_dev *pdev, | |||
2599 | adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]); | 2603 | adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]); |
2600 | 2604 | ||
2601 | atl1c_hw_set_mac_addr(&adapter->hw); | 2605 | atl1c_hw_set_mac_addr(&adapter->hw); |
2602 | INIT_WORK(&adapter->reset_task, atl1c_reset_task); | 2606 | INIT_WORK(&adapter->common_task, atl1c_common_task); |
2603 | INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task); | 2607 | adapter->work_event = 0; |
2604 | err = register_netdev(netdev); | 2608 | err = register_netdev(netdev); |
2605 | if (err) { | 2609 | if (err) { |
2606 | dev_err(&pdev->dev, "register netdevice failed\n"); | 2610 | dev_err(&pdev->dev, "register netdevice failed\n"); |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index 2a9132343b66..4869adb69586 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -1505,8 +1505,7 @@ static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset) | |||
1505 | for (k = 0; k< ethaddr_bytes; k++) { | 1505 | for (k = 0; k< ethaddr_bytes; k++) { |
1506 | ppattern[offset + magicsync + | 1506 | ppattern[offset + magicsync + |
1507 | (j * ETH_ALEN) + k] = macaddr[k]; | 1507 | (j * ETH_ALEN) + k] = macaddr[k]; |
1508 | len++; | 1508 | set_bit(len++, (unsigned long *) pmask); |
1509 | set_bit(len, (unsigned long *) pmask); | ||
1510 | } | 1509 | } |
1511 | } | 1510 | } |
1512 | return len - 1; | 1511 | return len - 1; |
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig index bb803fa1e6a7..8c485aad1b94 100644 --- a/drivers/net/can/Kconfig +++ b/drivers/net/can/Kconfig | |||
@@ -54,6 +54,15 @@ config CAN_MCP251X | |||
54 | ---help--- | 54 | ---help--- |
55 | Driver for the Microchip MCP251x SPI CAN controllers. | 55 | Driver for the Microchip MCP251x SPI CAN controllers. |
56 | 56 | ||
57 | config CAN_BFIN | ||
58 | depends on CAN_DEV && (BF534 || BF536 || BF537 || BF538 || BF539 || BF54x) | ||
59 | tristate "Analog Devices Blackfin on-chip CAN" | ||
60 | ---help--- | ||
61 | Driver for the Analog Devices Blackfin on-chip CAN controllers | ||
62 | |||
63 | To compile this driver as a module, choose M here: the | ||
64 | module will be called bfin_can. | ||
65 | |||
57 | source "drivers/net/can/mscan/Kconfig" | 66 | source "drivers/net/can/mscan/Kconfig" |
58 | 67 | ||
59 | source "drivers/net/can/sja1000/Kconfig" | 68 | source "drivers/net/can/sja1000/Kconfig" |
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile index 56899fef1c6a..7a702f28d01c 100644 --- a/drivers/net/can/Makefile +++ b/drivers/net/can/Makefile | |||
@@ -14,5 +14,6 @@ obj-$(CONFIG_CAN_MSCAN) += mscan/ | |||
14 | obj-$(CONFIG_CAN_AT91) += at91_can.o | 14 | obj-$(CONFIG_CAN_AT91) += at91_can.o |
15 | obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o | 15 | obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o |
16 | obj-$(CONFIG_CAN_MCP251X) += mcp251x.o | 16 | obj-$(CONFIG_CAN_MCP251X) += mcp251x.o |
17 | obj-$(CONFIG_CAN_BFIN) += bfin_can.o | ||
17 | 18 | ||
18 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG | 19 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG |
diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c new file mode 100644 index 000000000000..c7fc1de28173 --- /dev/null +++ b/drivers/net/can/bfin_can.c | |||
@@ -0,0 +1,783 @@ | |||
1 | /* | ||
2 | * Blackfin On-Chip CAN Driver | ||
3 | * | ||
4 | * Copyright 2004-2009 Analog Devices Inc. | ||
5 | * | ||
6 | * Enter bugs at http://blackfin.uclinux.org/ | ||
7 | * | ||
8 | * Licensed under the GPL-2 or later. | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/bitops.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/netdevice.h> | ||
18 | #include <linux/skbuff.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | |||
21 | #include <linux/can.h> | ||
22 | #include <linux/can/dev.h> | ||
23 | #include <linux/can/error.h> | ||
24 | |||
25 | #include <asm/portmux.h> | ||
26 | |||
27 | #define DRV_NAME "bfin_can" | ||
28 | #define BFIN_CAN_TIMEOUT 100 | ||
29 | |||
30 | /* | ||
31 | * transmit and receive channels | ||
32 | */ | ||
33 | #define TRANSMIT_CHL 24 | ||
34 | #define RECEIVE_STD_CHL 0 | ||
35 | #define RECEIVE_EXT_CHL 4 | ||
36 | #define RECEIVE_RTR_CHL 8 | ||
37 | #define RECEIVE_EXT_RTR_CHL 12 | ||
38 | #define MAX_CHL_NUMBER 32 | ||
39 | |||
40 | /* | ||
41 | * bfin can registers layout | ||
42 | */ | ||
43 | struct bfin_can_mask_regs { | ||
44 | u16 aml; | ||
45 | u16 dummy1; | ||
46 | u16 amh; | ||
47 | u16 dummy2; | ||
48 | }; | ||
49 | |||
50 | struct bfin_can_channel_regs { | ||
51 | u16 data[8]; | ||
52 | u16 dlc; | ||
53 | u16 dummy1; | ||
54 | u16 tsv; | ||
55 | u16 dummy2; | ||
56 | u16 id0; | ||
57 | u16 dummy3; | ||
58 | u16 id1; | ||
59 | u16 dummy4; | ||
60 | }; | ||
61 | |||
62 | struct bfin_can_regs { | ||
63 | /* | ||
64 | * global control and status registers | ||
65 | */ | ||
66 | u16 mc1; /* offset 0 */ | ||
67 | u16 dummy1; | ||
68 | u16 md1; /* offset 4 */ | ||
69 | u16 rsv1[13]; | ||
70 | u16 mbtif1; /* offset 0x20 */ | ||
71 | u16 dummy2; | ||
72 | u16 mbrif1; /* offset 0x24 */ | ||
73 | u16 dummy3; | ||
74 | u16 mbim1; /* offset 0x28 */ | ||
75 | u16 rsv2[11]; | ||
76 | u16 mc2; /* offset 0x40 */ | ||
77 | u16 dummy4; | ||
78 | u16 md2; /* offset 0x44 */ | ||
79 | u16 dummy5; | ||
80 | u16 trs2; /* offset 0x48 */ | ||
81 | u16 rsv3[11]; | ||
82 | u16 mbtif2; /* offset 0x60 */ | ||
83 | u16 dummy6; | ||
84 | u16 mbrif2; /* offset 0x64 */ | ||
85 | u16 dummy7; | ||
86 | u16 mbim2; /* offset 0x68 */ | ||
87 | u16 rsv4[11]; | ||
88 | u16 clk; /* offset 0x80 */ | ||
89 | u16 dummy8; | ||
90 | u16 timing; /* offset 0x84 */ | ||
91 | u16 rsv5[3]; | ||
92 | u16 status; /* offset 0x8c */ | ||
93 | u16 dummy9; | ||
94 | u16 cec; /* offset 0x90 */ | ||
95 | u16 dummy10; | ||
96 | u16 gis; /* offset 0x94 */ | ||
97 | u16 dummy11; | ||
98 | u16 gim; /* offset 0x98 */ | ||
99 | u16 rsv6[3]; | ||
100 | u16 ctrl; /* offset 0xa0 */ | ||
101 | u16 dummy12; | ||
102 | u16 intr; /* offset 0xa4 */ | ||
103 | u16 rsv7[7]; | ||
104 | u16 esr; /* offset 0xb4 */ | ||
105 | u16 rsv8[37]; | ||
106 | |||
107 | /* | ||
108 | * channel(mailbox) mask and message registers | ||
109 | */ | ||
110 | struct bfin_can_mask_regs msk[MAX_CHL_NUMBER]; /* offset 0x100 */ | ||
111 | struct bfin_can_channel_regs chl[MAX_CHL_NUMBER]; /* offset 0x200 */ | ||
112 | }; | ||
113 | |||
114 | /* | ||
115 | * bfin can private data | ||
116 | */ | ||
117 | struct bfin_can_priv { | ||
118 | struct can_priv can; /* must be the first member */ | ||
119 | struct net_device *dev; | ||
120 | void __iomem *membase; | ||
121 | int rx_irq; | ||
122 | int tx_irq; | ||
123 | int err_irq; | ||
124 | unsigned short *pin_list; | ||
125 | }; | ||
126 | |||
127 | /* | ||
128 | * bfin can timing parameters | ||
129 | */ | ||
130 | static struct can_bittiming_const bfin_can_bittiming_const = { | ||
131 | .name = DRV_NAME, | ||
132 | .tseg1_min = 1, | ||
133 | .tseg1_max = 16, | ||
134 | .tseg2_min = 1, | ||
135 | .tseg2_max = 8, | ||
136 | .sjw_max = 4, | ||
137 | /* | ||
138 | * Although the BRP field can be set to any value, it is recommended | ||
139 | * that the value be greater than or equal to 4, as restrictions | ||
140 | * apply to the bit timing configuration when BRP is less than 4. | ||
141 | */ | ||
142 | .brp_min = 4, | ||
143 | .brp_max = 1024, | ||
144 | .brp_inc = 1, | ||
145 | }; | ||
146 | |||
147 | static int bfin_can_set_bittiming(struct net_device *dev) | ||
148 | { | ||
149 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
150 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
151 | struct can_bittiming *bt = &priv->can.bittiming; | ||
152 | u16 clk, timing; | ||
153 | |||
154 | clk = bt->brp - 1; | ||
155 | timing = ((bt->sjw - 1) << 8) | (bt->prop_seg + bt->phase_seg1 - 1) | | ||
156 | ((bt->phase_seg2 - 1) << 4); | ||
157 | |||
158 | /* | ||
159 | * If the SAM bit is set, the input signal is oversampled three times | ||
160 | * at the SCLK rate. | ||
161 | */ | ||
162 | if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) | ||
163 | timing |= SAM; | ||
164 | |||
165 | bfin_write16(®->clk, clk); | ||
166 | bfin_write16(®->timing, timing); | ||
167 | |||
168 | dev_info(dev->dev.parent, "setting CLOCK=0x%04x TIMING=0x%04x\n", | ||
169 | clk, timing); | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | static void bfin_can_set_reset_mode(struct net_device *dev) | ||
175 | { | ||
176 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
177 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
178 | int timeout = BFIN_CAN_TIMEOUT; | ||
179 | int i; | ||
180 | |||
181 | /* disable interrupts */ | ||
182 | bfin_write16(®->mbim1, 0); | ||
183 | bfin_write16(®->mbim2, 0); | ||
184 | bfin_write16(®->gim, 0); | ||
185 | |||
186 | /* reset can and enter configuration mode */ | ||
187 | bfin_write16(®->ctrl, SRS | CCR); | ||
188 | SSYNC(); | ||
189 | bfin_write16(®->ctrl, CCR); | ||
190 | SSYNC(); | ||
191 | while (!(bfin_read16(®->ctrl) & CCA)) { | ||
192 | udelay(10); | ||
193 | if (--timeout == 0) { | ||
194 | dev_err(dev->dev.parent, | ||
195 | "fail to enter configuration mode\n"); | ||
196 | BUG(); | ||
197 | } | ||
198 | } | ||
199 | |||
200 | /* | ||
201 | * All mailbox configurations are marked as inactive | ||
202 | * by writing to CAN Mailbox Configuration Registers 1 and 2 | ||
203 | * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled | ||
204 | */ | ||
205 | bfin_write16(®->mc1, 0); | ||
206 | bfin_write16(®->mc2, 0); | ||
207 | |||
208 | /* Set Mailbox Direction */ | ||
209 | bfin_write16(®->md1, 0xFFFF); /* mailbox 1-16 are RX */ | ||
210 | bfin_write16(®->md2, 0); /* mailbox 17-32 are TX */ | ||
211 | |||
212 | /* RECEIVE_STD_CHL */ | ||
213 | for (i = 0; i < 2; i++) { | ||
214 | bfin_write16(®->chl[RECEIVE_STD_CHL + i].id0, 0); | ||
215 | bfin_write16(®->chl[RECEIVE_STD_CHL + i].id1, AME); | ||
216 | bfin_write16(®->chl[RECEIVE_STD_CHL + i].dlc, 0); | ||
217 | bfin_write16(®->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF); | ||
218 | bfin_write16(®->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF); | ||
219 | } | ||
220 | |||
221 | /* RECEIVE_EXT_CHL */ | ||
222 | for (i = 0; i < 2; i++) { | ||
223 | bfin_write16(®->chl[RECEIVE_EXT_CHL + i].id0, 0); | ||
224 | bfin_write16(®->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE); | ||
225 | bfin_write16(®->chl[RECEIVE_EXT_CHL + i].dlc, 0); | ||
226 | bfin_write16(®->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF); | ||
227 | bfin_write16(®->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF); | ||
228 | } | ||
229 | |||
230 | bfin_write16(®->mc2, BIT(TRANSMIT_CHL - 16)); | ||
231 | bfin_write16(®->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL)); | ||
232 | SSYNC(); | ||
233 | |||
234 | priv->can.state = CAN_STATE_STOPPED; | ||
235 | } | ||
236 | |||
237 | static void bfin_can_set_normal_mode(struct net_device *dev) | ||
238 | { | ||
239 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
240 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
241 | int timeout = BFIN_CAN_TIMEOUT; | ||
242 | |||
243 | /* | ||
244 | * leave configuration mode | ||
245 | */ | ||
246 | bfin_write16(®->ctrl, bfin_read16(®->ctrl) & ~CCR); | ||
247 | |||
248 | while (bfin_read16(®->status) & CCA) { | ||
249 | udelay(10); | ||
250 | if (--timeout == 0) { | ||
251 | dev_err(dev->dev.parent, | ||
252 | "fail to leave configuration mode\n"); | ||
253 | BUG(); | ||
254 | } | ||
255 | } | ||
256 | |||
257 | /* | ||
258 | * clear _All_ tx and rx interrupts | ||
259 | */ | ||
260 | bfin_write16(®->mbtif1, 0xFFFF); | ||
261 | bfin_write16(®->mbtif2, 0xFFFF); | ||
262 | bfin_write16(®->mbrif1, 0xFFFF); | ||
263 | bfin_write16(®->mbrif2, 0xFFFF); | ||
264 | |||
265 | /* | ||
266 | * clear global interrupt status register | ||
267 | */ | ||
268 | bfin_write16(®->gis, 0x7FF); /* overwrites with '1' */ | ||
269 | |||
270 | /* | ||
271 | * Initialize Interrupts | ||
272 | * - set bits in the mailbox interrupt mask register | ||
273 | * - global interrupt mask | ||
274 | */ | ||
275 | bfin_write16(®->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL)); | ||
276 | bfin_write16(®->mbim2, BIT(TRANSMIT_CHL - 16)); | ||
277 | |||
278 | bfin_write16(®->gim, EPIM | BOIM | RMLIM); | ||
279 | SSYNC(); | ||
280 | } | ||
281 | |||
282 | static void bfin_can_start(struct net_device *dev) | ||
283 | { | ||
284 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
285 | |||
286 | /* enter reset mode */ | ||
287 | if (priv->can.state != CAN_STATE_STOPPED) | ||
288 | bfin_can_set_reset_mode(dev); | ||
289 | |||
290 | /* leave reset mode */ | ||
291 | bfin_can_set_normal_mode(dev); | ||
292 | } | ||
293 | |||
294 | static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode) | ||
295 | { | ||
296 | switch (mode) { | ||
297 | case CAN_MODE_START: | ||
298 | bfin_can_start(dev); | ||
299 | if (netif_queue_stopped(dev)) | ||
300 | netif_wake_queue(dev); | ||
301 | break; | ||
302 | |||
303 | default: | ||
304 | return -EOPNOTSUPP; | ||
305 | } | ||
306 | |||
307 | return 0; | ||
308 | } | ||
309 | |||
310 | static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
311 | { | ||
312 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
313 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
314 | struct can_frame *cf = (struct can_frame *)skb->data; | ||
315 | u8 dlc = cf->can_dlc; | ||
316 | canid_t id = cf->can_id; | ||
317 | u8 *data = cf->data; | ||
318 | u16 val; | ||
319 | int i; | ||
320 | |||
321 | netif_stop_queue(dev); | ||
322 | |||
323 | /* fill id */ | ||
324 | if (id & CAN_EFF_FLAG) { | ||
325 | bfin_write16(®->chl[TRANSMIT_CHL].id0, id); | ||
326 | if (id & CAN_RTR_FLAG) | ||
327 | writew(((id & 0x1FFF0000) >> 16) | IDE | AME | RTR, | ||
328 | ®->chl[TRANSMIT_CHL].id1); | ||
329 | else | ||
330 | writew(((id & 0x1FFF0000) >> 16) | IDE | AME, | ||
331 | ®->chl[TRANSMIT_CHL].id1); | ||
332 | |||
333 | } else { | ||
334 | if (id & CAN_RTR_FLAG) | ||
335 | writew((id << 2) | AME | RTR, | ||
336 | ®->chl[TRANSMIT_CHL].id1); | ||
337 | else | ||
338 | bfin_write16(®->chl[TRANSMIT_CHL].id1, | ||
339 | (id << 2) | AME); | ||
340 | } | ||
341 | |||
342 | /* fill payload */ | ||
343 | for (i = 0; i < 8; i += 2) { | ||
344 | val = ((7 - i) < dlc ? (data[7 - i]) : 0) + | ||
345 | ((6 - i) < dlc ? (data[6 - i] << 8) : 0); | ||
346 | bfin_write16(®->chl[TRANSMIT_CHL].data[i], val); | ||
347 | } | ||
348 | |||
349 | /* fill data length code */ | ||
350 | bfin_write16(®->chl[TRANSMIT_CHL].dlc, dlc); | ||
351 | |||
352 | dev->trans_start = jiffies; | ||
353 | |||
354 | can_put_echo_skb(skb, dev, 0); | ||
355 | |||
356 | /* set transmit request */ | ||
357 | bfin_write16(®->trs2, BIT(TRANSMIT_CHL - 16)); | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | |||
362 | static void bfin_can_rx(struct net_device *dev, u16 isrc) | ||
363 | { | ||
364 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
365 | struct net_device_stats *stats = &dev->stats; | ||
366 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
367 | struct can_frame *cf; | ||
368 | struct sk_buff *skb; | ||
369 | int obj; | ||
370 | int i; | ||
371 | u16 val; | ||
372 | |||
373 | skb = alloc_can_skb(dev, &cf); | ||
374 | if (skb == NULL) | ||
375 | return; | ||
376 | |||
377 | /* get id */ | ||
378 | if (isrc & BIT(RECEIVE_EXT_CHL)) { | ||
379 | /* extended frame format (EFF) */ | ||
380 | cf->can_id = ((bfin_read16(®->chl[RECEIVE_EXT_CHL].id1) | ||
381 | & 0x1FFF) << 16) | ||
382 | + bfin_read16(®->chl[RECEIVE_EXT_CHL].id0); | ||
383 | cf->can_id |= CAN_EFF_FLAG; | ||
384 | obj = RECEIVE_EXT_CHL; | ||
385 | } else { | ||
386 | /* standard frame format (SFF) */ | ||
387 | cf->can_id = (bfin_read16(®->chl[RECEIVE_STD_CHL].id1) | ||
388 | & 0x1ffc) >> 2; | ||
389 | obj = RECEIVE_STD_CHL; | ||
390 | } | ||
391 | if (bfin_read16(®->chl[obj].id1) & RTR) | ||
392 | cf->can_id |= CAN_RTR_FLAG; | ||
393 | |||
394 | /* get data length code */ | ||
395 | cf->can_dlc = bfin_read16(®->chl[obj].dlc); | ||
396 | |||
397 | /* get payload */ | ||
398 | for (i = 0; i < 8; i += 2) { | ||
399 | val = bfin_read16(®->chl[obj].data[i]); | ||
400 | cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0; | ||
401 | cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0; | ||
402 | } | ||
403 | |||
404 | netif_rx(skb); | ||
405 | |||
406 | stats->rx_packets++; | ||
407 | stats->rx_bytes += cf->can_dlc; | ||
408 | } | ||
409 | |||
410 | static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status) | ||
411 | { | ||
412 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
413 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
414 | struct net_device_stats *stats = &dev->stats; | ||
415 | struct can_frame *cf; | ||
416 | struct sk_buff *skb; | ||
417 | enum can_state state = priv->can.state; | ||
418 | |||
419 | skb = alloc_can_err_skb(dev, &cf); | ||
420 | if (skb == NULL) | ||
421 | return -ENOMEM; | ||
422 | |||
423 | if (isrc & RMLIS) { | ||
424 | /* data overrun interrupt */ | ||
425 | dev_dbg(dev->dev.parent, "data overrun interrupt\n"); | ||
426 | cf->can_id |= CAN_ERR_CRTL; | ||
427 | cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; | ||
428 | stats->rx_over_errors++; | ||
429 | stats->rx_errors++; | ||
430 | } | ||
431 | |||
432 | if (isrc & BOIS) { | ||
433 | dev_dbg(dev->dev.parent, "bus-off mode interrupt\n"); | ||
434 | state = CAN_STATE_BUS_OFF; | ||
435 | cf->can_id |= CAN_ERR_BUSOFF; | ||
436 | can_bus_off(dev); | ||
437 | } | ||
438 | |||
439 | if (isrc & EPIS) { | ||
440 | /* error passive interrupt */ | ||
441 | dev_dbg(dev->dev.parent, "error passive interrupt\n"); | ||
442 | state = CAN_STATE_ERROR_PASSIVE; | ||
443 | } | ||
444 | |||
445 | if ((isrc & EWTIS) || (isrc & EWRIS)) { | ||
446 | dev_dbg(dev->dev.parent, | ||
447 | "Error Warning Transmit/Receive Interrupt\n"); | ||
448 | state = CAN_STATE_ERROR_WARNING; | ||
449 | } | ||
450 | |||
451 | if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING || | ||
452 | state == CAN_STATE_ERROR_PASSIVE)) { | ||
453 | u16 cec = bfin_read16(®->cec); | ||
454 | u8 rxerr = cec; | ||
455 | u8 txerr = cec >> 8; | ||
456 | |||
457 | cf->can_id |= CAN_ERR_CRTL; | ||
458 | if (state == CAN_STATE_ERROR_WARNING) { | ||
459 | priv->can.can_stats.error_warning++; | ||
460 | cf->data[1] = (txerr > rxerr) ? | ||
461 | CAN_ERR_CRTL_TX_WARNING : | ||
462 | CAN_ERR_CRTL_RX_WARNING; | ||
463 | } else { | ||
464 | priv->can.can_stats.error_passive++; | ||
465 | cf->data[1] = (txerr > rxerr) ? | ||
466 | CAN_ERR_CRTL_TX_PASSIVE : | ||
467 | CAN_ERR_CRTL_RX_PASSIVE; | ||
468 | } | ||
469 | } | ||
470 | |||
471 | if (status) { | ||
472 | priv->can.can_stats.bus_error++; | ||
473 | |||
474 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | ||
475 | |||
476 | if (status & BEF) | ||
477 | cf->data[2] |= CAN_ERR_PROT_BIT; | ||
478 | else if (status & FER) | ||
479 | cf->data[2] |= CAN_ERR_PROT_FORM; | ||
480 | else if (status & SER) | ||
481 | cf->data[2] |= CAN_ERR_PROT_STUFF; | ||
482 | else | ||
483 | cf->data[2] |= CAN_ERR_PROT_UNSPEC; | ||
484 | } | ||
485 | |||
486 | priv->can.state = state; | ||
487 | |||
488 | netif_rx(skb); | ||
489 | |||
490 | stats->rx_packets++; | ||
491 | stats->rx_bytes += cf->can_dlc; | ||
492 | |||
493 | return 0; | ||
494 | } | ||
495 | |||
496 | irqreturn_t bfin_can_interrupt(int irq, void *dev_id) | ||
497 | { | ||
498 | struct net_device *dev = dev_id; | ||
499 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
500 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
501 | struct net_device_stats *stats = &dev->stats; | ||
502 | u16 status, isrc; | ||
503 | |||
504 | if ((irq == priv->tx_irq) && bfin_read16(®->mbtif2)) { | ||
505 | /* transmission complete interrupt */ | ||
506 | bfin_write16(®->mbtif2, 0xFFFF); | ||
507 | stats->tx_packets++; | ||
508 | stats->tx_bytes += bfin_read16(®->chl[TRANSMIT_CHL].dlc); | ||
509 | can_get_echo_skb(dev, 0); | ||
510 | netif_wake_queue(dev); | ||
511 | } else if ((irq == priv->rx_irq) && bfin_read16(®->mbrif1)) { | ||
512 | /* receive interrupt */ | ||
513 | isrc = bfin_read16(®->mbrif1); | ||
514 | bfin_write16(®->mbrif1, 0xFFFF); | ||
515 | bfin_can_rx(dev, isrc); | ||
516 | } else if ((irq == priv->err_irq) && bfin_read16(®->gis)) { | ||
517 | /* error interrupt */ | ||
518 | isrc = bfin_read16(®->gis); | ||
519 | status = bfin_read16(®->esr); | ||
520 | bfin_write16(®->gis, 0x7FF); | ||
521 | bfin_can_err(dev, isrc, status); | ||
522 | } else { | ||
523 | return IRQ_NONE; | ||
524 | } | ||
525 | |||
526 | return IRQ_HANDLED; | ||
527 | } | ||
528 | |||
529 | static int bfin_can_open(struct net_device *dev) | ||
530 | { | ||
531 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
532 | int err; | ||
533 | |||
534 | /* set chip into reset mode */ | ||
535 | bfin_can_set_reset_mode(dev); | ||
536 | |||
537 | /* common open */ | ||
538 | err = open_candev(dev); | ||
539 | if (err) | ||
540 | goto exit_open; | ||
541 | |||
542 | /* register interrupt handler */ | ||
543 | err = request_irq(priv->rx_irq, &bfin_can_interrupt, 0, | ||
544 | "bfin-can-rx", dev); | ||
545 | if (err) | ||
546 | goto exit_rx_irq; | ||
547 | err = request_irq(priv->tx_irq, &bfin_can_interrupt, 0, | ||
548 | "bfin-can-tx", dev); | ||
549 | if (err) | ||
550 | goto exit_tx_irq; | ||
551 | err = request_irq(priv->err_irq, &bfin_can_interrupt, 0, | ||
552 | "bfin-can-err", dev); | ||
553 | if (err) | ||
554 | goto exit_err_irq; | ||
555 | |||
556 | bfin_can_start(dev); | ||
557 | |||
558 | netif_start_queue(dev); | ||
559 | |||
560 | return 0; | ||
561 | |||
562 | exit_err_irq: | ||
563 | free_irq(priv->tx_irq, dev); | ||
564 | exit_tx_irq: | ||
565 | free_irq(priv->rx_irq, dev); | ||
566 | exit_rx_irq: | ||
567 | close_candev(dev); | ||
568 | exit_open: | ||
569 | return err; | ||
570 | } | ||
571 | |||
572 | static int bfin_can_close(struct net_device *dev) | ||
573 | { | ||
574 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
575 | |||
576 | netif_stop_queue(dev); | ||
577 | bfin_can_set_reset_mode(dev); | ||
578 | |||
579 | close_candev(dev); | ||
580 | |||
581 | free_irq(priv->rx_irq, dev); | ||
582 | free_irq(priv->tx_irq, dev); | ||
583 | free_irq(priv->err_irq, dev); | ||
584 | |||
585 | return 0; | ||
586 | } | ||
587 | |||
588 | struct net_device *alloc_bfin_candev(void) | ||
589 | { | ||
590 | struct net_device *dev; | ||
591 | struct bfin_can_priv *priv; | ||
592 | |||
593 | dev = alloc_candev(sizeof(*priv)); | ||
594 | if (!dev) | ||
595 | return NULL; | ||
596 | |||
597 | priv = netdev_priv(dev); | ||
598 | |||
599 | priv->dev = dev; | ||
600 | priv->can.bittiming_const = &bfin_can_bittiming_const; | ||
601 | priv->can.do_set_bittiming = bfin_can_set_bittiming; | ||
602 | priv->can.do_set_mode = bfin_can_set_mode; | ||
603 | |||
604 | return dev; | ||
605 | } | ||
606 | |||
607 | static const struct net_device_ops bfin_can_netdev_ops = { | ||
608 | .ndo_open = bfin_can_open, | ||
609 | .ndo_stop = bfin_can_close, | ||
610 | .ndo_start_xmit = bfin_can_start_xmit, | ||
611 | }; | ||
612 | |||
613 | static int __devinit bfin_can_probe(struct platform_device *pdev) | ||
614 | { | ||
615 | int err; | ||
616 | struct net_device *dev; | ||
617 | struct bfin_can_priv *priv; | ||
618 | struct resource *res_mem, *rx_irq, *tx_irq, *err_irq; | ||
619 | unsigned short *pdata; | ||
620 | |||
621 | pdata = pdev->dev.platform_data; | ||
622 | if (!pdata) { | ||
623 | dev_err(&pdev->dev, "No platform data provided!\n"); | ||
624 | err = -EINVAL; | ||
625 | goto exit; | ||
626 | } | ||
627 | |||
628 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
629 | rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
630 | tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1); | ||
631 | err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2); | ||
632 | if (!res_mem || !rx_irq || !tx_irq || !err_irq) { | ||
633 | err = -EINVAL; | ||
634 | goto exit; | ||
635 | } | ||
636 | |||
637 | if (!request_mem_region(res_mem->start, resource_size(res_mem), | ||
638 | dev_name(&pdev->dev))) { | ||
639 | err = -EBUSY; | ||
640 | goto exit; | ||
641 | } | ||
642 | |||
643 | /* request peripheral pins */ | ||
644 | err = peripheral_request_list(pdata, dev_name(&pdev->dev)); | ||
645 | if (err) | ||
646 | goto exit_mem_release; | ||
647 | |||
648 | dev = alloc_bfin_candev(); | ||
649 | if (!dev) { | ||
650 | err = -ENOMEM; | ||
651 | goto exit_peri_pin_free; | ||
652 | } | ||
653 | |||
654 | priv = netdev_priv(dev); | ||
655 | priv->membase = (void __iomem *)res_mem->start; | ||
656 | priv->rx_irq = rx_irq->start; | ||
657 | priv->tx_irq = tx_irq->start; | ||
658 | priv->err_irq = err_irq->start; | ||
659 | priv->pin_list = pdata; | ||
660 | priv->can.clock.freq = get_sclk(); | ||
661 | |||
662 | dev_set_drvdata(&pdev->dev, dev); | ||
663 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
664 | |||
665 | dev->flags |= IFF_ECHO; /* we support local echo */ | ||
666 | dev->netdev_ops = &bfin_can_netdev_ops; | ||
667 | |||
668 | bfin_can_set_reset_mode(dev); | ||
669 | |||
670 | err = register_candev(dev); | ||
671 | if (err) { | ||
672 | dev_err(&pdev->dev, "registering failed (err=%d)\n", err); | ||
673 | goto exit_candev_free; | ||
674 | } | ||
675 | |||
676 | dev_info(&pdev->dev, | ||
677 | "%s device registered" | ||
678 | "(®_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n", | ||
679 | DRV_NAME, (void *)priv->membase, priv->rx_irq, | ||
680 | priv->tx_irq, priv->err_irq, priv->can.clock.freq); | ||
681 | return 0; | ||
682 | |||
683 | exit_candev_free: | ||
684 | free_candev(dev); | ||
685 | exit_peri_pin_free: | ||
686 | peripheral_free_list(pdata); | ||
687 | exit_mem_release: | ||
688 | release_mem_region(res_mem->start, resource_size(res_mem)); | ||
689 | exit: | ||
690 | return err; | ||
691 | } | ||
692 | |||
693 | static int __devexit bfin_can_remove(struct platform_device *pdev) | ||
694 | { | ||
695 | struct net_device *dev = dev_get_drvdata(&pdev->dev); | ||
696 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
697 | struct resource *res; | ||
698 | |||
699 | bfin_can_set_reset_mode(dev); | ||
700 | |||
701 | unregister_candev(dev); | ||
702 | |||
703 | dev_set_drvdata(&pdev->dev, NULL); | ||
704 | |||
705 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
706 | release_mem_region(res->start, resource_size(res)); | ||
707 | |||
708 | peripheral_free_list(priv->pin_list); | ||
709 | |||
710 | free_candev(dev); | ||
711 | return 0; | ||
712 | } | ||
713 | |||
714 | #ifdef CONFIG_PM | ||
715 | static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg) | ||
716 | { | ||
717 | struct net_device *dev = dev_get_drvdata(&pdev->dev); | ||
718 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
719 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
720 | int timeout = BFIN_CAN_TIMEOUT; | ||
721 | |||
722 | if (netif_running(dev)) { | ||
723 | /* enter sleep mode */ | ||
724 | bfin_write16(®->ctrl, bfin_read16(®->ctrl) | SMR); | ||
725 | SSYNC(); | ||
726 | while (!(bfin_read16(®->intr) & SMACK)) { | ||
727 | udelay(10); | ||
728 | if (--timeout == 0) { | ||
729 | dev_err(dev->dev.parent, | ||
730 | "fail to enter sleep mode\n"); | ||
731 | BUG(); | ||
732 | } | ||
733 | } | ||
734 | } | ||
735 | |||
736 | return 0; | ||
737 | } | ||
738 | |||
739 | static int bfin_can_resume(struct platform_device *pdev) | ||
740 | { | ||
741 | struct net_device *dev = dev_get_drvdata(&pdev->dev); | ||
742 | struct bfin_can_priv *priv = netdev_priv(dev); | ||
743 | struct bfin_can_regs __iomem *reg = priv->membase; | ||
744 | |||
745 | if (netif_running(dev)) { | ||
746 | /* leave sleep mode */ | ||
747 | bfin_write16(®->intr, 0); | ||
748 | SSYNC(); | ||
749 | } | ||
750 | |||
751 | return 0; | ||
752 | } | ||
753 | #else | ||
754 | #define bfin_can_suspend NULL | ||
755 | #define bfin_can_resume NULL | ||
756 | #endif /* CONFIG_PM */ | ||
757 | |||
758 | static struct platform_driver bfin_can_driver = { | ||
759 | .probe = bfin_can_probe, | ||
760 | .remove = __devexit_p(bfin_can_remove), | ||
761 | .suspend = bfin_can_suspend, | ||
762 | .resume = bfin_can_resume, | ||
763 | .driver = { | ||
764 | .name = DRV_NAME, | ||
765 | .owner = THIS_MODULE, | ||
766 | }, | ||
767 | }; | ||
768 | |||
769 | static int __init bfin_can_init(void) | ||
770 | { | ||
771 | return platform_driver_register(&bfin_can_driver); | ||
772 | } | ||
773 | module_init(bfin_can_init); | ||
774 | |||
775 | static void __exit bfin_can_exit(void) | ||
776 | { | ||
777 | platform_driver_unregister(&bfin_can_driver); | ||
778 | } | ||
779 | module_exit(bfin_can_exit); | ||
780 | |||
781 | MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); | ||
782 | MODULE_LICENSE("GPL"); | ||
783 | MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver"); | ||
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index d4c6e7fcff53..4332b3a2fafb 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -1104,6 +1104,8 @@ static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev) | |||
1104 | cp->bnx2x_status_blk = cp->status_blk; | 1104 | cp->bnx2x_status_blk = cp->status_blk; |
1105 | cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk; | 1105 | cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk; |
1106 | 1106 | ||
1107 | memset(cp->bnx2x_status_blk, 0, sizeof(struct host_status_block)); | ||
1108 | |||
1107 | cp->l2_rx_ring_size = 15; | 1109 | cp->l2_rx_ring_size = 15; |
1108 | 1110 | ||
1109 | ret = cnic_alloc_l2_rings(dev, 4); | 1111 | ret = cnic_alloc_l2_rings(dev, 4); |
@@ -4183,6 +4185,12 @@ static void cnic_shutdown_rings(struct cnic_dev *dev) | |||
4183 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT, | 4185 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT, |
4184 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data); | 4186 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data); |
4185 | msleep(10); | 4187 | msleep(10); |
4188 | |||
4189 | memset(&l5_data, 0, sizeof(l5_data)); | ||
4190 | cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL, | ||
4191 | BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE | | ||
4192 | (1 << SPE_HDR_COMMON_RAMROD_SHIFT), &l5_data); | ||
4193 | msleep(10); | ||
4186 | } | 4194 | } |
4187 | } | 4195 | } |
4188 | 4196 | ||
@@ -4289,6 +4297,9 @@ static void cnic_stop_bnx2x_hw(struct cnic_dev *dev) | |||
4289 | offsetof(struct cstorm_status_block_c, | 4297 | offsetof(struct cstorm_status_block_c, |
4290 | index_values[HC_INDEX_C_ISCSI_EQ_CONS]), | 4298 | index_values[HC_INDEX_C_ISCSI_EQ_CONS]), |
4291 | 0); | 4299 | 0); |
4300 | CNIC_WR(dev, BAR_CSTRORM_INTMEM + | ||
4301 | CSTORM_ISCSI_EQ_CONS_OFFSET(cp->func, 0), 0); | ||
4302 | CNIC_WR16(dev, cp->kcq_io_addr, 0); | ||
4292 | cnic_free_resc(dev); | 4303 | cnic_free_resc(dev); |
4293 | } | 4304 | } |
4294 | 4305 | ||
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index cef3f882e2b6..89bec9c3c141 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -2860,6 +2860,7 @@ static int t3_reenable_adapter(struct adapter *adapter) | |||
2860 | } | 2860 | } |
2861 | pci_set_master(adapter->pdev); | 2861 | pci_set_master(adapter->pdev); |
2862 | pci_restore_state(adapter->pdev); | 2862 | pci_restore_state(adapter->pdev); |
2863 | pci_save_state(adapter->pdev); | ||
2863 | 2864 | ||
2864 | /* Free sge resources */ | 2865 | /* Free sge resources */ |
2865 | t3_free_sge_resources(adapter); | 2866 | t3_free_sge_resources(adapter); |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index 86d2809763c3..e02e38221ed4 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -74,7 +74,7 @@ | |||
74 | #define E1000_WUS_BC E1000_WUFC_BC | 74 | #define E1000_WUS_BC E1000_WUFC_BC |
75 | 75 | ||
76 | /* Extended Device Control */ | 76 | /* Extended Device Control */ |
77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ | 77 | #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */ |
78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ | 78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ |
79 | #define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */ | 79 | #define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */ |
80 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ | 80 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ |
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c index d2a104794609..3028f23da891 100644 --- a/drivers/net/e1000e/es2lan.c +++ b/drivers/net/e1000e/es2lan.c | |||
@@ -46,6 +46,9 @@ | |||
46 | #define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT 0x0000 | 46 | #define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT 0x0000 |
47 | #define E1000_KMRNCTRLSTA_OPMODE_E_IDLE 0x2000 | 47 | #define E1000_KMRNCTRLSTA_OPMODE_E_IDLE 0x2000 |
48 | 48 | ||
49 | #define E1000_KMRNCTRLSTA_OPMODE_MASK 0x000C | ||
50 | #define E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO 0x0004 | ||
51 | |||
49 | #define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */ | 52 | #define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */ |
50 | #define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN 0x00010000 | 53 | #define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN 0x00010000 |
51 | 54 | ||
@@ -462,28 +465,36 @@ static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw, | |||
462 | return ret_val; | 465 | return ret_val; |
463 | } | 466 | } |
464 | 467 | ||
465 | /* | 468 | if (hw->dev_spec.e80003es2lan.mdic_wa_enable == true) { |
466 | * The "ready" bit in the MDIC register may be incorrectly set | 469 | /* |
467 | * before the device has completed the "Page Select" MDI | 470 | * The "ready" bit in the MDIC register may be incorrectly set |
468 | * transaction. So we wait 200us after each MDI command... | 471 | * before the device has completed the "Page Select" MDI |
469 | */ | 472 | * transaction. So we wait 200us after each MDI command... |
470 | udelay(200); | 473 | */ |
474 | udelay(200); | ||
471 | 475 | ||
472 | /* ...and verify the command was successful. */ | 476 | /* ...and verify the command was successful. */ |
473 | ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp); | 477 | ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp); |
474 | 478 | ||
475 | if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) { | 479 | if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) { |
476 | ret_val = -E1000_ERR_PHY; | 480 | ret_val = -E1000_ERR_PHY; |
477 | e1000_release_phy_80003es2lan(hw); | 481 | e1000_release_phy_80003es2lan(hw); |
478 | return ret_val; | 482 | return ret_val; |
479 | } | 483 | } |
480 | 484 | ||
481 | udelay(200); | 485 | udelay(200); |
482 | 486 | ||
483 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 487 | ret_val = e1000e_read_phy_reg_mdic(hw, |
484 | data); | 488 | MAX_PHY_REG_ADDRESS & offset, |
489 | data); | ||
490 | |||
491 | udelay(200); | ||
492 | } else { | ||
493 | ret_val = e1000e_read_phy_reg_mdic(hw, | ||
494 | MAX_PHY_REG_ADDRESS & offset, | ||
495 | data); | ||
496 | } | ||
485 | 497 | ||
486 | udelay(200); | ||
487 | e1000_release_phy_80003es2lan(hw); | 498 | e1000_release_phy_80003es2lan(hw); |
488 | 499 | ||
489 | return ret_val; | 500 | return ret_val; |
@@ -526,28 +537,35 @@ static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw, | |||
526 | return ret_val; | 537 | return ret_val; |
527 | } | 538 | } |
528 | 539 | ||
540 | if (hw->dev_spec.e80003es2lan.mdic_wa_enable == true) { | ||
541 | /* | ||
542 | * The "ready" bit in the MDIC register may be incorrectly set | ||
543 | * before the device has completed the "Page Select" MDI | ||
544 | * transaction. So we wait 200us after each MDI command... | ||
545 | */ | ||
546 | udelay(200); | ||
529 | 547 | ||
530 | /* | 548 | /* ...and verify the command was successful. */ |
531 | * The "ready" bit in the MDIC register may be incorrectly set | 549 | ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp); |
532 | * before the device has completed the "Page Select" MDI | ||
533 | * transaction. So we wait 200us after each MDI command... | ||
534 | */ | ||
535 | udelay(200); | ||
536 | 550 | ||
537 | /* ...and verify the command was successful. */ | 551 | if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) { |
538 | ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp); | 552 | e1000_release_phy_80003es2lan(hw); |
553 | return -E1000_ERR_PHY; | ||
554 | } | ||
539 | 555 | ||
540 | if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) { | 556 | udelay(200); |
541 | e1000_release_phy_80003es2lan(hw); | ||
542 | return -E1000_ERR_PHY; | ||
543 | } | ||
544 | 557 | ||
545 | udelay(200); | 558 | ret_val = e1000e_write_phy_reg_mdic(hw, |
559 | MAX_PHY_REG_ADDRESS & offset, | ||
560 | data); | ||
546 | 561 | ||
547 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 562 | udelay(200); |
548 | data); | 563 | } else { |
564 | ret_val = e1000e_write_phy_reg_mdic(hw, | ||
565 | MAX_PHY_REG_ADDRESS & offset, | ||
566 | data); | ||
567 | } | ||
549 | 568 | ||
550 | udelay(200); | ||
551 | e1000_release_phy_80003es2lan(hw); | 569 | e1000_release_phy_80003es2lan(hw); |
552 | 570 | ||
553 | return ret_val; | 571 | return ret_val; |
@@ -866,6 +884,19 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw) | |||
866 | reg_data &= ~0x00100000; | 884 | reg_data &= ~0x00100000; |
867 | E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data); | 885 | E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data); |
868 | 886 | ||
887 | /* default to true to enable the MDIC W/A */ | ||
888 | hw->dev_spec.e80003es2lan.mdic_wa_enable = true; | ||
889 | |||
890 | ret_val = e1000_read_kmrn_reg_80003es2lan(hw, | ||
891 | E1000_KMRNCTRLSTA_OFFSET >> | ||
892 | E1000_KMRNCTRLSTA_OFFSET_SHIFT, | ||
893 | &i); | ||
894 | if (!ret_val) { | ||
895 | if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) == | ||
896 | E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO) | ||
897 | hw->dev_spec.e80003es2lan.mdic_wa_enable = false; | ||
898 | } | ||
899 | |||
869 | /* | 900 | /* |
870 | * Clear all of the statistics registers (clear on read). It is | 901 | * Clear all of the statistics registers (clear on read). It is |
871 | * important that we do this after we have tried to establish link | 902 | * important that we do this after we have tried to establish link |
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index a7d08dae79c4..2784cf44a6f3 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -302,6 +302,8 @@ enum e1e_registers { | |||
302 | #define E1000_KMRNCTRLSTA_OFFSET_SHIFT 16 | 302 | #define E1000_KMRNCTRLSTA_OFFSET_SHIFT 16 |
303 | #define E1000_KMRNCTRLSTA_REN 0x00200000 | 303 | #define E1000_KMRNCTRLSTA_REN 0x00200000 |
304 | #define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ | 304 | #define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ |
305 | #define E1000_KMRNCTRLSTA_TIMEOUTS 0x4 /* Kumeran Timeouts */ | ||
306 | #define E1000_KMRNCTRLSTA_INBAND_PARAM 0x9 /* Kumeran InBand Parameters */ | ||
305 | #define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ | 307 | #define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ |
306 | #define E1000_KMRNCTRLSTA_K1_CONFIG 0x7 | 308 | #define E1000_KMRNCTRLSTA_K1_CONFIG 0x7 |
307 | #define E1000_KMRNCTRLSTA_K1_ENABLE 0x140E | 309 | #define E1000_KMRNCTRLSTA_K1_ENABLE 0x140E |
@@ -898,6 +900,10 @@ struct e1000_dev_spec_82571 { | |||
898 | u32 smb_counter; | 900 | u32 smb_counter; |
899 | }; | 901 | }; |
900 | 902 | ||
903 | struct e1000_dev_spec_80003es2lan { | ||
904 | bool mdic_wa_enable; | ||
905 | }; | ||
906 | |||
901 | struct e1000_shadow_ram { | 907 | struct e1000_shadow_ram { |
902 | u16 value; | 908 | u16 value; |
903 | bool modified; | 909 | bool modified; |
@@ -926,6 +932,7 @@ struct e1000_hw { | |||
926 | 932 | ||
927 | union { | 933 | union { |
928 | struct e1000_dev_spec_82571 e82571; | 934 | struct e1000_dev_spec_82571 e82571; |
935 | struct e1000_dev_spec_80003es2lan e80003es2lan; | ||
929 | struct e1000_dev_spec_ich8lan ich8lan; | 936 | struct e1000_dev_spec_ich8lan ich8lan; |
930 | } dev_spec; | 937 | } dev_spec; |
931 | }; | 938 | }; |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 7b33be98a2ca..9b09246af064 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -2755,14 +2755,16 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw) | |||
2755 | * and increase the max iterations when polling the phy; | 2755 | * and increase the max iterations when polling the phy; |
2756 | * this fixes erroneous timeouts at 10Mbps. | 2756 | * this fixes erroneous timeouts at 10Mbps. |
2757 | */ | 2757 | */ |
2758 | ret_val = e1000e_write_kmrn_reg(hw, GG82563_REG(0x34, 4), 0xFFFF); | 2758 | ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_TIMEOUTS, 0xFFFF); |
2759 | if (ret_val) | 2759 | if (ret_val) |
2760 | return ret_val; | 2760 | return ret_val; |
2761 | ret_val = e1000e_read_kmrn_reg(hw, GG82563_REG(0x34, 9), ®_data); | 2761 | ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, |
2762 | ®_data); | ||
2762 | if (ret_val) | 2763 | if (ret_val) |
2763 | return ret_val; | 2764 | return ret_val; |
2764 | reg_data |= 0x3F; | 2765 | reg_data |= 0x3F; |
2765 | ret_val = e1000e_write_kmrn_reg(hw, GG82563_REG(0x34, 9), reg_data); | 2766 | ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, |
2767 | reg_data); | ||
2766 | if (ret_val) | 2768 | if (ret_val) |
2767 | return ret_val; | 2769 | return ret_val; |
2768 | 2770 | ||
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index c3105c5087e0..762b697ce731 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -4541,7 +4541,7 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake) | |||
4541 | e1000_media_type_internal_serdes) { | 4541 | e1000_media_type_internal_serdes) { |
4542 | /* keep the laser running in D3 */ | 4542 | /* keep the laser running in D3 */ |
4543 | ctrl_ext = er32(CTRL_EXT); | 4543 | ctrl_ext = er32(CTRL_EXT); |
4544 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | 4544 | ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA; |
4545 | ew32(CTRL_EXT, ctrl_ext); | 4545 | ew32(CTRL_EXT, ctrl_ext); |
4546 | } | 4546 | } |
4547 | 4547 | ||
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c index 6407672b28e9..848e8407ea8f 100644 --- a/drivers/net/fec_mpc52xx.c +++ b/drivers/net/fec_mpc52xx.c | |||
@@ -85,11 +85,15 @@ MODULE_PARM_DESC(debug, "debugging messages level"); | |||
85 | 85 | ||
86 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) | 86 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) |
87 | { | 87 | { |
88 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | ||
89 | unsigned long flags; | ||
90 | |||
88 | dev_warn(&dev->dev, "transmit timed out\n"); | 91 | dev_warn(&dev->dev, "transmit timed out\n"); |
89 | 92 | ||
93 | spin_lock_irqsave(&priv->lock, flags); | ||
90 | mpc52xx_fec_reset(dev); | 94 | mpc52xx_fec_reset(dev); |
91 | |||
92 | dev->stats.tx_errors++; | 95 | dev->stats.tx_errors++; |
96 | spin_unlock_irqrestore(&priv->lock, flags); | ||
93 | 97 | ||
94 | netif_wake_queue(dev); | 98 | netif_wake_queue(dev); |
95 | } | 99 | } |
@@ -135,28 +139,32 @@ static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task | |||
135 | } | 139 | } |
136 | } | 140 | } |
137 | 141 | ||
142 | static void | ||
143 | mpc52xx_fec_rx_submit(struct net_device *dev, struct sk_buff *rskb) | ||
144 | { | ||
145 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | ||
146 | struct bcom_fec_bd *bd; | ||
147 | |||
148 | bd = (struct bcom_fec_bd *) bcom_prepare_next_buffer(priv->rx_dmatsk); | ||
149 | bd->status = FEC_RX_BUFFER_SIZE; | ||
150 | bd->skb_pa = dma_map_single(dev->dev.parent, rskb->data, | ||
151 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | ||
152 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | ||
153 | } | ||
154 | |||
138 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) | 155 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) |
139 | { | 156 | { |
140 | while (!bcom_queue_full(rxtsk)) { | 157 | struct sk_buff *skb; |
141 | struct sk_buff *skb; | ||
142 | struct bcom_fec_bd *bd; | ||
143 | 158 | ||
159 | while (!bcom_queue_full(rxtsk)) { | ||
144 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); | 160 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); |
145 | if (skb == NULL) | 161 | if (!skb) |
146 | return -EAGAIN; | 162 | return -EAGAIN; |
147 | 163 | ||
148 | /* zero out the initial receive buffers to aid debugging */ | 164 | /* zero out the initial receive buffers to aid debugging */ |
149 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); | 165 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); |
150 | 166 | mpc52xx_fec_rx_submit(dev, skb); | |
151 | bd = (struct bcom_fec_bd *)bcom_prepare_next_buffer(rxtsk); | ||
152 | |||
153 | bd->status = FEC_RX_BUFFER_SIZE; | ||
154 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, | ||
155 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | ||
156 | |||
157 | bcom_submit_next_buffer(rxtsk, skb); | ||
158 | } | 167 | } |
159 | |||
160 | return 0; | 168 | return 0; |
161 | } | 169 | } |
162 | 170 | ||
@@ -328,13 +336,12 @@ static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
328 | DMA_TO_DEVICE); | 336 | DMA_TO_DEVICE); |
329 | 337 | ||
330 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); | 338 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); |
339 | spin_unlock_irqrestore(&priv->lock, flags); | ||
331 | 340 | ||
332 | if (bcom_queue_full(priv->tx_dmatsk)) { | 341 | if (bcom_queue_full(priv->tx_dmatsk)) { |
333 | netif_stop_queue(dev); | 342 | netif_stop_queue(dev); |
334 | } | 343 | } |
335 | 344 | ||
336 | spin_unlock_irqrestore(&priv->lock, flags); | ||
337 | |||
338 | return NETDEV_TX_OK; | 345 | return NETDEV_TX_OK; |
339 | } | 346 | } |
340 | 347 | ||
@@ -359,9 +366,9 @@ static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |||
359 | { | 366 | { |
360 | struct net_device *dev = dev_id; | 367 | struct net_device *dev = dev_id; |
361 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | 368 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
369 | unsigned long flags; | ||
362 | 370 | ||
363 | spin_lock(&priv->lock); | 371 | spin_lock_irqsave(&priv->lock, flags); |
364 | |||
365 | while (bcom_buffer_done(priv->tx_dmatsk)) { | 372 | while (bcom_buffer_done(priv->tx_dmatsk)) { |
366 | struct sk_buff *skb; | 373 | struct sk_buff *skb; |
367 | struct bcom_fec_bd *bd; | 374 | struct bcom_fec_bd *bd; |
@@ -372,11 +379,10 @@ static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |||
372 | 379 | ||
373 | dev_kfree_skb_irq(skb); | 380 | dev_kfree_skb_irq(skb); |
374 | } | 381 | } |
382 | spin_unlock_irqrestore(&priv->lock, flags); | ||
375 | 383 | ||
376 | netif_wake_queue(dev); | 384 | netif_wake_queue(dev); |
377 | 385 | ||
378 | spin_unlock(&priv->lock); | ||
379 | |||
380 | return IRQ_HANDLED; | 386 | return IRQ_HANDLED; |
381 | } | 387 | } |
382 | 388 | ||
@@ -384,67 +390,60 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |||
384 | { | 390 | { |
385 | struct net_device *dev = dev_id; | 391 | struct net_device *dev = dev_id; |
386 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | 392 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
393 | struct sk_buff *rskb; /* received sk_buff */ | ||
394 | struct sk_buff *skb; /* new sk_buff to enqueue in its place */ | ||
395 | struct bcom_fec_bd *bd; | ||
396 | u32 status, physaddr; | ||
397 | int length; | ||
398 | unsigned long flags; | ||
399 | |||
400 | spin_lock_irqsave(&priv->lock, flags); | ||
387 | 401 | ||
388 | while (bcom_buffer_done(priv->rx_dmatsk)) { | 402 | while (bcom_buffer_done(priv->rx_dmatsk)) { |
389 | struct sk_buff *skb; | ||
390 | struct sk_buff *rskb; | ||
391 | struct bcom_fec_bd *bd; | ||
392 | u32 status; | ||
393 | 403 | ||
394 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | 404 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, |
395 | (struct bcom_bd **)&bd); | 405 | (struct bcom_bd **)&bd); |
396 | dma_unmap_single(dev->dev.parent, bd->skb_pa, rskb->len, | 406 | physaddr = bd->skb_pa; |
397 | DMA_FROM_DEVICE); | ||
398 | 407 | ||
399 | /* Test for errors in received frame */ | 408 | /* Test for errors in received frame */ |
400 | if (status & BCOM_FEC_RX_BD_ERRORS) { | 409 | if (status & BCOM_FEC_RX_BD_ERRORS) { |
401 | /* Drop packet and reuse the buffer */ | 410 | /* Drop packet and reuse the buffer */ |
402 | bd = (struct bcom_fec_bd *) | 411 | mpc52xx_fec_rx_submit(dev, rskb); |
403 | bcom_prepare_next_buffer(priv->rx_dmatsk); | ||
404 | |||
405 | bd->status = FEC_RX_BUFFER_SIZE; | ||
406 | bd->skb_pa = dma_map_single(dev->dev.parent, | ||
407 | rskb->data, | ||
408 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | ||
409 | |||
410 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | ||
411 | |||
412 | dev->stats.rx_dropped++; | 412 | dev->stats.rx_dropped++; |
413 | |||
414 | continue; | 413 | continue; |
415 | } | 414 | } |
416 | 415 | ||
417 | /* skbs are allocated on open, so now we allocate a new one, | 416 | /* skbs are allocated on open, so now we allocate a new one, |
418 | * and remove the old (with the packet) */ | 417 | * and remove the old (with the packet) */ |
419 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); | 418 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); |
420 | if (skb) { | 419 | if (!skb) { |
421 | /* Process the received skb */ | ||
422 | int length = status & BCOM_FEC_RX_BD_LEN_MASK; | ||
423 | |||
424 | skb_put(rskb, length - 4); /* length without CRC32 */ | ||
425 | |||
426 | rskb->dev = dev; | ||
427 | rskb->protocol = eth_type_trans(rskb, dev); | ||
428 | |||
429 | netif_rx(rskb); | ||
430 | } else { | ||
431 | /* Can't get a new one : reuse the same & drop pkt */ | 420 | /* Can't get a new one : reuse the same & drop pkt */ |
432 | dev_notice(&dev->dev, "Memory squeeze, dropping packet.\n"); | 421 | dev_notice(&dev->dev, "Low memory - dropped packet.\n"); |
422 | mpc52xx_fec_rx_submit(dev, rskb); | ||
433 | dev->stats.rx_dropped++; | 423 | dev->stats.rx_dropped++; |
434 | 424 | continue; | |
435 | skb = rskb; | ||
436 | } | 425 | } |
437 | 426 | ||
438 | bd = (struct bcom_fec_bd *) | 427 | /* Enqueue the new sk_buff back on the hardware */ |
439 | bcom_prepare_next_buffer(priv->rx_dmatsk); | 428 | mpc52xx_fec_rx_submit(dev, skb); |
440 | 429 | ||
441 | bd->status = FEC_RX_BUFFER_SIZE; | 430 | /* Process the received skb - Drop the spin lock while |
442 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, | 431 | * calling into the network stack */ |
443 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | 432 | spin_unlock_irqrestore(&priv->lock, flags); |
444 | 433 | ||
445 | bcom_submit_next_buffer(priv->rx_dmatsk, skb); | 434 | dma_unmap_single(dev->dev.parent, physaddr, rskb->len, |
435 | DMA_FROM_DEVICE); | ||
436 | length = status & BCOM_FEC_RX_BD_LEN_MASK; | ||
437 | skb_put(rskb, length - 4); /* length without CRC32 */ | ||
438 | rskb->dev = dev; | ||
439 | rskb->protocol = eth_type_trans(rskb, dev); | ||
440 | netif_rx(rskb); | ||
441 | |||
442 | spin_lock_irqsave(&priv->lock, flags); | ||
446 | } | 443 | } |
447 | 444 | ||
445 | spin_unlock_irqrestore(&priv->lock, flags); | ||
446 | |||
448 | return IRQ_HANDLED; | 447 | return IRQ_HANDLED; |
449 | } | 448 | } |
450 | 449 | ||
@@ -454,6 +453,7 @@ static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |||
454 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | 453 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
455 | struct mpc52xx_fec __iomem *fec = priv->fec; | 454 | struct mpc52xx_fec __iomem *fec = priv->fec; |
456 | u32 ievent; | 455 | u32 ievent; |
456 | unsigned long flags; | ||
457 | 457 | ||
458 | ievent = in_be32(&fec->ievent); | 458 | ievent = in_be32(&fec->ievent); |
459 | 459 | ||
@@ -471,9 +471,10 @@ static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |||
471 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) | 471 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) |
472 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); | 472 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); |
473 | 473 | ||
474 | spin_lock_irqsave(&priv->lock, flags); | ||
474 | mpc52xx_fec_reset(dev); | 475 | mpc52xx_fec_reset(dev); |
476 | spin_unlock_irqrestore(&priv->lock, flags); | ||
475 | 477 | ||
476 | netif_wake_queue(dev); | ||
477 | return IRQ_HANDLED; | 478 | return IRQ_HANDLED; |
478 | } | 479 | } |
479 | 480 | ||
@@ -768,6 +769,8 @@ static void mpc52xx_fec_reset(struct net_device *dev) | |||
768 | bcom_enable(priv->tx_dmatsk); | 769 | bcom_enable(priv->tx_dmatsk); |
769 | 770 | ||
770 | mpc52xx_fec_start(dev); | 771 | mpc52xx_fec_start(dev); |
772 | |||
773 | netif_wake_queue(dev); | ||
771 | } | 774 | } |
772 | 775 | ||
773 | 776 | ||
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 16def131c390..6850dc0a7b91 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -2644,6 +2644,7 @@ static void gfar_netpoll(struct net_device *dev) | |||
2644 | gfar_interrupt(priv->gfargrp[i].interruptTransmit, | 2644 | gfar_interrupt(priv->gfargrp[i].interruptTransmit, |
2645 | &priv->gfargrp[i]); | 2645 | &priv->gfargrp[i]); |
2646 | enable_irq(priv->gfargrp[i].interruptTransmit); | 2646 | enable_irq(priv->gfargrp[i].interruptTransmit); |
2647 | } | ||
2647 | } | 2648 | } |
2648 | } | 2649 | } |
2649 | #endif | 2650 | #endif |
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index 72106898a5cb..538340527aa6 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c | |||
@@ -342,6 +342,7 @@ static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) | |||
342 | case IXGBE_DEV_ID_82599_KX4: | 342 | case IXGBE_DEV_ID_82599_KX4: |
343 | case IXGBE_DEV_ID_82599_KX4_MEZZ: | 343 | case IXGBE_DEV_ID_82599_KX4_MEZZ: |
344 | case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: | 344 | case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: |
345 | case IXGBE_DEV_ID_82599_KR: | ||
345 | case IXGBE_DEV_ID_82599_XAUI_LOM: | 346 | case IXGBE_DEV_ID_82599_XAUI_LOM: |
346 | /* Default device ID is mezzanine card KX/KX4 */ | 347 | /* Default device ID is mezzanine card KX/KX4 */ |
347 | media_type = ixgbe_media_type_backplane; | 348 | media_type = ixgbe_media_type_backplane; |
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index 06a9d18bbdbc..0bd49d3b9f65 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -990,6 +990,7 @@ static void ixgbe_get_ethtool_stats(struct net_device *netdev, | |||
990 | char *p = NULL; | 990 | char *p = NULL; |
991 | 991 | ||
992 | ixgbe_update_stats(adapter); | 992 | ixgbe_update_stats(adapter); |
993 | dev_get_stats(netdev); | ||
993 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { | 994 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { |
994 | switch (ixgbe_gstrings_stats[i].type) { | 995 | switch (ixgbe_gstrings_stats[i].type) { |
995 | case NETDEV_STATS: | 996 | case NETDEV_STATS: |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 247ed2a24769..35ea8c93fd80 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -96,6 +96,8 @@ static struct pci_device_id ixgbe_pci_tbl[] = { | |||
96 | board_82599 }, | 96 | board_82599 }, |
97 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), | 97 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), |
98 | board_82599 }, | 98 | board_82599 }, |
99 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), | ||
100 | board_82599 }, | ||
99 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), | 101 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), |
100 | board_82599 }, | 102 | board_82599 }, |
101 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), | 103 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), |
@@ -435,8 +437,6 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, | |||
435 | tx_ring->total_packets += total_packets; | 437 | tx_ring->total_packets += total_packets; |
436 | tx_ring->stats.packets += total_packets; | 438 | tx_ring->stats.packets += total_packets; |
437 | tx_ring->stats.bytes += total_bytes; | 439 | tx_ring->stats.bytes += total_bytes; |
438 | netdev->stats.tx_bytes += total_bytes; | ||
439 | netdev->stats.tx_packets += total_packets; | ||
440 | return (count < tx_ring->work_limit); | 440 | return (count < tx_ring->work_limit); |
441 | } | 441 | } |
442 | 442 | ||
@@ -5327,6 +5327,7 @@ static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, | |||
5327 | { | 5327 | { |
5328 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 5328 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
5329 | struct ixgbe_ring *tx_ring; | 5329 | struct ixgbe_ring *tx_ring; |
5330 | struct netdev_queue *txq; | ||
5330 | unsigned int first; | 5331 | unsigned int first; |
5331 | unsigned int tx_flags = 0; | 5332 | unsigned int tx_flags = 0; |
5332 | u8 hdr_len = 0; | 5333 | u8 hdr_len = 0; |
@@ -5424,6 +5425,9 @@ static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, | |||
5424 | tx_ring->atr_count = 0; | 5425 | tx_ring->atr_count = 0; |
5425 | } | 5426 | } |
5426 | } | 5427 | } |
5428 | txq = netdev_get_tx_queue(netdev, tx_ring->queue_index); | ||
5429 | txq->tx_bytes += skb->len; | ||
5430 | txq->tx_packets++; | ||
5427 | ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len, | 5431 | ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len, |
5428 | hdr_len); | 5432 | hdr_len); |
5429 | ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); | 5433 | ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED); |
@@ -5438,19 +5442,6 @@ static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, | |||
5438 | } | 5442 | } |
5439 | 5443 | ||
5440 | /** | 5444 | /** |
5441 | * ixgbe_get_stats - Get System Network Statistics | ||
5442 | * @netdev: network interface device structure | ||
5443 | * | ||
5444 | * Returns the address of the device statistics structure. | ||
5445 | * The statistics are actually updated from the timer callback. | ||
5446 | **/ | ||
5447 | static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev) | ||
5448 | { | ||
5449 | /* only return the current stats */ | ||
5450 | return &netdev->stats; | ||
5451 | } | ||
5452 | |||
5453 | /** | ||
5454 | * ixgbe_set_mac - Change the Ethernet Address of the NIC | 5445 | * ixgbe_set_mac - Change the Ethernet Address of the NIC |
5455 | * @netdev: network interface device structure | 5446 | * @netdev: network interface device structure |
5456 | * @p: pointer to an address structure | 5447 | * @p: pointer to an address structure |
@@ -5580,7 +5571,6 @@ static const struct net_device_ops ixgbe_netdev_ops = { | |||
5580 | .ndo_stop = ixgbe_close, | 5571 | .ndo_stop = ixgbe_close, |
5581 | .ndo_start_xmit = ixgbe_xmit_frame, | 5572 | .ndo_start_xmit = ixgbe_xmit_frame, |
5582 | .ndo_select_queue = ixgbe_select_queue, | 5573 | .ndo_select_queue = ixgbe_select_queue, |
5583 | .ndo_get_stats = ixgbe_get_stats, | ||
5584 | .ndo_set_rx_mode = ixgbe_set_rx_mode, | 5574 | .ndo_set_rx_mode = ixgbe_set_rx_mode, |
5585 | .ndo_set_multicast_list = ixgbe_set_rx_mode, | 5575 | .ndo_set_multicast_list = ixgbe_set_rx_mode, |
5586 | .ndo_validate_addr = eth_validate_addr, | 5576 | .ndo_validate_addr = eth_validate_addr, |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 21b6633da578..f3e8d52610b7 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -50,6 +50,7 @@ | |||
50 | #define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 | 50 | #define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 |
51 | #define IXGBE_DEV_ID_82599_KX4 0x10F7 | 51 | #define IXGBE_DEV_ID_82599_KX4 0x10F7 |
52 | #define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514 | 52 | #define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514 |
53 | #define IXGBE_DEV_ID_82599_KR 0x1517 | ||
53 | #define IXGBE_DEV_ID_82599_CX4 0x10F9 | 54 | #define IXGBE_DEV_ID_82599_CX4 0x10F9 |
54 | #define IXGBE_DEV_ID_82599_SFP 0x10FB | 55 | #define IXGBE_DEV_ID_82599_SFP 0x10FB |
55 | #define IXGBE_DEV_ID_82599_SFP_EM 0x1507 | 56 | #define IXGBE_DEV_ID_82599_SFP_EM 0x1507 |
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 796a493f95ab..1405a170bb43 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -1827,6 +1827,9 @@ static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr) | |||
1827 | { | 1827 | { |
1828 | struct sockaddr *sa = addr; | 1828 | struct sockaddr *sa = addr; |
1829 | 1829 | ||
1830 | if (!is_valid_ether_addr(sa->sa_data)) | ||
1831 | return -EINVAL; | ||
1832 | |||
1830 | memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); | 1833 | memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); |
1831 | 1834 | ||
1832 | netif_addr_lock_bh(dev); | 1835 | netif_addr_lock_bh(dev); |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index d38921906bb7..3fcb1c356e0d 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -75,7 +75,7 @@ | |||
75 | #include "myri10ge_mcp.h" | 75 | #include "myri10ge_mcp.h" |
76 | #include "myri10ge_mcp_gen_header.h" | 76 | #include "myri10ge_mcp_gen_header.h" |
77 | 77 | ||
78 | #define MYRI10GE_VERSION_STR "1.5.1-1.451" | 78 | #define MYRI10GE_VERSION_STR "1.5.1-1.453" |
79 | 79 | ||
80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); | 80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); |
81 | MODULE_AUTHOR("Maintainer: help@myri.com"); | 81 | MODULE_AUTHOR("Maintainer: help@myri.com"); |
@@ -347,7 +347,7 @@ static int myri10ge_max_slices = 1; | |||
347 | module_param(myri10ge_max_slices, int, S_IRUGO); | 347 | module_param(myri10ge_max_slices, int, S_IRUGO); |
348 | MODULE_PARM_DESC(myri10ge_max_slices, "Max tx/rx queues"); | 348 | MODULE_PARM_DESC(myri10ge_max_slices, "Max tx/rx queues"); |
349 | 349 | ||
350 | static int myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT; | 350 | static int myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_DST_PORT; |
351 | module_param(myri10ge_rss_hash, int, S_IRUGO); | 351 | module_param(myri10ge_rss_hash, int, S_IRUGO); |
352 | MODULE_PARM_DESC(myri10ge_rss_hash, "Type of RSS hashing to do"); | 352 | MODULE_PARM_DESC(myri10ge_rss_hash, "Type of RSS hashing to do"); |
353 | 353 | ||
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index 80a667460514..02f8d4b4db63 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -619,17 +619,20 @@ nx_set_product_offs(struct netxen_adapter *adapter) | |||
619 | uint32_t i; | 619 | uint32_t i; |
620 | __le32 entries; | 620 | __le32 entries; |
621 | 621 | ||
622 | int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ? | ||
623 | 1 : netxen_p3_has_mn(adapter); | ||
624 | |||
622 | ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); | 625 | ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL); |
623 | if (ptab_descr == NULL) | 626 | if (ptab_descr == NULL) |
624 | return -1; | 627 | return -1; |
625 | 628 | ||
626 | entries = cpu_to_le32(ptab_descr->num_entries); | 629 | entries = cpu_to_le32(ptab_descr->num_entries); |
627 | 630 | ||
631 | nomn: | ||
628 | for (i = 0; i < entries; i++) { | 632 | for (i = 0; i < entries; i++) { |
629 | 633 | ||
630 | __le32 flags, file_chiprev, offs; | 634 | __le32 flags, file_chiprev, offs; |
631 | u8 chiprev = adapter->ahw.revision_id; | 635 | u8 chiprev = adapter->ahw.revision_id; |
632 | int mn_present = netxen_p3_has_mn(adapter); | ||
633 | uint32_t flagbit; | 636 | uint32_t flagbit; |
634 | 637 | ||
635 | offs = cpu_to_le32(ptab_descr->findex) + | 638 | offs = cpu_to_le32(ptab_descr->findex) + |
@@ -647,6 +650,11 @@ nx_set_product_offs(struct netxen_adapter *adapter) | |||
647 | } | 650 | } |
648 | } | 651 | } |
649 | 652 | ||
653 | if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | ||
654 | mn_present = 0; | ||
655 | goto nomn; | ||
656 | } | ||
657 | |||
650 | return -1; | 658 | return -1; |
651 | } | 659 | } |
652 | 660 | ||
@@ -1021,6 +1029,10 @@ netxen_p3_has_mn(struct netxen_adapter *adapter) | |||
1021 | u32 capability, flashed_ver; | 1029 | u32 capability, flashed_ver; |
1022 | capability = 0; | 1030 | capability = 0; |
1023 | 1031 | ||
1032 | /* NX2031 always had MN */ | ||
1033 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) | ||
1034 | return 1; | ||
1035 | |||
1024 | netxen_rom_fast_read(adapter, | 1036 | netxen_rom_fast_read(adapter, |
1025 | NX_FW_VERSION_OFFSET, (int *)&flashed_ver); | 1037 | NX_FW_VERSION_OFFSET, (int *)&flashed_ver); |
1026 | flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); | 1038 | flashed_ver = NETXEN_DECODE_VERSION(flashed_ver); |
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index e5d187fce51b..f4996846a234 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -946,8 +946,9 @@ netxen_nic_init_coalesce_defaults(struct netxen_adapter *adapter) | |||
946 | NETXEN_DEFAULT_INTR_COALESCE_TX_PACKETS; | 946 | NETXEN_DEFAULT_INTR_COALESCE_TX_PACKETS; |
947 | } | 947 | } |
948 | 948 | ||
949 | /* with rtnl_lock */ | ||
949 | static int | 950 | static int |
950 | netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | 951 | __netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) |
951 | { | 952 | { |
952 | int err; | 953 | int err; |
953 | 954 | ||
@@ -988,14 +989,32 @@ netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | |||
988 | return 0; | 989 | return 0; |
989 | } | 990 | } |
990 | 991 | ||
992 | /* Usage: During resume and firmware recovery module.*/ | ||
993 | |||
994 | static inline int | ||
995 | netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | ||
996 | { | ||
997 | int err = 0; | ||
998 | |||
999 | rtnl_lock(); | ||
1000 | if (netif_running(netdev)) | ||
1001 | err = __netxen_nic_up(adapter, netdev); | ||
1002 | rtnl_unlock(); | ||
1003 | |||
1004 | return err; | ||
1005 | } | ||
1006 | |||
1007 | /* with rtnl_lock */ | ||
991 | static void | 1008 | static void |
992 | netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | 1009 | __netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) |
993 | { | 1010 | { |
994 | if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) | 1011 | if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) |
995 | return; | 1012 | return; |
996 | 1013 | ||
997 | clear_bit(__NX_DEV_UP, &adapter->state); | 1014 | if (!test_and_clear_bit(__NX_DEV_UP, &adapter->state)) |
1015 | return; | ||
998 | 1016 | ||
1017 | smp_mb(); | ||
999 | spin_lock(&adapter->tx_clean_lock); | 1018 | spin_lock(&adapter->tx_clean_lock); |
1000 | netif_carrier_off(netdev); | 1019 | netif_carrier_off(netdev); |
1001 | netif_tx_disable(netdev); | 1020 | netif_tx_disable(netdev); |
@@ -1014,6 +1033,17 @@ netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | |||
1014 | spin_unlock(&adapter->tx_clean_lock); | 1033 | spin_unlock(&adapter->tx_clean_lock); |
1015 | } | 1034 | } |
1016 | 1035 | ||
1036 | /* Usage: During suspend and firmware recovery module */ | ||
1037 | |||
1038 | static inline void | ||
1039 | netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | ||
1040 | { | ||
1041 | rtnl_lock(); | ||
1042 | if (netif_running(netdev)) | ||
1043 | __netxen_nic_down(adapter, netdev); | ||
1044 | rtnl_unlock(); | ||
1045 | |||
1046 | } | ||
1017 | 1047 | ||
1018 | static int | 1048 | static int |
1019 | netxen_nic_attach(struct netxen_adapter *adapter) | 1049 | netxen_nic_attach(struct netxen_adapter *adapter) |
@@ -1122,14 +1152,14 @@ netxen_nic_reset_context(struct netxen_adapter *adapter) | |||
1122 | netif_device_detach(netdev); | 1152 | netif_device_detach(netdev); |
1123 | 1153 | ||
1124 | if (netif_running(netdev)) | 1154 | if (netif_running(netdev)) |
1125 | netxen_nic_down(adapter, netdev); | 1155 | __netxen_nic_down(adapter, netdev); |
1126 | 1156 | ||
1127 | netxen_nic_detach(adapter); | 1157 | netxen_nic_detach(adapter); |
1128 | 1158 | ||
1129 | if (netif_running(netdev)) { | 1159 | if (netif_running(netdev)) { |
1130 | err = netxen_nic_attach(adapter); | 1160 | err = netxen_nic_attach(adapter); |
1131 | if (!err) | 1161 | if (!err) |
1132 | err = netxen_nic_up(adapter, netdev); | 1162 | err = __netxen_nic_up(adapter, netdev); |
1133 | 1163 | ||
1134 | if (err) | 1164 | if (err) |
1135 | goto done; | 1165 | goto done; |
@@ -1499,7 +1529,7 @@ static int netxen_nic_open(struct net_device *netdev) | |||
1499 | if (err) | 1529 | if (err) |
1500 | return err; | 1530 | return err; |
1501 | 1531 | ||
1502 | err = netxen_nic_up(adapter, netdev); | 1532 | err = __netxen_nic_up(adapter, netdev); |
1503 | if (err) | 1533 | if (err) |
1504 | goto err_out; | 1534 | goto err_out; |
1505 | 1535 | ||
@@ -1519,7 +1549,7 @@ static int netxen_nic_close(struct net_device *netdev) | |||
1519 | { | 1549 | { |
1520 | struct netxen_adapter *adapter = netdev_priv(netdev); | 1550 | struct netxen_adapter *adapter = netdev_priv(netdev); |
1521 | 1551 | ||
1522 | netxen_nic_down(adapter, netdev); | 1552 | __netxen_nic_down(adapter, netdev); |
1523 | return 0; | 1553 | return 0; |
1524 | } | 1554 | } |
1525 | 1555 | ||
@@ -2025,7 +2055,7 @@ static int netxen_nic_poll(struct napi_struct *napi, int budget) | |||
2025 | 2055 | ||
2026 | if ((work_done < budget) && tx_complete) { | 2056 | if ((work_done < budget) && tx_complete) { |
2027 | napi_complete(&sds_ring->napi); | 2057 | napi_complete(&sds_ring->napi); |
2028 | if (netif_running(adapter->netdev)) | 2058 | if (test_bit(__NX_DEV_UP, &adapter->state)) |
2029 | netxen_nic_enable_int(sds_ring); | 2059 | netxen_nic_enable_int(sds_ring); |
2030 | } | 2060 | } |
2031 | 2061 | ||
@@ -2210,8 +2240,7 @@ netxen_detach_work(struct work_struct *work) | |||
2210 | 2240 | ||
2211 | netif_device_detach(netdev); | 2241 | netif_device_detach(netdev); |
2212 | 2242 | ||
2213 | if (netif_running(netdev)) | 2243 | netxen_nic_down(adapter, netdev); |
2214 | netxen_nic_down(adapter, netdev); | ||
2215 | 2244 | ||
2216 | netxen_nic_detach(adapter); | 2245 | netxen_nic_detach(adapter); |
2217 | 2246 | ||
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 044e6817986f..89a05d674ddc 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -2152,7 +2152,9 @@ static void sky2_qlink_intr(struct sky2_hw *hw) | |||
2152 | 2152 | ||
2153 | /* reset PHY Link Detect */ | 2153 | /* reset PHY Link Detect */ |
2154 | phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); | 2154 | phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); |
2155 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2155 | sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); | 2156 | sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); |
2157 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2156 | 2158 | ||
2157 | sky2_link_up(sky2); | 2159 | sky2_link_up(sky2); |
2158 | } | 2160 | } |
@@ -2968,8 +2970,13 @@ static int __devinit sky2_init(struct sky2_hw *hw) | |||
2968 | break; | 2970 | break; |
2969 | 2971 | ||
2970 | case CHIP_ID_YUKON_UL_2: | 2972 | case CHIP_ID_YUKON_UL_2: |
2973 | hw->flags = SKY2_HW_GIGABIT | ||
2974 | | SKY2_HW_ADV_POWER_CTL; | ||
2975 | break; | ||
2976 | |||
2971 | case CHIP_ID_YUKON_OPT: | 2977 | case CHIP_ID_YUKON_OPT: |
2972 | hw->flags = SKY2_HW_GIGABIT | 2978 | hw->flags = SKY2_HW_GIGABIT |
2979 | | SKY2_HW_NEW_LE | ||
2973 | | SKY2_HW_ADV_POWER_CTL; | 2980 | | SKY2_HW_ADV_POWER_CTL; |
2974 | break; | 2981 | break; |
2975 | 2982 | ||
@@ -3077,6 +3084,7 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3077 | reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; | 3084 | reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; |
3078 | 3085 | ||
3079 | /* reset PHY Link Detect */ | 3086 | /* reset PHY Link Detect */ |
3087 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
3080 | sky2_pci_write16(hw, PSM_CONFIG_REG4, | 3088 | sky2_pci_write16(hw, PSM_CONFIG_REG4, |
3081 | reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); | 3089 | reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); |
3082 | sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); | 3090 | sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); |
@@ -3094,6 +3102,7 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3094 | /* restore the PCIe Link Control register */ | 3102 | /* restore the PCIe Link Control register */ |
3095 | sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); | 3103 | sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); |
3096 | } | 3104 | } |
3105 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
3097 | 3106 | ||
3098 | /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ | 3107 | /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ |
3099 | sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); | 3108 | sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); |
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index ae4983a5127d..ea4fae79d6ec 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c | |||
@@ -534,9 +534,9 @@ static inline void smc_rcv(struct net_device *dev) | |||
534 | #define smc_special_lock(lock, flags) spin_lock_irqsave(lock, flags) | 534 | #define smc_special_lock(lock, flags) spin_lock_irqsave(lock, flags) |
535 | #define smc_special_unlock(lock, flags) spin_unlock_irqrestore(lock, flags) | 535 | #define smc_special_unlock(lock, flags) spin_unlock_irqrestore(lock, flags) |
536 | #else | 536 | #else |
537 | #define smc_special_trylock(lock, flags) (1) | 537 | #define smc_special_trylock(lock, flags) (flags == flags) |
538 | #define smc_special_lock(lock, flags) do { } while (0) | 538 | #define smc_special_lock(lock, flags) do { flags = 0; } while (0) |
539 | #define smc_special_unlock(lock, flags) do { } while (0) | 539 | #define smc_special_unlock(lock, flags) do { flags = 0; } while (0) |
540 | #endif | 540 | #endif |
541 | 541 | ||
542 | /* | 542 | /* |
@@ -2387,7 +2387,7 @@ static int smc_drv_resume(struct device *dev) | |||
2387 | 2387 | ||
2388 | if (ndev) { | 2388 | if (ndev) { |
2389 | struct smc_local *lp = netdev_priv(ndev); | 2389 | struct smc_local *lp = netdev_priv(ndev); |
2390 | smc_enable_device(dev); | 2390 | smc_enable_device(pdev); |
2391 | if (netif_running(ndev)) { | 2391 | if (netif_running(ndev)) { |
2392 | smc_reset(ndev); | 2392 | smc_reset(ndev); |
2393 | smc_enable(ndev); | 2393 | smc_enable(ndev); |
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index 81ea52c4faff..5d1c8677f180 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c | |||
@@ -97,6 +97,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah) | |||
97 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | 97 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; |
98 | int ret; | 98 | int ret; |
99 | u16 val; | 99 | u16 val; |
100 | u32 cksum, offset; | ||
100 | 101 | ||
101 | /* | 102 | /* |
102 | * Read values from EEPROM and store them in the capability structure | 103 | * Read values from EEPROM and store them in the capability structure |
@@ -111,7 +112,6 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah) | |||
111 | if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0) | 112 | if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0) |
112 | return 0; | 113 | return 0; |
113 | 114 | ||
114 | #ifdef notyet | ||
115 | /* | 115 | /* |
116 | * Validate the checksum of the EEPROM date. There are some | 116 | * Validate the checksum of the EEPROM date. There are some |
117 | * devices with invalid EEPROMs. | 117 | * devices with invalid EEPROMs. |
@@ -124,7 +124,6 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah) | |||
124 | ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); | 124 | ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); |
125 | return -EIO; | 125 | return -EIO; |
126 | } | 126 | } |
127 | #endif | ||
128 | 127 | ||
129 | AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version), | 128 | AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version), |
130 | ee_ant_gain); | 129 | ee_ant_gain); |
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c index d495890355d9..60f547503d75 100644 --- a/drivers/net/wireless/ath/ath5k/led.c +++ b/drivers/net/wireless/ath/ath5k/led.c | |||
@@ -79,6 +79,8 @@ static const struct pci_device_id ath5k_led_devices[] = { | |||
79 | { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, | 79 | { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, |
80 | /* IBM-specific AR5212 (all others) */ | 80 | /* IBM-specific AR5212 (all others) */ |
81 | { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) }, | 81 | { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) }, |
82 | /* Dell Vostro A860 (shahar@shahar-or.co.il) */ | ||
83 | { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0112), ATH_LED(3, 0) }, | ||
82 | { } | 84 | { } |
83 | }; | 85 | }; |
84 | 86 | ||
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 564c6cb1c2b4..2a11cc57ceea 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -2078,7 +2078,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
2078 | &txq->axq_q, lastbf->list.prev); | 2078 | &txq->axq_q, lastbf->list.prev); |
2079 | 2079 | ||
2080 | txq->axq_depth--; | 2080 | txq->axq_depth--; |
2081 | txok = (ds->ds_txstat.ts_status == 0); | 2081 | txok = !(ds->ds_txstat.ts_status & ATH9K_TXERR_FILT); |
2082 | txq->axq_tx_inprogress = false; | 2082 | txq->axq_tx_inprogress = false; |
2083 | spin_unlock_bh(&txq->axq_lock); | 2083 | spin_unlock_bh(&txq->axq_lock); |
2084 | 2084 | ||
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 71e5c996bd09..4c41cfe44f26 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -1784,7 +1784,10 @@ static void b43_do_interrupt_thread(struct b43_wldev *dev) | |||
1784 | dma_reason[0], dma_reason[1], | 1784 | dma_reason[0], dma_reason[1], |
1785 | dma_reason[2], dma_reason[3], | 1785 | dma_reason[2], dma_reason[3], |
1786 | dma_reason[4], dma_reason[5]); | 1786 | dma_reason[4], dma_reason[5]); |
1787 | b43_controller_restart(dev, "DMA error"); | 1787 | b43err(dev->wl, "This device does not support DMA " |
1788 | "on your system. Please use PIO instead.\n"); | ||
1789 | b43err(dev->wl, "CONFIG_B43_FORCE_PIO must be set in " | ||
1790 | "your kernel configuration.\n"); | ||
1788 | return; | 1791 | return; |
1789 | } | 1792 | } |
1790 | if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) { | 1793 | if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) { |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index 58b132f9cf28..00da5e152d46 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -1353,7 +1353,7 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid) | |||
1353 | if (priv->stations[sta_id].tid[tid].agg.state == | 1353 | if (priv->stations[sta_id].tid[tid].agg.state == |
1354 | IWL_EMPTYING_HW_QUEUE_ADDBA) { | 1354 | IWL_EMPTYING_HW_QUEUE_ADDBA) { |
1355 | IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); | 1355 | IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); |
1356 | ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid); | 1356 | ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, ra, tid); |
1357 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; | 1357 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; |
1358 | return 0; | 1358 | return 0; |
1359 | } | 1359 | } |
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c index 0cb5ecc822a8..59d49159cf2a 100644 --- a/drivers/net/wireless/mwl8k.c +++ b/drivers/net/wireless/mwl8k.c | |||
@@ -84,7 +84,8 @@ struct rxd_ops { | |||
84 | int rxd_size; | 84 | int rxd_size; |
85 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | 85 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); |
86 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | 86 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); |
87 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status); | 87 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
88 | __le16 *qos); | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | struct mwl8k_device_info { | 91 | struct mwl8k_device_info { |
@@ -184,7 +185,7 @@ struct mwl8k_priv { | |||
184 | /* PHY parameters */ | 185 | /* PHY parameters */ |
185 | struct ieee80211_supported_band band; | 186 | struct ieee80211_supported_band band; |
186 | struct ieee80211_channel channels[14]; | 187 | struct ieee80211_channel channels[14]; |
187 | struct ieee80211_rate rates[13]; | 188 | struct ieee80211_rate rates[14]; |
188 | 189 | ||
189 | bool radio_on; | 190 | bool radio_on; |
190 | bool radio_short_preamble; | 191 | bool radio_short_preamble; |
@@ -220,15 +221,6 @@ struct mwl8k_vif { | |||
220 | u8 bssid[ETH_ALEN]; | 221 | u8 bssid[ETH_ALEN]; |
221 | u8 mac_addr[ETH_ALEN]; | 222 | u8 mac_addr[ETH_ALEN]; |
222 | 223 | ||
223 | /* | ||
224 | * Subset of supported legacy rates. | ||
225 | * Intersection of AP and STA supported rates. | ||
226 | */ | ||
227 | struct ieee80211_rate legacy_rates[13]; | ||
228 | |||
229 | /* number of supported legacy rates */ | ||
230 | u8 legacy_nrates; | ||
231 | |||
232 | /* Index into station database.Returned by update_sta_db call */ | 224 | /* Index into station database.Returned by update_sta_db call */ |
233 | u8 peer_id; | 225 | u8 peer_id; |
234 | 226 | ||
@@ -266,6 +258,11 @@ static const struct ieee80211_rate mwl8k_rates[] = { | |||
266 | { .bitrate = 360, .hw_value = 72, }, | 258 | { .bitrate = 360, .hw_value = 72, }, |
267 | { .bitrate = 480, .hw_value = 96, }, | 259 | { .bitrate = 480, .hw_value = 96, }, |
268 | { .bitrate = 540, .hw_value = 108, }, | 260 | { .bitrate = 540, .hw_value = 108, }, |
261 | { .bitrate = 720, .hw_value = 144, }, | ||
262 | }; | ||
263 | |||
264 | static const u8 mwl8k_rateids[12] = { | ||
265 | 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108, | ||
269 | }; | 266 | }; |
270 | 267 | ||
271 | /* Set or get info from Firmware */ | 268 | /* Set or get info from Firmware */ |
@@ -574,7 +571,7 @@ static int mwl8k_load_firmware(struct ieee80211_hw *hw) | |||
574 | "helper image\n", pci_name(priv->pdev)); | 571 | "helper image\n", pci_name(priv->pdev)); |
575 | return rc; | 572 | return rc; |
576 | } | 573 | } |
577 | msleep(1); | 574 | msleep(5); |
578 | 575 | ||
579 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); | 576 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
580 | } else { | 577 | } else { |
@@ -591,9 +588,8 @@ static int mwl8k_load_firmware(struct ieee80211_hw *hw) | |||
591 | iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR); | 588 | iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR); |
592 | else | 589 | else |
593 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); | 590 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
594 | msleep(1); | ||
595 | 591 | ||
596 | loops = 200000; | 592 | loops = 500000; |
597 | do { | 593 | do { |
598 | u32 ready_code; | 594 | u32 ready_code; |
599 | 595 | ||
@@ -633,9 +629,6 @@ struct ewc_ht_info { | |||
633 | /* Peer Entry flags - used to define the type of the peer node */ | 629 | /* Peer Entry flags - used to define the type of the peer node */ |
634 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | 630 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 |
635 | 631 | ||
636 | #define MWL8K_IEEE_LEGACY_DATA_RATES 13 | ||
637 | #define MWL8K_MCS_BITMAP_SIZE 16 | ||
638 | |||
639 | struct peer_capability_info { | 632 | struct peer_capability_info { |
640 | /* Peer type - AP vs. STA. */ | 633 | /* Peer type - AP vs. STA. */ |
641 | __u8 peer_type; | 634 | __u8 peer_type; |
@@ -652,10 +645,10 @@ struct peer_capability_info { | |||
652 | struct ewc_ht_info ewc_info; | 645 | struct ewc_ht_info ewc_info; |
653 | 646 | ||
654 | /* Legacy rate table. Intersection of our rates and peer rates. */ | 647 | /* Legacy rate table. Intersection of our rates and peer rates. */ |
655 | __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES]; | 648 | __u8 legacy_rates[12]; |
656 | 649 | ||
657 | /* HT rate table. Intersection of our rates and peer rates. */ | 650 | /* HT rate table. Intersection of our rates and peer rates. */ |
658 | __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE]; | 651 | __u8 ht_rates[16]; |
659 | __u8 pad[16]; | 652 | __u8 pad[16]; |
660 | 653 | ||
661 | /* If set, interoperability mode, no proprietary extensions. */ | 654 | /* If set, interoperability mode, no proprietary extensions. */ |
@@ -706,55 +699,64 @@ static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len) | |||
706 | struct mwl8k_dma_data { | 699 | struct mwl8k_dma_data { |
707 | __le16 fwlen; | 700 | __le16 fwlen; |
708 | struct ieee80211_hdr wh; | 701 | struct ieee80211_hdr wh; |
702 | char data[0]; | ||
709 | } __attribute__((packed)); | 703 | } __attribute__((packed)); |
710 | 704 | ||
711 | /* Routines to add/remove DMA header from skb. */ | 705 | /* Routines to add/remove DMA header from skb. */ |
712 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb) | 706 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
713 | { | 707 | { |
714 | struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data; | 708 | struct mwl8k_dma_data *tr; |
715 | void *dst, *src = &tr->wh; | 709 | int hdrlen; |
716 | int hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | ||
717 | u16 space = sizeof(struct mwl8k_dma_data) - hdrlen; | ||
718 | 710 | ||
719 | dst = (void *)tr + space; | 711 | tr = (struct mwl8k_dma_data *)skb->data; |
720 | if (dst != src) { | 712 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); |
721 | memmove(dst, src, hdrlen); | 713 | |
722 | skb_pull(skb, space); | 714 | if (hdrlen != sizeof(tr->wh)) { |
715 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | ||
716 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | ||
717 | *((__le16 *)(tr->data - 2)) = qos; | ||
718 | } else { | ||
719 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | ||
720 | } | ||
723 | } | 721 | } |
722 | |||
723 | if (hdrlen != sizeof(*tr)) | ||
724 | skb_pull(skb, sizeof(*tr) - hdrlen); | ||
724 | } | 725 | } |
725 | 726 | ||
726 | static inline void mwl8k_add_dma_header(struct sk_buff *skb) | 727 | static inline void mwl8k_add_dma_header(struct sk_buff *skb) |
727 | { | 728 | { |
728 | struct ieee80211_hdr *wh; | 729 | struct ieee80211_hdr *wh; |
729 | u32 hdrlen, pktlen; | 730 | int hdrlen; |
730 | struct mwl8k_dma_data *tr; | 731 | struct mwl8k_dma_data *tr; |
731 | 732 | ||
733 | /* | ||
734 | * Add a firmware DMA header; the firmware requires that we | ||
735 | * present a 2-byte payload length followed by a 4-address | ||
736 | * header (without QoS field), followed (optionally) by any | ||
737 | * WEP/ExtIV header (but only filled in for CCMP). | ||
738 | */ | ||
732 | wh = (struct ieee80211_hdr *)skb->data; | 739 | wh = (struct ieee80211_hdr *)skb->data; |
740 | |||
733 | hdrlen = ieee80211_hdrlen(wh->frame_control); | 741 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
734 | pktlen = skb->len; | 742 | if (hdrlen != sizeof(*tr)) |
743 | skb_push(skb, sizeof(*tr) - hdrlen); | ||
735 | 744 | ||
736 | /* | 745 | if (ieee80211_is_data_qos(wh->frame_control)) |
737 | * Copy up/down the 802.11 header; the firmware requires | 746 | hdrlen -= 2; |
738 | * we present a 2-byte payload length followed by a | ||
739 | * 4-address header (w/o QoS), followed (optionally) by | ||
740 | * any WEP/ExtIV header (but only filled in for CCMP). | ||
741 | */ | ||
742 | if (hdrlen != sizeof(struct mwl8k_dma_data)) | ||
743 | skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen); | ||
744 | 747 | ||
745 | tr = (struct mwl8k_dma_data *)skb->data; | 748 | tr = (struct mwl8k_dma_data *)skb->data; |
746 | if (wh != &tr->wh) | 749 | if (wh != &tr->wh) |
747 | memmove(&tr->wh, wh, hdrlen); | 750 | memmove(&tr->wh, wh, hdrlen); |
748 | 751 | if (hdrlen != sizeof(tr->wh)) | |
749 | /* Clear addr4 */ | 752 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); |
750 | memset(tr->wh.addr4, 0, ETH_ALEN); | ||
751 | 753 | ||
752 | /* | 754 | /* |
753 | * Firmware length is the length of the fully formed "802.11 | 755 | * Firmware length is the length of the fully formed "802.11 |
754 | * payload". That is, everything except for the 802.11 header. | 756 | * payload". That is, everything except for the 802.11 header. |
755 | * This includes all crypto material including the MIC. | 757 | * This includes all crypto material including the MIC. |
756 | */ | 758 | */ |
757 | tr->fwlen = cpu_to_le16(pktlen - hdrlen); | 759 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr)); |
758 | } | 760 | } |
759 | 761 | ||
760 | 762 | ||
@@ -779,6 +781,10 @@ struct mwl8k_rxd_8366 { | |||
779 | __u8 rx_ctrl; | 781 | __u8 rx_ctrl; |
780 | } __attribute__((packed)); | 782 | } __attribute__((packed)); |
781 | 783 | ||
784 | #define MWL8K_8366_RATE_INFO_MCS_FORMAT 0x80 | ||
785 | #define MWL8K_8366_RATE_INFO_40MHZ 0x40 | ||
786 | #define MWL8K_8366_RATE_INFO_RATEID(x) ((x) & 0x3f) | ||
787 | |||
782 | #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80 | 788 | #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80 |
783 | 789 | ||
784 | static void mwl8k_rxd_8366_init(void *_rxd, dma_addr_t next_dma_addr) | 790 | static void mwl8k_rxd_8366_init(void *_rxd, dma_addr_t next_dma_addr) |
@@ -800,7 +806,8 @@ static void mwl8k_rxd_8366_refill(void *_rxd, dma_addr_t addr, int len) | |||
800 | } | 806 | } |
801 | 807 | ||
802 | static int | 808 | static int |
803 | mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status) | 809 | mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status, |
810 | __le16 *qos) | ||
804 | { | 811 | { |
805 | struct mwl8k_rxd_8366 *rxd = _rxd; | 812 | struct mwl8k_rxd_8366 *rxd = _rxd; |
806 | 813 | ||
@@ -813,9 +820,11 @@ mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status) | |||
813 | status->signal = -rxd->rssi; | 820 | status->signal = -rxd->rssi; |
814 | status->noise = -rxd->noise_floor; | 821 | status->noise = -rxd->noise_floor; |
815 | 822 | ||
816 | if (rxd->rate & 0x80) { | 823 | if (rxd->rate & MWL8K_8366_RATE_INFO_MCS_FORMAT) { |
817 | status->flag |= RX_FLAG_HT; | 824 | status->flag |= RX_FLAG_HT; |
818 | status->rate_idx = rxd->rate & 0x7f; | 825 | if (rxd->rate & MWL8K_8366_RATE_INFO_40MHZ) |
826 | status->flag |= RX_FLAG_40MHZ; | ||
827 | status->rate_idx = MWL8K_8366_RATE_INFO_RATEID(rxd->rate); | ||
819 | } else { | 828 | } else { |
820 | int i; | 829 | int i; |
821 | 830 | ||
@@ -830,6 +839,8 @@ mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status) | |||
830 | status->band = IEEE80211_BAND_2GHZ; | 839 | status->band = IEEE80211_BAND_2GHZ; |
831 | status->freq = ieee80211_channel_to_frequency(rxd->channel); | 840 | status->freq = ieee80211_channel_to_frequency(rxd->channel); |
832 | 841 | ||
842 | *qos = rxd->qos_control; | ||
843 | |||
833 | return le16_to_cpu(rxd->pkt_len); | 844 | return le16_to_cpu(rxd->pkt_len); |
834 | } | 845 | } |
835 | 846 | ||
@@ -888,7 +899,8 @@ static void mwl8k_rxd_8687_refill(void *_rxd, dma_addr_t addr, int len) | |||
888 | } | 899 | } |
889 | 900 | ||
890 | static int | 901 | static int |
891 | mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status) | 902 | mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status, |
903 | __le16 *qos) | ||
892 | { | 904 | { |
893 | struct mwl8k_rxd_8687 *rxd = _rxd; | 905 | struct mwl8k_rxd_8687 *rxd = _rxd; |
894 | u16 rate_info; | 906 | u16 rate_info; |
@@ -903,7 +915,6 @@ mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status) | |||
903 | 915 | ||
904 | status->signal = -rxd->rssi; | 916 | status->signal = -rxd->rssi; |
905 | status->noise = -rxd->noise_level; | 917 | status->noise = -rxd->noise_level; |
906 | status->qual = rxd->link_quality; | ||
907 | status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info); | 918 | status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info); |
908 | status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info); | 919 | status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info); |
909 | 920 | ||
@@ -919,6 +930,8 @@ mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status) | |||
919 | status->band = IEEE80211_BAND_2GHZ; | 930 | status->band = IEEE80211_BAND_2GHZ; |
920 | status->freq = ieee80211_channel_to_frequency(rxd->channel); | 931 | status->freq = ieee80211_channel_to_frequency(rxd->channel); |
921 | 932 | ||
933 | *qos = rxd->qos_control; | ||
934 | |||
922 | return le16_to_cpu(rxd->pkt_len); | 935 | return le16_to_cpu(rxd->pkt_len); |
923 | } | 936 | } |
924 | 937 | ||
@@ -1090,6 +1103,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit) | |||
1090 | void *rxd; | 1103 | void *rxd; |
1091 | int pkt_len; | 1104 | int pkt_len; |
1092 | struct ieee80211_rx_status status; | 1105 | struct ieee80211_rx_status status; |
1106 | __le16 qos; | ||
1093 | 1107 | ||
1094 | skb = rxq->buf[rxq->head].skb; | 1108 | skb = rxq->buf[rxq->head].skb; |
1095 | if (skb == NULL) | 1109 | if (skb == NULL) |
@@ -1097,7 +1111,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit) | |||
1097 | 1111 | ||
1098 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | 1112 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); |
1099 | 1113 | ||
1100 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status); | 1114 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos); |
1101 | if (pkt_len < 0) | 1115 | if (pkt_len < 0) |
1102 | break; | 1116 | break; |
1103 | 1117 | ||
@@ -1115,7 +1129,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit) | |||
1115 | rxq->rxd_count--; | 1129 | rxq->rxd_count--; |
1116 | 1130 | ||
1117 | skb_put(skb, pkt_len); | 1131 | skb_put(skb, pkt_len); |
1118 | mwl8k_remove_dma_header(skb); | 1132 | mwl8k_remove_dma_header(skb, qos); |
1119 | 1133 | ||
1120 | /* | 1134 | /* |
1121 | * Check for a pending join operation. Save a | 1135 | * Check for a pending join operation. Save a |
@@ -1221,99 +1235,106 @@ static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |||
1221 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | 1235 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); |
1222 | } | 1236 | } |
1223 | 1237 | ||
1224 | struct mwl8k_txq_info { | 1238 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
1225 | u32 fw_owned; | ||
1226 | u32 drv_owned; | ||
1227 | u32 unused; | ||
1228 | u32 len; | ||
1229 | u32 head; | ||
1230 | u32 tail; | ||
1231 | }; | ||
1232 | |||
1233 | static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv, | ||
1234 | struct mwl8k_txq_info *txinfo) | ||
1235 | { | 1239 | { |
1236 | int count, desc, status; | 1240 | struct mwl8k_priv *priv = hw->priv; |
1237 | struct mwl8k_tx_queue *txq; | 1241 | int i; |
1238 | struct mwl8k_tx_desc *tx_desc; | ||
1239 | int ndescs = 0; | ||
1240 | 1242 | ||
1241 | memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info)); | 1243 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { |
1244 | struct mwl8k_tx_queue *txq = priv->txq + i; | ||
1245 | int fw_owned = 0; | ||
1246 | int drv_owned = 0; | ||
1247 | int unused = 0; | ||
1248 | int desc; | ||
1242 | 1249 | ||
1243 | for (count = 0; count < MWL8K_TX_QUEUES; count++) { | ||
1244 | txq = priv->txq + count; | ||
1245 | txinfo[count].len = txq->stats.len; | ||
1246 | txinfo[count].head = txq->head; | ||
1247 | txinfo[count].tail = txq->tail; | ||
1248 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { | 1250 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
1249 | tx_desc = txq->txd + desc; | 1251 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1250 | status = le32_to_cpu(tx_desc->status); | 1252 | u32 status; |
1251 | 1253 | ||
1254 | status = le32_to_cpu(tx_desc->status); | ||
1252 | if (status & MWL8K_TXD_STATUS_FW_OWNED) | 1255 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
1253 | txinfo[count].fw_owned++; | 1256 | fw_owned++; |
1254 | else | 1257 | else |
1255 | txinfo[count].drv_owned++; | 1258 | drv_owned++; |
1256 | 1259 | ||
1257 | if (tx_desc->pkt_len == 0) | 1260 | if (tx_desc->pkt_len == 0) |
1258 | txinfo[count].unused++; | 1261 | unused++; |
1259 | } | 1262 | } |
1260 | } | ||
1261 | 1263 | ||
1262 | return ndescs; | 1264 | printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d " |
1265 | "fw_owned=%d drv_owned=%d unused=%d\n", | ||
1266 | wiphy_name(hw->wiphy), i, | ||
1267 | txq->stats.len, txq->head, txq->tail, | ||
1268 | fw_owned, drv_owned, unused); | ||
1269 | } | ||
1263 | } | 1270 | } |
1264 | 1271 | ||
1265 | /* | 1272 | /* |
1266 | * Must be called with priv->fw_mutex held and tx queues stopped. | 1273 | * Must be called with priv->fw_mutex held and tx queues stopped. |
1267 | */ | 1274 | */ |
1275 | #define MWL8K_TX_WAIT_TIMEOUT_MS 1000 | ||
1276 | |||
1268 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) | 1277 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
1269 | { | 1278 | { |
1270 | struct mwl8k_priv *priv = hw->priv; | 1279 | struct mwl8k_priv *priv = hw->priv; |
1271 | DECLARE_COMPLETION_ONSTACK(tx_wait); | 1280 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
1272 | u32 count; | 1281 | int retry; |
1273 | unsigned long timeout; | 1282 | int rc; |
1274 | 1283 | ||
1275 | might_sleep(); | 1284 | might_sleep(); |
1276 | 1285 | ||
1286 | /* | ||
1287 | * The TX queues are stopped at this point, so this test | ||
1288 | * doesn't need to take ->tx_lock. | ||
1289 | */ | ||
1290 | if (!priv->pending_tx_pkts) | ||
1291 | return 0; | ||
1292 | |||
1293 | retry = 0; | ||
1294 | rc = 0; | ||
1295 | |||
1277 | spin_lock_bh(&priv->tx_lock); | 1296 | spin_lock_bh(&priv->tx_lock); |
1278 | count = priv->pending_tx_pkts; | 1297 | priv->tx_wait = &tx_wait; |
1279 | if (count) | 1298 | while (!rc) { |
1280 | priv->tx_wait = &tx_wait; | 1299 | int oldcount; |
1281 | spin_unlock_bh(&priv->tx_lock); | 1300 | unsigned long timeout; |
1282 | 1301 | ||
1283 | if (count) { | 1302 | oldcount = priv->pending_tx_pkts; |
1284 | struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES]; | ||
1285 | int index; | ||
1286 | int newcount; | ||
1287 | 1303 | ||
1304 | spin_unlock_bh(&priv->tx_lock); | ||
1288 | timeout = wait_for_completion_timeout(&tx_wait, | 1305 | timeout = wait_for_completion_timeout(&tx_wait, |
1289 | msecs_to_jiffies(5000)); | 1306 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
1290 | if (timeout) | ||
1291 | return 0; | ||
1292 | |||
1293 | spin_lock_bh(&priv->tx_lock); | 1307 | spin_lock_bh(&priv->tx_lock); |
1294 | priv->tx_wait = NULL; | ||
1295 | newcount = priv->pending_tx_pkts; | ||
1296 | mwl8k_scan_tx_ring(priv, txinfo); | ||
1297 | spin_unlock_bh(&priv->tx_lock); | ||
1298 | 1308 | ||
1299 | printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n", | 1309 | if (timeout) { |
1300 | __func__, __LINE__, count, newcount); | 1310 | WARN_ON(priv->pending_tx_pkts); |
1311 | if (retry) { | ||
1312 | printk(KERN_NOTICE "%s: tx rings drained\n", | ||
1313 | wiphy_name(hw->wiphy)); | ||
1314 | } | ||
1315 | break; | ||
1316 | } | ||
1301 | 1317 | ||
1302 | for (index = 0; index < MWL8K_TX_QUEUES; index++) | 1318 | if (priv->pending_tx_pkts < oldcount) { |
1303 | printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u " | 1319 | printk(KERN_NOTICE "%s: timeout waiting for tx " |
1304 | "DRV:%u U:%u\n", | 1320 | "rings to drain (%d -> %d pkts), retrying\n", |
1305 | index, | 1321 | wiphy_name(hw->wiphy), oldcount, |
1306 | txinfo[index].len, | 1322 | priv->pending_tx_pkts); |
1307 | txinfo[index].head, | 1323 | retry = 1; |
1308 | txinfo[index].tail, | 1324 | continue; |
1309 | txinfo[index].fw_owned, | 1325 | } |
1310 | txinfo[index].drv_owned, | ||
1311 | txinfo[index].unused); | ||
1312 | 1326 | ||
1313 | return -ETIMEDOUT; | 1327 | priv->tx_wait = NULL; |
1328 | |||
1329 | printk(KERN_ERR "%s: tx rings stuck for %d ms\n", | ||
1330 | wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS); | ||
1331 | mwl8k_dump_tx_rings(hw); | ||
1332 | |||
1333 | rc = -ETIMEDOUT; | ||
1314 | } | 1334 | } |
1335 | spin_unlock_bh(&priv->tx_lock); | ||
1315 | 1336 | ||
1316 | return 0; | 1337 | return rc; |
1317 | } | 1338 | } |
1318 | 1339 | ||
1319 | #define MWL8K_TXD_SUCCESS(status) \ | 1340 | #define MWL8K_TXD_SUCCESS(status) \ |
@@ -1361,7 +1382,7 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force) | |||
1361 | BUG_ON(skb == NULL); | 1382 | BUG_ON(skb == NULL); |
1362 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | 1383 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); |
1363 | 1384 | ||
1364 | mwl8k_remove_dma_header(skb); | 1385 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
1365 | 1386 | ||
1366 | /* Mark descriptor as unused */ | 1387 | /* Mark descriptor as unused */ |
1367 | tx_desc->pkt_phys_addr = 0; | 1388 | tx_desc->pkt_phys_addr = 0; |
@@ -1563,8 +1584,8 @@ static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |||
1563 | * Command processing. | 1584 | * Command processing. |
1564 | */ | 1585 | */ |
1565 | 1586 | ||
1566 | /* Timeout firmware commands after 2000ms */ | 1587 | /* Timeout firmware commands after 10s */ |
1567 | #define MWL8K_CMD_TIMEOUT_MS 2000 | 1588 | #define MWL8K_CMD_TIMEOUT_MS 10000 |
1568 | 1589 | ||
1569 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | 1590 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) |
1570 | { | 1591 | { |
@@ -1615,12 +1636,21 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |||
1615 | MWL8K_CMD_TIMEOUT_MS); | 1636 | MWL8K_CMD_TIMEOUT_MS); |
1616 | rc = -ETIMEDOUT; | 1637 | rc = -ETIMEDOUT; |
1617 | } else { | 1638 | } else { |
1639 | int ms; | ||
1640 | |||
1641 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | ||
1642 | |||
1618 | rc = cmd->result ? -EINVAL : 0; | 1643 | rc = cmd->result ? -EINVAL : 0; |
1619 | if (rc) | 1644 | if (rc) |
1620 | printk(KERN_ERR "%s: Command %s error 0x%x\n", | 1645 | printk(KERN_ERR "%s: Command %s error 0x%x\n", |
1621 | wiphy_name(hw->wiphy), | 1646 | wiphy_name(hw->wiphy), |
1622 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), | 1647 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1623 | le16_to_cpu(cmd->result)); | 1648 | le16_to_cpu(cmd->result)); |
1649 | else if (ms > 2000) | ||
1650 | printk(KERN_NOTICE "%s: Command %s took %d ms\n", | ||
1651 | wiphy_name(hw->wiphy), | ||
1652 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), | ||
1653 | ms); | ||
1624 | } | 1654 | } |
1625 | 1655 | ||
1626 | return rc; | 1656 | return rc; |
@@ -2439,8 +2469,6 @@ mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, | |||
2439 | /* | 2469 | /* |
2440 | * CMD_FINALIZE_JOIN. | 2470 | * CMD_FINALIZE_JOIN. |
2441 | */ | 2471 | */ |
2442 | |||
2443 | /* FJ beacon buffer size is compiled into the firmware. */ | ||
2444 | #define MWL8K_FJ_BEACON_MAXLEN 128 | 2472 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
2445 | 2473 | ||
2446 | struct mwl8k_cmd_finalize_join { | 2474 | struct mwl8k_cmd_finalize_join { |
@@ -2450,17 +2478,13 @@ struct mwl8k_cmd_finalize_join { | |||
2450 | } __attribute__((packed)); | 2478 | } __attribute__((packed)); |
2451 | 2479 | ||
2452 | static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame, | 2480 | static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame, |
2453 | __u16 framelen, __u16 dtim) | 2481 | int framelen, int dtim) |
2454 | { | 2482 | { |
2455 | struct mwl8k_cmd_finalize_join *cmd; | 2483 | struct mwl8k_cmd_finalize_join *cmd; |
2456 | struct ieee80211_mgmt *payload = frame; | 2484 | struct ieee80211_mgmt *payload = frame; |
2457 | u16 hdrlen; | 2485 | int payload_len; |
2458 | u32 payload_len; | ||
2459 | int rc; | 2486 | int rc; |
2460 | 2487 | ||
2461 | if (frame == NULL) | ||
2462 | return -EINVAL; | ||
2463 | |||
2464 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | 2488 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2465 | if (cmd == NULL) | 2489 | if (cmd == NULL) |
2466 | return -ENOMEM; | 2490 | return -ENOMEM; |
@@ -2469,24 +2493,17 @@ static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame, | |||
2469 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | 2493 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
2470 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); | 2494 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
2471 | 2495 | ||
2472 | hdrlen = ieee80211_hdrlen(payload->frame_control); | 2496 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); |
2473 | 2497 | if (payload_len < 0) | |
2474 | payload_len = framelen > hdrlen ? framelen - hdrlen : 0; | 2498 | payload_len = 0; |
2475 | 2499 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
2476 | /* XXX TBD Might just have to abort and return an error */ | ||
2477 | if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | ||
2478 | printk(KERN_ERR "%s(): WARNING: Incomplete beacon " | ||
2479 | "sent to firmware. Sz=%u MAX=%u\n", __func__, | ||
2480 | payload_len, MWL8K_FJ_BEACON_MAXLEN); | ||
2481 | |||
2482 | if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | ||
2483 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | 2500 | payload_len = MWL8K_FJ_BEACON_MAXLEN; |
2484 | 2501 | ||
2485 | if (payload && payload_len) | 2502 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); |
2486 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | ||
2487 | 2503 | ||
2488 | rc = mwl8k_post_cmd(hw, &cmd->header); | 2504 | rc = mwl8k_post_cmd(hw, &cmd->header); |
2489 | kfree(cmd); | 2505 | kfree(cmd); |
2506 | |||
2490 | return rc; | 2507 | return rc; |
2491 | } | 2508 | } |
2492 | 2509 | ||
@@ -2515,9 +2532,7 @@ static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw, | |||
2515 | struct ieee80211_bss_conf *info = &mv_vif->bss_info; | 2532 | struct ieee80211_bss_conf *info = &mv_vif->bss_info; |
2516 | struct mwl8k_cmd_update_sta_db *cmd; | 2533 | struct mwl8k_cmd_update_sta_db *cmd; |
2517 | struct peer_capability_info *peer_info; | 2534 | struct peer_capability_info *peer_info; |
2518 | struct ieee80211_rate *bitrates = mv_vif->legacy_rates; | ||
2519 | int rc; | 2535 | int rc; |
2520 | __u8 count, *rates; | ||
2521 | 2536 | ||
2522 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | 2537 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2523 | if (cmd == NULL) | 2538 | if (cmd == NULL) |
@@ -2536,13 +2551,11 @@ static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw, | |||
2536 | /* Build peer_info block */ | 2551 | /* Build peer_info block */ |
2537 | peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | 2552 | peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; |
2538 | peer_info->basic_caps = cpu_to_le16(info->assoc_capability); | 2553 | peer_info->basic_caps = cpu_to_le16(info->assoc_capability); |
2554 | memcpy(peer_info->legacy_rates, mwl8k_rateids, | ||
2555 | sizeof(mwl8k_rateids)); | ||
2539 | peer_info->interop = 1; | 2556 | peer_info->interop = 1; |
2540 | peer_info->amsdu_enabled = 0; | 2557 | peer_info->amsdu_enabled = 0; |
2541 | 2558 | ||
2542 | rates = peer_info->legacy_rates; | ||
2543 | for (count = 0; count < mv_vif->legacy_nrates; count++) | ||
2544 | rates[count] = bitrates[count].hw_value; | ||
2545 | |||
2546 | rc = mwl8k_post_cmd(hw, &cmd->header); | 2559 | rc = mwl8k_post_cmd(hw, &cmd->header); |
2547 | if (rc == 0) | 2560 | if (rc == 0) |
2548 | mv_vif->peer_id = peer_info->station_id; | 2561 | mv_vif->peer_id = peer_info->station_id; |
@@ -2565,8 +2578,6 @@ static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw, | |||
2565 | /* | 2578 | /* |
2566 | * CMD_SET_AID. | 2579 | * CMD_SET_AID. |
2567 | */ | 2580 | */ |
2568 | #define MWL8K_RATE_INDEX_MAX_ARRAY 14 | ||
2569 | |||
2570 | #define MWL8K_FRAME_PROT_DISABLED 0x00 | 2581 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2571 | #define MWL8K_FRAME_PROT_11G 0x07 | 2582 | #define MWL8K_FRAME_PROT_11G 0x07 |
2572 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | 2583 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 |
@@ -2579,7 +2590,7 @@ struct mwl8k_cmd_update_set_aid { | |||
2579 | /* AP's MAC address (BSSID) */ | 2590 | /* AP's MAC address (BSSID) */ |
2580 | __u8 bssid[ETH_ALEN]; | 2591 | __u8 bssid[ETH_ALEN]; |
2581 | __le16 protection_mode; | 2592 | __le16 protection_mode; |
2582 | __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY]; | 2593 | __u8 supp_rates[14]; |
2583 | } __attribute__((packed)); | 2594 | } __attribute__((packed)); |
2584 | 2595 | ||
2585 | static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, | 2596 | static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
@@ -2588,8 +2599,6 @@ static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, | |||
2588 | struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); | 2599 | struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); |
2589 | struct ieee80211_bss_conf *info = &mv_vif->bss_info; | 2600 | struct ieee80211_bss_conf *info = &mv_vif->bss_info; |
2590 | struct mwl8k_cmd_update_set_aid *cmd; | 2601 | struct mwl8k_cmd_update_set_aid *cmd; |
2591 | struct ieee80211_rate *bitrates = mv_vif->legacy_rates; | ||
2592 | int count; | ||
2593 | u16 prot_mode; | 2602 | u16 prot_mode; |
2594 | int rc; | 2603 | int rc; |
2595 | 2604 | ||
@@ -2621,8 +2630,7 @@ static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, | |||
2621 | } | 2630 | } |
2622 | cmd->protection_mode = cpu_to_le16(prot_mode); | 2631 | cmd->protection_mode = cpu_to_le16(prot_mode); |
2623 | 2632 | ||
2624 | for (count = 0; count < mv_vif->legacy_nrates; count++) | 2633 | memcpy(cmd->supp_rates, mwl8k_rateids, sizeof(mwl8k_rateids)); |
2625 | cmd->supp_rates[count] = bitrates[count].hw_value; | ||
2626 | 2634 | ||
2627 | rc = mwl8k_post_cmd(hw, &cmd->header); | 2635 | rc = mwl8k_post_cmd(hw, &cmd->header); |
2628 | kfree(cmd); | 2636 | kfree(cmd); |
@@ -2635,20 +2643,17 @@ static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, | |||
2635 | */ | 2643 | */ |
2636 | struct mwl8k_cmd_update_rateset { | 2644 | struct mwl8k_cmd_update_rateset { |
2637 | struct mwl8k_cmd_pkt header; | 2645 | struct mwl8k_cmd_pkt header; |
2638 | __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY]; | 2646 | __u8 legacy_rates[14]; |
2639 | 2647 | ||
2640 | /* Bitmap for supported MCS codes. */ | 2648 | /* Bitmap for supported MCS codes. */ |
2641 | __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES]; | 2649 | __u8 mcs_set[16]; |
2642 | __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES]; | 2650 | __u8 reserved[16]; |
2643 | } __attribute__((packed)); | 2651 | } __attribute__((packed)); |
2644 | 2652 | ||
2645 | static int mwl8k_update_rateset(struct ieee80211_hw *hw, | 2653 | static int mwl8k_update_rateset(struct ieee80211_hw *hw, |
2646 | struct ieee80211_vif *vif) | 2654 | struct ieee80211_vif *vif) |
2647 | { | 2655 | { |
2648 | struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); | ||
2649 | struct mwl8k_cmd_update_rateset *cmd; | 2656 | struct mwl8k_cmd_update_rateset *cmd; |
2650 | struct ieee80211_rate *bitrates = mv_vif->legacy_rates; | ||
2651 | int count; | ||
2652 | int rc; | 2657 | int rc; |
2653 | 2658 | ||
2654 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | 2659 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
@@ -2657,9 +2662,7 @@ static int mwl8k_update_rateset(struct ieee80211_hw *hw, | |||
2657 | 2662 | ||
2658 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); | 2663 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
2659 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | 2664 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
2660 | 2665 | memcpy(cmd->legacy_rates, mwl8k_rateids, sizeof(mwl8k_rateids)); | |
2661 | for (count = 0; count < mv_vif->legacy_nrates; count++) | ||
2662 | cmd->legacy_rates[count] = bitrates[count].hw_value; | ||
2663 | 2666 | ||
2664 | rc = mwl8k_post_cmd(hw, &cmd->header); | 2667 | rc = mwl8k_post_cmd(hw, &cmd->header); |
2665 | kfree(cmd); | 2668 | kfree(cmd); |
@@ -2932,11 +2935,6 @@ static int mwl8k_add_interface(struct ieee80211_hw *hw, | |||
2932 | /* Back pointer to parent config block */ | 2935 | /* Back pointer to parent config block */ |
2933 | mwl8k_vif->priv = priv; | 2936 | mwl8k_vif->priv = priv; |
2934 | 2937 | ||
2935 | /* Setup initial PHY parameters */ | ||
2936 | memcpy(mwl8k_vif->legacy_rates, | ||
2937 | priv->rates, sizeof(mwl8k_vif->legacy_rates)); | ||
2938 | mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates); | ||
2939 | |||
2940 | /* Set Initial sequence number to zero */ | 2938 | /* Set Initial sequence number to zero */ |
2941 | mwl8k_vif->seqno = 0; | 2939 | mwl8k_vif->seqno = 0; |
2942 | 2940 | ||
@@ -3014,9 +3012,6 @@ static void mwl8k_bss_info_changed(struct ieee80211_hw *hw, | |||
3014 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | 3012 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
3015 | int rc; | 3013 | int rc; |
3016 | 3014 | ||
3017 | if (changed & BSS_CHANGED_BSSID) | ||
3018 | memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN); | ||
3019 | |||
3020 | if ((changed & BSS_CHANGED_ASSOC) == 0) | 3015 | if ((changed & BSS_CHANGED_ASSOC) == 0) |
3021 | return; | 3016 | return; |
3022 | 3017 | ||
@@ -3030,6 +3025,8 @@ static void mwl8k_bss_info_changed(struct ieee80211_hw *hw, | |||
3030 | memcpy(&mwl8k_vif->bss_info, info, | 3025 | memcpy(&mwl8k_vif->bss_info, info, |
3031 | sizeof(struct ieee80211_bss_conf)); | 3026 | sizeof(struct ieee80211_bss_conf)); |
3032 | 3027 | ||
3028 | memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN); | ||
3029 | |||
3033 | /* Install rates */ | 3030 | /* Install rates */ |
3034 | rc = mwl8k_update_rateset(hw, vif); | 3031 | rc = mwl8k_update_rateset(hw, vif); |
3035 | if (rc) | 3032 | if (rc) |
@@ -3366,7 +3363,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3366 | if (rc) { | 3363 | if (rc) { |
3367 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | 3364 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", |
3368 | MWL8K_NAME); | 3365 | MWL8K_NAME); |
3369 | return rc; | 3366 | goto err_disable_device; |
3370 | } | 3367 | } |
3371 | 3368 | ||
3372 | pci_set_master(pdev); | 3369 | pci_set_master(pdev); |
@@ -3597,6 +3594,8 @@ err_iounmap: | |||
3597 | 3594 | ||
3598 | err_free_reg: | 3595 | err_free_reg: |
3599 | pci_release_regions(pdev); | 3596 | pci_release_regions(pdev); |
3597 | |||
3598 | err_disable_device: | ||
3600 | pci_disable_device(pdev); | 3599 | pci_disable_device(pdev); |
3601 | 3600 | ||
3602 | return rc; | 3601 | return rc; |
diff --git a/drivers/net/wireless/orinoco/hermes_dld.c b/drivers/net/wireless/orinoco/hermes_dld.c index 84200da900b6..fb157eb889ca 100644 --- a/drivers/net/wireless/orinoco/hermes_dld.c +++ b/drivers/net/wireless/orinoco/hermes_dld.c | |||
@@ -427,7 +427,7 @@ int hermesi_program_init(hermes_t *hw, u32 offset) | |||
427 | if (err) | 427 | if (err) |
428 | return err; | 428 | return err; |
429 | 429 | ||
430 | pr_debug(KERN_DEBUG PFX "Enabling volatile, EP 0x%08x\n", offset); | 430 | pr_debug(PFX "Enabling volatile, EP 0x%08x\n", offset); |
431 | err = hermes_doicmd_wait(hw, | 431 | err = hermes_doicmd_wait(hw, |
432 | HERMES_PROGRAM_ENABLE_VOLATILE, | 432 | HERMES_PROGRAM_ENABLE_VOLATILE, |
433 | offset & 0xFFFFu, | 433 | offset & 0xFFFFu, |
diff --git a/drivers/net/wireless/rtl818x/rtl8187.h b/drivers/net/wireless/rtl818x/rtl8187.h index abb4907cf296..6af0f3f71f3a 100644 --- a/drivers/net/wireless/rtl818x/rtl8187.h +++ b/drivers/net/wireless/rtl818x/rtl8187.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */ | 23 | #define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */ |
24 | #define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */ | 24 | #define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */ |
25 | #define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */ | 25 | #define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */ |
26 | #define RTL8187_EEPROM_SELECT_GPIO 0x3B | ||
26 | 27 | ||
27 | #define RTL8187_REQT_READ 0xC0 | 28 | #define RTL8187_REQT_READ 0xC0 |
28 | #define RTL8187_REQT_WRITE 0x40 | 29 | #define RTL8187_REQT_WRITE 0x40 |
@@ -31,6 +32,9 @@ | |||
31 | 32 | ||
32 | #define RTL8187_MAX_RX 0x9C4 | 33 | #define RTL8187_MAX_RX 0x9C4 |
33 | 34 | ||
35 | #define RFKILL_MASK_8187_89_97 0x2 | ||
36 | #define RFKILL_MASK_8198 0x4 | ||
37 | |||
34 | struct rtl8187_rx_info { | 38 | struct rtl8187_rx_info { |
35 | struct urb *urb; | 39 | struct urb *urb; |
36 | struct ieee80211_hw *dev; | 40 | struct ieee80211_hw *dev; |
@@ -104,6 +108,7 @@ struct rtl8187_priv { | |||
104 | struct delayed_work work; | 108 | struct delayed_work work; |
105 | struct ieee80211_hw *dev; | 109 | struct ieee80211_hw *dev; |
106 | #ifdef CONFIG_RTL8187_LEDS | 110 | #ifdef CONFIG_RTL8187_LEDS |
111 | struct rtl8187_led led_radio; | ||
107 | struct rtl8187_led led_tx; | 112 | struct rtl8187_led led_tx; |
108 | struct rtl8187_led led_rx; | 113 | struct rtl8187_led led_rx; |
109 | struct delayed_work led_on; | 114 | struct delayed_work led_on; |
@@ -122,6 +127,7 @@ struct rtl8187_priv { | |||
122 | u8 noise; | 127 | u8 noise; |
123 | u8 slot_time; | 128 | u8 slot_time; |
124 | u8 aifsn[4]; | 129 | u8 aifsn[4]; |
130 | u8 rfkill_mask; | ||
125 | struct { | 131 | struct { |
126 | __le64 buf; | 132 | __le64 buf; |
127 | struct sk_buff_head queue; | 133 | struct sk_buff_head queue; |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c index 76973b8c7099..bc5726dd5fe4 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_dev.c +++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c | |||
@@ -1322,6 +1322,7 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1322 | struct ieee80211_channel *channel; | 1322 | struct ieee80211_channel *channel; |
1323 | const char *chip_name; | 1323 | const char *chip_name; |
1324 | u16 txpwr, reg; | 1324 | u16 txpwr, reg; |
1325 | u16 product_id = le16_to_cpu(udev->descriptor.idProduct); | ||
1325 | int err, i; | 1326 | int err, i; |
1326 | 1327 | ||
1327 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | 1328 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); |
@@ -1481,6 +1482,13 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1481 | (*channel++).hw_value = txpwr & 0xFF; | 1482 | (*channel++).hw_value = txpwr & 0xFF; |
1482 | (*channel++).hw_value = txpwr >> 8; | 1483 | (*channel++).hw_value = txpwr >> 8; |
1483 | } | 1484 | } |
1485 | /* Handle the differing rfkill GPIO bit in different models */ | ||
1486 | priv->rfkill_mask = RFKILL_MASK_8187_89_97; | ||
1487 | if (product_id == 0x8197 || product_id == 0x8198) { | ||
1488 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); | ||
1489 | if (reg & 0xFF00) | ||
1490 | priv->rfkill_mask = RFKILL_MASK_8198; | ||
1491 | } | ||
1484 | 1492 | ||
1485 | /* | 1493 | /* |
1486 | * XXX: Once this driver supports anything that requires | 1494 | * XXX: Once this driver supports anything that requires |
@@ -1509,9 +1517,9 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1509 | mutex_init(&priv->conf_mutex); | 1517 | mutex_init(&priv->conf_mutex); |
1510 | skb_queue_head_init(&priv->b_tx_status.queue); | 1518 | skb_queue_head_init(&priv->b_tx_status.queue); |
1511 | 1519 | ||
1512 | printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n", | 1520 | printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n", |
1513 | wiphy_name(dev->wiphy), dev->wiphy->perm_addr, | 1521 | wiphy_name(dev->wiphy), dev->wiphy->perm_addr, |
1514 | chip_name, priv->asic_rev, priv->rf->name); | 1522 | chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask); |
1515 | 1523 | ||
1516 | #ifdef CONFIG_RTL8187_LEDS | 1524 | #ifdef CONFIG_RTL8187_LEDS |
1517 | eeprom_93cx6_read(&eeprom, 0x3F, ®); | 1525 | eeprom_93cx6_read(&eeprom, 0x3F, ®); |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c index cf8a4a40fdf6..ded44c045eb2 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_leds.c +++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c | |||
@@ -105,19 +105,36 @@ static void rtl8187_led_brightness_set(struct led_classdev *led_dev, | |||
105 | struct rtl8187_led *led = container_of(led_dev, struct rtl8187_led, | 105 | struct rtl8187_led *led = container_of(led_dev, struct rtl8187_led, |
106 | led_dev); | 106 | led_dev); |
107 | struct ieee80211_hw *hw = led->dev; | 107 | struct ieee80211_hw *hw = led->dev; |
108 | struct rtl8187_priv *priv = hw->priv; | 108 | struct rtl8187_priv *priv; |
109 | static bool radio_on; | ||
109 | 110 | ||
110 | if (brightness == LED_OFF) { | 111 | if (!hw) |
111 | ieee80211_queue_delayed_work(hw, &priv->led_off, 0); | 112 | return; |
112 | /* The LED is off for 1/20 sec so that it just blinks. */ | 113 | priv = hw->priv; |
113 | ieee80211_queue_delayed_work(hw, &priv->led_on, HZ / 20); | 114 | if (led->is_radio) { |
114 | } else | 115 | if (brightness == LED_FULL) { |
115 | ieee80211_queue_delayed_work(hw, &priv->led_on, 0); | 116 | ieee80211_queue_delayed_work(hw, &priv->led_on, 0); |
117 | radio_on = true; | ||
118 | } else if (radio_on) { | ||
119 | radio_on = false; | ||
120 | cancel_delayed_work_sync(&priv->led_on); | ||
121 | ieee80211_queue_delayed_work(hw, &priv->led_off, 0); | ||
122 | } | ||
123 | } else if (radio_on) { | ||
124 | if (brightness == LED_OFF) { | ||
125 | ieee80211_queue_delayed_work(hw, &priv->led_off, 0); | ||
126 | /* The LED is off for 1/20 sec - it just blinks. */ | ||
127 | ieee80211_queue_delayed_work(hw, &priv->led_on, | ||
128 | HZ / 20); | ||
129 | } else | ||
130 | ieee80211_queue_delayed_work(hw, &priv->led_on, 0); | ||
131 | } | ||
116 | } | 132 | } |
117 | 133 | ||
118 | static int rtl8187_register_led(struct ieee80211_hw *dev, | 134 | static int rtl8187_register_led(struct ieee80211_hw *dev, |
119 | struct rtl8187_led *led, const char *name, | 135 | struct rtl8187_led *led, const char *name, |
120 | const char *default_trigger, u8 ledpin) | 136 | const char *default_trigger, u8 ledpin, |
137 | bool is_radio) | ||
121 | { | 138 | { |
122 | int err; | 139 | int err; |
123 | struct rtl8187_priv *priv = dev->priv; | 140 | struct rtl8187_priv *priv = dev->priv; |
@@ -128,6 +145,7 @@ static int rtl8187_register_led(struct ieee80211_hw *dev, | |||
128 | return -EINVAL; | 145 | return -EINVAL; |
129 | led->dev = dev; | 146 | led->dev = dev; |
130 | led->ledpin = ledpin; | 147 | led->ledpin = ledpin; |
148 | led->is_radio = is_radio; | ||
131 | strncpy(led->name, name, sizeof(led->name)); | 149 | strncpy(led->name, name, sizeof(led->name)); |
132 | 150 | ||
133 | led->led_dev.name = led->name; | 151 | led->led_dev.name = led->name; |
@@ -145,7 +163,11 @@ static int rtl8187_register_led(struct ieee80211_hw *dev, | |||
145 | 163 | ||
146 | static void rtl8187_unregister_led(struct rtl8187_led *led) | 164 | static void rtl8187_unregister_led(struct rtl8187_led *led) |
147 | { | 165 | { |
166 | struct ieee80211_hw *hw = led->dev; | ||
167 | struct rtl8187_priv *priv = hw->priv; | ||
168 | |||
148 | led_classdev_unregister(&led->led_dev); | 169 | led_classdev_unregister(&led->led_dev); |
170 | flush_delayed_work(&priv->led_off); | ||
149 | led->dev = NULL; | 171 | led->dev = NULL; |
150 | } | 172 | } |
151 | 173 | ||
@@ -183,33 +205,37 @@ void rtl8187_leds_init(struct ieee80211_hw *dev, u16 custid) | |||
183 | INIT_DELAYED_WORK(&priv->led_off, led_turn_off); | 205 | INIT_DELAYED_WORK(&priv->led_off, led_turn_off); |
184 | 206 | ||
185 | snprintf(name, sizeof(name), | 207 | snprintf(name, sizeof(name), |
208 | "rtl8187-%s::radio", wiphy_name(dev->wiphy)); | ||
209 | err = rtl8187_register_led(dev, &priv->led_radio, name, | ||
210 | ieee80211_get_radio_led_name(dev), ledpin, true); | ||
211 | if (err) | ||
212 | return; | ||
213 | |||
214 | snprintf(name, sizeof(name), | ||
186 | "rtl8187-%s::tx", wiphy_name(dev->wiphy)); | 215 | "rtl8187-%s::tx", wiphy_name(dev->wiphy)); |
187 | err = rtl8187_register_led(dev, &priv->led_tx, name, | 216 | err = rtl8187_register_led(dev, &priv->led_tx, name, |
188 | ieee80211_get_tx_led_name(dev), ledpin); | 217 | ieee80211_get_tx_led_name(dev), ledpin, false); |
189 | if (err) | 218 | if (err) |
190 | goto error; | 219 | goto err_tx; |
220 | |||
191 | snprintf(name, sizeof(name), | 221 | snprintf(name, sizeof(name), |
192 | "rtl8187-%s::rx", wiphy_name(dev->wiphy)); | 222 | "rtl8187-%s::rx", wiphy_name(dev->wiphy)); |
193 | err = rtl8187_register_led(dev, &priv->led_rx, name, | 223 | err = rtl8187_register_led(dev, &priv->led_rx, name, |
194 | ieee80211_get_rx_led_name(dev), ledpin); | 224 | ieee80211_get_rx_led_name(dev), ledpin, false); |
195 | if (!err) { | 225 | if (!err) |
196 | ieee80211_queue_delayed_work(dev, &priv->led_on, 0); | ||
197 | return; | 226 | return; |
198 | } | 227 | |
199 | /* registration of RX LED failed - unregister TX */ | 228 | /* registration of RX LED failed - unregister */ |
200 | rtl8187_unregister_led(&priv->led_tx); | 229 | rtl8187_unregister_led(&priv->led_tx); |
201 | error: | 230 | err_tx: |
202 | /* If registration of either failed, cancel delayed work */ | 231 | rtl8187_unregister_led(&priv->led_radio); |
203 | cancel_delayed_work_sync(&priv->led_off); | ||
204 | cancel_delayed_work_sync(&priv->led_on); | ||
205 | } | 232 | } |
206 | 233 | ||
207 | void rtl8187_leds_exit(struct ieee80211_hw *dev) | 234 | void rtl8187_leds_exit(struct ieee80211_hw *dev) |
208 | { | 235 | { |
209 | struct rtl8187_priv *priv = dev->priv; | 236 | struct rtl8187_priv *priv = dev->priv; |
210 | 237 | ||
211 | /* turn the LED off before exiting */ | 238 | rtl8187_unregister_led(&priv->led_radio); |
212 | ieee80211_queue_delayed_work(dev, &priv->led_off, 0); | ||
213 | rtl8187_unregister_led(&priv->led_rx); | 239 | rtl8187_unregister_led(&priv->led_rx); |
214 | rtl8187_unregister_led(&priv->led_tx); | 240 | rtl8187_unregister_led(&priv->led_tx); |
215 | cancel_delayed_work_sync(&priv->led_off); | 241 | cancel_delayed_work_sync(&priv->led_off); |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.h b/drivers/net/wireless/rtl818x/rtl8187_leds.h index a0332027aead..efe8041bdda4 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_leds.h +++ b/drivers/net/wireless/rtl818x/rtl8187_leds.h | |||
@@ -47,6 +47,8 @@ struct rtl8187_led { | |||
47 | u8 ledpin; | 47 | u8 ledpin; |
48 | /* The unique name string for this LED device. */ | 48 | /* The unique name string for this LED device. */ |
49 | char name[RTL8187_LED_MAX_NAME_LEN + 1]; | 49 | char name[RTL8187_LED_MAX_NAME_LEN + 1]; |
50 | /* If the LED is radio or tx/rx */ | ||
51 | bool is_radio; | ||
50 | }; | 52 | }; |
51 | 53 | ||
52 | void rtl8187_leds_init(struct ieee80211_hw *dev, u16 code); | 54 | void rtl8187_leds_init(struct ieee80211_hw *dev, u16 code); |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c index cad8037ab2af..03555e1e0cab 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c +++ b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c | |||
@@ -25,10 +25,10 @@ static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv) | |||
25 | u8 gpio; | 25 | u8 gpio; |
26 | 26 | ||
27 | gpio = rtl818x_ioread8(priv, &priv->map->GPIO0); | 27 | gpio = rtl818x_ioread8(priv, &priv->map->GPIO0); |
28 | rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~0x02); | 28 | rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~priv->rfkill_mask); |
29 | gpio = rtl818x_ioread8(priv, &priv->map->GPIO1); | 29 | gpio = rtl818x_ioread8(priv, &priv->map->GPIO1); |
30 | 30 | ||
31 | return gpio & 0x02; | 31 | return gpio & priv->rfkill_mask; |
32 | } | 32 | } |
33 | 33 | ||
34 | void rtl8187_rfkill_init(struct ieee80211_hw *hw) | 34 | void rtl8187_rfkill_init(struct ieee80211_hw *hw) |
diff --git a/drivers/net/wireless/wl12xx/wl1251_main.c b/drivers/net/wireless/wl12xx/wl1251_main.c index ff4be7bf5d36..2f50a256efa5 100644 --- a/drivers/net/wireless/wl12xx/wl1251_main.c +++ b/drivers/net/wireless/wl12xx/wl1251_main.c | |||
@@ -629,10 +629,6 @@ static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed) | |||
629 | goto out_sleep; | 629 | goto out_sleep; |
630 | } | 630 | } |
631 | 631 | ||
632 | ret = wl1251_build_null_data(wl); | ||
633 | if (ret < 0) | ||
634 | goto out_sleep; | ||
635 | |||
636 | if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) { | 632 | if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) { |
637 | wl1251_debug(DEBUG_PSM, "psm enabled"); | 633 | wl1251_debug(DEBUG_PSM, "psm enabled"); |
638 | 634 | ||
@@ -1110,6 +1106,21 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw, | |||
1110 | if (ret < 0) | 1106 | if (ret < 0) |
1111 | goto out; | 1107 | goto out; |
1112 | 1108 | ||
1109 | if (changed & BSS_CHANGED_BSSID) { | ||
1110 | memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN); | ||
1111 | |||
1112 | ret = wl1251_build_null_data(wl); | ||
1113 | if (ret < 0) | ||
1114 | goto out; | ||
1115 | |||
1116 | if (wl->bss_type != BSS_TYPE_IBSS) { | ||
1117 | ret = wl1251_join(wl, wl->bss_type, wl->channel, | ||
1118 | wl->beacon_int, wl->dtim_period); | ||
1119 | if (ret < 0) | ||
1120 | goto out_sleep; | ||
1121 | } | ||
1122 | } | ||
1123 | |||
1113 | if (changed & BSS_CHANGED_ASSOC) { | 1124 | if (changed & BSS_CHANGED_ASSOC) { |
1114 | if (bss_conf->assoc) { | 1125 | if (bss_conf->assoc) { |
1115 | wl->beacon_int = bss_conf->beacon_int; | 1126 | wl->beacon_int = bss_conf->beacon_int; |
@@ -1169,23 +1180,6 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw, | |||
1169 | } | 1180 | } |
1170 | } | 1181 | } |
1171 | 1182 | ||
1172 | if (changed & BSS_CHANGED_BSSID) { | ||
1173 | memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN); | ||
1174 | |||
1175 | ret = wl1251_build_null_data(wl); | ||
1176 | if (ret < 0) | ||
1177 | goto out; | ||
1178 | |||
1179 | if (wl->bss_type != BSS_TYPE_IBSS) { | ||
1180 | ret = wl1251_join(wl, wl->bss_type, wl->channel, | ||
1181 | wl->beacon_int, wl->dtim_period); | ||
1182 | if (ret < 0) | ||
1183 | goto out_sleep; | ||
1184 | wl1251_warning("Set ctsprotect failed %d", ret); | ||
1185 | goto out_sleep; | ||
1186 | } | ||
1187 | } | ||
1188 | |||
1189 | if (changed & BSS_CHANGED_BEACON) { | 1183 | if (changed & BSS_CHANGED_BEACON) { |
1190 | beacon = ieee80211_beacon_get(hw, vif); | 1184 | beacon = ieee80211_beacon_get(hw, vif); |
1191 | ret = wl1251_cmd_template_set(wl, CMD_BEACON, beacon->data, | 1185 | ret = wl1251_cmd_template_set(wl, CMD_BEACON, beacon->data, |