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authorLinus Torvalds <torvalds@linux-foundation.org>2012-06-08 12:12:21 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-06-08 12:12:21 -0400
commit03d8f5408235bfd2781142458e0c0671530e74e7 (patch)
treed358f08d428577a150687f04a34ec425e90b5008 /drivers
parentb1e25f41094dfe0b9653c926d3c02a35c2eb249c (diff)
parent2d5c7cd35f1addb812e0b1709b3c727f1a58ca9c (diff)
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm intel and exynos fixes from Dave Airlie: "A bunch of fixes for Intel and exynos, nothing too major, a new intel PCI ID, and a fix for CRT detection." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/i915: pch_irq_handler -> {ibx, cpt}_irq_handler char/agp: add another Ironlake host bridge drm/i915: fix up ivb plane 3 pageflips drm/exynos: fixed blending for hdmi graphic layer drm/exynos: Remove dummy encoder get_crtc operation implementation drm/exynos: Keep a reference to frame buffer GEM objects drm/exynos: Don't cast GEM object to Exynos GEM object when not needed drm/exynos: DRIVER_BUS_PLATFORM is not a driver feature drm/exynos: fixed size type. drm/exynos: Use DRM_FORMAT_{NV12, YUV420} instead of DRM_FORMAT_{NV12M, YUV420M} drm/i915: hold forcewake around ring hw init drm/i915: Mark the ringbuffers as being in the GTT domain drm/i915/crt: Do not rely upon the HPD presence pin drm/i915: Reset last_retired_head when resetting ring
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/agp/intel-agp.c1
-rw-r--r--drivers/char/agp/intel-agp.h1
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.c4
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.c7
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.c19
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.h4
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.c9
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c12
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c13
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c38
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h43
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c8
-rw-r--r--drivers/gpu/drm/i915/intel_display.c19
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c21
15 files changed, 158 insertions, 44 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 764f70c5e690..0a4185279417 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -898,6 +898,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
898 ID(PCI_DEVICE_ID_INTEL_B43_HB), 898 ID(PCI_DEVICE_ID_INTEL_B43_HB),
899 ID(PCI_DEVICE_ID_INTEL_B43_1_HB), 899 ID(PCI_DEVICE_ID_INTEL_B43_1_HB),
900 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB), 900 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
901 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB),
901 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB), 902 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
902 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB), 903 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
903 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB), 904 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index c0091753a0d1..8e2d9140f300 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -212,6 +212,7 @@
212#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30 212#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
213#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32 213#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
214#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040 214#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB 0x0040
215#define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB 0x0069
215#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042 216#define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG 0x0042
216#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044 217#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB 0x0044
217#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062 218#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 420953197d0a..d6de2e07fa03 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -244,8 +244,8 @@ static const struct file_operations exynos_drm_driver_fops = {
244}; 244};
245 245
246static struct drm_driver exynos_drm_driver = { 246static struct drm_driver exynos_drm_driver = {
247 .driver_features = DRIVER_HAVE_IRQ | DRIVER_BUS_PLATFORM | 247 .driver_features = DRIVER_HAVE_IRQ | DRIVER_MODESET |
248 DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME, 248 DRIVER_GEM | DRIVER_PRIME,
249 .load = exynos_drm_load, 249 .load = exynos_drm_load,
250 .unload = exynos_drm_unload, 250 .unload = exynos_drm_unload,
251 .open = exynos_drm_open, 251 .open = exynos_drm_open,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 6e9ac7bd1dcf..23d5ad379f86 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -172,19 +172,12 @@ static void exynos_drm_encoder_commit(struct drm_encoder *encoder)
172 manager_ops->commit(manager->dev); 172 manager_ops->commit(manager->dev);
173} 173}
174 174
175static struct drm_crtc *
176exynos_drm_encoder_get_crtc(struct drm_encoder *encoder)
177{
178 return encoder->crtc;
179}
180
181static struct drm_encoder_helper_funcs exynos_encoder_helper_funcs = { 175static struct drm_encoder_helper_funcs exynos_encoder_helper_funcs = {
182 .dpms = exynos_drm_encoder_dpms, 176 .dpms = exynos_drm_encoder_dpms,
183 .mode_fixup = exynos_drm_encoder_mode_fixup, 177 .mode_fixup = exynos_drm_encoder_mode_fixup,
184 .mode_set = exynos_drm_encoder_mode_set, 178 .mode_set = exynos_drm_encoder_mode_set,
185 .prepare = exynos_drm_encoder_prepare, 179 .prepare = exynos_drm_encoder_prepare,
186 .commit = exynos_drm_encoder_commit, 180 .commit = exynos_drm_encoder_commit,
187 .get_crtc = exynos_drm_encoder_get_crtc,
188}; 181};
189 182
190static void exynos_drm_encoder_destroy(struct drm_encoder *encoder) 183static void exynos_drm_encoder_destroy(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index f82a299553fb..4ccfe4328fab 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -51,11 +51,22 @@ struct exynos_drm_fb {
51static void exynos_drm_fb_destroy(struct drm_framebuffer *fb) 51static void exynos_drm_fb_destroy(struct drm_framebuffer *fb)
52{ 52{
53 struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb); 53 struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
54 unsigned int i;
54 55
55 DRM_DEBUG_KMS("%s\n", __FILE__); 56 DRM_DEBUG_KMS("%s\n", __FILE__);
56 57
57 drm_framebuffer_cleanup(fb); 58 drm_framebuffer_cleanup(fb);
58 59
60 for (i = 0; i < ARRAY_SIZE(exynos_fb->exynos_gem_obj); i++) {
61 struct drm_gem_object *obj;
62
63 if (exynos_fb->exynos_gem_obj[i] == NULL)
64 continue;
65
66 obj = &exynos_fb->exynos_gem_obj[i]->base;
67 drm_gem_object_unreference_unlocked(obj);
68 }
69
59 kfree(exynos_fb); 70 kfree(exynos_fb);
60 exynos_fb = NULL; 71 exynos_fb = NULL;
61} 72}
@@ -134,11 +145,11 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv,
134 return ERR_PTR(-ENOENT); 145 return ERR_PTR(-ENOENT);
135 } 146 }
136 147
137 drm_gem_object_unreference_unlocked(obj);
138
139 fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj); 148 fb = exynos_drm_framebuffer_init(dev, mode_cmd, obj);
140 if (IS_ERR(fb)) 149 if (IS_ERR(fb)) {
150 drm_gem_object_unreference_unlocked(obj);
141 return fb; 151 return fb;
152 }
142 153
143 exynos_fb = to_exynos_fb(fb); 154 exynos_fb = to_exynos_fb(fb);
144 nr = exynos_drm_format_num_buffers(fb->pixel_format); 155 nr = exynos_drm_format_num_buffers(fb->pixel_format);
@@ -152,8 +163,6 @@ exynos_user_fb_create(struct drm_device *dev, struct drm_file *file_priv,
152 return ERR_PTR(-ENOENT); 163 return ERR_PTR(-ENOENT);
153 } 164 }
154 165
155 drm_gem_object_unreference_unlocked(obj);
156
157 exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj); 166 exynos_fb->exynos_gem_obj[i] = to_exynos_gem_obj(obj);
158 } 167 }
159 168
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.h b/drivers/gpu/drm/exynos/exynos_drm_fb.h
index 3ecb30d93552..50823756cdea 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.h
@@ -31,10 +31,10 @@
31static inline int exynos_drm_format_num_buffers(uint32_t format) 31static inline int exynos_drm_format_num_buffers(uint32_t format)
32{ 32{
33 switch (format) { 33 switch (format) {
34 case DRM_FORMAT_NV12M: 34 case DRM_FORMAT_NV12:
35 case DRM_FORMAT_NV12MT: 35 case DRM_FORMAT_NV12MT:
36 return 2; 36 return 2;
37 case DRM_FORMAT_YUV420M: 37 case DRM_FORMAT_YUV420:
38 return 3; 38 return 3;
39 default: 39 default:
40 return 1; 40 return 1;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index fc91293c4560..5c8b683029ea 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -689,7 +689,6 @@ int exynos_drm_gem_dumb_map_offset(struct drm_file *file_priv,
689 struct drm_device *dev, uint32_t handle, 689 struct drm_device *dev, uint32_t handle,
690 uint64_t *offset) 690 uint64_t *offset)
691{ 691{
692 struct exynos_drm_gem_obj *exynos_gem_obj;
693 struct drm_gem_object *obj; 692 struct drm_gem_object *obj;
694 int ret = 0; 693 int ret = 0;
695 694
@@ -710,15 +709,13 @@ int exynos_drm_gem_dumb_map_offset(struct drm_file *file_priv,
710 goto unlock; 709 goto unlock;
711 } 710 }
712 711
713 exynos_gem_obj = to_exynos_gem_obj(obj); 712 if (!obj->map_list.map) {
714 713 ret = drm_gem_create_mmap_offset(obj);
715 if (!exynos_gem_obj->base.map_list.map) {
716 ret = drm_gem_create_mmap_offset(&exynos_gem_obj->base);
717 if (ret) 714 if (ret)
718 goto out; 715 goto out;
719 } 716 }
720 717
721 *offset = (u64)exynos_gem_obj->base.map_list.hash.key << PAGE_SHIFT; 718 *offset = (u64)obj->map_list.hash.key << PAGE_SHIFT;
722 DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset); 719 DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset);
723 720
724out: 721out:
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 68ef01028375..e2147a2ddcec 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -365,7 +365,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win)
365 switch (win_data->pixel_format) { 365 switch (win_data->pixel_format) {
366 case DRM_FORMAT_NV12MT: 366 case DRM_FORMAT_NV12MT:
367 tiled_mode = true; 367 tiled_mode = true;
368 case DRM_FORMAT_NV12M: 368 case DRM_FORMAT_NV12:
369 crcb_mode = false; 369 crcb_mode = false;
370 buf_num = 2; 370 buf_num = 2;
371 break; 371 break;
@@ -601,18 +601,20 @@ static void mixer_win_reset(struct mixer_context *ctx)
601 mixer_reg_write(res, MXR_BG_COLOR2, 0x008080); 601 mixer_reg_write(res, MXR_BG_COLOR2, 0x008080);
602 602
603 /* setting graphical layers */ 603 /* setting graphical layers */
604
605 val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ 604 val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
606 val |= MXR_GRP_CFG_WIN_BLEND_EN; 605 val |= MXR_GRP_CFG_WIN_BLEND_EN;
606 val |= MXR_GRP_CFG_BLEND_PRE_MUL;
607 val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
607 val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ 608 val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */
608 609
609 /* the same configuration for both layers */ 610 /* the same configuration for both layers */
610 mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val); 611 mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val);
611
612 val |= MXR_GRP_CFG_BLEND_PRE_MUL;
613 val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
614 mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val); 612 mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val);
615 613
614 /* setting video layers */
615 val = MXR_GRP_CFG_ALPHA_VAL(0);
616 mixer_reg_write(res, MXR_VIDEO_CFG, val);
617
616 /* configuration of Video Processor Registers */ 618 /* configuration of Video Processor Registers */
617 vp_win_reset(ctx); 619 vp_win_reset(ctx);
618 vp_default_filter(res); 620 vp_default_filter(res);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 238a52165833..9fe9ebe52a7a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -233,6 +233,7 @@ static const struct intel_device_info intel_sandybridge_d_info = {
233 .has_blt_ring = 1, 233 .has_blt_ring = 1,
234 .has_llc = 1, 234 .has_llc = 1,
235 .has_pch_split = 1, 235 .has_pch_split = 1,
236 .has_force_wake = 1,
236}; 237};
237 238
238static const struct intel_device_info intel_sandybridge_m_info = { 239static const struct intel_device_info intel_sandybridge_m_info = {
@@ -243,6 +244,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
243 .has_blt_ring = 1, 244 .has_blt_ring = 1,
244 .has_llc = 1, 245 .has_llc = 1,
245 .has_pch_split = 1, 246 .has_pch_split = 1,
247 .has_force_wake = 1,
246}; 248};
247 249
248static const struct intel_device_info intel_ivybridge_d_info = { 250static const struct intel_device_info intel_ivybridge_d_info = {
@@ -252,6 +254,7 @@ static const struct intel_device_info intel_ivybridge_d_info = {
252 .has_blt_ring = 1, 254 .has_blt_ring = 1,
253 .has_llc = 1, 255 .has_llc = 1,
254 .has_pch_split = 1, 256 .has_pch_split = 1,
257 .has_force_wake = 1,
255}; 258};
256 259
257static const struct intel_device_info intel_ivybridge_m_info = { 260static const struct intel_device_info intel_ivybridge_m_info = {
@@ -262,6 +265,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
262 .has_blt_ring = 1, 265 .has_blt_ring = 1,
263 .has_llc = 1, 266 .has_llc = 1,
264 .has_pch_split = 1, 267 .has_pch_split = 1,
268 .has_force_wake = 1,
265}; 269};
266 270
267static const struct intel_device_info intel_valleyview_m_info = { 271static const struct intel_device_info intel_valleyview_m_info = {
@@ -289,6 +293,7 @@ static const struct intel_device_info intel_haswell_d_info = {
289 .has_blt_ring = 1, 293 .has_blt_ring = 1,
290 .has_llc = 1, 294 .has_llc = 1,
291 .has_pch_split = 1, 295 .has_pch_split = 1,
296 .has_force_wake = 1,
292}; 297};
293 298
294static const struct intel_device_info intel_haswell_m_info = { 299static const struct intel_device_info intel_haswell_m_info = {
@@ -298,6 +303,7 @@ static const struct intel_device_info intel_haswell_m_info = {
298 .has_blt_ring = 1, 303 .has_blt_ring = 1,
299 .has_llc = 1, 304 .has_llc = 1,
300 .has_pch_split = 1, 305 .has_pch_split = 1,
306 .has_force_wake = 1,
301}; 307};
302 308
303static const struct pci_device_id pciidlist[] = { /* aka */ 309static const struct pci_device_id pciidlist[] = { /* aka */
@@ -1139,10 +1145,9 @@ MODULE_LICENSE("GPL and additional rights");
1139 1145
1140/* We give fast paths for the really cool registers */ 1146/* We give fast paths for the really cool registers */
1141#define NEEDS_FORCE_WAKE(dev_priv, reg) \ 1147#define NEEDS_FORCE_WAKE(dev_priv, reg) \
1142 (((dev_priv)->info->gen >= 6) && \ 1148 ((HAS_FORCE_WAKE((dev_priv)->dev)) && \
1143 ((reg) < 0x40000) && \ 1149 ((reg) < 0x40000) && \
1144 ((reg) != FORCEWAKE)) && \ 1150 ((reg) != FORCEWAKE))
1145 (!IS_VALLEYVIEW((dev_priv)->dev))
1146 1151
1147#define __i915_read(x, y) \ 1152#define __i915_read(x, y) \
1148u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ 1153u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c9cfc67c2cf5..b0b676abde0d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -285,6 +285,7 @@ struct intel_device_info {
285 u8 is_ivybridge:1; 285 u8 is_ivybridge:1;
286 u8 is_valleyview:1; 286 u8 is_valleyview:1;
287 u8 has_pch_split:1; 287 u8 has_pch_split:1;
288 u8 has_force_wake:1;
288 u8 is_haswell:1; 289 u8 is_haswell:1;
289 u8 has_fbc:1; 290 u8 has_fbc:1;
290 u8 has_pipe_cxsr:1; 291 u8 has_pipe_cxsr:1;
@@ -1101,6 +1102,8 @@ struct drm_i915_file_private {
1101#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT) 1102#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
1102#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX) 1103#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
1103 1104
1105#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
1106
1104#include "i915_trace.h" 1107#include "i915_trace.h"
1105 1108
1106/** 1109/**
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1417660a93ec..b1fe0edda955 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -510,7 +510,7 @@ out:
510 return ret; 510 return ret;
511} 511}
512 512
513static void pch_irq_handler(struct drm_device *dev, u32 pch_iir) 513static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
514{ 514{
515 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 515 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
516 int pipe; 516 int pipe;
@@ -550,6 +550,35 @@ static void pch_irq_handler(struct drm_device *dev, u32 pch_iir)
550 DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n"); 550 DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");
551} 551}
552 552
553static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
554{
555 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
556 int pipe;
557
558 if (pch_iir & SDE_AUDIO_POWER_MASK_CPT)
559 DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",
560 (pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
561 SDE_AUDIO_POWER_SHIFT_CPT);
562
563 if (pch_iir & SDE_AUX_MASK_CPT)
564 DRM_DEBUG_DRIVER("AUX channel interrupt\n");
565
566 if (pch_iir & SDE_GMBUS_CPT)
567 DRM_DEBUG_DRIVER("PCH GMBUS interrupt\n");
568
569 if (pch_iir & SDE_AUDIO_CP_REQ_CPT)
570 DRM_DEBUG_DRIVER("Audio CP request interrupt\n");
571
572 if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
573 DRM_DEBUG_DRIVER("Audio CP change interrupt\n");
574
575 if (pch_iir & SDE_FDI_MASK_CPT)
576 for_each_pipe(pipe)
577 DRM_DEBUG_DRIVER(" pipe %c FDI IIR: 0x%08x\n",
578 pipe_name(pipe),
579 I915_READ(FDI_RX_IIR(pipe)));
580}
581
553static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS) 582static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
554{ 583{
555 struct drm_device *dev = (struct drm_device *) arg; 584 struct drm_device *dev = (struct drm_device *) arg;
@@ -591,7 +620,7 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
591 620
592 if (pch_iir & SDE_HOTPLUG_MASK_CPT) 621 if (pch_iir & SDE_HOTPLUG_MASK_CPT)
593 queue_work(dev_priv->wq, &dev_priv->hotplug_work); 622 queue_work(dev_priv->wq, &dev_priv->hotplug_work);
594 pch_irq_handler(dev, pch_iir); 623 cpt_irq_handler(dev, pch_iir);
595 624
596 /* clear PCH hotplug event before clear CPU irq */ 625 /* clear PCH hotplug event before clear CPU irq */
597 I915_WRITE(SDEIIR, pch_iir); 626 I915_WRITE(SDEIIR, pch_iir);
@@ -684,7 +713,10 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
684 if (de_iir & DE_PCH_EVENT) { 713 if (de_iir & DE_PCH_EVENT) {
685 if (pch_iir & hotplug_mask) 714 if (pch_iir & hotplug_mask)
686 queue_work(dev_priv->wq, &dev_priv->hotplug_work); 715 queue_work(dev_priv->wq, &dev_priv->hotplug_work);
687 pch_irq_handler(dev, pch_iir); 716 if (HAS_PCH_CPT(dev))
717 cpt_irq_handler(dev, pch_iir);
718 else
719 ibx_irq_handler(dev, pch_iir);
688 } 720 }
689 721
690 if (de_iir & DE_PCU_EVENT) { 722 if (de_iir & DE_PCU_EVENT) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2d49b9507ed0..48d5e8e051cf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -210,6 +210,14 @@
210#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2) 210#define MI_DISPLAY_FLIP MI_INSTR(0x14, 2)
211#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1) 211#define MI_DISPLAY_FLIP_I915 MI_INSTR(0x14, 1)
212#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20) 212#define MI_DISPLAY_FLIP_PLANE(n) ((n) << 20)
213/* IVB has funny definitions for which plane to flip. */
214#define MI_DISPLAY_FLIP_IVB_PLANE_A (0 << 19)
215#define MI_DISPLAY_FLIP_IVB_PLANE_B (1 << 19)
216#define MI_DISPLAY_FLIP_IVB_SPRITE_A (2 << 19)
217#define MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19)
218#define MI_DISPLAY_FLIP_IVB_PLANE_C (4 << 19)
219#define MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19)
220
213#define MI_SET_CONTEXT MI_INSTR(0x18, 0) 221#define MI_SET_CONTEXT MI_INSTR(0x18, 0)
214#define MI_MM_SPACE_GTT (1<<8) 222#define MI_MM_SPACE_GTT (1<<8)
215#define MI_MM_SPACE_PHYSICAL (0<<8) 223#define MI_MM_SPACE_PHYSICAL (0<<8)
@@ -3313,7 +3321,7 @@
3313 3321
3314/* PCH */ 3322/* PCH */
3315 3323
3316/* south display engine interrupt */ 3324/* south display engine interrupt: IBX */
3317#define SDE_AUDIO_POWER_D (1 << 27) 3325#define SDE_AUDIO_POWER_D (1 << 27)
3318#define SDE_AUDIO_POWER_C (1 << 26) 3326#define SDE_AUDIO_POWER_C (1 << 26)
3319#define SDE_AUDIO_POWER_B (1 << 25) 3327#define SDE_AUDIO_POWER_B (1 << 25)
@@ -3349,15 +3357,44 @@
3349#define SDE_TRANSA_CRC_ERR (1 << 1) 3357#define SDE_TRANSA_CRC_ERR (1 << 1)
3350#define SDE_TRANSA_FIFO_UNDER (1 << 0) 3358#define SDE_TRANSA_FIFO_UNDER (1 << 0)
3351#define SDE_TRANS_MASK (0x3f) 3359#define SDE_TRANS_MASK (0x3f)
3352/* CPT */ 3360
3353#define SDE_CRT_HOTPLUG_CPT (1 << 19) 3361/* south display engine interrupt: CPT/PPT */
3362#define SDE_AUDIO_POWER_D_CPT (1 << 31)
3363#define SDE_AUDIO_POWER_C_CPT (1 << 30)
3364#define SDE_AUDIO_POWER_B_CPT (1 << 29)
3365#define SDE_AUDIO_POWER_SHIFT_CPT 29
3366#define SDE_AUDIO_POWER_MASK_CPT (7 << 29)
3367#define SDE_AUXD_CPT (1 << 27)
3368#define SDE_AUXC_CPT (1 << 26)
3369#define SDE_AUXB_CPT (1 << 25)
3370#define SDE_AUX_MASK_CPT (7 << 25)
3354#define SDE_PORTD_HOTPLUG_CPT (1 << 23) 3371#define SDE_PORTD_HOTPLUG_CPT (1 << 23)
3355#define SDE_PORTC_HOTPLUG_CPT (1 << 22) 3372#define SDE_PORTC_HOTPLUG_CPT (1 << 22)
3356#define SDE_PORTB_HOTPLUG_CPT (1 << 21) 3373#define SDE_PORTB_HOTPLUG_CPT (1 << 21)
3374#define SDE_CRT_HOTPLUG_CPT (1 << 19)
3357#define SDE_HOTPLUG_MASK_CPT (SDE_CRT_HOTPLUG_CPT | \ 3375#define SDE_HOTPLUG_MASK_CPT (SDE_CRT_HOTPLUG_CPT | \
3358 SDE_PORTD_HOTPLUG_CPT | \ 3376 SDE_PORTD_HOTPLUG_CPT | \
3359 SDE_PORTC_HOTPLUG_CPT | \ 3377 SDE_PORTC_HOTPLUG_CPT | \
3360 SDE_PORTB_HOTPLUG_CPT) 3378 SDE_PORTB_HOTPLUG_CPT)
3379#define SDE_GMBUS_CPT (1 << 17)
3380#define SDE_AUDIO_CP_REQ_C_CPT (1 << 10)
3381#define SDE_AUDIO_CP_CHG_C_CPT (1 << 9)
3382#define SDE_FDI_RXC_CPT (1 << 8)
3383#define SDE_AUDIO_CP_REQ_B_CPT (1 << 6)
3384#define SDE_AUDIO_CP_CHG_B_CPT (1 << 5)
3385#define SDE_FDI_RXB_CPT (1 << 4)
3386#define SDE_AUDIO_CP_REQ_A_CPT (1 << 2)
3387#define SDE_AUDIO_CP_CHG_A_CPT (1 << 1)
3388#define SDE_FDI_RXA_CPT (1 << 0)
3389#define SDE_AUDIO_CP_REQ_CPT (SDE_AUDIO_CP_REQ_C_CPT | \
3390 SDE_AUDIO_CP_REQ_B_CPT | \
3391 SDE_AUDIO_CP_REQ_A_CPT)
3392#define SDE_AUDIO_CP_CHG_CPT (SDE_AUDIO_CP_CHG_C_CPT | \
3393 SDE_AUDIO_CP_CHG_B_CPT | \
3394 SDE_AUDIO_CP_CHG_A_CPT)
3395#define SDE_FDI_MASK_CPT (SDE_FDI_RXC_CPT | \
3396 SDE_FDI_RXB_CPT | \
3397 SDE_FDI_RXA_CPT)
3361 3398
3362#define SDEISR 0xc4000 3399#define SDEISR 0xc4000
3363#define SDEIMR 0xc4004 3400#define SDEIMR 0xc4004
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 75a70c46ef1b..844e93e1e395 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -453,13 +453,15 @@ intel_crt_detect(struct drm_connector *connector, bool force)
453 struct intel_load_detect_pipe tmp; 453 struct intel_load_detect_pipe tmp;
454 454
455 if (I915_HAS_HOTPLUG(dev)) { 455 if (I915_HAS_HOTPLUG(dev)) {
456 /* We can not rely on the HPD pin always being correctly wired
457 * up, for example many KVM do not pass it through, and so
458 * only trust an assertion that the monitor is connected.
459 */
456 if (intel_crt_detect_hotplug(connector)) { 460 if (intel_crt_detect_hotplug(connector)) {
457 DRM_DEBUG_KMS("CRT detected via hotplug\n"); 461 DRM_DEBUG_KMS("CRT detected via hotplug\n");
458 return connector_status_connected; 462 return connector_status_connected;
459 } else { 463 } else
460 DRM_DEBUG_KMS("CRT not detected via hotplug\n"); 464 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
461 return connector_status_disconnected;
462 }
463 } 465 }
464 466
465 if (intel_crt_detect_ddc(connector)) 467 if (intel_crt_detect_ddc(connector))
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 914789420906..e0aa064def31 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6158,17 +6158,34 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
6158 struct drm_i915_private *dev_priv = dev->dev_private; 6158 struct drm_i915_private *dev_priv = dev->dev_private;
6159 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 6159 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
6160 struct intel_ring_buffer *ring = &dev_priv->ring[BCS]; 6160 struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
6161 uint32_t plane_bit = 0;
6161 int ret; 6162 int ret;
6162 6163
6163 ret = intel_pin_and_fence_fb_obj(dev, obj, ring); 6164 ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
6164 if (ret) 6165 if (ret)
6165 goto err; 6166 goto err;
6166 6167
6168 switch(intel_crtc->plane) {
6169 case PLANE_A:
6170 plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_A;
6171 break;
6172 case PLANE_B:
6173 plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_B;
6174 break;
6175 case PLANE_C:
6176 plane_bit = MI_DISPLAY_FLIP_IVB_PLANE_C;
6177 break;
6178 default:
6179 WARN_ONCE(1, "unknown plane in flip command\n");
6180 ret = -ENODEV;
6181 goto err;
6182 }
6183
6167 ret = intel_ring_begin(ring, 4); 6184 ret = intel_ring_begin(ring, 4);
6168 if (ret) 6185 if (ret)
6169 goto err_unpin; 6186 goto err_unpin;
6170 6187
6171 intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)); 6188 intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
6172 intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode)); 6189 intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
6173 intel_ring_emit(ring, (obj->gtt_offset)); 6190 intel_ring_emit(ring, (obj->gtt_offset));
6174 intel_ring_emit(ring, (MI_NOOP)); 6191 intel_ring_emit(ring, (MI_NOOP));
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b59b6d5b7583..e5b84ff89ca5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -266,10 +266,15 @@ u32 intel_ring_get_active_head(struct intel_ring_buffer *ring)
266 266
267static int init_ring_common(struct intel_ring_buffer *ring) 267static int init_ring_common(struct intel_ring_buffer *ring)
268{ 268{
269 drm_i915_private_t *dev_priv = ring->dev->dev_private; 269 struct drm_device *dev = ring->dev;
270 drm_i915_private_t *dev_priv = dev->dev_private;
270 struct drm_i915_gem_object *obj = ring->obj; 271 struct drm_i915_gem_object *obj = ring->obj;
272 int ret = 0;
271 u32 head; 273 u32 head;
272 274
275 if (HAS_FORCE_WAKE(dev))
276 gen6_gt_force_wake_get(dev_priv);
277
273 /* Stop the ring if it's running. */ 278 /* Stop the ring if it's running. */
274 I915_WRITE_CTL(ring, 0); 279 I915_WRITE_CTL(ring, 0);
275 I915_WRITE_HEAD(ring, 0); 280 I915_WRITE_HEAD(ring, 0);
@@ -317,7 +322,8 @@ static int init_ring_common(struct intel_ring_buffer *ring)
317 I915_READ_HEAD(ring), 322 I915_READ_HEAD(ring),
318 I915_READ_TAIL(ring), 323 I915_READ_TAIL(ring),
319 I915_READ_START(ring)); 324 I915_READ_START(ring));
320 return -EIO; 325 ret = -EIO;
326 goto out;
321 } 327 }
322 328
323 if (!drm_core_check_feature(ring->dev, DRIVER_MODESET)) 329 if (!drm_core_check_feature(ring->dev, DRIVER_MODESET))
@@ -326,9 +332,14 @@ static int init_ring_common(struct intel_ring_buffer *ring)
326 ring->head = I915_READ_HEAD(ring); 332 ring->head = I915_READ_HEAD(ring);
327 ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR; 333 ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
328 ring->space = ring_space(ring); 334 ring->space = ring_space(ring);
335 ring->last_retired_head = -1;
329 } 336 }
330 337
331 return 0; 338out:
339 if (HAS_FORCE_WAKE(dev))
340 gen6_gt_force_wake_put(dev_priv);
341
342 return ret;
332} 343}
333 344
334static int 345static int
@@ -987,6 +998,10 @@ static int intel_init_ring_buffer(struct drm_device *dev,
987 if (ret) 998 if (ret)
988 goto err_unref; 999 goto err_unref;
989 1000
1001 ret = i915_gem_object_set_to_gtt_domain(obj, true);
1002 if (ret)
1003 goto err_unpin;
1004
990 ring->virtual_start = ioremap_wc(dev->agp->base + obj->gtt_offset, 1005 ring->virtual_start = ioremap_wc(dev->agp->base + obj->gtt_offset,
991 ring->size); 1006 ring->size);
992 if (ring->virtual_start == NULL) { 1007 if (ring->virtual_start == NULL) {