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authorChris Leech <christopher.leech@intel.com>2007-03-08 12:57:33 -0500
committerDan Williams <dan.j.williams@intel.com>2007-07-11 18:39:03 -0400
commit000725d56a196e72dc22328324c5ec5506265736 (patch)
tree7189116b48efd57b2de74cc924d39fc885cf4d9e /drivers
parent7dcca30a32aadb0520417521b0c44f42d09fe05c (diff)
ioatdma: Push pending transactions to hardware more frequently
Every 20 descriptors turns out to be to few append commands with newer/faster CPUs. Pushing every 4 still cuts down on MMIO writes to an acceptable level without letting the DMA engine run out of work. Signed-off-by: Chris Leech <christopher.leech@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/ioatdma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/ioatdma.c b/drivers/dma/ioatdma.c
index 850014139556..4e6afd752034 100644
--- a/drivers/dma/ioatdma.c
+++ b/drivers/dma/ioatdma.c
@@ -310,7 +310,7 @@ static dma_cookie_t do_ioat_dma_memcpy(struct ioat_dma_chan *ioat_chan,
310 list_splice_init(&new_chain, ioat_chan->used_desc.prev); 310 list_splice_init(&new_chain, ioat_chan->used_desc.prev);
311 311
312 ioat_chan->pending += desc_count; 312 ioat_chan->pending += desc_count;
313 if (ioat_chan->pending >= 20) { 313 if (ioat_chan->pending >= 4) {
314 append = 1; 314 append = 1;
315 ioat_chan->pending = 0; 315 ioat_chan->pending = 0;
316 } 316 }
@@ -818,7 +818,7 @@ static void __devexit ioat_remove(struct pci_dev *pdev)
818} 818}
819 819
820/* MODULE API */ 820/* MODULE API */
821MODULE_VERSION("1.7"); 821MODULE_VERSION("1.9");
822MODULE_LICENSE("GPL"); 822MODULE_LICENSE("GPL");
823MODULE_AUTHOR("Intel Corporation"); 823MODULE_AUTHOR("Intel Corporation");
824 824