Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 69 insertions, 13 deletions

diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 7e5c266cda48..d4d8d1fdccc4 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -42,18 +42,21 @@
 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
 #define SIO_REG_DEVREV          0x22    /* Device revision */
 #define SIO_REG_MANID           0x23    /* Fintek ID (2 bytes) */
+#define SIO_REG_ROM_ADDR_SEL    0x27    /* ROM address select */
+#define SIO_REG_MFUNCT1         0x29    /* Multi function select 1 */
+#define SIO_REG_MFUNCT2         0x2a    /* Multi function select 2 */
+#define SIO_REG_MFUNCT3         0x2b    /* Multi function select 3 */
 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
 
 #define SIO_FINTEK_ID           0x1934  /* Manufacturers ID */
-#define SIO_F71808_ID           0x0901  /* Chipset ID */
-#define SIO_F71858_ID           0x0507  /* Chipset ID */
+#define SIO_F71808_ID           0x0901  /* Chipset ID */
+#define SIO_F71858_ID           0x0507  /* Chipset ID */
 #define SIO_F71862_ID           0x0601  /* Chipset ID */
+#define SIO_F71869_ID           0x0814  /* Chipset ID */
 #define SIO_F71882_ID           0x0541  /* Chipset ID */
 #define SIO_F71889_ID           0x0723  /* Chipset ID */
 
-#define F71882FG_REG_START              0x01
-
 #define F71808FG_REG_WDO_CONF           0xf0
 #define F71808FG_REG_WDT_CONF           0xf5
 #define F71808FG_REG_WD_TIME            0xf6
@@ -70,13 +73,15 @@
 #define WATCHDOG_MAX_TIMEOUT    (60 * 255)
 #define WATCHDOG_PULSE_WIDTH    125     /* 125 ms, default pulse width for
                                            watchdog signal */
+#define WATCHDOG_F71862FG_PIN   63      /* default watchdog reset output
+                                           pin number 63 */
 
 static unsigned short force_id;
 module_param(force_id, ushort, 0);
 MODULE_PARM_DESC(force_id, "Override the detected device ID");
 
 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
-static int timeout = 60;        /* default timeout in seconds */
+static int timeout = WATCHDOG_TIMEOUT;  /* default timeout in seconds */
 module_param(timeout, int, 0);
 MODULE_PARM_DESC(timeout,
         "Watchdog timeout in seconds. 1<= timeout <="
@@ -89,6 +94,12 @@ MODULE_PARM_DESC(pulse_width,
         "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
                         " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
 
+static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
+module_param(f71862fg_pin, uint, 0);
+MODULE_PARM_DESC(f71862fg_pin,
+        "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
+                        " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
+
 static int nowayout = WATCHDOG_NOWAYOUT;
 module_param(nowayout, bool, 0444);
 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
@@ -98,12 +109,13 @@ module_param(start_withtimeout, uint, 0);
 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
         " given initial timeout. Zero (default) disables this feature.");
 
-enum chips { f71808fg, f71858fg, f71862fg, f71882fg, f71889fg };
+enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
 
 static const char *f71808e_names[] = {
         "f71808fg",
         "f71858fg",
         "f71862fg",
+        "f71869",
         "f71882fg",
         "f71889fg",
 };
@@ -282,6 +294,28 @@ exit_unlock:
         return err;
 }
 
+static int f71862fg_pin_configure(unsigned short ioaddr)
+{
+        /* When ioaddr is non-zero the calling function has to take care of
+           mutex handling and superio preparation! */
+
+        if (f71862fg_pin == 63) {
+                if (ioaddr) {
+                        /* SPI must be disabled first to use this pin! */
+                        superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
+                        superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
+                }
+        } else if (f71862fg_pin == 56) {
+                if (ioaddr)
+                        superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
+        } else {
+                printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",
+                                f71862fg_pin);
+                return -EINVAL;
+        }
+        return 0;
+}
+
 static int watchdog_start(void)
 {
         /* Make sure we don't die as soon as the watchdog is enabled below */
@@ -299,13 +333,30 @@ static int watchdog_start(void)
         switch (watchdog.type) {
         case f71808fg:
                 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
-                superio_clear_bit(watchdog.sioaddr, 0x2a, 3);
-                superio_clear_bit(watchdog.sioaddr, 0x2b, 3);
+                superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
+                superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
+                break;
+
+        case f71862fg:
+                err = f71862fg_pin_configure(watchdog.sioaddr);
+                if (err)
+                        goto exit_superio;
+                break;
+
+        case f71869:
+                /* GPIO14 --> WDTRST# */
+                superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
                 break;
 
         case f71882fg:
                 /* Set pin 56 to WDTRST# */
-                superio_set_bit(watchdog.sioaddr, 0x29, 1);
+                superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
+                break;
+
+        case f71889fg:
+                /* set pin 40 to WDTRST# */
+                superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
+                        superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
                 break;
 
         default:
@@ -705,14 +756,19 @@ static int __init f71808e_find(int sioaddr)
         case SIO_F71808_ID:
                 watchdog.type = f71808fg;
                 break;
+        case SIO_F71862_ID:
+                watchdog.type = f71862fg;
+                err = f71862fg_pin_configure(0); /* validate module parameter */
+                break;
+        case SIO_F71869_ID:
+                watchdog.type = f71869;
+                break;
         case SIO_F71882_ID:
                 watchdog.type = f71882fg;
                 break;
-        case SIO_F71862_ID:
         case SIO_F71889_ID:
-                /* These have a watchdog, though it isn't implemented (yet). */
-                err = -ENOSYS;
-                goto exit;
+                watchdog.type = f71889fg;
+                break;
         case SIO_F71858_ID:
                 /* Confirmed (by datasheet) not to have a watchdog. */
                 err = -ENODEV;