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authorAlexander Shiyan <shc_work@mail.ru>2014-02-22 02:29:51 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-28 18:27:09 -0500
commitfc945d6eb70ebf29532b94ae309c0d4c6d609c3c (patch)
tree736db6b4c35b0b7d7e2c4cb61b7ea7e61cb181b0 /drivers/w1/masters
parent18fd9e359f2515286ae7c7ac8fd4362675c8eb43 (diff)
w1: mxc_w1: Enable driver compilation with COMPILE_TEST
This helps increasing build testing coverage. To do this, __raw_{read,write}b() functions was be replaced with simple {read,write}b() variants. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/w1/masters')
-rw-r--r--drivers/w1/masters/Kconfig2
-rw-r--r--drivers/w1/masters/mxc_w1.c12
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig
index 6ffe120efcc3..1708b2300c7a 100644
--- a/drivers/w1/masters/Kconfig
+++ b/drivers/w1/masters/Kconfig
@@ -36,7 +36,7 @@ config W1_MASTER_DS2482
36 36
37config W1_MASTER_MXC 37config W1_MASTER_MXC
38 tristate "Freescale MXC 1-wire busmaster" 38 tristate "Freescale MXC 1-wire busmaster"
39 depends on ARCH_MXC 39 depends on ARCH_MXC || COMPILE_TEST
40 help 40 help
41 Say Y here to enable MXC 1-wire host 41 Say Y here to enable MXC 1-wire host
42 42
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 8e3de6aa88e8..67b067a3e2ab 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -53,10 +53,10 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
53 unsigned int timeout_cnt = 0; 53 unsigned int timeout_cnt = 0;
54 struct mxc_w1_device *dev = data; 54 struct mxc_w1_device *dev = data;
55 55
56 __raw_writeb(MXC_W1_CONTROL_RPP, (dev->regs + MXC_W1_CONTROL)); 56 writeb(MXC_W1_CONTROL_RPP, (dev->regs + MXC_W1_CONTROL));
57 57
58 while (1) { 58 while (1) {
59 reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL); 59 reg_val = readb(dev->regs + MXC_W1_CONTROL);
60 60
61 if (!(reg_val & MXC_W1_CONTROL_RPP) || 61 if (!(reg_val & MXC_W1_CONTROL_RPP) ||
62 timeout_cnt > MXC_W1_RESET_TIMEOUT) 62 timeout_cnt > MXC_W1_RESET_TIMEOUT)
@@ -82,16 +82,16 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
82 * datasheet. 82 * datasheet.
83 */ 83 */
84 84
85 __raw_writeb(MXC_W1_CONTROL_WR(bit), ctrl_addr); 85 writeb(MXC_W1_CONTROL_WR(bit), ctrl_addr);
86 86
87 while (timeout_cnt--) { 87 while (timeout_cnt--) {
88 if (!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_WR(bit))) 88 if (!(readb(ctrl_addr) & MXC_W1_CONTROL_WR(bit)))
89 break; 89 break;
90 90
91 udelay(1); 91 udelay(1);
92 } 92 }
93 93
94 return !!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_RDST); 94 return !!(readb(ctrl_addr) & MXC_W1_CONTROL_RDST);
95} 95}
96 96
97static int mxc_w1_probe(struct platform_device *pdev) 97static int mxc_w1_probe(struct platform_device *pdev)
@@ -131,7 +131,7 @@ static int mxc_w1_probe(struct platform_device *pdev)
131 if (err) 131 if (err)
132 return err; 132 return err;
133 133
134 __raw_writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER); 134 writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER);
135 135
136 mdev->bus_master.data = mdev; 136 mdev->bus_master.data = mdev;
137 mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus; 137 mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus;