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authorJonathan Corbet <corbet@lwn.net>2010-04-09 16:06:16 -0400
committerJonathan Corbet <corbet@lwn.net>2010-04-20 16:23:19 -0400
commitf1b99aa9dbe908b2839885aa999d6e8512fe1040 (patch)
tree47d6f5f805a8bebb34336c13fed76f752028b395 /drivers/video
parent9ca43cf41d014e12f4b25d4538f362d7513448dd (diff)
viafb: Unify duplicated set_bpp() code
As suggested by Florian: make both mode-setting paths use the same code. Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: ScottFang@viatech.com.cn Cc: JosephChan@via.com.tw Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/via/accel.c78
1 files changed, 33 insertions, 45 deletions
diff --git a/drivers/video/via/accel.c b/drivers/video/via/accel.c
index a52147cf7f09..7c1d9c41623d 100644
--- a/drivers/video/via/accel.c
+++ b/drivers/video/via/accel.c
@@ -20,12 +20,42 @@
20 */ 20 */
21#include "global.h" 21#include "global.h"
22 22
23/*
24 * Figure out an appropriate bytes-per-pixel setting.
25 */
26static int viafb_set_bpp(void __iomem *engine, u8 bpp)
27{
28 u32 gemode;
29
30 /* Preserve the reserved bits */
31 /* Lowest 2 bits to zero gives us no rotation */
32 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;
33 switch (bpp) {
34 case 8:
35 gemode |= VIA_GEM_8bpp;
36 break;
37 case 16:
38 gemode |= VIA_GEM_16bpp;
39 break;
40 case 32:
41 gemode |= VIA_GEM_32bpp;
42 break;
43 default:
44 printk(KERN_WARNING "viafb_set_bpp: Unsupported bpp %d\n", bpp);
45 return -EINVAL;
46 }
47 writel(gemode, engine + VIA_REG_GEMODE);
48 return 0;
49}
50
51
23static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height, 52static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height,
24 u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y, 53 u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y,
25 u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y, 54 u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y,
26 u32 fg_color, u32 bg_color, u8 fill_rop) 55 u32 fg_color, u32 bg_color, u8 fill_rop)
27{ 56{
28 u32 ge_cmd = 0, tmp, i; 57 u32 ge_cmd = 0, tmp, i;
58 int ret;
29 59
30 if (!op || op > 3) { 60 if (!op || op > 3) {
31 printk(KERN_WARNING "hw_bitblt_1: Invalid operation: %d\n", op); 61 printk(KERN_WARNING "hw_bitblt_1: Invalid operation: %d\n", op);
@@ -59,22 +89,9 @@ static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height,
59 } 89 }
60 } 90 }
61 91
62 switch (dst_bpp) { 92 ret = viafb_set_bpp(engine, dst_bpp);
63 case 8: 93 if (ret)
64 tmp = 0x00000000; 94 return ret;
65 break;
66 case 16:
67 tmp = 0x00000100;
68 break;
69 case 32:
70 tmp = 0x00000300;
71 break;
72 default:
73 printk(KERN_WARNING "hw_bitblt_1: Unsupported bpp %d\n",
74 dst_bpp);
75 return -EINVAL;
76 }
77 writel(tmp, engine + 0x04);
78 95
79 if (op != VIA_BITBLT_FILL) { 96 if (op != VIA_BITBLT_FILL) {
80 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000) 97 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000)
@@ -165,35 +182,6 @@ static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height,
165 return 0; 182 return 0;
166} 183}
167 184
168/*
169 * Figure out an appropriate bytes-per-pixel setting.
170 */
171static int viafb_set_bpp(void __iomem *engine, u8 bpp)
172{
173 u32 gemode;
174
175 /* Preserve the reserved bits */
176 /* Lowest 2 bits to zero gives us no rotation */
177 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc;
178 switch (bpp) {
179 case 8:
180 gemode |= VIA_GEM_8bpp;
181 break;
182 case 16:
183 gemode |= VIA_GEM_16bpp;
184 break;
185 case 32:
186 gemode |= VIA_GEM_32bpp;
187 break;
188 default:
189 printk(KERN_WARNING "hw_bitblt_2: Unsupported bpp %d\n", bpp);
190 return -EINVAL;
191 }
192 writel(gemode, engine + VIA_REG_GEMODE);
193 return 0;
194}
195
196
197static int hw_bitblt_2(void __iomem *engine, u8 op, u32 width, u32 height, 185static int hw_bitblt_2(void __iomem *engine, u8 op, u32 width, u32 height,
198 u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y, 186 u8 dst_bpp, u32 dst_addr, u32 dst_pitch, u32 dst_x, u32 dst_y,
199 u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y, 187 u32 *src_mem, u32 src_addr, u32 src_pitch, u32 src_x, u32 src_y,