Merge branch '3.17/hdmi-infoframe' into for-next

12 files changed, 193 insertions, 692 deletions

diff --git a/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c b/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
index 4420ccb69aa9..131c6e260898 100644
--- a/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
+++ b/drivers/video/fbdev/omap2/displays-new/connector-hdmi.c
@@ -262,6 +262,23 @@ static int hdmic_audio_config(struct omap_dss_device *dssdev,
         return 0;
 }
 
+static int hdmic_set_hdmi_mode(struct omap_dss_device *dssdev, bool hdmi_mode)
+{
+        struct panel_drv_data *ddata = to_panel_data(dssdev);
+        struct omap_dss_device *in = ddata->in;
+
+        return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode);
+}
+
+static int hdmic_set_infoframe(struct omap_dss_device *dssdev,
+                const struct hdmi_avi_infoframe *avi)
+{
+        struct panel_drv_data *ddata = to_panel_data(dssdev);
+        struct omap_dss_device *in = ddata->in;
+
+        return in->ops.hdmi->set_infoframe(in, avi);
+}
+
 static struct omap_dss_driver hdmic_driver = {
         .connect                = hdmic_connect,
         .disconnect             = hdmic_disconnect,
@@ -277,6 +294,8 @@ static struct omap_dss_driver hdmic_driver = {
 
         .read_edid              = hdmic_read_edid,
         .detect                 = hdmic_detect,
+        .set_hdmi_mode          = hdmic_set_hdmi_mode,
+        .set_hdmi_infoframe     = hdmic_set_infoframe,
 
         .audio_enable           = hdmic_audio_enable,
         .audio_disable          = hdmic_audio_disable,
diff --git a/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c b/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
index 7e33686171e3..c891d8f84cb2 100644
--- a/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
+++ b/drivers/video/fbdev/omap2/displays-new/encoder-tpd12s015.c
@@ -242,6 +242,24 @@ static int tpd_audio_config(struct omap_dss_device *dssdev,
         return in->ops.hdmi->audio_config(in, audio);
 }
 
+static int tpd_set_infoframe(struct omap_dss_device *dssdev,
+                const struct hdmi_avi_infoframe *avi)
+{
+        struct panel_drv_data *ddata = to_panel_data(dssdev);
+        struct omap_dss_device *in = ddata->in;
+
+        return in->ops.hdmi->set_infoframe(in, avi);
+}
+
+static int tpd_set_hdmi_mode(struct omap_dss_device *dssdev,
+                bool hdmi_mode)
+{
+        struct panel_drv_data *ddata = to_panel_data(dssdev);
+        struct omap_dss_device *in = ddata->in;
+
+        return in->ops.hdmi->set_hdmi_mode(in, hdmi_mode);
+}
+
 static const struct omapdss_hdmi_ops tpd_hdmi_ops = {
         .connect                = tpd_connect,
         .disconnect             = tpd_disconnect,
@@ -255,6 +273,8 @@ static const struct omapdss_hdmi_ops tpd_hdmi_ops = {
 
         .read_edid              = tpd_read_edid,
         .detect                 = tpd_detect,
+        .set_infoframe          = tpd_set_infoframe,
+        .set_hdmi_mode          = tpd_set_hdmi_mode,
 
         .audio_enable           = tpd_audio_enable,
         .audio_disable          = tpd_audio_disable,
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
index c7ba4d8b928a..617f8d2f5127 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
@@ -817,6 +817,10 @@ static int acx565akm_probe(struct spi_device *spi)
 
         bldev = backlight_device_register("acx565akm", &ddata->spi->dev,
                         ddata, &acx565akm_bl_ops, &props);
+        if (IS_ERR(bldev)) {
+                r = PTR_ERR(bldev);
+                goto err_reg_bl;
+        }
         ddata->bl_dev = bldev;
         if (ddata->has_cabc) {
                 r = sysfs_create_group(&bldev->dev.kobj, &bldev_attr_group);
@@ -862,6 +866,7 @@ err_reg:
         sysfs_remove_group(&bldev->dev.kobj, &bldev_attr_group);
 err_sysfs:
         backlight_device_unregister(bldev);
+err_reg_bl:
 err_detect:
 err_gpio:
         omap_dss_put_device(ddata->in);
diff --git a/drivers/video/fbdev/omap2/dss/Kconfig b/drivers/video/fbdev/omap2/dss/Kconfig
index 285bcd103dce..3d5eb6c36c22 100644
--- a/drivers/video/fbdev/omap2/dss/Kconfig
+++ b/drivers/video/fbdev/omap2/dss/Kconfig
@@ -5,6 +5,7 @@ menuconfig OMAP2_DSS
         tristate "OMAP2+ Display Subsystem support"
         select VIDEOMODE_HELPERS
         select OMAP2_DSS_INIT
+        select HDMI
         help
           OMAP2+ Display Subsystem support.
 
diff --git a/drivers/video/fbdev/omap2/dss/dispc.c b/drivers/video/fbdev/omap2/dss/dispc.c
index 7aa33b0f4a1f..be053aa80880 100644
--- a/drivers/video/fbdev/omap2/dss/dispc.c
+++ b/drivers/video/fbdev/omap2/dss/dispc.c
@@ -2879,19 +2879,24 @@ static bool _dispc_mgr_pclk_ok(enum omap_channel channel,
 bool dispc_mgr_timings_ok(enum omap_channel channel,
                 const struct omap_video_timings *timings)
 {
-        bool timings_ok;
-
-        timings_ok = _dispc_mgr_size_ok(timings->x_res, timings->y_res);
+        if (!_dispc_mgr_size_ok(timings->x_res, timings->y_res))
+                return false;
 
-        timings_ok &= _dispc_mgr_pclk_ok(channel, timings->pixelclock);
+        if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock))
+                return false;
 
         if (dss_mgr_is_lcd(channel)) {
-                timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp,
+                /* TODO: OMAP4+ supports interlace for LCD outputs */
+                if (timings->interlace)
+                        return false;
+
+                if (!_dispc_lcd_timings_ok(timings->hsw, timings->hfp,
                                 timings->hbp, timings->vsw, timings->vfp,
-                                timings->vbp);
+                                timings->vbp))
+                        return false;
         }
 
-        return timings_ok;
+        return true;
 }
 
 static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
@@ -3257,13 +3262,10 @@ static void dispc_dump_regs(struct seq_file *s)
                 if (i == OMAP_DSS_CHANNEL_DIGIT)
                         continue;
 
-                DUMPREG(i, DISPC_DEFAULT_COLOR);
-                DUMPREG(i, DISPC_TRANS_COLOR);
                 DUMPREG(i, DISPC_TIMING_H);
                 DUMPREG(i, DISPC_TIMING_V);
                 DUMPREG(i, DISPC_POL_FREQ);
                 DUMPREG(i, DISPC_DIVISORo);
-                DUMPREG(i, DISPC_SIZE_MGR);
 
                 DUMPREG(i, DISPC_DATA_CYCLE1);
                 DUMPREG(i, DISPC_DATA_CYCLE2);
diff --git a/drivers/video/fbdev/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/dss/hdmi.h
index fbee07816337..262771b9b76b 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi.h
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
+#include <linux/hdmi.h>
 #include <video/omapdss.h>
 
 #include "dss.h"
@@ -142,7 +143,7 @@ enum hdmi_audio_samples_perword {
         HDMI_AUDIO_ONEWORD_TWOSAMPLES = 1
 };
 
-enum hdmi_audio_sample_size {
+enum hdmi_audio_sample_size_omap {
         HDMI_AUDIO_SAMPLE_16BITS = 0,
         HDMI_AUDIO_SAMPLE_24BITS = 1
 };
@@ -178,59 +179,6 @@ enum hdmi_audio_mclk_mode {
         HDMI_AUDIO_MCLK_192FS = 7
 };
 
-/* INFOFRAME_AVI_ and INFOFRAME_AUDIO_ definitions */
-enum hdmi_core_infoframe {
-        HDMI_INFOFRAME_AVI_DB1Y_RGB = 0,
-        HDMI_INFOFRAME_AVI_DB1Y_YUV422 = 1,
-        HDMI_INFOFRAME_AVI_DB1Y_YUV444 = 2,
-        HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF = 0,
-        HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_ON =  1,
-        HDMI_INFOFRAME_AVI_DB1B_NO = 0,
-        HDMI_INFOFRAME_AVI_DB1B_VERT = 1,
-        HDMI_INFOFRAME_AVI_DB1B_HORI = 2,
-        HDMI_INFOFRAME_AVI_DB1B_VERTHORI = 3,
-        HDMI_INFOFRAME_AVI_DB1S_0 = 0,
-        HDMI_INFOFRAME_AVI_DB1S_1 = 1,
-        HDMI_INFOFRAME_AVI_DB1S_2 = 2,
-        HDMI_INFOFRAME_AVI_DB2C_NO = 0,
-        HDMI_INFOFRAME_AVI_DB2C_ITU601 = 1,
-        HDMI_INFOFRAME_AVI_DB2C_ITU709 = 2,
-        HDMI_INFOFRAME_AVI_DB2C_EC_EXTENDED = 3,
-        HDMI_INFOFRAME_AVI_DB2M_NO = 0,
-        HDMI_INFOFRAME_AVI_DB2M_43 = 1,
-        HDMI_INFOFRAME_AVI_DB2M_169 = 2,
-        HDMI_INFOFRAME_AVI_DB2R_SAME = 8,
-        HDMI_INFOFRAME_AVI_DB2R_43 = 9,
-        HDMI_INFOFRAME_AVI_DB2R_169 = 10,
-        HDMI_INFOFRAME_AVI_DB2R_149 = 11,
-        HDMI_INFOFRAME_AVI_DB3ITC_NO = 0,
-        HDMI_INFOFRAME_AVI_DB3ITC_YES = 1,
-        HDMI_INFOFRAME_AVI_DB3EC_XVYUV601 = 0,
-        HDMI_INFOFRAME_AVI_DB3EC_XVYUV709 = 1,
-        HDMI_INFOFRAME_AVI_DB3Q_DEFAULT = 0,
-        HDMI_INFOFRAME_AVI_DB3Q_LR = 1,
-        HDMI_INFOFRAME_AVI_DB3Q_FR = 2,
-        HDMI_INFOFRAME_AVI_DB3SC_NO = 0,
-        HDMI_INFOFRAME_AVI_DB3SC_HORI = 1,
-        HDMI_INFOFRAME_AVI_DB3SC_VERT = 2,
-        HDMI_INFOFRAME_AVI_DB3SC_HORIVERT = 3,
-        HDMI_INFOFRAME_AVI_DB5PR_NO = 0,
-        HDMI_INFOFRAME_AVI_DB5PR_2 = 1,
-        HDMI_INFOFRAME_AVI_DB5PR_3 = 2,
-        HDMI_INFOFRAME_AVI_DB5PR_4 = 3,
-        HDMI_INFOFRAME_AVI_DB5PR_5 = 4,
-        HDMI_INFOFRAME_AVI_DB5PR_6 = 5,
-        HDMI_INFOFRAME_AVI_DB5PR_7 = 6,
-        HDMI_INFOFRAME_AVI_DB5PR_8 = 7,
-        HDMI_INFOFRAME_AVI_DB5PR_9 = 8,
-        HDMI_INFOFRAME_AVI_DB5PR_10 = 9,
-};
-
-struct hdmi_cm {
-        int     code;
-        int     mode;
-};
-
 struct hdmi_video_format {
         enum hdmi_packing_mode  packing_mode;
         u32                     y_res;  /* Line per panel */
@@ -239,7 +187,8 @@ struct hdmi_video_format {
 
 struct hdmi_config {
         struct omap_video_timings timings;
-        struct hdmi_cm cm;
+        struct hdmi_avi_infoframe infoframe;
+        enum hdmi_core_hdmi_dvi hdmi_dvi_mode;
 };
 
 /* HDMI PLL structure */
@@ -260,7 +209,7 @@ struct hdmi_audio_format {
         enum hdmi_audio_justify                 justification;
         enum hdmi_audio_sample_order            sample_order;
         enum hdmi_audio_samples_perword         samples_per_word;
-        enum hdmi_audio_sample_size             sample_size;
+        enum hdmi_audio_sample_size_omap        sample_size;
         enum hdmi_audio_blk_strt_end_sig        en_sig_blk_strt_end;
 };
 
@@ -298,47 +247,6 @@ struct hdmi_core_audio_config {
         bool                                    en_spdif;
 };
 
-/*
- * Refer to section 8.2 in HDMI 1.3 specification for
- * details about infoframe databytes
- */
-struct hdmi_core_infoframe_avi {
-        /* Y0, Y1 rgb,yCbCr */
-        u8      db1_format;
-        /* A0  Active information Present */
-        u8      db1_active_info;
-        /* B0, B1 Bar info data valid */
-        u8      db1_bar_info_dv;
-        /* S0, S1 scan information */
-        u8      db1_scan_info;
-        /* C0, C1 colorimetry */
-        u8      db2_colorimetry;
-        /* M0, M1 Aspect ratio (4:3, 16:9) */
-        u8      db2_aspect_ratio;
-        /* R0...R3 Active format aspect ratio */
-        u8      db2_active_fmt_ar;
-        /* ITC IT content. */
-        u8      db3_itc;
-        /* EC0, EC1, EC2 Extended colorimetry */
-        u8      db3_ec;
-        /* Q1, Q0 Quantization range */
-        u8      db3_q_range;
-        /* SC1, SC0 Non-uniform picture scaling */
-        u8      db3_nup_scaling;
-        /* VIC0..6 Video format identification */
-        u8      db4_videocode;
-        /* PR0..PR3 Pixel repetition factor */
-        u8      db5_pixel_repeat;
-        /* Line number end of top bar */
-        u16     db6_7_line_eoftop;
-        /* Line number start of bottom bar */
-        u16     db8_9_line_sofbottom;
-        /* Pixel number end of left bar */
-        u16     db10_11_pixel_eofleft;
-        /* Pixel number start of right bar */
-        u16     db12_13_pixel_sofright;
-};
-
 struct hdmi_wp_data {
         void __iomem *base;
 };
@@ -358,8 +266,6 @@ struct hdmi_phy_data {
 
 struct hdmi_core_data {
         void __iomem *base;
-
-        struct hdmi_core_infoframe_avi avi_cfg;
 };
 
 static inline void hdmi_write_reg(void __iomem *base_addr, const u32 idx,
@@ -425,9 +331,6 @@ int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy);
 int hdmi_phy_parse_lanes(struct hdmi_phy_data *phy, const u32 *lanes);
 
 /* HDMI common funcs */
-const struct hdmi_config *hdmi_default_timing(void);
-const struct hdmi_config *hdmi_get_timings(int mode, int code);
-struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing);
 int hdmi_parse_lanes_of(struct platform_device *pdev, struct device_node *ep,
         struct hdmi_phy_data *phy);
 
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
index 626aad2bef46..6a8550cf43e5 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
@@ -281,29 +281,11 @@ static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
                 struct omap_video_timings *timings)
 {
-        struct hdmi_cm cm;
-        const struct hdmi_config *t;
-
         mutex_lock(&hdmi.lock);
 
-        cm = hdmi_get_code(timings);
-        hdmi.cfg.cm = cm;
-
-        t = hdmi_get_timings(cm.mode, cm.code);
-        if (t != NULL) {
-                hdmi.cfg = *t;
-
-                dispc_set_tv_pclk(t->timings.pixelclock);
-        } else {
-                hdmi.cfg.timings = *timings;
-                hdmi.cfg.cm.code = 0;
-                hdmi.cfg.cm.mode = HDMI_DVI;
-
-                dispc_set_tv_pclk(timings->pixelclock);
-        }
+        hdmi.cfg.timings = *timings;
 
-        DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ?
-                        "DVI" : "HDMI", hdmi.cfg.cm.code);
+        dispc_set_tv_pclk(timings->pixelclock);
 
         mutex_unlock(&hdmi.lock);
 }
@@ -311,14 +293,7 @@ static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
                 struct omap_video_timings *timings)
 {
-        const struct hdmi_config *cfg;
-        struct hdmi_cm cm = hdmi.cfg.cm;
-
-        cfg = hdmi_get_timings(cm.mode, cm.code);
-        if (cfg == NULL)
-                cfg = hdmi_default_timing();
-
-        memcpy(timings, &cfg->timings, sizeof(cfg->timings));
+        *timings = hdmi.cfg.timings;
 }
 
 static void hdmi_dump_regs(struct seq_file *s)
@@ -516,7 +491,7 @@ static int hdmi_audio_enable(struct omap_dss_device *dssdev)
 
         mutex_lock(&hdmi.lock);
 
-        if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
+        if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
                 r = -EPERM;
                 goto err;
         }
@@ -554,7 +529,7 @@ static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
 
         mutex_lock(&hdmi.lock);
 
-        r = hdmi_mode_has_audio(hdmi.cfg.cm.mode);
+        r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
 
         mutex_unlock(&hdmi.lock);
         return r;
@@ -568,7 +543,7 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev,
 
         mutex_lock(&hdmi.lock);
 
-        if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
+        if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
                 r = -EPERM;
                 goto err;
         }
@@ -615,6 +590,20 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev,
 }
 #endif
 
+static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
+                const struct hdmi_avi_infoframe *avi)
+{
+        hdmi.cfg.infoframe = *avi;
+        return 0;
+}
+
+static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
+                bool hdmi_mode)
+{
+        hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
+        return 0;
+}
+
 static const struct omapdss_hdmi_ops hdmi_ops = {
         .connect                = hdmi_connect,
         .disconnect             = hdmi_disconnect,
@@ -627,6 +616,8 @@ static const struct omapdss_hdmi_ops hdmi_ops = {
         .get_timings            = hdmi_display_get_timings,
 
         .read_edid              = hdmi_read_edid,
+        .set_infoframe          = hdmi_set_infoframe,
+        .set_hdmi_mode          = hdmi_set_hdmi_mode,
 
         .audio_enable           = hdmi_audio_enable,
         .audio_disable          = hdmi_audio_disable,
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4_core.c b/drivers/video/fbdev/omap2/dss/hdmi4_core.c
index 8bde7b7e95ff..4ad39cfce254 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4_core.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4_core.c
@@ -197,9 +197,7 @@ int hdmi4_read_edid(struct hdmi_core_data *core, u8 *edid, int len)
         return l;
 }
 
-static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
-                        struct hdmi_core_infoframe_avi *avi_cfg,
-                        struct hdmi_core_packet_enable_repeat *repeat_cfg)
+static void hdmi_core_init(struct hdmi_core_video_config *video_cfg)
 {
         DSSDBG("Enter hdmi_core_init\n");
 
@@ -210,35 +208,6 @@ static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
         video_cfg->pkt_mode = HDMI_PACKETMODERESERVEDVALUE;
         video_cfg->hdmi_dvi = HDMI_DVI;
         video_cfg->tclk_sel_clkmult = HDMI_FPLL10IDCK;
-
-        /* info frame */
-        avi_cfg->db1_format = 0;
-        avi_cfg->db1_active_info = 0;
-        avi_cfg->db1_bar_info_dv = 0;
-        avi_cfg->db1_scan_info = 0;
-        avi_cfg->db2_colorimetry = 0;
-        avi_cfg->db2_aspect_ratio = 0;
-        avi_cfg->db2_active_fmt_ar = 0;
-        avi_cfg->db3_itc = 0;
-        avi_cfg->db3_ec = 0;
-        avi_cfg->db3_q_range = 0;
-        avi_cfg->db3_nup_scaling = 0;
-        avi_cfg->db4_videocode = 0;
-        avi_cfg->db5_pixel_repeat = 0;
-        avi_cfg->db6_7_line_eoftop = 0;
-        avi_cfg->db8_9_line_sofbottom = 0;
-        avi_cfg->db10_11_pixel_eofleft = 0;
-        avi_cfg->db12_13_pixel_sofright = 0;
-
-        /* packet enable and repeat */
-        repeat_cfg->audio_pkt = 0;
-        repeat_cfg->audio_pkt_repeat = 0;
-        repeat_cfg->avi_infoframe = 0;
-        repeat_cfg->avi_infoframe_repeat = 0;
-        repeat_cfg->gen_cntrl_pkt = 0;
-        repeat_cfg->gen_cntrl_pkt_repeat = 0;
-        repeat_cfg->generic_pkt = 0;
-        repeat_cfg->generic_pkt_repeat = 0;
 }
 
 static void hdmi_core_powerdown_disable(struct hdmi_core_data *core)
@@ -303,80 +272,22 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
                         HDMI_CORE_SYS_TMDS_CTRL, cfg->tclk_sel_clkmult, 6, 5);
 }
 
-static void hdmi_core_aux_infoframe_avi_config(struct hdmi_core_data *core)
+static void hdmi_core_write_avi_infoframe(struct hdmi_core_data *core,
+        struct hdmi_avi_infoframe *frame)
 {
-        u32 val;
-        char sum = 0, checksum = 0;
         void __iomem *av_base = hdmi_av_base(core);
-        struct hdmi_core_infoframe_avi info_avi = core->avi_cfg;
-
-        sum += 0x82 + 0x002 + 0x00D;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_TYPE, 0x082);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_VERS, 0x002);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_LEN, 0x00D);
-
-        val = (info_avi.db1_format << 5) |
-                (info_avi.db1_active_info << 4) |
-                (info_avi.db1_bar_info_dv << 2) |
-                (info_avi.db1_scan_info);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(0), val);
-        sum += val;
-
-        val = (info_avi.db2_colorimetry << 6) |
-                (info_avi.db2_aspect_ratio << 4) |
-                (info_avi.db2_active_fmt_ar);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(1), val);
-        sum += val;
-
-        val = (info_avi.db3_itc << 7) |
-                (info_avi.db3_ec << 4) |
-                (info_avi.db3_q_range << 2) |
-                (info_avi.db3_nup_scaling);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(2), val);
-        sum += val;
-
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(3),
-                                        info_avi.db4_videocode);
-        sum += info_avi.db4_videocode;
-
-        val = info_avi.db5_pixel_repeat;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(4), val);
-        sum += val;
-
-        val = info_avi.db6_7_line_eoftop & 0x00FF;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(5), val);
-        sum += val;
-
-        val = ((info_avi.db6_7_line_eoftop >> 8) & 0x00FF);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(6), val);
-        sum += val;
-
-        val = info_avi.db8_9_line_sofbottom & 0x00FF;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(7), val);
-        sum += val;
-
-        val = ((info_avi.db8_9_line_sofbottom >> 8) & 0x00FF);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(8), val);
-        sum += val;
-
-        val = info_avi.db10_11_pixel_eofleft & 0x00FF;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(9), val);
-        sum += val;
-
-        val = ((info_avi.db10_11_pixel_eofleft >> 8) & 0x00FF);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(10), val);
-        sum += val;
-
-        val = info_avi.db12_13_pixel_sofright & 0x00FF;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(11), val);
-        sum += val;
-
-        val = ((info_avi.db12_13_pixel_sofright >> 8) & 0x00FF);
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_DBYTE(12), val);
-        sum += val;
+        u8 data[HDMI_INFOFRAME_SIZE(AVI)];
+        int i;
 
-        checksum = 0x100 - sum;
-        hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_CHSUM, checksum);
+        hdmi_avi_infoframe_pack(frame, data, sizeof(data));
+
+        print_hex_dump_debug("AVI: ", DUMP_PREFIX_NONE, 16, 1, data,
+                HDMI_INFOFRAME_SIZE(AVI), false);
+
+        for (i = 0; i < sizeof(data); ++i) {
+                hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_BASE + i * 4,
+                        data[i]);
+        }
 }
 
 static void hdmi_core_av_packet_config(struct hdmi_core_data *core,
@@ -404,11 +315,10 @@ void hdmi4_configure(struct hdmi_core_data *core,
         struct omap_video_timings video_timing;
         struct hdmi_video_format video_format;
         /* HDMI core */
-        struct hdmi_core_infoframe_avi *avi_cfg = &core->avi_cfg;
         struct hdmi_core_video_config v_core_cfg;
-        struct hdmi_core_packet_enable_repeat repeat_cfg;
+        struct hdmi_core_packet_enable_repeat repeat_cfg = { 0 };
 
-        hdmi_core_init(&v_core_cfg, avi_cfg, &repeat_cfg);
+        hdmi_core_init(&v_core_cfg);
 
         hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg);
 
@@ -431,44 +341,24 @@ void hdmi4_configure(struct hdmi_core_data *core,
         hdmi_core_powerdown_disable(core);
 
         v_core_cfg.pkt_mode = HDMI_PACKETMODE24BITPERPIXEL;
-        v_core_cfg.hdmi_dvi = cfg->cm.mode;
+        v_core_cfg.hdmi_dvi = cfg->hdmi_dvi_mode;
 
         hdmi_core_video_config(core, &v_core_cfg);
 
         /* release software reset in the core */
         hdmi_core_swreset_release(core);
 
-        /*
-         * configure packet
-         * info frame video see doc CEA861-D page 65
-         */
-        avi_cfg->db1_format = HDMI_INFOFRAME_AVI_DB1Y_RGB;
-        avi_cfg->db1_active_info =
-                        HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF;
-        avi_cfg->db1_bar_info_dv = HDMI_INFOFRAME_AVI_DB1B_NO;
-        avi_cfg->db1_scan_info = HDMI_INFOFRAME_AVI_DB1S_0;
-        avi_cfg->db2_colorimetry = HDMI_INFOFRAME_AVI_DB2C_NO;
-        avi_cfg->db2_aspect_ratio = HDMI_INFOFRAME_AVI_DB2M_NO;
-        avi_cfg->db2_active_fmt_ar = HDMI_INFOFRAME_AVI_DB2R_SAME;
-        avi_cfg->db3_itc = HDMI_INFOFRAME_AVI_DB3ITC_NO;
-        avi_cfg->db3_ec = HDMI_INFOFRAME_AVI_DB3EC_XVYUV601;
-        avi_cfg->db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_DEFAULT;
-        avi_cfg->db3_nup_scaling = HDMI_INFOFRAME_AVI_DB3SC_NO;
-        avi_cfg->db4_videocode = cfg->cm.code;
-        avi_cfg->db5_pixel_repeat = HDMI_INFOFRAME_AVI_DB5PR_NO;
-        avi_cfg->db6_7_line_eoftop = 0;
-        avi_cfg->db8_9_line_sofbottom = 0;
-        avi_cfg->db10_11_pixel_eofleft = 0;
-        avi_cfg->db12_13_pixel_sofright = 0;
-
-        hdmi_core_aux_infoframe_avi_config(core);
+        if (cfg->hdmi_dvi_mode == HDMI_HDMI) {
+                hdmi_core_write_avi_infoframe(core, &cfg->infoframe);
+
+                /* enable/repeat the infoframe */
+                repeat_cfg.avi_infoframe = HDMI_PACKETENABLE;
+                repeat_cfg.avi_infoframe_repeat = HDMI_PACKETREPEATON;
+                /* wakeup */
+                repeat_cfg.audio_pkt = HDMI_PACKETENABLE;
+                repeat_cfg.audio_pkt_repeat = HDMI_PACKETREPEATON;
+        }
 
-        /* enable/repeat the infoframe */
-        repeat_cfg.avi_infoframe = HDMI_PACKETENABLE;
-        repeat_cfg.avi_infoframe_repeat = HDMI_PACKETREPEATON;
-        /* wakeup */
-        repeat_cfg.audio_pkt = HDMI_PACKETENABLE;
-        repeat_cfg.audio_pkt_repeat = HDMI_PACKETREPEATON;
         hdmi_core_av_packet_config(core, repeat_cfg);
 }
 
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4_core.h b/drivers/video/fbdev/omap2/dss/hdmi4_core.h
index bb646896fa82..827909eb6c50 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4_core.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi4_core.h
@@ -145,6 +145,7 @@
 #define HDMI_CORE_AV_DPD                        0xF4
 #define HDMI_CORE_AV_PB_CTRL1                   0xF8
 #define HDMI_CORE_AV_PB_CTRL2                   0xFC
+#define HDMI_CORE_AV_AVI_BASE                   0x100
 #define HDMI_CORE_AV_AVI_TYPE                   0x100
 #define HDMI_CORE_AV_AVI_VERS                   0x104
 #define HDMI_CORE_AV_AVI_LEN                    0x108
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5.c b/drivers/video/fbdev/omap2/dss/hdmi5.c
index c468b9e1f295..32d02ec34d23 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi5.c
@@ -299,29 +299,11 @@ static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
                 struct omap_video_timings *timings)
 {
-        struct hdmi_cm cm;
-        const struct hdmi_config *t;
-
         mutex_lock(&hdmi.lock);
 
-        cm = hdmi_get_code(timings);
-        hdmi.cfg.cm = cm;
-
-        t = hdmi_get_timings(cm.mode, cm.code);
-        if (t != NULL) {
-                hdmi.cfg = *t;
-
-                dispc_set_tv_pclk(t->timings.pixelclock);
-        } else {
-                hdmi.cfg.timings = *timings;
-                hdmi.cfg.cm.code = 0;
-                hdmi.cfg.cm.mode = HDMI_DVI;
-
-                dispc_set_tv_pclk(timings->pixelclock);
-        }
+        hdmi.cfg.timings = *timings;
 
-        DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ?
-                        "DVI" : "HDMI", hdmi.cfg.cm.code);
+        dispc_set_tv_pclk(timings->pixelclock);
 
         mutex_unlock(&hdmi.lock);
 }
@@ -329,14 +311,7 @@ static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
                 struct omap_video_timings *timings)
 {
-        const struct hdmi_config *cfg;
-        struct hdmi_cm cm = hdmi.cfg.cm;
-
-        cfg = hdmi_get_timings(cm.mode, cm.code);
-        if (cfg == NULL)
-                cfg = hdmi_default_timing();
-
-        memcpy(timings, &cfg->timings, sizeof(cfg->timings));
+        *timings = hdmi.cfg.timings;
 }
 
 static void hdmi_dump_regs(struct seq_file *s)
@@ -541,7 +516,7 @@ static int hdmi_audio_enable(struct omap_dss_device *dssdev)
 
         mutex_lock(&hdmi.lock);
 
-        if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
+        if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
                 r = -EPERM;
                 goto err;
         }
@@ -579,7 +554,7 @@ static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
 
         mutex_lock(&hdmi.lock);
 
-        r = hdmi_mode_has_audio(hdmi.cfg.cm.mode);
+        r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
 
         mutex_unlock(&hdmi.lock);
         return r;
@@ -593,7 +568,7 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev,
 
         mutex_lock(&hdmi.lock);
 
-        if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
+        if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
                 r = -EPERM;
                 goto err;
         }
@@ -640,6 +615,20 @@ static int hdmi_audio_config(struct omap_dss_device *dssdev,
 }
 #endif
 
+static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
+                const struct hdmi_avi_infoframe *avi)
+{
+        hdmi.cfg.infoframe = *avi;
+        return 0;
+}
+
+static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
+                bool hdmi_mode)
+{
+        hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
+        return 0;
+}
+
 static const struct omapdss_hdmi_ops hdmi_ops = {
         .connect                = hdmi_connect,
         .disconnect             = hdmi_disconnect,
@@ -652,6 +641,8 @@ static const struct omapdss_hdmi_ops hdmi_ops = {
         .get_timings            = hdmi_display_get_timings,
 
         .read_edid              = hdmi_read_edid,
+        .set_infoframe          = hdmi_set_infoframe,
+        .set_hdmi_mode          = hdmi_set_hdmi_mode,
 
         .audio_enable           = hdmi_audio_enable,
         .audio_disable          = hdmi_audio_disable,
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5_core.c b/drivers/video/fbdev/omap2/dss/hdmi5_core.c
index 7528c7a42aa5..83acbf7a8c89 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5_core.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi5_core.c
@@ -290,7 +290,6 @@ void hdmi5_core_dump(struct hdmi_core_data *core, struct seq_file *s)
 }
 
 static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
-                        struct hdmi_core_infoframe_avi *avi_cfg,
                         struct hdmi_config *cfg)
 {
         DSSDBG("hdmi_core_init\n");
@@ -312,27 +311,8 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
         video_cfg->vblank_osc = 0; /* Always 0 - need to confirm */
         video_cfg->vblank = cfg->timings.vsw +
                                 cfg->timings.vfp + cfg->timings.vbp;
-        video_cfg->v_fc_config.cm.mode = cfg->cm.mode;
+        video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode;
         video_cfg->v_fc_config.timings.interlace = cfg->timings.interlace;
-
-        /* info frame */
-        avi_cfg->db1_format = 0;
-        avi_cfg->db1_active_info = 0;
-        avi_cfg->db1_bar_info_dv = 0;
-        avi_cfg->db1_scan_info = 0;
-        avi_cfg->db2_colorimetry = 0;
-        avi_cfg->db2_aspect_ratio = 0;
-        avi_cfg->db2_active_fmt_ar = 0;
-        avi_cfg->db3_itc = 0;
-        avi_cfg->db3_ec = 0;
-        avi_cfg->db3_q_range = 0;
-        avi_cfg->db3_nup_scaling = 0;
-        avi_cfg->db4_videocode = 0;
-        avi_cfg->db5_pixel_repeat = 0;
-        avi_cfg->db6_7_line_eoftop = 0;
-        avi_cfg->db8_9_line_sofbottom = 0;
-        avi_cfg->db10_11_pixel_eofleft = 0;
-        avi_cfg->db12_13_pixel_sofright = 0;
 }
 
 /* DSS_HDMI_CORE_VIDEO_CONFIG */
@@ -398,7 +378,7 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
 
         /* select DVI mode */
         REG_FLD_MOD(base, HDMI_CORE_FC_INVIDCONF,
-                        cfg->v_fc_config.cm.mode, 3, 3);
+                        cfg->v_fc_config.hdmi_dvi_mode, 3, 3);
 }
 
 static void hdmi_core_config_video_packetizer(struct hdmi_core_data *core)
@@ -438,24 +418,60 @@ static void hdmi_core_config_video_sampler(struct hdmi_core_data *core)
         REG_FLD_MOD(core->base, HDMI_CORE_TX_INVID0, video_mapping, 4, 0);
 }
 
-static void hdmi_core_aux_infoframe_avi_config(struct hdmi_core_data *core)
+static void hdmi_core_write_avi_infoframe(struct hdmi_core_data *core,
+        struct hdmi_avi_infoframe *frame)
 {
         void __iomem *base = core->base;
-        struct hdmi_core_infoframe_avi avi = core->avi_cfg;
-
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF0, avi.db1_format, 1, 0);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF0, avi.db1_active_info, 6, 6);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF0, avi.db1_bar_info_dv, 3, 2);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF0, avi.db1_scan_info, 5, 4);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF1, avi.db2_colorimetry, 7, 6);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF1, avi.db2_aspect_ratio, 5, 4);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF1, avi.db2_active_fmt_ar, 3, 0);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF2, avi.db3_itc, 7, 7);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF2, avi.db3_ec, 6, 4);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF2, avi.db3_q_range, 3, 2);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVICONF2, avi.db3_nup_scaling, 1, 0);
-        REG_FLD_MOD(base, HDMI_CORE_FC_AVIVID, avi.db4_videocode, 6, 0);
-        REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, avi.db5_pixel_repeat, 3, 0);
+        u8 data[HDMI_INFOFRAME_SIZE(AVI)];
+        u8 *ptr;
+        unsigned y, a, b, s;
+        unsigned c, m, r;
+        unsigned itc, ec, q, sc;
+        unsigned vic;
+        unsigned yq, cn, pr;
+
+        hdmi_avi_infoframe_pack(frame, data, sizeof(data));
+
+        print_hex_dump_debug("AVI: ", DUMP_PREFIX_NONE, 16, 1, data,
+                HDMI_INFOFRAME_SIZE(AVI), false);
+
+        ptr = data + HDMI_INFOFRAME_HEADER_SIZE;
+
+        y = (ptr[0] >> 5) & 0x3;
+        a = (ptr[0] >> 4) & 0x1;
+        b = (ptr[0] >> 2) & 0x3;
+        s = (ptr[0] >> 0) & 0x3;
+
+        c = (ptr[1] >> 6) & 0x3;
+        m = (ptr[1] >> 4) & 0x3;
+        r = (ptr[1] >> 0) & 0x3;
+
+        itc = (ptr[2] >> 7) & 0x1;
+        ec = (ptr[2] >> 4) & 0x7;
+        q = (ptr[2] >> 2) & 0x3;
+        sc = (ptr[2] >> 0) & 0x3;
+
+        vic = ptr[3];
+
+        yq = (ptr[4] >> 6) & 0x3;
+        cn = (ptr[4] >> 4) & 0x3;
+        pr = (ptr[4] >> 0) & 0xf;
+
+        hdmi_write_reg(base, HDMI_CORE_FC_AVICONF0,
+                (a << 6) | (s << 4) | (b << 2) | (y << 0));
+
+        hdmi_write_reg(base, HDMI_CORE_FC_AVICONF1,
+                (c << 6) | (m << 4) | (r << 0));
+
+        hdmi_write_reg(base, HDMI_CORE_FC_AVICONF2,
+                (itc << 7) | (ec << 4) | (q << 2) | (sc << 0));
+
+        hdmi_write_reg(base, HDMI_CORE_FC_AVIVID, vic);
+
+        hdmi_write_reg(base, HDMI_CORE_FC_AVICONF3,
+                (yq << 2) | (cn << 0));
+
+        REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, pr, 3, 0);
 }
 
 static void hdmi_core_csc_config(struct hdmi_core_data *core,
@@ -497,10 +513,8 @@ static void hdmi_core_configure_range(struct hdmi_core_data *core)
 
         /* support limited range with 24 bit color depth for now */
         csc_coeff = csc_table_deepcolor[0];
-        core->avi_cfg.db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_LR;
 
         hdmi_core_csc_config(core, csc_coeff);
-        hdmi_core_aux_infoframe_avi_config(core);
 }
 
 static void hdmi_core_enable_video_path(struct hdmi_core_data *core)
@@ -591,11 +605,10 @@ void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
         struct omap_video_timings video_timing;
         struct hdmi_video_format video_format;
         struct hdmi_core_vid_config v_core_cfg;
-        struct hdmi_core_infoframe_avi *avi_cfg = &core->avi_cfg;
 
         hdmi_core_mask_interrupts(core);
 
-        hdmi_core_init(&v_core_cfg, avi_cfg, cfg);
+        hdmi_core_init(&v_core_cfg, cfg);
 
         hdmi_wp_init_vid_fmt_timings(&video_format, &video_timing, cfg);
 
@@ -608,7 +621,9 @@ void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
 
         hdmi_wp_video_config_interface(wp, &video_timing);
 
+        /* support limited range with 24 bit color depth for now */
         hdmi_core_configure_range(core);
+        cfg->infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
 
         /*
          * configure core video part, set software reset in the core
@@ -621,29 +636,8 @@ void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
         hdmi_core_config_csc(core);
         hdmi_core_config_video_sampler(core);
 
-        /*
-         * configure packet info frame video see doc CEA861-D page 65
-         */
-        avi_cfg->db1_format = HDMI_INFOFRAME_AVI_DB1Y_RGB;
-        avi_cfg->db1_active_info =
-                        HDMI_INFOFRAME_AVI_DB1A_ACTIVE_FORMAT_OFF;
-        avi_cfg->db1_bar_info_dv = HDMI_INFOFRAME_AVI_DB1B_NO;
-        avi_cfg->db1_scan_info = HDMI_INFOFRAME_AVI_DB1S_0;
-        avi_cfg->db2_colorimetry = HDMI_INFOFRAME_AVI_DB2C_NO;
-        avi_cfg->db2_aspect_ratio = HDMI_INFOFRAME_AVI_DB2M_NO;
-        avi_cfg->db2_active_fmt_ar = HDMI_INFOFRAME_AVI_DB2R_SAME;
-        avi_cfg->db3_itc = HDMI_INFOFRAME_AVI_DB3ITC_NO;
-        avi_cfg->db3_ec = HDMI_INFOFRAME_AVI_DB3EC_XVYUV601;
-        avi_cfg->db3_q_range = HDMI_INFOFRAME_AVI_DB3Q_DEFAULT;
-        avi_cfg->db3_nup_scaling = HDMI_INFOFRAME_AVI_DB3SC_NO;
-        avi_cfg->db4_videocode = cfg->cm.code;
-        avi_cfg->db5_pixel_repeat = HDMI_INFOFRAME_AVI_DB5PR_NO;
-        avi_cfg->db6_7_line_eoftop = 0;
-        avi_cfg->db8_9_line_sofbottom = 0;
-        avi_cfg->db10_11_pixel_eofleft = 0;
-        avi_cfg->db12_13_pixel_sofright = 0;
-
-        hdmi_core_aux_infoframe_avi_config(core);
+        if (cfg->hdmi_dvi_mode == HDMI_HDMI)
+                hdmi_core_write_avi_infoframe(core, &cfg->infoframe);
 
         hdmi_core_enable_video_path(core);
 
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_common.c b/drivers/video/fbdev/omap2/dss/hdmi_common.c
index 9a2c39cf297f..7d5f1039de9f 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_common.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_common.c
@@ -1,18 +1,4 @@
 
-/*
- * Logic for the below structure :
- * user enters the CEA or VESA timings by specifying the HDMI/DVI code.
- * There is a correspondence between CEA/VESA timing and code, please
- * refer to section 6.3 in HDMI 1.3 specification for timing code.
- *
- * In the below structure, cea_vesa_timings corresponds to all OMAP4
- * supported CEA and VESA timing values.code_cea corresponds to the CEA
- * code, It is used to get the timing from cea_vesa_timing array.Similarly
- * with code_vesa. Code_index is used for back mapping, that is once EDID
- * is read from the TV, EDID is parsed to find the timing values and then
- * map it to corresponding CEA or VESA index.
- */
-
 #define DSS_SUBSYS_NAME "HDMI"
 
 #include <linux/kernel.h>
@@ -22,308 +8,6 @@
 
 #include "hdmi.h"
 
-static const struct hdmi_config cea_timings[] = {
-        {
-                { 640, 480, 25200000, 96, 16, 48, 2, 10, 33,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 1, HDMI_HDMI },
-        },
-        {
-                { 720, 480, 27027000, 62, 16, 60, 6, 9, 30,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 2, HDMI_HDMI },
-        },
-        {
-                { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 4, HDMI_HDMI },
-        },
-        {
-                { 1920, 540, 74250000, 44, 88, 148, 5, 2, 15,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        true, },
-                { 5, HDMI_HDMI },
-        },
-        {
-                { 1440, 240, 27027000, 124, 38, 114, 3, 4, 15,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        true, },
-                { 6, HDMI_HDMI },
-        },
-        {
-                { 1920, 1080, 148500000, 44, 88, 148, 5, 4, 36,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 16, HDMI_HDMI },
-        },
-        {
-                { 720, 576, 27000000, 64, 12, 68, 5, 5, 39,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 17, HDMI_HDMI },
-        },
-        {
-                { 1280, 720, 74250000, 40, 440, 220, 5, 5, 20,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 19, HDMI_HDMI },
-        },
-        {
-                { 1920, 540, 74250000, 44, 528, 148, 5, 2, 15,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        true, },
-                { 20, HDMI_HDMI },
-        },
-        {
-                { 1440, 288, 27000000, 126, 24, 138, 3, 2, 19,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        true, },
-                { 21, HDMI_HDMI },
-        },
-        {
-                { 1440, 576, 54000000, 128, 24, 136, 5, 5, 39,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 29, HDMI_HDMI },
-        },
-        {
-                { 1920, 1080, 148500000, 44, 528, 148, 5, 4, 36,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 31, HDMI_HDMI },
-        },
-        {
-                { 1920, 1080, 74250000, 44, 638, 148, 5, 4, 36,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 32, HDMI_HDMI },
-        },
-        {
-                { 2880, 480, 108108000, 248, 64, 240, 6, 9, 30,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 35, HDMI_HDMI },
-        },
-        {
-                { 2880, 576, 108000000, 256, 48, 272, 5, 5, 39,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 37, HDMI_HDMI },
-        },
-};
-
-static const struct hdmi_config vesa_timings[] = {
-/* VESA From Here */
-        {
-                { 640, 480, 25175000, 96, 16, 48, 2, 11, 31,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 4, HDMI_DVI },
-        },
-        {
-                { 800, 600, 40000000, 128, 40, 88, 4, 1, 23,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 9, HDMI_DVI },
-        },
-        {
-                { 848, 480, 33750000, 112, 16, 112, 8, 6, 23,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0xE, HDMI_DVI },
-        },
-        {
-                { 1280, 768, 79500000, 128, 64, 192, 7, 3, 20,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x17, HDMI_DVI },
-        },
-        {
-                { 1280, 800, 83500000, 128, 72, 200, 6, 3, 22,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x1C, HDMI_DVI },
-        },
-        {
-                { 1360, 768, 85500000, 112, 64, 256, 6, 3, 18,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x27, HDMI_DVI },
-        },
-        {
-                { 1280, 960, 108000000, 112, 96, 312, 3, 1, 36,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x20, HDMI_DVI },
-        },
-        {
-                { 1280, 1024, 108000000, 112, 48, 248, 3, 1, 38,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x23, HDMI_DVI },
-        },
-        {
-                { 1024, 768, 65000000, 136, 24, 160, 6, 3, 29,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x10, HDMI_DVI },
-        },
-        {
-                { 1400, 1050, 121750000, 144, 88, 232, 4, 3, 32,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x2A, HDMI_DVI },
-        },
-        {
-                { 1440, 900, 106500000, 152, 80, 232, 6, 3, 25,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x2F, HDMI_DVI },
-        },
-        {
-                { 1680, 1050, 146250000, 176 , 104, 280, 6, 3, 30,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
-                        false, },
-                { 0x3A, HDMI_DVI },
-        },
-        {
-                { 1366, 768, 85500000, 143, 70, 213, 3, 3, 24,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x51, HDMI_DVI },
-        },
-        {
-                { 1920, 1080, 148500000, 44, 148, 80, 5, 4, 36,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x52, HDMI_DVI },
-        },
-        {
-                { 1280, 768, 68250000, 32, 48, 80, 7, 3, 12,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x16, HDMI_DVI },
-        },
-        {
-                { 1400, 1050, 101000000, 32, 48, 80, 4, 3, 23,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x29, HDMI_DVI },
-        },
-        {
-                { 1680, 1050, 119000000, 32, 48, 80, 6, 3, 21,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x39, HDMI_DVI },
-        },
-        {
-                { 1280, 800, 79500000, 32, 48, 80, 6, 3, 14,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x1B, HDMI_DVI },
-        },
-        {
-                { 1280, 720, 74250000, 40, 110, 220, 5, 5, 20,
-                        OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x55, HDMI_DVI },
-        },
-        {
-                { 1920, 1200, 154000000, 32, 48, 80, 6, 3, 26,
-                        OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
-                        false, },
-                { 0x44, HDMI_DVI },
-        },
-};
-
-const struct hdmi_config *hdmi_default_timing(void)
-{
-        return &vesa_timings[0];
-}
-
-static const struct hdmi_config *hdmi_find_timing(int code,
-                        const struct hdmi_config *timings_arr, int len)
-{
-        int i;
-
-        for (i = 0; i < len; i++) {
-                if (timings_arr[i].cm.code == code)
-                        return &timings_arr[i];
-        }
-
-        return NULL;
-}
-
-const struct hdmi_config *hdmi_get_timings(int mode, int code)
-{
-        const struct hdmi_config *arr;
-        int len;
-
-        if (mode == HDMI_DVI) {
-                arr = vesa_timings;
-                len = ARRAY_SIZE(vesa_timings);
-        } else {
-                arr = cea_timings;
-                len = ARRAY_SIZE(cea_timings);
-        }
-
-        return hdmi_find_timing(code, arr, len);
-}
-
-static bool hdmi_timings_compare(struct omap_video_timings *timing1,
-                        const struct omap_video_timings *timing2)
-{
-        int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync;
-
-        if ((DIV_ROUND_CLOSEST(timing2->pixelclock, 1000000) ==
-                        DIV_ROUND_CLOSEST(timing1->pixelclock, 1000000)) &&
-                (timing2->x_res == timing1->x_res) &&
-                (timing2->y_res == timing1->y_res)) {
-
-                timing2_hsync = timing2->hfp + timing2->hsw + timing2->hbp;
-                timing1_hsync = timing1->hfp + timing1->hsw + timing1->hbp;
-                timing2_vsync = timing2->vfp + timing2->vsw + timing2->vbp;
-                timing1_vsync = timing1->vfp + timing1->vsw + timing1->vbp;
-
-                DSSDBG("timing1_hsync = %d timing1_vsync = %d"\
-                        "timing2_hsync = %d timing2_vsync = %d\n",
-                        timing1_hsync, timing1_vsync,
-                        timing2_hsync, timing2_vsync);
-
-                if ((timing1_hsync == timing2_hsync) &&
-                        (timing1_vsync == timing2_vsync)) {
-                        return true;
-                }
-        }
-        return false;
-}
-
-struct hdmi_cm hdmi_get_code(struct omap_video_timings *timing)
-{
-        int i;
-        struct hdmi_cm cm = {-1};
-        DSSDBG("hdmi_get_code\n");
-
-        for (i = 0; i < ARRAY_SIZE(cea_timings); i++) {
-                if (hdmi_timings_compare(timing, &cea_timings[i].timings)) {
-                        cm = cea_timings[i].cm;
-                        goto end;
-                }
-        }
-        for (i = 0; i < ARRAY_SIZE(vesa_timings); i++) {
-                if (hdmi_timings_compare(timing, &vesa_timings[i].timings)) {
-                        cm = vesa_timings[i].cm;
-                        goto end;
-                }
-        }
-
-end:
-        return cm;
-}
-
 int hdmi_parse_lanes_of(struct platform_device *pdev, struct device_node *ep,
         struct hdmi_phy_data *phy)
 {