diff options
author | David Ung <davidu@nvidia.com> | 2015-01-16 19:40:00 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2015-01-19 07:58:11 -0500 |
commit | ba59bab7530cf98b40b7c4e1c8f86dc3d7f2b47f (patch) | |
tree | 80fbab75213aae63fe2165ad4355f943bd0a0417 /drivers/video | |
parent | 72bbf10bf0fdaa097252149ef3a9b74c48a0d683 (diff) |
video: fbdev: Fix sparse warning messages
Use NULL instead of 0 for the last entry of dmt_modes struct.
Supresses "sparse: Using plain integer as NULL pointer" warning.
Signed-off-by: David Ung <davidu@nvidia.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/fbdev/core/modedb.c | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/drivers/video/fbdev/core/modedb.c b/drivers/video/fbdev/core/modedb.c index 858a97e03200..7d07cf824b64 100644 --- a/drivers/video/fbdev/core/modedb.c +++ b/drivers/video/fbdev/core/modedb.c | |||
@@ -511,69 +511,69 @@ const struct dmt_videomode dmt_modes[DMT_SIZE] = { | |||
511 | { 0x0a, 0x454c, 0x000000, &vesa_modes[9] }, | 511 | { 0x0a, 0x454c, 0x000000, &vesa_modes[9] }, |
512 | { 0x0b, 0x454f, 0x000000, &vesa_modes[10] }, | 512 | { 0x0b, 0x454f, 0x000000, &vesa_modes[10] }, |
513 | { 0x0c, 0x4559, 0x000000, &vesa_modes[11] }, | 513 | { 0x0c, 0x4559, 0x000000, &vesa_modes[11] }, |
514 | { 0x0d, 0x0000, 0x000000, 0 }, | 514 | { 0x0d, 0x0000, 0x000000, NULL }, |
515 | { 0x0e, 0x0000, 0x000000, 0 }, | 515 | { 0x0e, 0x0000, 0x000000, NULL }, |
516 | { 0x0f, 0x0000, 0x000000, &vesa_modes[12] }, | 516 | { 0x0f, 0x0000, 0x000000, &vesa_modes[12] }, |
517 | { 0x10, 0x6140, 0x000000, &vesa_modes[13] }, | 517 | { 0x10, 0x6140, 0x000000, &vesa_modes[13] }, |
518 | { 0x11, 0x614a, 0x000000, &vesa_modes[14] }, | 518 | { 0x11, 0x614a, 0x000000, &vesa_modes[14] }, |
519 | { 0x12, 0x614f, 0x000000, &vesa_modes[15] }, | 519 | { 0x12, 0x614f, 0x000000, &vesa_modes[15] }, |
520 | { 0x13, 0x6159, 0x000000, &vesa_modes[16] }, | 520 | { 0x13, 0x6159, 0x000000, &vesa_modes[16] }, |
521 | { 0x14, 0x0000, 0x000000, 0 }, | 521 | { 0x14, 0x0000, 0x000000, NULL }, |
522 | { 0x15, 0x714f, 0x000000, &vesa_modes[17] }, | 522 | { 0x15, 0x714f, 0x000000, &vesa_modes[17] }, |
523 | { 0x16, 0x0000, 0x7f1c21, 0 }, | 523 | { 0x16, 0x0000, 0x7f1c21, NULL }, |
524 | { 0x17, 0x0000, 0x7f1c28, 0 }, | 524 | { 0x17, 0x0000, 0x7f1c28, NULL }, |
525 | { 0x18, 0x0000, 0x7f1c44, 0 }, | 525 | { 0x18, 0x0000, 0x7f1c44, NULL }, |
526 | { 0x19, 0x0000, 0x7f1c62, 0 }, | 526 | { 0x19, 0x0000, 0x7f1c62, NULL }, |
527 | { 0x1a, 0x0000, 0x000000, 0 }, | 527 | { 0x1a, 0x0000, 0x000000, NULL }, |
528 | { 0x1b, 0x0000, 0x8f1821, 0 }, | 528 | { 0x1b, 0x0000, 0x8f1821, NULL }, |
529 | { 0x1c, 0x8100, 0x8f1828, 0 }, | 529 | { 0x1c, 0x8100, 0x8f1828, NULL }, |
530 | { 0x1d, 0x810f, 0x8f1844, 0 }, | 530 | { 0x1d, 0x810f, 0x8f1844, NULL }, |
531 | { 0x1e, 0x8119, 0x8f1862, 0 }, | 531 | { 0x1e, 0x8119, 0x8f1862, NULL }, |
532 | { 0x1f, 0x0000, 0x000000, 0 }, | 532 | { 0x1f, 0x0000, 0x000000, NULL }, |
533 | { 0x20, 0x8140, 0x000000, &vesa_modes[18] }, | 533 | { 0x20, 0x8140, 0x000000, &vesa_modes[18] }, |
534 | { 0x21, 0x8159, 0x000000, &vesa_modes[19] }, | 534 | { 0x21, 0x8159, 0x000000, &vesa_modes[19] }, |
535 | { 0x22, 0x0000, 0x000000, 0 }, | 535 | { 0x22, 0x0000, 0x000000, NULL }, |
536 | { 0x23, 0x8180, 0x000000, &vesa_modes[20] }, | 536 | { 0x23, 0x8180, 0x000000, &vesa_modes[20] }, |
537 | { 0x24, 0x818f, 0x000000, &vesa_modes[21] }, | 537 | { 0x24, 0x818f, 0x000000, &vesa_modes[21] }, |
538 | { 0x25, 0x8199, 0x000000, &vesa_modes[22] }, | 538 | { 0x25, 0x8199, 0x000000, &vesa_modes[22] }, |
539 | { 0x26, 0x0000, 0x000000, 0 }, | 539 | { 0x26, 0x0000, 0x000000, NULL }, |
540 | { 0x27, 0x0000, 0x000000, 0 }, | 540 | { 0x27, 0x0000, 0x000000, NULL }, |
541 | { 0x28, 0x0000, 0x000000, 0 }, | 541 | { 0x28, 0x0000, 0x000000, NULL }, |
542 | { 0x29, 0x0000, 0x0c2021, 0 }, | 542 | { 0x29, 0x0000, 0x0c2021, NULL }, |
543 | { 0x2a, 0x9040, 0x0c2028, 0 }, | 543 | { 0x2a, 0x9040, 0x0c2028, NULL }, |
544 | { 0x2b, 0x904f, 0x0c2044, 0 }, | 544 | { 0x2b, 0x904f, 0x0c2044, NULL }, |
545 | { 0x2c, 0x9059, 0x0c2062, 0 }, | 545 | { 0x2c, 0x9059, 0x0c2062, NULL }, |
546 | { 0x2d, 0x0000, 0x000000, 0 }, | 546 | { 0x2d, 0x0000, 0x000000, NULL }, |
547 | { 0x2e, 0x9500, 0xc11821, 0 }, | 547 | { 0x2e, 0x9500, 0xc11821, NULL }, |
548 | { 0x2f, 0x9500, 0xc11828, 0 }, | 548 | { 0x2f, 0x9500, 0xc11828, NULL }, |
549 | { 0x30, 0x950f, 0xc11844, 0 }, | 549 | { 0x30, 0x950f, 0xc11844, NULL }, |
550 | { 0x31, 0x9519, 0xc11868, 0 }, | 550 | { 0x31, 0x9519, 0xc11868, NULL }, |
551 | { 0x32, 0x0000, 0x000000, 0 }, | 551 | { 0x32, 0x0000, 0x000000, NULL }, |
552 | { 0x33, 0xa940, 0x000000, &vesa_modes[23] }, | 552 | { 0x33, 0xa940, 0x000000, &vesa_modes[23] }, |
553 | { 0x34, 0xa945, 0x000000, &vesa_modes[24] }, | 553 | { 0x34, 0xa945, 0x000000, &vesa_modes[24] }, |
554 | { 0x35, 0xa94a, 0x000000, &vesa_modes[25] }, | 554 | { 0x35, 0xa94a, 0x000000, &vesa_modes[25] }, |
555 | { 0x36, 0xa94f, 0x000000, &vesa_modes[26] }, | 555 | { 0x36, 0xa94f, 0x000000, &vesa_modes[26] }, |
556 | { 0x37, 0xa959, 0x000000, &vesa_modes[27] }, | 556 | { 0x37, 0xa959, 0x000000, &vesa_modes[27] }, |
557 | { 0x38, 0x0000, 0x000000, 0 }, | 557 | { 0x38, 0x0000, 0x000000, NULL }, |
558 | { 0x39, 0x0000, 0x0c2821, 0 }, | 558 | { 0x39, 0x0000, 0x0c2821, NULL }, |
559 | { 0x3a, 0xb300, 0x0c2828, 0 }, | 559 | { 0x3a, 0xb300, 0x0c2828, NULL }, |
560 | { 0x3b, 0xb30f, 0x0c2844, 0 }, | 560 | { 0x3b, 0xb30f, 0x0c2844, NULL }, |
561 | { 0x3c, 0xb319, 0x0c2868, 0 }, | 561 | { 0x3c, 0xb319, 0x0c2868, NULL }, |
562 | { 0x3d, 0x0000, 0x000000, 0 }, | 562 | { 0x3d, 0x0000, 0x000000, NULL }, |
563 | { 0x3e, 0xc140, 0x000000, &vesa_modes[28] }, | 563 | { 0x3e, 0xc140, 0x000000, &vesa_modes[28] }, |
564 | { 0x3f, 0xc14f, 0x000000, &vesa_modes[29] }, | 564 | { 0x3f, 0xc14f, 0x000000, &vesa_modes[29] }, |
565 | { 0x40, 0x0000, 0x000000, 0 }, | 565 | { 0x40, 0x0000, 0x000000, NULL}, |
566 | { 0x41, 0xc940, 0x000000, &vesa_modes[30] }, | 566 | { 0x41, 0xc940, 0x000000, &vesa_modes[30] }, |
567 | { 0x42, 0xc94f, 0x000000, &vesa_modes[31] }, | 567 | { 0x42, 0xc94f, 0x000000, &vesa_modes[31] }, |
568 | { 0x43, 0x0000, 0x000000, 0 }, | 568 | { 0x43, 0x0000, 0x000000, NULL }, |
569 | { 0x44, 0x0000, 0x572821, &vesa_modes[34] }, | 569 | { 0x44, 0x0000, 0x572821, &vesa_modes[34] }, |
570 | { 0x45, 0xd100, 0x572828, &vesa_modes[35] }, | 570 | { 0x45, 0xd100, 0x572828, &vesa_modes[35] }, |
571 | { 0x46, 0xd10f, 0x572844, &vesa_modes[36] }, | 571 | { 0x46, 0xd10f, 0x572844, &vesa_modes[36] }, |
572 | { 0x47, 0xd119, 0x572862, &vesa_modes[37] }, | 572 | { 0x47, 0xd119, 0x572862, &vesa_modes[37] }, |
573 | { 0x48, 0x0000, 0x000000, 0 }, | 573 | { 0x48, 0x0000, 0x000000, NULL }, |
574 | { 0x49, 0xd140, 0x000000, &vesa_modes[32] }, | 574 | { 0x49, 0xd140, 0x000000, &vesa_modes[32] }, |
575 | { 0x4a, 0xd14f, 0x000000, &vesa_modes[33] }, | 575 | { 0x4a, 0xd14f, 0x000000, &vesa_modes[33] }, |
576 | { 0x4b, 0x0000, 0x000000, 0 }, | 576 | { 0x4b, 0x0000, 0x000000, NULL }, |
577 | { 0x4c, 0x0000, 0x1f3821, &vesa_modes[38] }, | 577 | { 0x4c, 0x0000, 0x1f3821, &vesa_modes[38] }, |
578 | { 0x4d, 0x0000, 0x1f3828, &vesa_modes[39] }, | 578 | { 0x4d, 0x0000, 0x1f3828, &vesa_modes[39] }, |
579 | { 0x4e, 0x0000, 0x1f3844, &vesa_modes[40] }, | 579 | { 0x4e, 0x0000, 0x1f3844, &vesa_modes[40] }, |