diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-16 06:52:51 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-07-25 03:08:13 -0400 |
commit | b98482ed73810c4a970dee3402b35241d3ce4b7e (patch) | |
tree | ab5ef0e766ad26f5cb90caa11f4092fdbf252d7a /drivers/video | |
parent | 94c042ce589b6b81e5dc0020fce2d248940412bd (diff) |
OMAP: DSS2: Clean up probe for DSS & DSI
Both dss.c and dsi.c had a probe function, which was almost a dummy one,
calling dss_init() and dsi_init().
Remove the init functions by moving the initialization code into probe
functions.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 30 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 145 |
2 files changed, 69 insertions, 106 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 795da7281110..1e2fd404651f 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -4450,7 +4450,8 @@ static void dsi_calc_clock_param_ranges(struct platform_device *dsidev) | |||
4450 | dsi->lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV); | 4450 | dsi->lpdiv_max = dss_feat_get_param_max(FEAT_PARAM_DSIPLL_LPDIV); |
4451 | } | 4451 | } |
4452 | 4452 | ||
4453 | static int dsi_init(struct platform_device *dsidev) | 4453 | /* DSI1 HW IP initialisation */ |
4454 | static int omap_dsi1hw_probe(struct platform_device *dsidev) | ||
4454 | { | 4455 | { |
4455 | struct omap_display_platform_data *dss_plat_data; | 4456 | struct omap_display_platform_data *dss_plat_data; |
4456 | struct omap_dss_board_info *board_info; | 4457 | struct omap_dss_board_info *board_info; |
@@ -4547,10 +4548,12 @@ err0: | |||
4547 | return r; | 4548 | return r; |
4548 | } | 4549 | } |
4549 | 4550 | ||
4550 | static void dsi_exit(struct platform_device *dsidev) | 4551 | static int omap_dsi1hw_remove(struct platform_device *dsidev) |
4551 | { | 4552 | { |
4552 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | 4553 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); |
4553 | 4554 | ||
4555 | WARN_ON(dsi->scp_clk_refcount > 0); | ||
4556 | |||
4554 | if (dsi->vdds_dsi_reg != NULL) { | 4557 | if (dsi->vdds_dsi_reg != NULL) { |
4555 | if (dsi->vdds_dsi_enabled) { | 4558 | if (dsi->vdds_dsi_enabled) { |
4556 | regulator_disable(dsi->vdds_dsi_reg); | 4559 | regulator_disable(dsi->vdds_dsi_reg); |
@@ -4566,29 +4569,6 @@ static void dsi_exit(struct platform_device *dsidev) | |||
4566 | 4569 | ||
4567 | kfree(dsi); | 4570 | kfree(dsi); |
4568 | 4571 | ||
4569 | DSSDBG("omap_dsi_exit\n"); | ||
4570 | } | ||
4571 | |||
4572 | /* DSI1 HW IP initialisation */ | ||
4573 | static int omap_dsi1hw_probe(struct platform_device *dsidev) | ||
4574 | { | ||
4575 | int r; | ||
4576 | |||
4577 | r = dsi_init(dsidev); | ||
4578 | if (r) { | ||
4579 | DSSERR("Failed to initialize DSI\n"); | ||
4580 | goto err_dsi; | ||
4581 | } | ||
4582 | err_dsi: | ||
4583 | return r; | ||
4584 | } | ||
4585 | |||
4586 | static int omap_dsi1hw_remove(struct platform_device *dsidev) | ||
4587 | { | ||
4588 | struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); | ||
4589 | |||
4590 | dsi_exit(dsidev); | ||
4591 | WARN_ON(dsi->scp_clk_refcount > 0); | ||
4592 | return 0; | 4572 | return 0; |
4593 | } | 4573 | } |
4594 | 4574 | ||
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index bcd4a07adcc8..57ce428deb04 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -664,79 +664,6 @@ void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select hdmi) | |||
664 | REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* VENC_HDMI_SWITCH */ | 664 | REG_FLD_MOD(DSS_CONTROL, hdmi, 15, 15); /* VENC_HDMI_SWITCH */ |
665 | } | 665 | } |
666 | 666 | ||
667 | static int dss_init(void) | ||
668 | { | ||
669 | int r; | ||
670 | u32 rev; | ||
671 | struct resource *dss_mem; | ||
672 | |||
673 | dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0); | ||
674 | if (!dss_mem) { | ||
675 | DSSERR("can't get IORESOURCE_MEM DSS\n"); | ||
676 | r = -EINVAL; | ||
677 | goto fail0; | ||
678 | } | ||
679 | dss.base = ioremap(dss_mem->start, resource_size(dss_mem)); | ||
680 | if (!dss.base) { | ||
681 | DSSERR("can't ioremap DSS\n"); | ||
682 | r = -ENOMEM; | ||
683 | goto fail0; | ||
684 | } | ||
685 | |||
686 | /* disable LCD and DIGIT output. This seems to fix the synclost | ||
687 | * problem that we get, if the bootloader starts the DSS and | ||
688 | * the kernel resets it */ | ||
689 | omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440); | ||
690 | |||
691 | #ifdef CONFIG_OMAP2_DSS_SLEEP_BEFORE_RESET | ||
692 | /* We need to wait here a bit, otherwise we sometimes start to | ||
693 | * get synclost errors, and after that only power cycle will | ||
694 | * restore DSS functionality. I have no idea why this happens. | ||
695 | * And we have to wait _before_ resetting the DSS, but after | ||
696 | * enabling clocks. | ||
697 | * | ||
698 | * This bug was at least present on OMAP3430. It's unknown | ||
699 | * if it happens on OMAP2 or OMAP3630. | ||
700 | */ | ||
701 | msleep(50); | ||
702 | #endif | ||
703 | |||
704 | _omap_dss_reset(); | ||
705 | |||
706 | /* autoidle */ | ||
707 | REG_FLD_MOD(DSS_SYSCONFIG, 1, 0, 0); | ||
708 | |||
709 | /* Select DPLL */ | ||
710 | REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); | ||
711 | |||
712 | #ifdef CONFIG_OMAP2_DSS_VENC | ||
713 | REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ | ||
714 | REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ | ||
715 | REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ | ||
716 | #endif | ||
717 | dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; | ||
718 | dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; | ||
719 | dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK; | ||
720 | dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; | ||
721 | dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; | ||
722 | |||
723 | dss_save_context(); | ||
724 | |||
725 | rev = dss_read_reg(DSS_REVISION); | ||
726 | printk(KERN_INFO "OMAP DSS rev %d.%d\n", | ||
727 | FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); | ||
728 | |||
729 | return 0; | ||
730 | |||
731 | fail0: | ||
732 | return r; | ||
733 | } | ||
734 | |||
735 | static void dss_exit(void) | ||
736 | { | ||
737 | iounmap(dss.base); | ||
738 | } | ||
739 | |||
740 | /* CONTEXT */ | 667 | /* CONTEXT */ |
741 | static int dss_get_ctx_id(void) | 668 | static int dss_get_ctx_id(void) |
742 | { | 669 | { |
@@ -1094,10 +1021,25 @@ void dss_debug_dump_clocks(struct seq_file *s) | |||
1094 | /* DSS HW IP initialisation */ | 1021 | /* DSS HW IP initialisation */ |
1095 | static int omap_dsshw_probe(struct platform_device *pdev) | 1022 | static int omap_dsshw_probe(struct platform_device *pdev) |
1096 | { | 1023 | { |
1024 | struct resource *dss_mem; | ||
1025 | u32 rev; | ||
1097 | int r; | 1026 | int r; |
1098 | 1027 | ||
1099 | dss.pdev = pdev; | 1028 | dss.pdev = pdev; |
1100 | 1029 | ||
1030 | dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0); | ||
1031 | if (!dss_mem) { | ||
1032 | DSSERR("can't get IORESOURCE_MEM DSS\n"); | ||
1033 | r = -EINVAL; | ||
1034 | goto err_ioremap; | ||
1035 | } | ||
1036 | dss.base = ioremap(dss_mem->start, resource_size(dss_mem)); | ||
1037 | if (!dss.base) { | ||
1038 | DSSERR("can't ioremap DSS\n"); | ||
1039 | r = -ENOMEM; | ||
1040 | goto err_ioremap; | ||
1041 | } | ||
1042 | |||
1101 | r = dss_get_clocks(); | 1043 | r = dss_get_clocks(); |
1102 | if (r) | 1044 | if (r) |
1103 | goto err_clocks; | 1045 | goto err_clocks; |
@@ -1107,11 +1049,42 @@ static int omap_dsshw_probe(struct platform_device *pdev) | |||
1107 | dss.ctx_id = dss_get_ctx_id(); | 1049 | dss.ctx_id = dss_get_ctx_id(); |
1108 | DSSDBG("initial ctx id %u\n", dss.ctx_id); | 1050 | DSSDBG("initial ctx id %u\n", dss.ctx_id); |
1109 | 1051 | ||
1110 | r = dss_init(); | 1052 | /* disable LCD and DIGIT output. This seems to fix the synclost |
1111 | if (r) { | 1053 | * problem that we get, if the bootloader starts the DSS and |
1112 | DSSERR("Failed to initialize DSS\n"); | 1054 | * the kernel resets it */ |
1113 | goto err_dss; | 1055 | omap_writel(omap_readl(0x48050440) & ~0x3, 0x48050440); |
1114 | } | 1056 | |
1057 | #ifdef CONFIG_OMAP2_DSS_SLEEP_BEFORE_RESET | ||
1058 | /* We need to wait here a bit, otherwise we sometimes start to | ||
1059 | * get synclost errors, and after that only power cycle will | ||
1060 | * restore DSS functionality. I have no idea why this happens. | ||
1061 | * And we have to wait _before_ resetting the DSS, but after | ||
1062 | * enabling clocks. | ||
1063 | * | ||
1064 | * This bug was at least present on OMAP3430. It's unknown | ||
1065 | * if it happens on OMAP2 or OMAP3630. | ||
1066 | */ | ||
1067 | msleep(50); | ||
1068 | #endif | ||
1069 | |||
1070 | _omap_dss_reset(); | ||
1071 | |||
1072 | /* autoidle */ | ||
1073 | REG_FLD_MOD(DSS_SYSCONFIG, 1, 0, 0); | ||
1074 | |||
1075 | /* Select DPLL */ | ||
1076 | REG_FLD_MOD(DSS_CONTROL, 0, 0, 0); | ||
1077 | |||
1078 | #ifdef CONFIG_OMAP2_DSS_VENC | ||
1079 | REG_FLD_MOD(DSS_CONTROL, 1, 4, 4); /* venc dac demen */ | ||
1080 | REG_FLD_MOD(DSS_CONTROL, 1, 3, 3); /* venc clock 4x enable */ | ||
1081 | REG_FLD_MOD(DSS_CONTROL, 0, 2, 2); /* venc clock mode = normal */ | ||
1082 | #endif | ||
1083 | dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; | ||
1084 | dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; | ||
1085 | dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK; | ||
1086 | dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; | ||
1087 | dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; | ||
1115 | 1088 | ||
1116 | r = dpi_init(); | 1089 | r = dpi_init(); |
1117 | if (r) { | 1090 | if (r) { |
@@ -1125,23 +1098,32 @@ static int omap_dsshw_probe(struct platform_device *pdev) | |||
1125 | goto err_sdi; | 1098 | goto err_sdi; |
1126 | } | 1099 | } |
1127 | 1100 | ||
1101 | dss_save_context(); | ||
1102 | |||
1103 | rev = dss_read_reg(DSS_REVISION); | ||
1104 | printk(KERN_INFO "OMAP DSS rev %d.%d\n", | ||
1105 | FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); | ||
1106 | |||
1128 | dss_clk_disable_all_no_ctx(); | 1107 | dss_clk_disable_all_no_ctx(); |
1108 | |||
1129 | return 0; | 1109 | return 0; |
1130 | err_sdi: | 1110 | err_sdi: |
1131 | dpi_exit(); | 1111 | dpi_exit(); |
1132 | err_dpi: | 1112 | err_dpi: |
1133 | dss_exit(); | ||
1134 | err_dss: | ||
1135 | dss_clk_disable_all_no_ctx(); | 1113 | dss_clk_disable_all_no_ctx(); |
1136 | dss_put_clocks(); | 1114 | dss_put_clocks(); |
1137 | err_clocks: | 1115 | err_clocks: |
1116 | iounmap(dss.base); | ||
1117 | err_ioremap: | ||
1138 | return r; | 1118 | return r; |
1139 | } | 1119 | } |
1140 | 1120 | ||
1141 | static int omap_dsshw_remove(struct platform_device *pdev) | 1121 | static int omap_dsshw_remove(struct platform_device *pdev) |
1142 | { | 1122 | { |
1123 | dpi_exit(); | ||
1124 | sdi_exit(); | ||
1143 | 1125 | ||
1144 | dss_exit(); | 1126 | iounmap(dss.base); |
1145 | 1127 | ||
1146 | /* | 1128 | /* |
1147 | * As part of hwmod changes, DSS is not the only controller of dss | 1129 | * As part of hwmod changes, DSS is not the only controller of dss |
@@ -1152,6 +1134,7 @@ static int omap_dsshw_remove(struct platform_device *pdev) | |||
1152 | WARN_ON(dss.num_clks_enabled > 0); | 1134 | WARN_ON(dss.num_clks_enabled > 0); |
1153 | 1135 | ||
1154 | dss_put_clocks(); | 1136 | dss_put_clocks(); |
1137 | |||
1155 | return 0; | 1138 | return 0; |
1156 | } | 1139 | } |
1157 | 1140 | ||