diff options
author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2010-09-06 21:24:52 -0400 |
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committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2010-09-23 22:15:01 -0400 |
commit | c2a07c932dad49b3b80b11132183b8b2ec8ea1aa (patch) | |
tree | f78085e8c27eea71fd70ae90fd3c29583bdaf477 /drivers/video/via | |
parent | 2a9183923af1f6f4da66aeabf9fa5af0dc58ccec (diff) |
viafb: limit LCD code impact
This patch cleans the LCD code up. It forbids overwritting global
decissions like what IGA should be used as the source and whether to
enable the second display channel. Additionally it removes a bit code
duplication.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Joseph Chan <JosephChan@via.com.tw>
Diffstat (limited to 'drivers/video/via')
-rw-r--r-- | drivers/video/via/lcd.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index e99f933faf19..b7d55350be06 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c | |||
@@ -818,19 +818,12 @@ void viafb_lcd_disable(void) | |||
818 | viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20); | 818 | viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20); |
819 | /* 24 bit DI data paht off */ | 819 | /* 24 bit DI data paht off */ |
820 | viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80); | 820 | viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80); |
821 | /* Simultaneout disabled */ | ||
822 | viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); | ||
823 | } | 821 | } |
824 | 822 | ||
825 | /* Disable expansion bit */ | 823 | /* Disable expansion bit */ |
826 | viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01); | 824 | viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01); |
827 | /* CRT path set to IGA1 */ | ||
828 | viafb_write_reg_mask(SR16, VIASR, 0x00, 0x40); | ||
829 | /* Simultaneout disabled */ | 825 | /* Simultaneout disabled */ |
830 | viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); | 826 | viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); |
831 | /* IGA2 path disabled */ | ||
832 | viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80); | ||
833 | |||
834 | } | 827 | } |
835 | 828 | ||
836 | static void set_lcd_output_path(int set_iga, int output_interface) | 829 | static void set_lcd_output_path(int set_iga, int output_interface) |
@@ -892,33 +885,9 @@ void viafb_lcd_enable(void) | |||
892 | viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20); | 885 | viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20); |
893 | /* 24 bit DI data paht on */ | 886 | /* 24 bit DI data paht on */ |
894 | viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80); | 887 | viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80); |
895 | |||
896 | /* Set data source selection bit by iga path */ | ||
897 | if (viaparinfo->lvds_setting_info->iga_path == IGA1) { | ||
898 | /* DFP-H set to IGA1 */ | ||
899 | viafb_write_reg_mask(CR97, VIACR, 0x00, 0x10); | ||
900 | /* DFP-L set to IGA1 */ | ||
901 | viafb_write_reg_mask(CR99, VIACR, 0x00, 0x10); | ||
902 | } else { | ||
903 | /* DFP-H set to IGA2 */ | ||
904 | viafb_write_reg_mask(CR97, VIACR, 0x10, 0x10); | ||
905 | /* DFP-L set to IGA2 */ | ||
906 | viafb_write_reg_mask(CR99, VIACR, 0x10, 0x10); | ||
907 | } | ||
908 | /* LCD enabled */ | 888 | /* LCD enabled */ |
909 | viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); | 889 | viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); |
910 | } | 890 | } |
911 | |||
912 | if (viaparinfo->lvds_setting_info->iga_path == IGA1) { | ||
913 | /* CRT path set to IGA2 */ | ||
914 | viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40); | ||
915 | /* IGA2 path disabled */ | ||
916 | viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80); | ||
917 | /* IGA2 path enabled */ | ||
918 | } else { /* IGA2 */ | ||
919 | viafb_write_reg_mask(CR6A, VIACR, 0x80, 0x80); | ||
920 | } | ||
921 | |||
922 | } | 891 | } |
923 | 892 | ||
924 | static void lcd_powersequence_off(void) | 893 | static void lcd_powersequence_off(void) |