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authorFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2010-10-24 00:02:14 -0400
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2010-10-24 09:04:55 -0400
commit51f4332bb5fef869e8a89895a7bac6b4c03b4946 (patch)
treeeb505244dcfa4a20f30cf1da47c04f9bc4efcdd7 /drivers/video/via/hw.h
parentadac8d65f399b02e8a2222fc75c658e4b8d24f65 (diff)
viafb: add initial VX900 support
This patch adds basic support for the new VX900 IGP. Almost everything that was implemented for other IGPs is expected to work also on VX900 after this patch. The only known issue is that on the CRT output mode setting does not always work. It is clear that the possibility for regressions is zero. A big thanks to VIA Technologies for making this possible and supporting this work. Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: Joseph Chan <JosephChan@via.com.tw> Cc: Jonathan Corbet <corbet@lwn.net>
Diffstat (limited to 'drivers/video/via/hw.h')
-rw-r--r--drivers/video/via/hw.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index b76440946771..668d534542ef 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -362,6 +362,17 @@ is reserved, so it may have problem to set 1600x1200 on IGA2. */
362#define VX855_IGA2_FIFO_HIGH_THRESHOLD 160 362#define VX855_IGA2_FIFO_HIGH_THRESHOLD 160
363#define VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320 363#define VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320
364 364
365/* For VT3410 */
366#define VX900_IGA1_FIFO_MAX_DEPTH 400
367#define VX900_IGA1_FIFO_THRESHOLD 320
368#define VX900_IGA1_FIFO_HIGH_THRESHOLD 320
369#define VX900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 160
370
371#define VX900_IGA2_FIFO_MAX_DEPTH 192
372#define VX900_IGA2_FIFO_THRESHOLD 160
373#define VX900_IGA2_FIFO_HIGH_THRESHOLD 160
374#define VX900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320
375
365#define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1 376#define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1
366#define IGA1_FIFO_THRESHOLD_REG_NUM 2 377#define IGA1_FIFO_THRESHOLD_REG_NUM 2
367#define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2 378#define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2
@@ -879,6 +890,8 @@ struct iga2_crtc_timing {
879#define VX800_FUNCTION3 0x3353 890#define VX800_FUNCTION3 0x3353
880/* VT3409 chipset*/ 891/* VT3409 chipset*/
881#define VX855_FUNCTION3 0x3409 892#define VX855_FUNCTION3 0x3409
893/* VT3410 chipset*/
894#define VX900_FUNCTION3 0x3410
882 895
883#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) 896#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value)
884 897