diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 15:22:48 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 15:22:48 -0400 |
commit | ef93127e4c7b4b8d46421045641048397eaac43d (patch) | |
tree | fbddc8f52e10d8d6eb45e08e02fecbc2ba023eea /drivers/video/sunxvr500.c | |
parent | 972d45fb43f0f0793fa275c4a22998106760cd61 (diff) | |
parent | 90a660a4546d6ba5ca5f3a23d5cc599db2b41e08 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SERIAL] sunsu: Fix section mismatch warnings.
[SPARC64]: pgtable_cache_init() should be __init.
[SPARC64]: Fix section mismatch warnings in arch/sparc64/kernel/prom.c
[SPARC64]: Fix section mismatch warnings in arch/sparc64/kernel/pci.c
[SPARC64]: Fix section mismatch warnings in arch/sparc64/kernel/console.c
[MM]: sparse_init() should be __init.
[SPARC64]: Update defconfig.
[VIDEO]: Add Sun XVR-2500 framebuffer driver.
[VIDEO]: Add Sun XVR-500 framebuffer driver.
[SPARC64]: SUN4U PCI-E controller support.
[SPARC]: Fix comment typo in smp4m_blackbox_current().
[SCSI] SUNESP: sun_esp.c needs linux/delay.h
Fix up conflict in arch/sparc64/mm/init.c manually due to removal of
pgtable_cache_init() through the -mm patches (even though that patch was
also by David ;)
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/sunxvr500.c')
-rw-r--r-- | drivers/video/sunxvr500.c | 443 |
1 files changed, 443 insertions, 0 deletions
diff --git a/drivers/video/sunxvr500.c b/drivers/video/sunxvr500.c new file mode 100644 index 000000000000..08880a62bfa3 --- /dev/null +++ b/drivers/video/sunxvr500.c | |||
@@ -0,0 +1,443 @@ | |||
1 | /* sunxvr500.c: Sun 3DLABS XVR-500 Expert3D driver for sparc64 systems | ||
2 | * | ||
3 | * Copyright (C) 2007 David S. Miller (davem@davemloft.net) | ||
4 | */ | ||
5 | |||
6 | #include <linux/module.h> | ||
7 | #include <linux/kernel.h> | ||
8 | #include <linux/slab.h> | ||
9 | #include <linux/fb.h> | ||
10 | #include <linux/pci.h> | ||
11 | #include <linux/init.h> | ||
12 | |||
13 | #include <asm/io.h> | ||
14 | #include <asm/prom.h> | ||
15 | #include <asm/of_device.h> | ||
16 | |||
17 | /* XXX This device has a 'dev-comm' property which aparently is | ||
18 | * XXX a pointer into the openfirmware's address space which is | ||
19 | * XXX a shared area the kernel driver can use to keep OBP | ||
20 | * XXX informed about the current resolution setting. The idea | ||
21 | * XXX is that the kernel can change resolutions, and as long | ||
22 | * XXX as the values in the 'dev-comm' area are accurate then | ||
23 | * XXX OBP can still render text properly to the console. | ||
24 | * XXX | ||
25 | * XXX I'm still working out the layout of this and whether there | ||
26 | * XXX are any signatures we need to look for etc. | ||
27 | */ | ||
28 | struct e3d_info { | ||
29 | struct fb_info *info; | ||
30 | struct pci_dev *pdev; | ||
31 | |||
32 | spinlock_t lock; | ||
33 | |||
34 | char __iomem *fb_base; | ||
35 | unsigned long fb_base_phys; | ||
36 | |||
37 | unsigned long fb8_buf_diff; | ||
38 | unsigned long regs_base_phys; | ||
39 | |||
40 | void __iomem *ramdac; | ||
41 | |||
42 | struct device_node *of_node; | ||
43 | |||
44 | unsigned int width; | ||
45 | unsigned int height; | ||
46 | unsigned int depth; | ||
47 | unsigned int fb_size; | ||
48 | |||
49 | u32 fb_base_reg; | ||
50 | u32 fb8_0_off; | ||
51 | u32 fb8_1_off; | ||
52 | |||
53 | u32 pseudo_palette[256]; | ||
54 | }; | ||
55 | |||
56 | static int __devinit e3d_get_props(struct e3d_info *ep) | ||
57 | { | ||
58 | ep->width = of_getintprop_default(ep->of_node, "width", 0); | ||
59 | ep->height = of_getintprop_default(ep->of_node, "height", 0); | ||
60 | ep->depth = of_getintprop_default(ep->of_node, "depth", 8); | ||
61 | |||
62 | if (!ep->width || !ep->height) { | ||
63 | printk(KERN_ERR "e3d: Critical properties missing for %s\n", | ||
64 | pci_name(ep->pdev)); | ||
65 | return -EINVAL; | ||
66 | } | ||
67 | |||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | /* My XVR-500 comes up, at 1280x768 and a FB base register value of | ||
72 | * 0x04000000, the following video layout register values: | ||
73 | * | ||
74 | * RAMDAC_VID_WH 0x03ff04ff | ||
75 | * RAMDAC_VID_CFG 0x1a0b0088 | ||
76 | * RAMDAC_VID_32FB_0 0x04000000 | ||
77 | * RAMDAC_VID_32FB_1 0x04800000 | ||
78 | * RAMDAC_VID_8FB_0 0x05000000 | ||
79 | * RAMDAC_VID_8FB_1 0x05200000 | ||
80 | * RAMDAC_VID_XXXFB 0x05400000 | ||
81 | * RAMDAC_VID_YYYFB 0x05c00000 | ||
82 | * RAMDAC_VID_ZZZFB 0x05e00000 | ||
83 | */ | ||
84 | /* Video layout registers */ | ||
85 | #define RAMDAC_VID_WH 0x00000070UL /* (height-1)<<16 | (width-1) */ | ||
86 | #define RAMDAC_VID_CFG 0x00000074UL /* 0x1a000088|(linesz_log2<<16) */ | ||
87 | #define RAMDAC_VID_32FB_0 0x00000078UL /* PCI base 32bpp FB buffer 0 */ | ||
88 | #define RAMDAC_VID_32FB_1 0x0000007cUL /* PCI base 32bpp FB buffer 1 */ | ||
89 | #define RAMDAC_VID_8FB_0 0x00000080UL /* PCI base 8bpp FB buffer 0 */ | ||
90 | #define RAMDAC_VID_8FB_1 0x00000084UL /* PCI base 8bpp FB buffer 1 */ | ||
91 | #define RAMDAC_VID_XXXFB 0x00000088UL /* PCI base of XXX FB */ | ||
92 | #define RAMDAC_VID_YYYFB 0x0000008cUL /* PCI base of YYY FB */ | ||
93 | #define RAMDAC_VID_ZZZFB 0x00000090UL /* PCI base of ZZZ FB */ | ||
94 | |||
95 | /* CLUT registers */ | ||
96 | #define RAMDAC_INDEX 0x000000bcUL | ||
97 | #define RAMDAC_DATA 0x000000c0UL | ||
98 | |||
99 | static void e3d_clut_write(struct e3d_info *ep, int index, u32 val) | ||
100 | { | ||
101 | void __iomem *ramdac = ep->ramdac; | ||
102 | unsigned long flags; | ||
103 | |||
104 | spin_lock_irqsave(&ep->lock, flags); | ||
105 | |||
106 | writel(index, ramdac + RAMDAC_INDEX); | ||
107 | writel(val, ramdac + RAMDAC_DATA); | ||
108 | |||
109 | spin_unlock_irqrestore(&ep->lock, flags); | ||
110 | } | ||
111 | |||
112 | static int e3d_setcolreg(unsigned regno, | ||
113 | unsigned red, unsigned green, unsigned blue, | ||
114 | unsigned transp, struct fb_info *info) | ||
115 | { | ||
116 | struct e3d_info *ep = info->par; | ||
117 | u32 red_8, green_8, blue_8; | ||
118 | u32 red_10, green_10, blue_10; | ||
119 | u32 value; | ||
120 | |||
121 | if (regno >= 256) | ||
122 | return 1; | ||
123 | |||
124 | red_8 = red >> 8; | ||
125 | green_8 = green >> 8; | ||
126 | blue_8 = blue >> 8; | ||
127 | |||
128 | value = (blue_8 << 24) | (green_8 << 16) | (red_8 << 8); | ||
129 | ((u32 *)info->pseudo_palette)[regno] = value; | ||
130 | |||
131 | |||
132 | red_10 = red >> 6; | ||
133 | green_10 = green >> 6; | ||
134 | blue_10 = blue >> 6; | ||
135 | |||
136 | value = (blue_10 << 20) | (green_10 << 10) | (red_10 << 0); | ||
137 | e3d_clut_write(ep, regno, value); | ||
138 | |||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | /* XXX This is a bit of a hack. I can't figure out exactly how the | ||
143 | * XXX two 8bpp areas of the framebuffer work. I imagine there is | ||
144 | * XXX a WID attribute somewhere else in the framebuffer which tells | ||
145 | * XXX the ramdac which of the two 8bpp framebuffer regions to take | ||
146 | * XXX the pixel from. So, for now, render into both regions to make | ||
147 | * XXX sure the pixel shows up. | ||
148 | */ | ||
149 | static void e3d_imageblit(struct fb_info *info, const struct fb_image *image) | ||
150 | { | ||
151 | struct e3d_info *ep = info->par; | ||
152 | unsigned long flags; | ||
153 | |||
154 | spin_lock_irqsave(&ep->lock, flags); | ||
155 | cfb_imageblit(info, image); | ||
156 | info->screen_base += ep->fb8_buf_diff; | ||
157 | cfb_imageblit(info, image); | ||
158 | info->screen_base -= ep->fb8_buf_diff; | ||
159 | spin_unlock_irqrestore(&ep->lock, flags); | ||
160 | } | ||
161 | |||
162 | static void e3d_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | ||
163 | { | ||
164 | struct e3d_info *ep = info->par; | ||
165 | unsigned long flags; | ||
166 | |||
167 | spin_lock_irqsave(&ep->lock, flags); | ||
168 | cfb_fillrect(info, rect); | ||
169 | info->screen_base += ep->fb8_buf_diff; | ||
170 | cfb_fillrect(info, rect); | ||
171 | info->screen_base -= ep->fb8_buf_diff; | ||
172 | spin_unlock_irqrestore(&ep->lock, flags); | ||
173 | } | ||
174 | |||
175 | static void e3d_copyarea(struct fb_info *info, const struct fb_copyarea *area) | ||
176 | { | ||
177 | struct e3d_info *ep = info->par; | ||
178 | unsigned long flags; | ||
179 | |||
180 | spin_lock_irqsave(&ep->lock, flags); | ||
181 | cfb_copyarea(info, area); | ||
182 | info->screen_base += ep->fb8_buf_diff; | ||
183 | cfb_copyarea(info, area); | ||
184 | info->screen_base -= ep->fb8_buf_diff; | ||
185 | spin_unlock_irqrestore(&ep->lock, flags); | ||
186 | } | ||
187 | |||
188 | static struct fb_ops e3d_ops = { | ||
189 | .owner = THIS_MODULE, | ||
190 | .fb_setcolreg = e3d_setcolreg, | ||
191 | .fb_fillrect = e3d_fillrect, | ||
192 | .fb_copyarea = e3d_copyarea, | ||
193 | .fb_imageblit = e3d_imageblit, | ||
194 | }; | ||
195 | |||
196 | static int __devinit e3d_set_fbinfo(struct e3d_info *ep) | ||
197 | { | ||
198 | struct fb_info *info = ep->info; | ||
199 | struct fb_var_screeninfo *var = &info->var; | ||
200 | |||
201 | info->flags = FBINFO_DEFAULT; | ||
202 | info->fbops = &e3d_ops; | ||
203 | info->screen_base = ep->fb_base; | ||
204 | info->screen_size = ep->fb_size; | ||
205 | |||
206 | info->pseudo_palette = ep->pseudo_palette; | ||
207 | |||
208 | /* Fill fix common fields */ | ||
209 | strlcpy(info->fix.id, "e3d", sizeof(info->fix.id)); | ||
210 | info->fix.smem_start = ep->fb_base_phys; | ||
211 | info->fix.smem_len = ep->fb_size; | ||
212 | info->fix.type = FB_TYPE_PACKED_PIXELS; | ||
213 | if (ep->depth == 32 || ep->depth == 24) | ||
214 | info->fix.visual = FB_VISUAL_TRUECOLOR; | ||
215 | else | ||
216 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | ||
217 | |||
218 | var->xres = ep->width; | ||
219 | var->yres = ep->height; | ||
220 | var->xres_virtual = var->xres; | ||
221 | var->yres_virtual = var->yres; | ||
222 | var->bits_per_pixel = ep->depth; | ||
223 | |||
224 | var->red.offset = 8; | ||
225 | var->red.length = 8; | ||
226 | var->green.offset = 16; | ||
227 | var->green.length = 8; | ||
228 | var->blue.offset = 24; | ||
229 | var->blue.length = 8; | ||
230 | var->transp.offset = 0; | ||
231 | var->transp.length = 0; | ||
232 | |||
233 | if (fb_alloc_cmap(&info->cmap, 256, 0)) { | ||
234 | printk(KERN_ERR "e3d: Cannot allocate color map.\n"); | ||
235 | return -ENOMEM; | ||
236 | } | ||
237 | |||
238 | return 0; | ||
239 | } | ||
240 | |||
241 | static int __devinit e3d_pci_register(struct pci_dev *pdev, | ||
242 | const struct pci_device_id *ent) | ||
243 | { | ||
244 | struct fb_info *info; | ||
245 | struct e3d_info *ep; | ||
246 | unsigned int line_length; | ||
247 | int err; | ||
248 | |||
249 | err = pci_enable_device(pdev); | ||
250 | if (err < 0) { | ||
251 | printk(KERN_ERR "e3d: Cannot enable PCI device %s\n", | ||
252 | pci_name(pdev)); | ||
253 | goto err_out; | ||
254 | } | ||
255 | |||
256 | info = framebuffer_alloc(sizeof(struct e3d_info), &pdev->dev); | ||
257 | if (!info) { | ||
258 | printk(KERN_ERR "e3d: Cannot allocate fb_info\n"); | ||
259 | err = -ENOMEM; | ||
260 | goto err_disable; | ||
261 | } | ||
262 | |||
263 | ep = info->par; | ||
264 | ep->info = info; | ||
265 | ep->pdev = pdev; | ||
266 | spin_lock_init(&ep->lock); | ||
267 | ep->of_node = pci_device_to_OF_node(pdev); | ||
268 | if (!ep->of_node) { | ||
269 | printk(KERN_ERR "e3d: Cannot find OF node of %s\n", | ||
270 | pci_name(pdev)); | ||
271 | err = -ENODEV; | ||
272 | goto err_release_fb; | ||
273 | } | ||
274 | |||
275 | /* Read the PCI base register of the frame buffer, which we | ||
276 | * need in order to interpret the RAMDAC_VID_*FB* values in | ||
277 | * the ramdac correctly. | ||
278 | */ | ||
279 | pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, | ||
280 | &ep->fb_base_reg); | ||
281 | ep->fb_base_reg &= PCI_BASE_ADDRESS_MEM_MASK; | ||
282 | |||
283 | ep->regs_base_phys = pci_resource_start (pdev, 1); | ||
284 | err = pci_request_region(pdev, 1, "e3d regs"); | ||
285 | if (err < 0) { | ||
286 | printk("e3d: Cannot request region 1 for %s\n", | ||
287 | pci_name(pdev)); | ||
288 | goto err_release_fb; | ||
289 | } | ||
290 | ep->ramdac = ioremap(ep->regs_base_phys + 0x8000, 0x1000); | ||
291 | if (!ep->ramdac) | ||
292 | goto err_release_pci1; | ||
293 | |||
294 | ep->fb8_0_off = readl(ep->ramdac + RAMDAC_VID_8FB_0); | ||
295 | ep->fb8_0_off -= ep->fb_base_reg; | ||
296 | |||
297 | ep->fb8_1_off = readl(ep->ramdac + RAMDAC_VID_8FB_1); | ||
298 | ep->fb8_1_off -= ep->fb_base_reg; | ||
299 | |||
300 | ep->fb8_buf_diff = ep->fb8_1_off - ep->fb8_0_off; | ||
301 | |||
302 | ep->fb_base_phys = pci_resource_start (pdev, 0); | ||
303 | ep->fb_base_phys += ep->fb8_0_off; | ||
304 | |||
305 | err = pci_request_region(pdev, 0, "e3d framebuffer"); | ||
306 | if (err < 0) { | ||
307 | printk("e3d: Cannot request region 0 for %s\n", | ||
308 | pci_name(pdev)); | ||
309 | goto err_unmap_ramdac; | ||
310 | } | ||
311 | |||
312 | err = e3d_get_props(ep); | ||
313 | if (err) | ||
314 | goto err_release_pci0; | ||
315 | |||
316 | line_length = (readl(ep->ramdac + RAMDAC_VID_CFG) >> 16) & 0xff; | ||
317 | line_length = 1 << line_length; | ||
318 | |||
319 | switch (ep->depth) { | ||
320 | case 8: | ||
321 | info->fix.line_length = line_length; | ||
322 | break; | ||
323 | case 16: | ||
324 | info->fix.line_length = line_length * 2; | ||
325 | break; | ||
326 | case 24: | ||
327 | info->fix.line_length = line_length * 3; | ||
328 | break; | ||
329 | case 32: | ||
330 | info->fix.line_length = line_length * 4; | ||
331 | break; | ||
332 | } | ||
333 | ep->fb_size = info->fix.line_length * ep->height; | ||
334 | |||
335 | ep->fb_base = ioremap(ep->fb_base_phys, ep->fb_size); | ||
336 | if (!ep->fb_base) | ||
337 | goto err_release_pci0; | ||
338 | |||
339 | err = e3d_set_fbinfo(ep); | ||
340 | if (err) | ||
341 | goto err_unmap_fb; | ||
342 | |||
343 | pci_set_drvdata(pdev, info); | ||
344 | |||
345 | printk("e3d: Found device at %s\n", pci_name(pdev)); | ||
346 | |||
347 | err = register_framebuffer(info); | ||
348 | if (err < 0) { | ||
349 | printk(KERN_ERR "e3d: Could not register framebuffer %s\n", | ||
350 | pci_name(pdev)); | ||
351 | goto err_unmap_fb; | ||
352 | } | ||
353 | |||
354 | return 0; | ||
355 | |||
356 | err_unmap_fb: | ||
357 | iounmap(ep->fb_base); | ||
358 | |||
359 | err_release_pci0: | ||
360 | pci_release_region(pdev, 0); | ||
361 | |||
362 | err_unmap_ramdac: | ||
363 | iounmap(ep->ramdac); | ||
364 | |||
365 | err_release_pci1: | ||
366 | pci_release_region(pdev, 1); | ||
367 | |||
368 | err_release_fb: | ||
369 | framebuffer_release(info); | ||
370 | |||
371 | err_disable: | ||
372 | pci_disable_device(pdev); | ||
373 | |||
374 | err_out: | ||
375 | return err; | ||
376 | } | ||
377 | |||
378 | static void __devexit e3d_pci_unregister(struct pci_dev *pdev) | ||
379 | { | ||
380 | struct fb_info *info = pci_get_drvdata(pdev); | ||
381 | struct e3d_info *ep = info->par; | ||
382 | |||
383 | unregister_framebuffer(info); | ||
384 | |||
385 | iounmap(ep->ramdac); | ||
386 | iounmap(ep->fb_base); | ||
387 | |||
388 | pci_release_region(pdev, 0); | ||
389 | pci_release_region(pdev, 1); | ||
390 | |||
391 | framebuffer_release(info); | ||
392 | |||
393 | pci_disable_device(pdev); | ||
394 | } | ||
395 | |||
396 | static struct pci_device_id e3d_pci_table[] = { | ||
397 | { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a0), }, | ||
398 | { PCI_DEVICE(PCI_VENDOR_ID_3DLABS, 0x7a2), }, | ||
399 | { .vendor = PCI_VENDOR_ID_3DLABS, | ||
400 | .device = PCI_ANY_ID, | ||
401 | .subvendor = PCI_VENDOR_ID_3DLABS, | ||
402 | .subdevice = 0x0108, | ||
403 | }, | ||
404 | { .vendor = PCI_VENDOR_ID_3DLABS, | ||
405 | .device = PCI_ANY_ID, | ||
406 | .subvendor = PCI_VENDOR_ID_3DLABS, | ||
407 | .subdevice = 0x0140, | ||
408 | }, | ||
409 | { .vendor = PCI_VENDOR_ID_3DLABS, | ||
410 | .device = PCI_ANY_ID, | ||
411 | .subvendor = PCI_VENDOR_ID_3DLABS, | ||
412 | .subdevice = 0x1024, | ||
413 | }, | ||
414 | { 0, } | ||
415 | }; | ||
416 | |||
417 | static struct pci_driver e3d_driver = { | ||
418 | .name = "e3d", | ||
419 | .id_table = e3d_pci_table, | ||
420 | .probe = e3d_pci_register, | ||
421 | .remove = __devexit_p(e3d_pci_unregister), | ||
422 | }; | ||
423 | |||
424 | static int __init e3d_init(void) | ||
425 | { | ||
426 | if (fb_get_options("e3d", NULL)) | ||
427 | return -ENODEV; | ||
428 | |||
429 | return pci_register_driver(&e3d_driver); | ||
430 | } | ||
431 | |||
432 | static void __exit e3d_exit(void) | ||
433 | { | ||
434 | pci_unregister_driver(&e3d_driver); | ||
435 | } | ||
436 | |||
437 | module_init(e3d_init); | ||
438 | module_exit(e3d_exit); | ||
439 | |||
440 | MODULE_DESCRIPTION("framebuffer driver for Sun XVR-500 graphics"); | ||
441 | MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); | ||
442 | MODULE_VERSION("1.0"); | ||
443 | MODULE_LICENSE("GPL"); | ||