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authorRusty Russell <rusty@rustcorp.com.au>2008-12-31 07:35:57 -0500
committerRusty Russell <rusty@rustcorp.com.au>2008-12-31 07:35:57 -0500
commit2ca1a615835d9f4990f42102ab1f2ef434e7e89c (patch)
tree726cf3d5f29a6c66c44e4bd68e7ebed2fd83d059 /drivers/video/pxafb.h
parente12f0102ac81d660c9f801d0a0e10ccf4537a9de (diff)
parent6a94cb73064c952255336cc57731904174b2c58f (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: arch/x86/kernel/io_apic.c
Diffstat (limited to 'drivers/video/pxafb.h')
-rw-r--r--drivers/video/pxafb.h82
1 files changed, 65 insertions, 17 deletions
diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h
index 31541b86f13d..2353521c5c8c 100644
--- a/drivers/video/pxafb.h
+++ b/drivers/video/pxafb.h
@@ -54,11 +54,55 @@ enum {
54#define PALETTE_SIZE (256 * 4) 54#define PALETTE_SIZE (256 * 4)
55#define CMD_BUFF_SIZE (1024 * 50) 55#define CMD_BUFF_SIZE (1024 * 50)
56 56
57/* NOTE: the palette and frame dma descriptors are doubled to allow
58 * the 2nd set for branch settings (FBRx)
59 */
57struct pxafb_dma_buff { 60struct pxafb_dma_buff {
58 unsigned char palette[PAL_MAX * PALETTE_SIZE]; 61 unsigned char palette[PAL_MAX * PALETTE_SIZE];
59 uint16_t cmd_buff[CMD_BUFF_SIZE]; 62 uint16_t cmd_buff[CMD_BUFF_SIZE];
60 struct pxafb_dma_descriptor pal_desc[PAL_MAX]; 63 struct pxafb_dma_descriptor pal_desc[PAL_MAX * 2];
61 struct pxafb_dma_descriptor dma_desc[DMA_MAX]; 64 struct pxafb_dma_descriptor dma_desc[DMA_MAX * 2];
65};
66
67enum {
68 OVERLAY1,
69 OVERLAY2,
70};
71
72enum {
73 OVERLAY_FORMAT_RGB = 0,
74 OVERLAY_FORMAT_YUV444_PACKED,
75 OVERLAY_FORMAT_YUV444_PLANAR,
76 OVERLAY_FORMAT_YUV422_PLANAR,
77 OVERLAY_FORMAT_YUV420_PLANAR,
78};
79
80#define NONSTD_TO_XPOS(x) (((x) >> 0) & 0x3ff)
81#define NONSTD_TO_YPOS(x) (((x) >> 10) & 0x3ff)
82#define NONSTD_TO_PFOR(x) (((x) >> 20) & 0x7)
83
84struct pxafb_layer;
85
86struct pxafb_layer_ops {
87 void (*enable)(struct pxafb_layer *);
88 void (*disable)(struct pxafb_layer *);
89 void (*setup)(struct pxafb_layer *);
90};
91
92struct pxafb_layer {
93 struct fb_info fb;
94 int id;
95 atomic_t usage;
96 uint32_t control[2];
97
98 struct pxafb_layer_ops *ops;
99
100 void __iomem *video_mem;
101 unsigned long video_mem_phys;
102 size_t video_mem_size;
103 struct completion branch_done;
104
105 struct pxafb_info *fbi;
62}; 106};
63 107
64struct pxafb_info { 108struct pxafb_info {
@@ -69,24 +113,15 @@ struct pxafb_info {
69 void __iomem *mmio_base; 113 void __iomem *mmio_base;
70 114
71 struct pxafb_dma_buff *dma_buff; 115 struct pxafb_dma_buff *dma_buff;
116 size_t dma_buff_size;
72 dma_addr_t dma_buff_phys; 117 dma_addr_t dma_buff_phys;
73 dma_addr_t fdadr[DMA_MAX]; 118 dma_addr_t fdadr[DMA_MAX * 2];
74 119
75 /* 120 void __iomem *video_mem; /* virtual address of frame buffer */
76 * These are the addresses we mapped 121 unsigned long video_mem_phys; /* physical address of frame buffer */
77 * the framebuffer memory region to. 122 size_t video_mem_size; /* size of the frame buffer */
78 */
79 /* raw memory addresses */
80 dma_addr_t map_dma; /* physical */
81 u_char * map_cpu; /* virtual */
82 u_int map_size;
83
84 /* addresses of pieces placed in raw buffer */
85 u_char * screen_cpu; /* virtual address of frame buffer */
86 dma_addr_t screen_dma; /* physical address of frame buffer */
87 u16 * palette_cpu; /* virtual address of palette memory */ 123 u16 * palette_cpu; /* virtual address of palette memory */
88 u_int palette_size; 124 u_int palette_size;
89 ssize_t video_offset;
90 125
91 u_int lccr0; 126 u_int lccr0;
92 u_int lccr3; 127 u_int lccr3;
@@ -120,10 +155,17 @@ struct pxafb_info {
120 struct task_struct *smart_thread; 155 struct task_struct *smart_thread;
121#endif 156#endif
122 157
158#ifdef CONFIG_FB_PXA_OVERLAY
159 struct pxafb_layer overlay[2];
160#endif
161
123#ifdef CONFIG_CPU_FREQ 162#ifdef CONFIG_CPU_FREQ
124 struct notifier_block freq_transition; 163 struct notifier_block freq_transition;
125 struct notifier_block freq_policy; 164 struct notifier_block freq_policy;
126#endif 165#endif
166
167 void (*lcd_power)(int, struct fb_var_screeninfo *);
168 void (*backlight_power)(int);
127}; 169};
128 170
129#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member) 171#define TO_INF(ptr,member) container_of(ptr,struct pxafb_info,member)
@@ -148,4 +190,10 @@ struct pxafb_info {
148#define MIN_XRES 64 190#define MIN_XRES 64
149#define MIN_YRES 64 191#define MIN_YRES 64
150 192
193/* maximum X and Y resolutions - note these are limits from the register
194 * bits length instead of the real ones
195 */
196#define MAX_XRES 1024
197#define MAX_YRES 1024
198
151#endif /* __PXAFB_H__ */ 199#endif /* __PXAFB_H__ */