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authorTomi Valkeinen <tomi.valkeinen@ti.com>2011-10-13 09:06:43 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-12-02 01:54:17 -0500
commit9b4362f2b5ad6d0cf6b5754000b8db80d0592e89 (patch)
tree07c1c00074a8a661b50ac59283ee1d53998ee2fb /drivers/video/omap2/dss
parent8dc0766fcf3b84ec83aa601acabf21f2c98ca253 (diff)
OMAPDSS: DSI: use lane config in dsi_cio_enable_lane_override
Use the new lane config in dsi_cio_enable_lane_override(). The function parameters are also slightly changed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss')
-rw-r--r--drivers/video/omap2/dss/dsi.c85
1 files changed, 27 insertions, 58 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 52cf97f52172..dee95253e01d 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -238,19 +238,6 @@ enum dsi_vc_source {
238 DSI_VC_SOURCE_VP, 238 DSI_VC_SOURCE_VP,
239}; 239};
240 240
241enum dsi_lane {
242 DSI_CLK_P = 1 << 0,
243 DSI_CLK_N = 1 << 1,
244 DSI_DATA1_P = 1 << 2,
245 DSI_DATA1_N = 1 << 3,
246 DSI_DATA2_P = 1 << 4,
247 DSI_DATA2_N = 1 << 5,
248 DSI_DATA3_P = 1 << 6,
249 DSI_DATA3_N = 1 << 7,
250 DSI_DATA4_P = 1 << 8,
251 DSI_DATA4_N = 1 << 9,
252};
253
254struct dsi_update_region { 241struct dsi_update_region {
255 u16 x, y, w, h; 242 u16 x, y, w, h;
256 struct omap_dss_device *device; 243 struct omap_dss_device *device;
@@ -2290,49 +2277,28 @@ static void dsi_cio_timings(struct platform_device *dsidev)
2290 dsi_write_reg(dsidev, DSI_DSIPHY_CFG2, r); 2277 dsi_write_reg(dsidev, DSI_DSIPHY_CFG2, r);
2291} 2278}
2292 2279
2280/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */
2293static void dsi_cio_enable_lane_override(struct omap_dss_device *dssdev, 2281static void dsi_cio_enable_lane_override(struct omap_dss_device *dssdev,
2294 enum dsi_lane lanes) 2282 unsigned mask_p, unsigned mask_n)
2295{ 2283{
2296 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); 2284 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
2297 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); 2285 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
2298 int clk_lane = dssdev->phy.dsi.clk_lane; 2286 int i;
2299 int data1_lane = dssdev->phy.dsi.data1_lane; 2287 u32 l;
2300 int data2_lane = dssdev->phy.dsi.data2_lane;
2301 int data3_lane = dssdev->phy.dsi.data3_lane;
2302 int data4_lane = dssdev->phy.dsi.data4_lane;
2303 int clk_pol = dssdev->phy.dsi.clk_pol;
2304 int data1_pol = dssdev->phy.dsi.data1_pol;
2305 int data2_pol = dssdev->phy.dsi.data2_pol;
2306 int data3_pol = dssdev->phy.dsi.data3_pol;
2307 int data4_pol = dssdev->phy.dsi.data4_pol;
2308
2309 u32 l = 0;
2310 u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26; 2288 u8 lptxscp_start = dsi->num_lanes_supported == 3 ? 22 : 26;
2311 2289
2312 if (lanes & DSI_CLK_P) 2290 l = 0;
2313 l |= 1 << ((clk_lane - 1) * 2 + (clk_pol ? 0 : 1)); 2291
2314 if (lanes & DSI_CLK_N) 2292 for (i = 0; i < dsi->num_lanes_supported; ++i) {
2315 l |= 1 << ((clk_lane - 1) * 2 + (clk_pol ? 1 : 0)); 2293 unsigned p = dsi->lanes[i].polarity;
2316 2294
2317 if (lanes & DSI_DATA1_P) 2295 if (mask_p & (1 << i))
2318 l |= 1 << ((data1_lane - 1) * 2 + (data1_pol ? 0 : 1)); 2296 l |= 1 << (i * 2 + (p ? 0 : 1));
2319 if (lanes & DSI_DATA1_N) 2297
2320 l |= 1 << ((data1_lane - 1) * 2 + (data1_pol ? 1 : 0)); 2298 if (mask_n & (1 << i))
2321 2299 l |= 1 << (i * 2 + (p ? 1 : 0));
2322 if (lanes & DSI_DATA2_P) 2300 }
2323 l |= 1 << ((data2_lane - 1) * 2 + (data2_pol ? 0 : 1)); 2301
2324 if (lanes & DSI_DATA2_N)
2325 l |= 1 << ((data2_lane - 1) * 2 + (data2_pol ? 1 : 0));
2326
2327 if (lanes & DSI_DATA3_P)
2328 l |= 1 << ((data3_lane - 1) * 2 + (data3_pol ? 0 : 1));
2329 if (lanes & DSI_DATA3_N)
2330 l |= 1 << ((data3_lane - 1) * 2 + (data3_pol ? 1 : 0));
2331
2332 if (lanes & DSI_DATA4_P)
2333 l |= 1 << ((data4_lane - 1) * 2 + (data4_pol ? 0 : 1));
2334 if (lanes & DSI_DATA4_N)
2335 l |= 1 << ((data4_lane - 1) * 2 + (data4_pol ? 1 : 0));
2336 /* 2302 /*
2337 * Bits in REGLPTXSCPDAT4TO0DXDY: 2303 * Bits in REGLPTXSCPDAT4TO0DXDY:
2338 * 17: DY0 18: DX0 2304 * 17: DY0 18: DX0
@@ -2432,7 +2398,6 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
2432 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); 2398 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
2433 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); 2399 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
2434 int r; 2400 int r;
2435 int num_lanes_used = dsi_get_num_lanes_used(dssdev);
2436 u32 l; 2401 u32 l;
2437 2402
2438 DSSDBGF(); 2403 DSSDBGF();
@@ -2467,7 +2432,8 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
2467 dsi_write_reg(dsidev, DSI_TIMING1, l); 2432 dsi_write_reg(dsidev, DSI_TIMING1, l);
2468 2433
2469 if (dsi->ulps_enabled) { 2434 if (dsi->ulps_enabled) {
2470 u32 lane_mask = DSI_CLK_P | DSI_DATA1_P | DSI_DATA2_P; 2435 unsigned mask_p;
2436 int i;
2471 2437
2472 DSSDBG("manual ulps exit\n"); 2438 DSSDBG("manual ulps exit\n");
2473 2439
@@ -2476,16 +2442,19 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
2476 * ULPS exit sequence, as after reset the DSS HW thinks 2442 * ULPS exit sequence, as after reset the DSS HW thinks
2477 * that we are not in ULPS mode, and refuses to send the 2443 * that we are not in ULPS mode, and refuses to send the
2478 * sequence. So we need to send the ULPS exit sequence 2444 * sequence. So we need to send the ULPS exit sequence
2479 * manually. 2445 * manually by setting positive lines high and negative lines
2446 * low for 1ms.
2480 */ 2447 */
2481 2448
2482 if (num_lanes_used > 3) 2449 mask_p = 0;
2483 lane_mask |= DSI_DATA3_P;
2484 2450
2485 if (num_lanes_used > 4) 2451 for (i = 0; i < dsi->num_lanes_supported; ++i) {
2486 lane_mask |= DSI_DATA4_P; 2452 if (dsi->lanes[i].function == DSI_LANE_UNUSED)
2453 continue;
2454 mask_p |= 1 << i;
2455 }
2487 2456
2488 dsi_cio_enable_lane_override(dssdev, lane_mask); 2457 dsi_cio_enable_lane_override(dssdev, mask_p, 0);
2489 } 2458 }
2490 2459
2491 r = dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_ON); 2460 r = dsi_cio_power(dsidev, DSI_COMPLEXIO_POWER_ON);