diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-04-21 12:53:25 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-12 12:39:50 -0400 |
commit | 5be685faff2b75fa015832c5137bbb5513965104 (patch) | |
tree | 8774f288d57039087d143ab67e355c180640b641 /drivers/video/omap2/dss/rfbi.c | |
parent | 773139f1759f9dc5efe2c314df9aad88b7364015 (diff) |
OMAP: DSS2: RFBI: clock enable/disable changes
RFBI enables and disables clocks inside almost every function to get a
finegrained control to the clocks. However, the current understanding is
that this is not necessary power-management-wise.
Change the clocking scheme so that RFBI clocks are enabled when the
omapdss_rfbi_display_enable is called, and disabled when
omapdss_rfbi_display_disable is called.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/rfbi.c')
-rw-r--r-- | drivers/video/omap2/dss/rfbi.c | 28 |
1 files changed, 4 insertions, 24 deletions
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c index 46817e7fdaf4..1c19d174facb 100644 --- a/drivers/video/omap2/dss/rfbi.c +++ b/drivers/video/omap2/dss/rfbi.c | |||
@@ -163,7 +163,6 @@ EXPORT_SYMBOL(rfbi_bus_unlock); | |||
163 | 163 | ||
164 | void omap_rfbi_write_command(const void *buf, u32 len) | 164 | void omap_rfbi_write_command(const void *buf, u32 len) |
165 | { | 165 | { |
166 | rfbi_enable_clocks(1); | ||
167 | switch (rfbi.parallelmode) { | 166 | switch (rfbi.parallelmode) { |
168 | case OMAP_DSS_RFBI_PARALLELMODE_8: | 167 | case OMAP_DSS_RFBI_PARALLELMODE_8: |
169 | { | 168 | { |
@@ -187,13 +186,11 @@ void omap_rfbi_write_command(const void *buf, u32 len) | |||
187 | default: | 186 | default: |
188 | BUG(); | 187 | BUG(); |
189 | } | 188 | } |
190 | rfbi_enable_clocks(0); | ||
191 | } | 189 | } |
192 | EXPORT_SYMBOL(omap_rfbi_write_command); | 190 | EXPORT_SYMBOL(omap_rfbi_write_command); |
193 | 191 | ||
194 | void omap_rfbi_read_data(void *buf, u32 len) | 192 | void omap_rfbi_read_data(void *buf, u32 len) |
195 | { | 193 | { |
196 | rfbi_enable_clocks(1); | ||
197 | switch (rfbi.parallelmode) { | 194 | switch (rfbi.parallelmode) { |
198 | case OMAP_DSS_RFBI_PARALLELMODE_8: | 195 | case OMAP_DSS_RFBI_PARALLELMODE_8: |
199 | { | 196 | { |
@@ -221,13 +218,11 @@ void omap_rfbi_read_data(void *buf, u32 len) | |||
221 | default: | 218 | default: |
222 | BUG(); | 219 | BUG(); |
223 | } | 220 | } |
224 | rfbi_enable_clocks(0); | ||
225 | } | 221 | } |
226 | EXPORT_SYMBOL(omap_rfbi_read_data); | 222 | EXPORT_SYMBOL(omap_rfbi_read_data); |
227 | 223 | ||
228 | void omap_rfbi_write_data(const void *buf, u32 len) | 224 | void omap_rfbi_write_data(const void *buf, u32 len) |
229 | { | 225 | { |
230 | rfbi_enable_clocks(1); | ||
231 | switch (rfbi.parallelmode) { | 226 | switch (rfbi.parallelmode) { |
232 | case OMAP_DSS_RFBI_PARALLELMODE_8: | 227 | case OMAP_DSS_RFBI_PARALLELMODE_8: |
233 | { | 228 | { |
@@ -252,7 +247,6 @@ void omap_rfbi_write_data(const void *buf, u32 len) | |||
252 | BUG(); | 247 | BUG(); |
253 | 248 | ||
254 | } | 249 | } |
255 | rfbi_enable_clocks(0); | ||
256 | } | 250 | } |
257 | EXPORT_SYMBOL(omap_rfbi_write_data); | 251 | EXPORT_SYMBOL(omap_rfbi_write_data); |
258 | 252 | ||
@@ -264,8 +258,6 @@ void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width, | |||
264 | int horiz_offset = scr_width - w; | 258 | int horiz_offset = scr_width - w; |
265 | int i; | 259 | int i; |
266 | 260 | ||
267 | rfbi_enable_clocks(1); | ||
268 | |||
269 | if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && | 261 | if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && |
270 | rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { | 262 | rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { |
271 | const u16 __iomem *pd = buf; | 263 | const u16 __iomem *pd = buf; |
@@ -310,8 +302,6 @@ void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width, | |||
310 | } else { | 302 | } else { |
311 | BUG(); | 303 | BUG(); |
312 | } | 304 | } |
313 | |||
314 | rfbi_enable_clocks(0); | ||
315 | } | 305 | } |
316 | EXPORT_SYMBOL(omap_rfbi_write_pixels); | 306 | EXPORT_SYMBOL(omap_rfbi_write_pixels); |
317 | 307 | ||
@@ -332,8 +322,6 @@ void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width, | |||
332 | rfbi.framedone_callback = callback; | 322 | rfbi.framedone_callback = callback; |
333 | rfbi.framedone_callback_data = data; | 323 | rfbi.framedone_callback_data = data; |
334 | 324 | ||
335 | rfbi_enable_clocks(1); | ||
336 | |||
337 | rfbi_write_reg(RFBI_PIXEL_CNT, width * height); | 325 | rfbi_write_reg(RFBI_PIXEL_CNT, width * height); |
338 | 326 | ||
339 | l = rfbi_read_reg(RFBI_CONTROL); | 327 | l = rfbi_read_reg(RFBI_CONTROL); |
@@ -352,8 +340,6 @@ static void framedone_callback(void *data, u32 mask) | |||
352 | 340 | ||
353 | REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0); | 341 | REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0); |
354 | 342 | ||
355 | rfbi_enable_clocks(0); | ||
356 | |||
357 | callback = rfbi.framedone_callback; | 343 | callback = rfbi.framedone_callback; |
358 | rfbi.framedone_callback = NULL; | 344 | rfbi.framedone_callback = NULL; |
359 | 345 | ||
@@ -462,7 +448,6 @@ void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t) | |||
462 | 448 | ||
463 | BUG_ON(!t->converted); | 449 | BUG_ON(!t->converted); |
464 | 450 | ||
465 | rfbi_enable_clocks(1); | ||
466 | rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]); | 451 | rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]); |
467 | rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]); | 452 | rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]); |
468 | 453 | ||
@@ -471,7 +456,6 @@ void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t) | |||
471 | (t->tim[2] ? 1 : 0), 4, 4); | 456 | (t->tim[2] ? 1 : 0), 4, 4); |
472 | 457 | ||
473 | rfbi_print_timings(); | 458 | rfbi_print_timings(); |
474 | rfbi_enable_clocks(0); | ||
475 | } | 459 | } |
476 | 460 | ||
477 | static int ps_to_rfbi_ticks(int time, int div) | 461 | static int ps_to_rfbi_ticks(int time, int div) |
@@ -659,7 +643,6 @@ int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode, | |||
659 | DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n", | 643 | DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n", |
660 | mode, hs, vs, hs_pol_inv, vs_pol_inv); | 644 | mode, hs, vs, hs_pol_inv, vs_pol_inv); |
661 | 645 | ||
662 | rfbi_enable_clocks(1); | ||
663 | rfbi_write_reg(RFBI_HSYNC_WIDTH, hs); | 646 | rfbi_write_reg(RFBI_HSYNC_WIDTH, hs); |
664 | rfbi_write_reg(RFBI_VSYNC_WIDTH, vs); | 647 | rfbi_write_reg(RFBI_VSYNC_WIDTH, vs); |
665 | 648 | ||
@@ -672,7 +655,6 @@ int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode, | |||
672 | l &= ~(1 << 20); | 655 | l &= ~(1 << 20); |
673 | else | 656 | else |
674 | l |= 1 << 20; | 657 | l |= 1 << 20; |
675 | rfbi_enable_clocks(0); | ||
676 | 658 | ||
677 | return 0; | 659 | return 0; |
678 | } | 660 | } |
@@ -687,7 +669,6 @@ int omap_rfbi_enable_te(bool enable, unsigned line) | |||
687 | if (line > (1 << 11) - 1) | 669 | if (line > (1 << 11) - 1) |
688 | return -EINVAL; | 670 | return -EINVAL; |
689 | 671 | ||
690 | rfbi_enable_clocks(1); | ||
691 | l = rfbi_read_reg(RFBI_CONFIG(0)); | 672 | l = rfbi_read_reg(RFBI_CONFIG(0)); |
692 | l &= ~(0x3 << 2); | 673 | l &= ~(0x3 << 2); |
693 | if (enable) { | 674 | if (enable) { |
@@ -697,7 +678,6 @@ int omap_rfbi_enable_te(bool enable, unsigned line) | |||
697 | rfbi.te_enabled = 0; | 678 | rfbi.te_enabled = 0; |
698 | rfbi_write_reg(RFBI_CONFIG(0), l); | 679 | rfbi_write_reg(RFBI_CONFIG(0), l); |
699 | rfbi_write_reg(RFBI_LINE_NUMBER, line); | 680 | rfbi_write_reg(RFBI_LINE_NUMBER, line); |
700 | rfbi_enable_clocks(0); | ||
701 | 681 | ||
702 | return 0; | 682 | return 0; |
703 | } | 683 | } |
@@ -836,8 +816,6 @@ int rfbi_configure(int rfbi_module, int bpp, int lines) | |||
836 | break; | 816 | break; |
837 | } | 817 | } |
838 | 818 | ||
839 | rfbi_enable_clocks(1); | ||
840 | |||
841 | REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */ | 819 | REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */ |
842 | 820 | ||
843 | l = 0; | 821 | l = 0; |
@@ -871,8 +849,6 @@ int rfbi_configure(int rfbi_module, int bpp, int lines) | |||
871 | DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n", | 849 | DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n", |
872 | bpp, lines, cycle1, cycle2, cycle3); | 850 | bpp, lines, cycle1, cycle2, cycle3); |
873 | 851 | ||
874 | rfbi_enable_clocks(0); | ||
875 | |||
876 | return 0; | 852 | return 0; |
877 | } | 853 | } |
878 | EXPORT_SYMBOL(rfbi_configure); | 854 | EXPORT_SYMBOL(rfbi_configure); |
@@ -975,6 +951,8 @@ int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev) | |||
975 | { | 951 | { |
976 | int r; | 952 | int r; |
977 | 953 | ||
954 | rfbi_enable_clocks(1); | ||
955 | |||
978 | r = omap_dss_start_device(dssdev); | 956 | r = omap_dss_start_device(dssdev); |
979 | if (r) { | 957 | if (r) { |
980 | DSSERR("failed to start device\n"); | 958 | DSSERR("failed to start device\n"); |
@@ -1017,6 +995,8 @@ void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev) | |||
1017 | omap_dispc_unregister_isr(framedone_callback, NULL, | 995 | omap_dispc_unregister_isr(framedone_callback, NULL, |
1018 | DISPC_IRQ_FRAMEDONE); | 996 | DISPC_IRQ_FRAMEDONE); |
1019 | omap_dss_stop_device(dssdev); | 997 | omap_dss_stop_device(dssdev); |
998 | |||
999 | rfbi_enable_clocks(0); | ||
1020 | } | 1000 | } |
1021 | EXPORT_SYMBOL(omapdss_rfbi_display_disable); | 1001 | EXPORT_SYMBOL(omapdss_rfbi_display_disable); |
1022 | 1002 | ||