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authorTomi Valkeinen <tomi.valkeinen@nokia.com>2009-12-16 09:49:03 -0500
committerTomi Valkeinen <tomi.valkeinen@nokia.com>2010-02-15 08:14:42 -0500
commitdd8079d6a9c2aa292dacaf1b42f526558e20379f (patch)
treee9efd520a978f8d683c77e0f246ea517ceda9c29 /drivers/video/omap2/dss/dsi.c
parent61140c9a88ce1f1dee4e98a0c442f9a84b4c5e6b (diff)
OMAP: DSS2: DSI: configure all DSI VCs
Instead of configuring only VC0 to be usable, configure all four VCs similarly. This is needed to utilize the other VCs. Setting the FIFO sizes evenly for all VCs, regardless of how many VCs are actually used, is not optimal. However, this affects only cases when larger amounts of data are written or read via L4, meaning that normal use cases are not affected. At some point this could be optimized better to suit different use cases. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video/omap2/dss/dsi.c')
-rw-r--r--drivers/video/omap2/dss/dsi.c39
1 files changed, 17 insertions, 22 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index e003fe9ee9c4..131bd53b6b6d 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -224,7 +224,6 @@ static struct
224 enum dsi_vc_mode mode; 224 enum dsi_vc_mode mode;
225 struct omap_dss_device *dssdev; 225 struct omap_dss_device *dssdev;
226 enum fifo_size fifo_size; 226 enum fifo_size fifo_size;
227 int dest_per; /* destination peripheral 0-3 */
228 } vc[4]; 227 } vc[4];
229 228
230 struct mutex lock; 229 struct mutex lock;
@@ -2020,8 +2019,7 @@ static inline void dsi_vc_write_long_header(int channel, u8 data_type,
2020 2019
2021 WARN_ON(!dsi_bus_is_locked()); 2020 WARN_ON(!dsi_bus_is_locked());
2022 2021
2023 /*data_id = data_type | channel << 6; */ 2022 data_id = data_type | channel << 6;
2024 data_id = data_type | dsi.vc[channel].dest_per << 6;
2025 2023
2026 val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | 2024 val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) |
2027 FLD_VAL(ecc, 31, 24); 2025 FLD_VAL(ecc, 31, 24);
@@ -2127,7 +2125,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc)
2127 return -EINVAL; 2125 return -EINVAL;
2128 } 2126 }
2129 2127
2130 data_id = data_type | dsi.vc[channel].dest_per << 6; 2128 data_id = data_type | channel << 6;
2131 2129
2132 r = (data_id << 0) | (data << 8) | (ecc << 24); 2130 r = (data_id << 0) | (data << 8) | (ecc << 24);
2133 2131
@@ -2529,15 +2527,15 @@ static int dsi_proto_config(struct omap_dss_device *dssdev)
2529 u32 r; 2527 u32 r;
2530 int buswidth = 0; 2528 int buswidth = 0;
2531 2529
2532 dsi_config_tx_fifo(DSI_FIFO_SIZE_128, 2530 dsi_config_tx_fifo(DSI_FIFO_SIZE_32,
2533 DSI_FIFO_SIZE_0, 2531 DSI_FIFO_SIZE_32,
2534 DSI_FIFO_SIZE_0, 2532 DSI_FIFO_SIZE_32,
2535 DSI_FIFO_SIZE_0); 2533 DSI_FIFO_SIZE_32);
2536 2534
2537 dsi_config_rx_fifo(DSI_FIFO_SIZE_128, 2535 dsi_config_rx_fifo(DSI_FIFO_SIZE_32,
2538 DSI_FIFO_SIZE_0, 2536 DSI_FIFO_SIZE_32,
2539 DSI_FIFO_SIZE_0, 2537 DSI_FIFO_SIZE_32,
2540 DSI_FIFO_SIZE_0); 2538 DSI_FIFO_SIZE_32);
2541 2539
2542 /* XXX what values for the timeouts? */ 2540 /* XXX what values for the timeouts? */
2543 dsi_set_stop_state_counter(1000); 2541 dsi_set_stop_state_counter(1000);
@@ -2575,12 +2573,9 @@ static int dsi_proto_config(struct omap_dss_device *dssdev)
2575 dsi_write_reg(DSI_CTRL, r); 2573 dsi_write_reg(DSI_CTRL, r);
2576 2574
2577 dsi_vc_initial_config(0); 2575 dsi_vc_initial_config(0);
2578 2576 dsi_vc_initial_config(1);
2579 /* set all vc targets to peripheral 0 */ 2577 dsi_vc_initial_config(2);
2580 dsi.vc[0].dest_per = 0; 2578 dsi_vc_initial_config(3);
2581 dsi.vc[1].dest_per = 0;
2582 dsi.vc[2].dest_per = 0;
2583 dsi.vc[3].dest_per = 0;
2584 2579
2585 return 0; 2580 return 0;
2586} 2581}
@@ -2846,9 +2841,6 @@ static void dsi_update_screen_dispc(struct omap_dss_device *dssdev,
2846 if (bytespf % packet_payload) 2841 if (bytespf % packet_payload)
2847 total_len += (bytespf % packet_payload) + 1; 2842 total_len += (bytespf % packet_payload) + 1;
2848 2843
2849 if (0)
2850 dsi_vc_print_status(1);
2851
2852 l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ 2844 l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */
2853 dsi_write_reg(DSI_VC_TE(channel), l); 2845 dsi_write_reg(DSI_VC_TE(channel), l);
2854 2846
@@ -3014,7 +3006,7 @@ static void dsi_handle_framedone(void)
3014 /* RX_FIFO_NOT_EMPTY */ 3006 /* RX_FIFO_NOT_EMPTY */
3015 if (REG_GET(DSI_VC_CTRL(channel), 20, 20)) { 3007 if (REG_GET(DSI_VC_CTRL(channel), 20, 20)) {
3016 DSSERR("Received error during frame transfer:\n"); 3008 DSSERR("Received error during frame transfer:\n");
3017 dsi_vc_flush_receive_data(0); 3009 dsi_vc_flush_receive_data(channel);
3018 } 3010 }
3019 3011
3020#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC 3012#ifdef CONFIG_OMAP2_DSS_FAKE_VSYNC
@@ -3268,6 +3260,9 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev)
3268 3260
3269 /* enable interface */ 3261 /* enable interface */
3270 dsi_vc_enable(0, 1); 3262 dsi_vc_enable(0, 1);
3263 dsi_vc_enable(1, 1);
3264 dsi_vc_enable(2, 1);
3265 dsi_vc_enable(3, 1);
3271 dsi_if_enable(1); 3266 dsi_if_enable(1);
3272 dsi_force_tx_stop_mode_io(); 3267 dsi_force_tx_stop_mode_io();
3273 3268