diff options
author | Harvey Harrison <harvey.harrison@gmail.com> | 2008-04-29 04:03:41 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-29 11:06:28 -0400 |
commit | d15c0a4dc44f9d47d3dad03d17175aa1e6428093 (patch) | |
tree | 754888dd8a97a3412fba82ea6fdfa97cf72f61f2 /drivers/video/matrox/matroxfb_misc.c | |
parent | a5abdeafedf722b0f3f357f4a23089a686b1b80d (diff) |
video: use get/put_unaligned_* helpers
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Cc: Petr Vandrovec <vandrove@vc.cvut.cz>
Cc: Antonino Daplas <adaplas@gmail.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/matrox/matroxfb_misc.c')
-rw-r--r-- | drivers/video/matrox/matroxfb_misc.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/video/matrox/matroxfb_misc.c b/drivers/video/matrox/matroxfb_misc.c index aaa3e538e5da..5b5f072fc1a8 100644 --- a/drivers/video/matrox/matroxfb_misc.c +++ b/drivers/video/matrox/matroxfb_misc.c | |||
@@ -522,8 +522,6 @@ static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) { | |||
522 | #endif | 522 | #endif |
523 | } | 523 | } |
524 | 524 | ||
525 | #define get_u16(x) (le16_to_cpu(get_unaligned((__u16*)(x)))) | ||
526 | #define get_u32(x) (le32_to_cpu(get_unaligned((__u32*)(x)))) | ||
527 | static int parse_pins1(WPMINFO const struct matrox_bios* bd) { | 525 | static int parse_pins1(WPMINFO const struct matrox_bios* bd) { |
528 | unsigned int maxdac; | 526 | unsigned int maxdac; |
529 | 527 | ||
@@ -532,11 +530,12 @@ static int parse_pins1(WPMINFO const struct matrox_bios* bd) { | |||
532 | case 1: maxdac = 220000; break; | 530 | case 1: maxdac = 220000; break; |
533 | default: maxdac = 240000; break; | 531 | default: maxdac = 240000; break; |
534 | } | 532 | } |
535 | if (get_u16(bd->pins + 24)) { | 533 | if (get_unaligned_le16(bd->pins + 24)) { |
536 | maxdac = get_u16(bd->pins + 24) * 10; | 534 | maxdac = get_unaligned_le16(bd->pins + 24) * 10; |
537 | } | 535 | } |
538 | MINFO->limits.pixel.vcomax = maxdac; | 536 | MINFO->limits.pixel.vcomax = maxdac; |
539 | MINFO->values.pll.system = get_u16(bd->pins + 28) ? get_u16(bd->pins + 28) * 10 : 50000; | 537 | MINFO->values.pll.system = get_unaligned_le16(bd->pins + 28) ? |
538 | get_unaligned_le16(bd->pins + 28) * 10 : 50000; | ||
540 | /* ignore 4MB, 8MB, module clocks */ | 539 | /* ignore 4MB, 8MB, module clocks */ |
541 | MINFO->features.pll.ref_freq = 14318; | 540 | MINFO->features.pll.ref_freq = 14318; |
542 | MINFO->values.reg.mctlwtst = 0x00030101; | 541 | MINFO->values.reg.mctlwtst = 0x00030101; |
@@ -575,7 +574,8 @@ static void default_pins2(WPMINFO2) { | |||
575 | static int parse_pins3(WPMINFO const struct matrox_bios* bd) { | 574 | static int parse_pins3(WPMINFO const struct matrox_bios* bd) { |
576 | MINFO->limits.pixel.vcomax = | 575 | MINFO->limits.pixel.vcomax = |
577 | MINFO->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); | 576 | MINFO->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); |
578 | MINFO->values.reg.mctlwtst = get_u32(bd->pins + 48) == 0xFFFFFFFF ? 0x01250A21 : get_u32(bd->pins + 48); | 577 | MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ? |
578 | 0x01250A21 : get_unaligned_le32(bd->pins + 48); | ||
579 | /* memory config */ | 579 | /* memory config */ |
580 | MINFO->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) | | 580 | MINFO->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) | |
581 | ((bd->pins[57] << 22) & 0x00C00000) | | 581 | ((bd->pins[57] << 22) & 0x00C00000) | |
@@ -601,7 +601,7 @@ static void default_pins3(WPMINFO2) { | |||
601 | static int parse_pins4(WPMINFO const struct matrox_bios* bd) { | 601 | static int parse_pins4(WPMINFO const struct matrox_bios* bd) { |
602 | MINFO->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000; | 602 | MINFO->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000; |
603 | MINFO->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? MINFO->limits.pixel.vcomax : bd->pins[ 38] * 4000; | 603 | MINFO->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? MINFO->limits.pixel.vcomax : bd->pins[ 38] * 4000; |
604 | MINFO->values.reg.mctlwtst = get_u32(bd->pins + 71); | 604 | MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71); |
605 | MINFO->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) | | 605 | MINFO->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) | |
606 | ((bd->pins[87] << 22) & 0x00C00000) | | 606 | ((bd->pins[87] << 22) & 0x00C00000) | |
607 | ((bd->pins[86] << 1) & 0x000001E0) | | 607 | ((bd->pins[86] << 1) & 0x000001E0) | |
@@ -609,7 +609,7 @@ static int parse_pins4(WPMINFO const struct matrox_bios* bd) { | |||
609 | MINFO->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) | | 609 | MINFO->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) | |
610 | ((bd->pins[53] << 22) & 0x10000000) | | 610 | ((bd->pins[53] << 22) & 0x10000000) | |
611 | ((bd->pins[53] << 7) & 0x00001C00); | 611 | ((bd->pins[53] << 7) & 0x00001C00); |
612 | MINFO->values.reg.opt3 = get_u32(bd->pins + 67); | 612 | MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 67); |
613 | MINFO->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000; | 613 | MINFO->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000; |
614 | MINFO->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000; | 614 | MINFO->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000; |
615 | return 0; | 615 | return 0; |
@@ -640,12 +640,12 @@ static int parse_pins5(WPMINFO const struct matrox_bios* bd) { | |||
640 | MINFO->limits.video.vcomin = (bd->pins[122] == 0xFF) ? MINFO->limits.system.vcomin : bd->pins[122] * mult; | 640 | MINFO->limits.video.vcomin = (bd->pins[122] == 0xFF) ? MINFO->limits.system.vcomin : bd->pins[122] * mult; |
641 | MINFO->values.pll.system = | 641 | MINFO->values.pll.system = |
642 | MINFO->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000; | 642 | MINFO->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000; |
643 | MINFO->values.reg.opt = get_u32(bd->pins+ 48); | 643 | MINFO->values.reg.opt = get_unaligned_le32(bd->pins + 48); |
644 | MINFO->values.reg.opt2 = get_u32(bd->pins+ 52); | 644 | MINFO->values.reg.opt2 = get_unaligned_le32(bd->pins + 52); |
645 | MINFO->values.reg.opt3 = get_u32(bd->pins+ 94); | 645 | MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 94); |
646 | MINFO->values.reg.mctlwtst = get_u32(bd->pins+ 98); | 646 | MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 98); |
647 | MINFO->values.reg.memmisc = get_u32(bd->pins+102); | 647 | MINFO->values.reg.memmisc = get_unaligned_le32(bd->pins + 102); |
648 | MINFO->values.reg.memrdbk = get_u32(bd->pins+106); | 648 | MINFO->values.reg.memrdbk = get_unaligned_le32(bd->pins + 106); |
649 | MINFO->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000; | 649 | MINFO->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000; |
650 | MINFO->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; | 650 | MINFO->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; |
651 | MINFO->values.memory.dll = (bd->pins[115] & 0x02) != 0; | 651 | MINFO->values.memory.dll = (bd->pins[115] & 0x02) != 0; |