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authorStefani Seibold <stefani@seibold.net>2011-01-03 04:28:59 -0500
committerPaul Mundt <lethal@linux-sh.org>2011-01-06 01:52:19 -0500
commit748103e7235892bf9a3ee568d7d4dd7e5a3beece (patch)
tree64e9ab69ea39b169d96df92cc2cf0073fb6617ed /drivers/video/i810
parent529ed806d4540d23ca2f68b28c3715d1566fc3ac (diff)
drivers/video/i810/i810-i2c.c: fix i2c bus handling
These patch fix a longstanding bug in the i810 frame buffer driver. The handling of the i2c bus is wrong: A 1 bit should not written to the i2c, these will be done by switch the i2c to input. Driving an 1 bit active is against the i2c spec. An active driven of a 1 bit will result in very strange error, depending which side is the more powerful one. In my case it depends on the temperature of the Display-Controller-EEprom: With an cold eprom a got the correct EDID datas, with a warm one some of the 1 bits was 0 :-( The same bug is also in the intelfb driver in the file drivers/video/intelfb/intelfb_i2c.c. The functions intelfb_gpio_setscl() and intelfb_gpio_setsda() do drive the 1 bit active to the i2c bus. But since i have no card which is used by the intelfb driver i cannot fix it. Signed-off-by: Stefani Seibold <stefani@seibold.net> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Jean Delvare <khali@linux-fr.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/i810')
-rw-r--r--drivers/video/i810/i810-i2c.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/video/i810/i810-i2c.c b/drivers/video/i810/i810-i2c.c
index cd2c728a809b..7db17d0d8a8c 100644
--- a/drivers/video/i810/i810-i2c.c
+++ b/drivers/video/i810/i810-i2c.c
@@ -45,8 +45,10 @@ static void i810i2c_setscl(void *data, int state)
45 struct i810fb_par *par = chan->par; 45 struct i810fb_par *par = chan->par;
46 u8 __iomem *mmio = par->mmio_start_virtual; 46 u8 __iomem *mmio = par->mmio_start_virtual;
47 47
48 i810_writel(mmio, chan->ddc_base, (state ? SCL_VAL_OUT : 0) | SCL_DIR | 48 if (state)
49 SCL_DIR_MASK | SCL_VAL_MASK); 49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK);
50 else
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK);
50 i810_readl(mmio, chan->ddc_base); /* flush posted write */ 52 i810_readl(mmio, chan->ddc_base); /* flush posted write */
51} 53}
52 54
@@ -56,8 +58,10 @@ static void i810i2c_setsda(void *data, int state)
56 struct i810fb_par *par = chan->par; 58 struct i810fb_par *par = chan->par;
57 u8 __iomem *mmio = par->mmio_start_virtual; 59 u8 __iomem *mmio = par->mmio_start_virtual;
58 60
59 i810_writel(mmio, chan->ddc_base, (state ? SDA_VAL_OUT : 0) | SDA_DIR | 61 if (state)
60 SDA_DIR_MASK | SDA_VAL_MASK); 62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK);
63 else
64 i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK);
61 i810_readl(mmio, chan->ddc_base); /* flush posted write */ 65 i810_readl(mmio, chan->ddc_base); /* flush posted write */
62} 66}
63 67