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authorTomi Valkeinen <tomi.valkeinen@ti.com>2014-10-22 08:02:17 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-11-12 06:40:27 -0500
commitc84c3a5bb78ff271787a1fec9218768aed555e8d (patch)
tree98c64021765bcaf1b5389a9082ae98487c7f9c2b /drivers/video/fbdev/omap2
parentd13cbb32c50019b38fb3ab030a8ab435b6f2440a (diff)
OMAPDSS: HDMI: use common DSS PLL support
Now that we have the common DSS PLL support, change HDMI to use it. This results in quite a lot of changes, but almost all of them are trivial name changes. The function to program the PLL settings can be removed from hdmi_pll.c, as the common PLL API contains the same functionality. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/fbdev/omap2')
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi.h24
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi4.c55
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi5.c56
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi_pll.c225
4 files changed, 146 insertions, 214 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/dss/hdmi.h
index 7595274a9bcf..3c42823e934b 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi.h
@@ -184,18 +184,6 @@ struct hdmi_config {
184 enum hdmi_core_hdmi_dvi hdmi_dvi_mode; 184 enum hdmi_core_hdmi_dvi hdmi_dvi_mode;
185}; 185};
186 186
187/* HDMI PLL structure */
188struct hdmi_pll_info {
189 u16 regn;
190 u16 regm;
191 u32 regmf;
192 u16 regm2;
193 u16 regsd;
194
195 unsigned long clkdco;
196 unsigned long clkout;
197};
198
199struct hdmi_audio_format { 187struct hdmi_audio_format {
200 enum hdmi_stereo_channels stereo_channels; 188 enum hdmi_stereo_channels stereo_channels;
201 u8 active_chnnls_msk; 189 u8 active_chnnls_msk;
@@ -246,11 +234,11 @@ struct hdmi_wp_data {
246}; 234};
247 235
248struct hdmi_pll_data { 236struct hdmi_pll_data {
237 struct dss_pll pll;
238
249 void __iomem *base; 239 void __iomem *base;
250 240
251 struct hdmi_wp_data *wp; 241 struct hdmi_wp_data *wp;
252
253 struct hdmi_pll_info info;
254}; 242};
255 243
256struct hdmi_phy_data { 244struct hdmi_phy_data {
@@ -314,14 +302,12 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
314int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp); 302int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp);
315 303
316/* HDMI PLL funcs */ 304/* HDMI PLL funcs */
317int hdmi_pll_enable(struct hdmi_pll_data *pll);
318void hdmi_pll_disable(struct hdmi_pll_data *pll);
319int hdmi_pll_set_config(struct hdmi_pll_data *pll);
320void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s); 305void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s);
321void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin, 306void hdmi_pll_compute(struct hdmi_pll_data *pll,
322 unsigned long target_tmds); 307 unsigned long target_tmds, struct dss_pll_clock_info *pi);
323int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll, 308int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
324 struct hdmi_wp_data *wp); 309 struct hdmi_wp_data *wp);
310void hdmi_pll_uninit(struct hdmi_pll_data *hpll);
325 311
326/* HDMI PHY funcs */ 312/* HDMI PHY funcs */
327int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk, 313int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk,
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
index 98aa910241b8..46dcc71ce058 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
@@ -49,7 +49,6 @@ static struct {
49 49
50 struct hdmi_config cfg; 50 struct hdmi_config cfg;
51 51
52 struct clk *sys_clk;
53 struct regulator *vdda_hdmi_dac_reg; 52 struct regulator *vdda_hdmi_dac_reg;
54 53
55 bool core_enabled; 54 bool core_enabled;
@@ -181,6 +180,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
181 struct omap_video_timings *p; 180 struct omap_video_timings *p;
182 struct omap_overlay_manager *mgr = hdmi.output.manager; 181 struct omap_overlay_manager *mgr = hdmi.output.manager;
183 struct hdmi_wp_data *wp = &hdmi.wp; 182 struct hdmi_wp_data *wp = &hdmi.wp;
183 struct dss_pll_clock_info hdmi_cinfo = { 0 };
184 184
185 r = hdmi_power_on_core(dssdev); 185 r = hdmi_power_on_core(dssdev);
186 if (r) 186 if (r)
@@ -194,22 +194,22 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
194 194
195 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); 195 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
196 196
197 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock); 197 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
198 198
199 r = hdmi_pll_enable(&hdmi.pll); 199 r = dss_pll_enable(&hdmi.pll.pll);
200 if (r) { 200 if (r) {
201 DSSERR("Failed to enable PLL\n"); 201 DSSERR("Failed to enable PLL\n");
202 goto err_pll_enable; 202 goto err_pll_enable;
203 } 203 }
204 204
205 r = hdmi_pll_set_config(&hdmi.pll); 205 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
206 if (r) { 206 if (r) {
207 DSSERR("Failed to configure PLL\n"); 207 DSSERR("Failed to configure PLL\n");
208 goto err_pll_cfg; 208 goto err_pll_cfg;
209 } 209 }
210 210
211 r = hdmi_phy_configure(&hdmi.phy, hdmi.pll.info.clkdco, 211 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
212 hdmi.pll.info.clkout); 212 hdmi_cinfo.clkout[0]);
213 if (r) { 213 if (r) {
214 DSSDBG("Failed to configure PHY\n"); 214 DSSDBG("Failed to configure PHY\n");
215 goto err_phy_cfg; 215 goto err_phy_cfg;
@@ -247,7 +247,7 @@ err_phy_cfg:
247 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 247 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
248err_phy_pwr: 248err_phy_pwr:
249err_pll_cfg: 249err_pll_cfg:
250 hdmi_pll_disable(&hdmi.pll); 250 dss_pll_disable(&hdmi.pll.pll);
251err_pll_enable: 251err_pll_enable:
252 hdmi_power_off_core(dssdev); 252 hdmi_power_off_core(dssdev);
253 return -EIO; 253 return -EIO;
@@ -265,7 +265,7 @@ static void hdmi_power_off_full(struct omap_dss_device *dssdev)
265 265
266 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 266 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
267 267
268 hdmi_pll_disable(&hdmi.pll); 268 dss_pll_disable(&hdmi.pll.pll);
269 269
270 hdmi_power_off_core(dssdev); 270 hdmi_power_off_core(dssdev);
271} 271}
@@ -407,21 +407,6 @@ static void hdmi_core_disable(struct omap_dss_device *dssdev)
407 mutex_unlock(&hdmi.lock); 407 mutex_unlock(&hdmi.lock);
408} 408}
409 409
410static int hdmi_get_clocks(struct platform_device *pdev)
411{
412 struct clk *clk;
413
414 clk = devm_clk_get(&pdev->dev, "sys_clk");
415 if (IS_ERR(clk)) {
416 DSSERR("can't get sys_clk\n");
417 return PTR_ERR(clk);
418 }
419
420 hdmi.sys_clk = clk;
421
422 return 0;
423}
424
425static int hdmi_connect(struct omap_dss_device *dssdev, 410static int hdmi_connect(struct omap_dss_device *dssdev,
426 struct omap_dss_device *dst) 411 struct omap_dss_device *dst)
427{ 412{
@@ -700,22 +685,17 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
700 685
701 r = hdmi_phy_init(pdev, &hdmi.phy); 686 r = hdmi_phy_init(pdev, &hdmi.phy);
702 if (r) 687 if (r)
703 return r; 688 goto err;
704 689
705 r = hdmi4_core_init(pdev, &hdmi.core); 690 r = hdmi4_core_init(pdev, &hdmi.core);
706 if (r) 691