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authorThomas Gleixner <tglx@linutronix.de>2009-07-25 10:17:02 -0400
committerIngo Molnar <mingo@elte.hu>2011-09-13 05:12:04 -0400
commit6b2c1800f1d3a608af952cfbd57f8f1a71c5d9b4 (patch)
treef7488a60b0fb0fd81ea0160bcde3e20a1cff10a1 /drivers/video/console
parent757455d41c390da4ae8e06468ad097fe42eaab41 (diff)
locking, video: Annotate vga console lock as raw
The vga_lock lock can be taken in atomic context and therefore cannot be preempted on -rt - annotate it. In mainline this change documents the low level nature of the lock - otherwise there's no functional difference. Lockdep and Sparse checking will work as usual. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/video/console')
-rw-r--r--drivers/video/console/vgacon.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index 915fd74da7a2..d449a74d4a31 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -50,7 +50,7 @@
50#include <video/vga.h> 50#include <video/vga.h>
51#include <asm/io.h> 51#include <asm/io.h>
52 52
53static DEFINE_SPINLOCK(vga_lock); 53static DEFINE_RAW_SPINLOCK(vga_lock);
54static int cursor_size_lastfrom; 54static int cursor_size_lastfrom;
55static int cursor_size_lastto; 55static int cursor_size_lastto;
56static u32 vgacon_xres; 56static u32 vgacon_xres;
@@ -157,7 +157,7 @@ static inline void write_vga(unsigned char reg, unsigned int val)
157 * ddprintk might set the console position from interrupt 157 * ddprintk might set the console position from interrupt
158 * handlers, thus the write has to be IRQ-atomic. 158 * handlers, thus the write has to be IRQ-atomic.
159 */ 159 */
160 spin_lock_irqsave(&vga_lock, flags); 160 raw_spin_lock_irqsave(&vga_lock, flags);
161 161
162#ifndef SLOW_VGA 162#ifndef SLOW_VGA
163 v1 = reg + (val & 0xff00); 163 v1 = reg + (val & 0xff00);
@@ -170,7 +170,7 @@ static inline void write_vga(unsigned char reg, unsigned int val)
170 outb_p(reg + 1, vga_video_port_reg); 170 outb_p(reg + 1, vga_video_port_reg);
171 outb_p(val & 0xff, vga_video_port_val); 171 outb_p(val & 0xff, vga_video_port_val);
172#endif 172#endif
173 spin_unlock_irqrestore(&vga_lock, flags); 173 raw_spin_unlock_irqrestore(&vga_lock, flags);
174} 174}
175 175
176static inline void vga_set_mem_top(struct vc_data *c) 176static inline void vga_set_mem_top(struct vc_data *c)
@@ -664,7 +664,7 @@ static void vgacon_set_cursor_size(int xpos, int from, int to)
664 cursor_size_lastfrom = from; 664 cursor_size_lastfrom = from;
665 cursor_size_lastto = to; 665 cursor_size_lastto = to;
666 666
667 spin_lock_irqsave(&vga_lock, flags); 667 raw_spin_lock_irqsave(&vga_lock, flags);
668 if (vga_video_type >= VIDEO_TYPE_VGAC) { 668 if (vga_video_type >= VIDEO_TYPE_VGAC) {
669 outb_p(VGA_CRTC_CURSOR_START, vga_video_port_reg); 669 outb_p(VGA_CRTC_CURSOR_START, vga_video_port_reg);
670 curs = inb_p(vga_video_port_val); 670 curs = inb_p(vga_video_port_val);
@@ -682,7 +682,7 @@ static void vgacon_set_cursor_size(int xpos, int from, int to)
682 outb_p(curs, vga_video_port_val); 682 outb_p(curs, vga_video_port_val);
683 outb_p(VGA_CRTC_CURSOR_END, vga_video_port_reg); 683 outb_p(VGA_CRTC_CURSOR_END, vga_video_port_reg);
684 outb_p(cure, vga_video_port_val); 684 outb_p(cure, vga_video_port_val);
685 spin_unlock_irqrestore(&vga_lock, flags); 685 raw_spin_unlock_irqrestore(&vga_lock, flags);
686} 686}
687 687
688static void vgacon_cursor(struct vc_data *c, int mode) 688static void vgacon_cursor(struct vc_data *c, int mode)
@@ -757,7 +757,7 @@ static int vgacon_doresize(struct vc_data *c,
757 unsigned int scanlines = height * c->vc_font.height; 757 unsigned int scanlines = height * c->vc_font.height;
758 u8 scanlines_lo = 0, r7 = 0, vsync_end = 0, mode, max_scan; 758 u8 scanlines_lo = 0, r7 = 0, vsync_end = 0, mode, max_scan;
759 759
760 spin_lock_irqsave(&vga_lock, flags); 760 raw_spin_lock_irqsave(&vga_lock, flags);
761 761
762 vgacon_xres = width * VGA_FONTWIDTH; 762 vgacon_xres = width * VGA_FONTWIDTH;
763 vgacon_yres = height * c->vc_font.height; 763 vgacon_yres = height * c->vc_font.height;
@@ -808,7 +808,7 @@ static int vgacon_doresize(struct vc_data *c,
808 outb_p(vsync_end, vga_video_port_val); 808 outb_p(vsync_end, vga_video_port_val);
809 } 809 }
810 810
811 spin_unlock_irqrestore(&vga_lock, flags); 811 raw_spin_unlock_irqrestore(&vga_lock, flags);
812 return 0; 812 return 0;
813} 813}
814 814
@@ -891,11 +891,11 @@ static void vga_vesa_blank(struct vgastate *state, int mode)
891{ 891{
892 /* save original values of VGA controller registers */ 892 /* save original values of VGA controller registers */
893 if (!vga_vesa_blanked) { 893 if (!vga_vesa_blanked) {
894 spin_lock_irq(&vga_lock); 894 raw_spin_lock_irq(&vga_lock);
895 vga_state.SeqCtrlIndex = vga_r(state->vgabase, VGA_SEQ_I); 895 vga_state.SeqCtrlIndex = vga_r(state->vgabase, VGA_SEQ_I);
896 vga_state.CrtCtrlIndex = inb_p(vga_video_port_reg); 896 vga_state.CrtCtrlIndex = inb_p(vga_video_port_reg);
897 vga_state.CrtMiscIO = vga_r(state->vgabase, VGA_MIS_R); 897 vga_state.CrtMiscIO = vga_r(state->vgabase, VGA_MIS_R);
898 spin_unlock_irq(&vga_lock); 898 raw_spin_unlock_irq(&vga_lock);
899 899
900 outb_p(0x00, vga_video_port_reg); /* HorizontalTotal */ 900 outb_p(0x00, vga_video_port_reg); /* HorizontalTotal */
901 vga_state.HorizontalTotal = inb_p(vga_video_port_val); 901 vga_state.HorizontalTotal = inb_p(vga_video_port_val);
@@ -918,7 +918,7 @@ static void vga_vesa_blank(struct vgastate *state, int mode)
918 918
919 /* assure that video is enabled */ 919 /* assure that video is enabled */
920 /* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */ 920 /* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */
921 spin_lock_irq(&vga_lock); 921 raw_spin_lock_irq(&vga_lock);
922 vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, vga_state.ClockingMode | 0x20); 922 vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, vga_state.ClockingMode | 0x20);
923 923
924 /* test for vertical retrace in process.... */ 924 /* test for vertical retrace in process.... */
@@ -954,13 +954,13 @@ static void vga_vesa_blank(struct vgastate *state, int mode)
954 /* restore both index registers */ 954 /* restore both index registers */
955 vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex); 955 vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex);
956 outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg); 956 outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg);
957 spin_unlock_irq(&vga_lock); 957 raw_spin_unlock_irq(&vga_lock);
958} 958}
959 959
960static void vga_vesa_unblank(struct vgastate *state) 960static void vga_vesa_unblank(struct vgastate *state)
961{ 961{
962 /* restore original values of VGA controller registers */ 962 /* restore original values of VGA controller registers */
963 spin_lock_irq(&vga_lock); 963 raw_spin_lock_irq(&vga_lock);
964 vga_w(state->vgabase, VGA_MIS_W, vga_state.CrtMiscIO); 964 vga_w(state->vgabase, VGA_MIS_W, vga_state.CrtMiscIO);
965 965
966 outb_p(0x00, vga_video_port_reg); /* HorizontalTotal */ 966 outb_p(0x00, vga_video_port_reg); /* HorizontalTotal */
@@ -985,7 +985,7 @@ static void vga_vesa_unblank(struct vgastate *state)
985 /* restore index/control registers */ 985 /* restore index/control registers */
986 vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex); 986 vga_w(state->vgabase, VGA_SEQ_I, vga_state.SeqCtrlIndex);
987 outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg); 987 outb_p(vga_state.CrtCtrlIndex, vga_video_port_reg);
988 spin_unlock_irq(&vga_lock); 988 raw_spin_unlock_irq(&vga_lock);
989} 989}
990 990
991static void vga_pal_blank(struct vgastate *state) 991static void vga_pal_blank(struct vgastate *state)
@@ -1104,7 +1104,7 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
1104 charmap += 4 * cmapsz; 1104 charmap += 4 * cmapsz;
1105#endif 1105#endif
1106 1106
1107 spin_lock_irq(&vga_lock); 1107 raw_spin_lock_irq(&vga_lock);
1108 /* First, the Sequencer */ 1108 /* First, the Sequencer */
1109 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); 1109 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1);
1110 /* CPU writes only to map 2 */ 1110 /* CPU writes only to map 2 */
@@ -1120,7 +1120,7 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
1120 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x00); 1120 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x00);
1121 /* map start at A000:0000 */ 1121 /* map start at A000:0000 */
1122 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x00); 1122 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x00);
1123 spin_unlock_irq(&vga_lock); 1123 raw_spin_unlock_irq(&vga_lock);
1124 1124
1125 if (arg) { 1125 if (arg) {
1126 if (set) 1126 if (set)
@@ -1147,7 +1147,7 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
1147 } 1147 }
1148 } 1148 }
1149 1149
1150 spin_lock_irq(&vga_lock); 1150 raw_spin_lock_irq(&vga_lock);
1151 /* First, the sequencer, Synchronous reset */ 1151 /* First, the sequencer, Synchronous reset */
1152 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x01); 1152 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x01);
1153 /* CPU writes to maps 0 and 1 */ 1153 /* CPU writes to maps 0 and 1 */
@@ -1186,7 +1186,7 @@ static int vgacon_do_font_op(struct vgastate *state,char *arg,int set,int ch512)
1186 inb_p(video_port_status); 1186 inb_p(video_port_status);
1187 vga_wattr(state->vgabase, VGA_AR_ENABLE_DISPLAY, 0); 1187 vga_wattr(state->vgabase, VGA_AR_ENABLE_DISPLAY, 0);
1188 } 1188 }
1189 spin_unlock_irq(&vga_lock); 1189 raw_spin_unlock_irq(&vga_lock);
1190 return 0; 1190 return 0;
1191} 1191}
1192 1192
@@ -1211,26 +1211,26 @@ static int vgacon_adjust_height(struct vc_data *vc, unsigned fontheight)
1211 registers; they are write-only on EGA, but it appears that they 1211 registers; they are write-only on EGA, but it appears that they
1212 are all don't care bits on EGA, so I guess it doesn't matter. */ 1212 are all don't care bits on EGA, so I guess it doesn't matter. */
1213 1213
1214 spin_lock_irq(&vga_lock); 1214 raw_spin_lock_irq(&vga_lock);
1215 outb_p(0x07, vga_video_port_reg); /* CRTC overflow register */ 1215 outb_p(0x07, vga_video_port_reg); /* CRTC overflow register */
1216 ovr = inb_p(vga_video_port_val); 1216 ovr = inb_p(vga_video_port_val);
1217 outb_p(0x09, vga_video_port_reg); /* Font size register */ 1217 outb_p(0x09, vga_video_port_reg); /* Font size register */
1218 fsr = inb_p(vga_video_port_val); 1218 fsr = inb_p(vga_video_port_val);
1219 spin_unlock_irq(&vga_lock); 1219 raw_spin_unlock_irq(&vga_lock);
1220 1220
1221 vde = maxscan & 0xff; /* Vertical display end reg */ 1221 vde = maxscan & 0xff; /* Vertical display end reg */
1222 ovr = (ovr & 0xbd) + /* Overflow register */ 1222 ovr = (ovr & 0xbd) + /* Overflow register */
1223 ((maxscan & 0x100) >> 7) + ((maxscan & 0x200) >> 3); 1223 ((maxscan & 0x100) >> 7) + ((maxscan & 0x200) >> 3);
1224 fsr = (fsr & 0xe0) + (fontheight - 1); /* Font size register */ 1224 fsr = (fsr & 0xe0) + (fontheight - 1); /* Font size register */
1225 1225
1226 spin_lock_irq(&vga_lock); 1226 raw_spin_lock_irq(&vga_lock);
1227 outb_p(0x07, vga_video_port_reg); /* CRTC overflow register */ 1227 outb_p(0x07, vga_video_port_reg); /* CRTC overflow register */
1228 outb_p(ovr, vga_video_port_val); 1228 outb_p(ovr, vga_video_port_val);
1229 outb_p(0x09, vga_video_port_reg); /* Font size */ 1229 outb_p(0x09, vga_video_port_reg); /* Font size */
1230 outb_p(fsr, vga_video_port_val); 1230 outb_p(fsr, vga_video_port_val);
1231 outb_p(0x12, vga_video_port_reg); /* Vertical display limit */ 1231 outb_p(0x12, vga_video_port_reg); /* Vertical display limit */
1232 outb_p(vde, vga_video_port_val); 1232 outb_p(vde, vga_video_port_val);
1233 spin_unlock_irq(&vga_lock); 1233 raw_spin_unlock_irq(&vga_lock);
1234 vga_video_font_height = fontheight; 1234 vga_video_font_height = fontheight;
1235 1235
1236 for (i = 0; i < MAX_NR_CONSOLES; i++) { 1236 for (i = 0; i < MAX_NR_CONSOLES; i++) {