diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-12-23 10:23:23 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-12-23 10:23:23 -0500 |
commit | 1ccedb7cdba6886939dd8b4c8f965a826f696e56 (patch) | |
tree | 0f5fc519a68faca5318c296315c9b6c502907056 /drivers/video/aty/radeonfb.h | |
parent | a98f8fd24fb24fcb9a359553e64dd6aac5cf4279 (diff) | |
parent | 929096fe9ff1f4b3645cf3919527ab47e8d5e17c (diff) |
Merge commit 'v2.6.28-rc9' into x86/apic
Diffstat (limited to 'drivers/video/aty/radeonfb.h')
-rw-r--r-- | drivers/video/aty/radeonfb.h | 38 |
1 files changed, 17 insertions, 21 deletions
diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index ea0b5b47acaf..3ea1b00fdd22 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h | |||
@@ -336,15 +336,7 @@ struct radeonfb_info { | |||
336 | int mon2_type; | 336 | int mon2_type; |
337 | u8 *mon2_EDID; | 337 | u8 *mon2_EDID; |
338 | 338 | ||
339 | /* accel bits */ | 339 | u32 dp_gui_master_cntl; |
340 | u32 dp_gui_mc_base; | ||
341 | u32 dp_gui_mc_cache; | ||
342 | u32 dp_cntl_cache; | ||
343 | u32 dp_brush_fg_cache; | ||
344 | u32 dp_brush_bg_cache; | ||
345 | u32 dp_src_fg_cache; | ||
346 | u32 dp_src_bg_cache; | ||
347 | u32 fifo_free; | ||
348 | 340 | ||
349 | struct pll_info pll; | 341 | struct pll_info pll; |
350 | 342 | ||
@@ -356,7 +348,6 @@ struct radeonfb_info { | |||
356 | int lock_blank; | 348 | int lock_blank; |
357 | int dynclk; | 349 | int dynclk; |
358 | int no_schedule; | 350 | int no_schedule; |
359 | int gfx_mode; | ||
360 | enum radeon_pm_mode pm_mode; | 351 | enum radeon_pm_mode pm_mode; |
361 | reinit_function_ptr reinit_func; | 352 | reinit_function_ptr reinit_func; |
362 | 353 | ||
@@ -401,14 +392,8 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms) | |||
401 | #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) | 392 | #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) |
402 | #define INREG16(addr) readw((rinfo->mmio_base)+addr) | 393 | #define INREG16(addr) readw((rinfo->mmio_base)+addr) |
403 | #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) | 394 | #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) |
404 | |||
405 | #ifdef CONFIG_PPC | ||
406 | #define INREG(addr) ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); }) | ||
407 | #define OUTREG(addr,val) do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0) | ||
408 | #else | ||
409 | #define INREG(addr) readl((rinfo->mmio_base)+addr) | 395 | #define INREG(addr) readl((rinfo->mmio_base)+addr) |
410 | #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) | 396 | #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) |
411 | #endif | ||
412 | 397 | ||
413 | static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, | 398 | static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, |
414 | u32 val, u32 mask) | 399 | u32 val, u32 mask) |
@@ -550,7 +535,17 @@ static inline u32 radeon_get_dstbpp(u16 depth) | |||
550 | * 2D Engine helper routines | 535 | * 2D Engine helper routines |
551 | */ | 536 | */ |
552 | 537 | ||
553 | extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries); | 538 | static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) |
539 | { | ||
540 | int i; | ||
541 | |||
542 | for (i=0; i<2000000; i++) { | ||
543 | if ((INREG(RBBM_STATUS) & 0x7f) >= entries) | ||
544 | return; | ||
545 | udelay(1); | ||
546 | } | ||
547 | printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); | ||
548 | } | ||
554 | 549 | ||
555 | static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | 550 | static inline void radeon_engine_flush (struct radeonfb_info *rinfo) |
556 | { | 551 | { |
@@ -563,7 +558,7 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | |||
563 | /* Ensure FIFO is empty, ie, make sure the flush commands | 558 | /* Ensure FIFO is empty, ie, make sure the flush commands |
564 | * has reached the cache | 559 | * has reached the cache |
565 | */ | 560 | */ |
566 | radeon_fifo_update_and_wait(rinfo, 64); | 561 | _radeon_fifo_wait (rinfo, 64); |
567 | 562 | ||
568 | /* Wait for the flush to complete */ | 563 | /* Wait for the flush to complete */ |
569 | for (i=0; i < 2000000; i++) { | 564 | for (i=0; i < 2000000; i++) { |
@@ -575,12 +570,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) | |||
575 | } | 570 | } |
576 | 571 | ||
577 | 572 | ||
578 | static inline void radeon_engine_idle(struct radeonfb_info *rinfo) | 573 | static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) |
579 | { | 574 | { |
580 | int i; | 575 | int i; |
581 | 576 | ||
582 | /* ensure FIFO is empty before waiting for idle */ | 577 | /* ensure FIFO is empty before waiting for idle */ |
583 | radeon_fifo_update_and_wait (rinfo, 64); | 578 | _radeon_fifo_wait (rinfo, 64); |
584 | 579 | ||
585 | for (i=0; i<2000000; i++) { | 580 | for (i=0; i<2000000; i++) { |
586 | if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { | 581 | if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { |
@@ -593,6 +588,8 @@ static inline void radeon_engine_idle(struct radeonfb_info *rinfo) | |||
593 | } | 588 | } |
594 | 589 | ||
595 | 590 | ||
591 | #define radeon_engine_idle() _radeon_engine_idle(rinfo) | ||
592 | #define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries) | ||
596 | #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) | 593 | #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) |
597 | 594 | ||
598 | 595 | ||
@@ -622,7 +619,6 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image); | |||
622 | extern int radeonfb_sync(struct fb_info *info); | 619 | extern int radeonfb_sync(struct fb_info *info); |
623 | extern void radeonfb_engine_init (struct radeonfb_info *rinfo); | 620 | extern void radeonfb_engine_init (struct radeonfb_info *rinfo); |
624 | extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); | 621 | extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); |
625 | extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo); | ||
626 | 622 | ||
627 | /* Other functions */ | 623 | /* Other functions */ |
628 | extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); | 624 | extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); |