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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/usb/musb/tusb6010.c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/usb/musb/tusb6010.c')
-rw-r--r--drivers/usb/musb/tusb6010.c249
1 files changed, 179 insertions, 70 deletions
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 3c48e77a0aa2..b410357cf016 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -21,10 +21,16 @@
21#include <linux/usb.h> 21#include <linux/usb.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/dma-mapping.h>
24 25
25#include "musb_core.h" 26#include "musb_core.h"
26 27
27static void tusb_source_power(struct musb *musb, int is_on); 28struct tusb6010_glue {
29 struct device *dev;
30 struct platform_device *musb;
31};
32
33static void tusb_musb_set_vbus(struct musb *musb, int is_on);
28 34
29#define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf) 35#define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf)
30#define TUSB_REV_MINOR(reg_val) (reg_val & 0xf) 36#define TUSB_REV_MINOR(reg_val) (reg_val & 0xf)
@@ -50,7 +56,7 @@ u8 tusb_get_revision(struct musb *musb)
50 return rev; 56 return rev;
51} 57}
52 58
53static int __init tusb_print_revision(struct musb *musb) 59static int tusb_print_revision(struct musb *musb)
54{ 60{
55 void __iomem *tbase = musb->ctrl_base; 61 void __iomem *tbase = musb->ctrl_base;
56 u8 rev; 62 u8 rev;
@@ -100,7 +106,7 @@ static void tusb_wbus_quirk(struct musb *musb, int enabled)
100 tmp = phy_otg_ena & ~WBUS_QUIRK_MASK; 106 tmp = phy_otg_ena & ~WBUS_QUIRK_MASK;
101 tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2; 107 tmp |= TUSB_PHY_OTG_CTRL_WRPROTECT | TUSB_PHY_OTG_CTRL_TESTM2;
102 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); 108 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
103 DBG(2, "Enabled tusb wbus quirk ctrl %08x ena %08x\n", 109 dev_dbg(musb->controller, "Enabled tusb wbus quirk ctrl %08x ena %08x\n",
104 musb_readl(tbase, TUSB_PHY_OTG_CTRL), 110 musb_readl(tbase, TUSB_PHY_OTG_CTRL),
105 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); 111 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
106 } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE) 112 } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)
@@ -109,7 +115,7 @@ static void tusb_wbus_quirk(struct musb *musb, int enabled)
109 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); 115 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp);
110 tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena; 116 tmp = TUSB_PHY_OTG_CTRL_WRPROTECT | phy_otg_ena;
111 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); 117 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp);
112 DBG(2, "Disabled tusb wbus quirk ctrl %08x ena %08x\n", 118 dev_dbg(musb->controller, "Disabled tusb wbus quirk ctrl %08x ena %08x\n",
113 musb_readl(tbase, TUSB_PHY_OTG_CTRL), 119 musb_readl(tbase, TUSB_PHY_OTG_CTRL),
114 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); 120 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE));
115 phy_otg_ctrl = 0; 121 phy_otg_ctrl = 0;
@@ -166,13 +172,14 @@ static inline void tusb_fifo_read_unaligned(void __iomem *fifo,
166 172
167void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf) 173void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
168{ 174{
175 struct musb *musb = hw_ep->musb;
169 void __iomem *ep_conf = hw_ep->conf; 176 void __iomem *ep_conf = hw_ep->conf;
170 void __iomem *fifo = hw_ep->fifo; 177 void __iomem *fifo = hw_ep->fifo;
171 u8 epnum = hw_ep->epnum; 178 u8 epnum = hw_ep->epnum;
172 179
173 prefetch(buf); 180 prefetch(buf);
174 181
175 DBG(4, "%cX ep%d fifo %p count %d buf %p\n", 182 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
176 'T', epnum, fifo, len, buf); 183 'T', epnum, fifo, len, buf);
177 184
178 if (epnum) 185 if (epnum)
@@ -215,11 +222,12 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf)
215 222
216void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf) 223void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *buf)
217{ 224{
225 struct musb *musb = hw_ep->musb;
218 void __iomem *ep_conf = hw_ep->conf; 226 void __iomem *ep_conf = hw_ep->conf;
219 void __iomem *fifo = hw_ep->fifo; 227 void __iomem *fifo = hw_ep->fifo;
220 u8 epnum = hw_ep->epnum; 228 u8 epnum = hw_ep->epnum;
221 229
222 DBG(4, "%cX ep%d fifo %p count %d buf %p\n", 230 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n",
223 'R', epnum, fifo, len, buf); 231 'R', epnum, fifo, len, buf);
224 232
225 if (epnum) 233 if (epnum)
@@ -275,17 +283,6 @@ static int tusb_draw_power(struct otg_transceiver *x, unsigned mA)
275 void __iomem *tbase = musb->ctrl_base; 283 void __iomem *tbase = musb->ctrl_base;
276 u32 reg; 284 u32 reg;
277 285
278 /*
279 * Keep clock active when enabled. Note that this is not tied to
280 * drawing VBUS, as with OTG mA can be less than musb->min_power.
281 */
282 if (musb->set_clock) {
283 if (mA)
284 musb->set_clock(musb->clock, 1);
285 else
286 musb->set_clock(musb->clock, 0);
287 }
288
289 /* tps65030 seems to consume max 100mA, with maybe 60mA available 286 /* tps65030 seems to consume max 100mA, with maybe 60mA available
290 * (measured on one board) for things other than tps and tusb. 287 * (measured on one board) for things other than tps and tusb.
291 * 288 *
@@ -309,7 +306,7 @@ static int tusb_draw_power(struct otg_transceiver *x, unsigned mA)
309 } 306 }
310 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); 307 musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
311 308
312 DBG(2, "draw max %d mA VBUS\n", mA); 309 dev_dbg(musb->controller, "draw max %d mA VBUS\n", mA);
313 return 0; 310 return 0;
314} 311}
315 312
@@ -348,7 +345,7 @@ static void tusb_set_clock_source(struct musb *musb, unsigned mode)
348 * USB link is not suspended ... and tells us the relevant wakeup 345 * USB link is not suspended ... and tells us the relevant wakeup
349 * events. SW_EN for voltage is handled separately. 346 * events. SW_EN for voltage is handled separately.
350 */ 347 */
351void tusb_allow_idle(struct musb *musb, u32 wakeup_enables) 348static void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
352{ 349{
353 void __iomem *tbase = musb->ctrl_base; 350 void __iomem *tbase = musb->ctrl_base;
354 u32 reg; 351 u32 reg;
@@ -379,13 +376,13 @@ void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
379 reg |= TUSB_PRCM_MNGMT_PM_IDLE | TUSB_PRCM_MNGMT_DEV_IDLE; 376 reg |= TUSB_PRCM_MNGMT_PM_IDLE | TUSB_PRCM_MNGMT_DEV_IDLE;
380 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); 377 musb_writel(tbase, TUSB_PRCM_MNGMT, reg);
381 378
382 DBG(6, "idle, wake on %02x\n", wakeup_enables); 379 dev_dbg(musb->controller, "idle, wake on %02x\n", wakeup_enables);
383} 380}
384 381
385/* 382/*
386 * Updates cable VBUS status. Caller must take care of locking. 383 * Updates cable VBUS status. Caller must take care of locking.
387 */ 384 */
388int musb_platform_get_vbus_status(struct musb *musb) 385static int tusb_musb_vbus_status(struct musb *musb)
389{ 386{
390 void __iomem *tbase = musb->ctrl_base; 387 void __iomem *tbase = musb->ctrl_base;
391 u32 otg_stat, prcm_mngmt; 388 u32 otg_stat, prcm_mngmt;
@@ -426,12 +423,12 @@ static void musb_do_idle(unsigned long _musb)
426 if ((musb->a_wait_bcon != 0) 423 if ((musb->a_wait_bcon != 0)
427 && (musb->idle_timeout == 0 424 && (musb->idle_timeout == 0
428 || time_after(jiffies, musb->idle_timeout))) { 425 || time_after(jiffies, musb->idle_timeout))) {
429 DBG(4, "Nothing connected %s, turning off VBUS\n", 426 dev_dbg(musb->controller, "Nothing connected %s, turning off VBUS\n",
430 otg_state_string(musb)); 427 otg_state_string(musb->xceiv->state));
431 } 428 }
432 /* FALLTHROUGH */ 429 /* FALLTHROUGH */
433 case OTG_STATE_A_IDLE: 430 case OTG_STATE_A_IDLE:
434 tusb_source_power(musb, 0); 431 tusb_musb_set_vbus(musb, 0);
435 default: 432 default:
436 break; 433 break;
437 } 434 }
@@ -475,7 +472,7 @@ done:
475 * we don't want to treat that full speed J as a wakeup event. 472 * we don't want to treat that full speed J as a wakeup event.
476 * ... peripherals must draw only suspend current after 10 msec. 473 * ... peripherals must draw only suspend current after 10 msec.
477 */ 474 */
478void musb_platform_try_idle(struct musb *musb, unsigned long timeout) 475static void tusb_musb_try_idle(struct musb *musb, unsigned long timeout)
479{ 476{
480 unsigned long default_timeout = jiffies + msecs_to_jiffies(3); 477 unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
481 static unsigned long last_timer; 478 static unsigned long last_timer;
@@ -486,7 +483,8 @@ void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
486 /* Never idle if active, or when VBUS timeout is not set as host */ 483 /* Never idle if active, or when VBUS timeout is not set as host */
487 if (musb->is_active || ((musb->a_wait_bcon == 0) 484 if (musb->is_active || ((musb->a_wait_bcon == 0)
488 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { 485 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
489 DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); 486 dev_dbg(musb->controller, "%s active, deleting timer\n",
487 otg_state_string(musb->xceiv->state));
490 del_timer(&musb_idle_timer); 488 del_timer(&musb_idle_timer);
491 last_timer = jiffies; 489 last_timer = jiffies;
492 return; 490 return;
@@ -496,14 +494,14 @@ void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
496 if (!timer_pending(&musb_idle_timer)) 494 if (!timer_pending(&musb_idle_timer))
497 last_timer = timeout; 495 last_timer = timeout;
498 else { 496 else {
499 DBG(4, "Longer idle timer already pending, ignoring\n"); 497 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
500 return; 498 return;
501 } 499 }
502 } 500 }
503 last_timer = timeout; 501 last_timer = timeout;
504 502
505 DBG(4, "%s inactive, for idle timer for %lu ms\n", 503 dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
506 otg_state_string(musb), 504 otg_state_string(musb->xceiv->state),
507 (unsigned long)jiffies_to_msecs(timeout - jiffies)); 505 (unsigned long)jiffies_to_msecs(timeout - jiffies));
508 mod_timer(&musb_idle_timer, timeout); 506 mod_timer(&musb_idle_timer, timeout);
509} 507}
@@ -515,7 +513,7 @@ void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
515 | TUSB_DEV_OTG_TIMER_ENABLE) \ 513 | TUSB_DEV_OTG_TIMER_ENABLE) \
516 : 0) 514 : 0)
517 515
518static void tusb_source_power(struct musb *musb, int is_on) 516static void tusb_musb_set_vbus(struct musb *musb, int is_on)
519{ 517{
520 void __iomem *tbase = musb->ctrl_base; 518 void __iomem *tbase = musb->ctrl_base;
521 u32 conf, prcm, timer; 519 u32 conf, prcm, timer;
@@ -531,8 +529,6 @@ static void tusb_source_power(struct musb *musb, int is_on)
531 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 529 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
532 530
533 if (is_on) { 531 if (is_on) {
534 if (musb->set_clock)
535 musb->set_clock(musb->clock, 1);
536 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE); 532 timer = OTG_TIMER_MS(OTG_TIME_A_WAIT_VRISE);
537 musb->xceiv->default_a = 1; 533 musb->xceiv->default_a = 1;
538 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 534 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
@@ -571,8 +567,6 @@ static void tusb_source_power(struct musb *musb, int is_on)
571 567
572 devctl &= ~MUSB_DEVCTL_SESSION; 568 devctl &= ~MUSB_DEVCTL_SESSION;
573 conf &= ~TUSB_DEV_CONF_USB_HOST_MODE; 569 conf &= ~TUSB_DEV_CONF_USB_HOST_MODE;
574 if (musb->set_clock)
575 musb->set_clock(musb->clock, 0);
576 } 570 }
577 prcm &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN); 571 prcm &= ~(TUSB_PRCM_MNGMT_15_SW_EN | TUSB_PRCM_MNGMT_33_SW_EN);
578 572
@@ -581,8 +575,8 @@ static void tusb_source_power(struct musb *musb, int is_on)
581 musb_writel(tbase, TUSB_DEV_CONF, conf); 575 musb_writel(tbase, TUSB_DEV_CONF, conf);
582 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); 576 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
583 577
584 DBG(1, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n", 578 dev_dbg(musb->controller, "VBUS %s, devctl %02x otg %3x conf %08x prcm %08x\n",
585 otg_state_string(musb), 579 otg_state_string(musb->xceiv->state),
586 musb_readb(musb->mregs, MUSB_DEVCTL), 580 musb_readb(musb->mregs, MUSB_DEVCTL),
587 musb_readl(tbase, TUSB_DEV_OTG_STAT), 581 musb_readl(tbase, TUSB_DEV_OTG_STAT),
588 conf, prcm); 582 conf, prcm);
@@ -599,7 +593,7 @@ static void tusb_source_power(struct musb *musb, int is_on)
599 * and peripheral modes in non-OTG configurations by reconfiguring hardware 593 * and peripheral modes in non-OTG configurations by reconfiguring hardware
600 * and then setting musb->board_mode. For now, only support OTG mode. 594 * and then setting musb->board_mode. For now, only support OTG mode.
601 */ 595 */
602int musb_platform_set_mode(struct musb *musb, u8 musb_mode) 596static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode)
603{ 597{
604 void __iomem *tbase = musb->ctrl_base; 598 void __iomem *tbase = musb->ctrl_base;
605 u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf; 599 u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
@@ -642,7 +636,7 @@ int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
642#endif 636#endif
643 637
644 default: 638 default:
645 DBG(2, "Trying to set mode %i\n", musb_mode); 639 dev_dbg(musb->controller, "Trying to set mode %i\n", musb_mode);
646 return -EINVAL; 640 return -EINVAL;
647 } 641 }
648 642
@@ -675,9 +669,9 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
675 default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS); 669 default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS);
676 else 670 else
677 default_a = is_host_enabled(musb); 671 default_a = is_host_enabled(musb);
678 DBG(2, "Default-%c\n", default_a ? 'A' : 'B'); 672 dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B');
679 musb->xceiv->default_a = default_a; 673 musb->xceiv->default_a = default_a;
680 tusb_source_power(musb, default_a); 674 tusb_musb_set_vbus(musb, default_a);
681 675
682 /* Don't allow idling immediately */ 676 /* Don't allow idling immediately */
683 if (default_a) 677 if (default_a)
@@ -702,7 +696,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
702#endif 696#endif
703 697
704 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) { 698 if (otg_stat & TUSB_DEV_OTG_STAT_SESS_END) {
705 DBG(1, "Forcing disconnect (no interrupt)\n"); 699 dev_dbg(musb->controller, "Forcing disconnect (no interrupt)\n");
706 if (musb->xceiv->state != OTG_STATE_B_IDLE) { 700 if (musb->xceiv->state != OTG_STATE_B_IDLE) {
707 /* INTR_DISCONNECT can hide... */ 701 /* INTR_DISCONNECT can hide... */
708 musb->xceiv->state = OTG_STATE_B_IDLE; 702 musb->xceiv->state = OTG_STATE_B_IDLE;
@@ -710,19 +704,19 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
710 } 704 }
711 musb->is_active = 0; 705 musb->is_active = 0;
712 } 706 }
713 DBG(2, "vbus change, %s, otg %03x\n", 707 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
714 otg_state_string(musb), otg_stat); 708 otg_state_string(musb->xceiv->state), otg_stat);
715 idle_timeout = jiffies + (1 * HZ); 709 idle_timeout = jiffies + (1 * HZ);
716 schedule_work(&musb->irq_work); 710 schedule_work(&musb->irq_work);
717 711
718 } else /* A-dev state machine */ { 712 } else /* A-dev state machine */ {
719 DBG(2, "vbus change, %s, otg %03x\n", 713 dev_dbg(musb->controller, "vbus change, %s, otg %03x\n",
720 otg_state_string(musb), otg_stat); 714 otg_state_string(musb->xceiv->state), otg_stat);
721 715
722 switch (musb->xceiv->state) { 716 switch (musb->xceiv->state) {
723 case OTG_STATE_A_IDLE: 717 case OTG_STATE_A_IDLE:
724 DBG(2, "Got SRP, turning on VBUS\n"); 718 dev_dbg(musb->controller, "Got SRP, turning on VBUS\n");
725 musb_set_vbus(musb, 1); 719 musb_platform_set_vbus(musb, 1);
726 720
727 /* CONNECT can wake if a_wait_bcon is set */ 721 /* CONNECT can wake if a_wait_bcon is set */
728 if (musb->a_wait_bcon != 0) 722 if (musb->a_wait_bcon != 0)
@@ -748,11 +742,11 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
748 */ 742 */
749 if (musb->vbuserr_retry) { 743 if (musb->vbuserr_retry) {
750 musb->vbuserr_retry--; 744 musb->vbuserr_retry--;
751 tusb_source_power(musb, 1); 745 tusb_musb_set_vbus(musb, 1);
752 } else { 746 } else {
753 musb->vbuserr_retry 747 musb->vbuserr_retry
754 = VBUSERR_RETRY_COUNT; 748 = VBUSERR_RETRY_COUNT;
755 tusb_source_power(musb, 0); 749 tusb_musb_set_vbus(musb, 0);
756 } 750 }
757 break; 751 break;
758 default: 752 default:
@@ -765,7 +759,8 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
765 if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) { 759 if (int_src & TUSB_INT_SRC_OTG_TIMEOUT) {
766 u8 devctl; 760 u8 devctl;
767 761
768 DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat); 762 dev_dbg(musb->controller, "%s timer, %03x\n",
763 otg_state_string(musb->xceiv->state), otg_stat);
769 764
770 switch (musb->xceiv->state) { 765 switch (musb->xceiv->state) {
771 case OTG_STATE_A_WAIT_VRISE: 766 case OTG_STATE_A_WAIT_VRISE:
@@ -776,7 +771,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
776 if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID) { 771 if (otg_stat & TUSB_DEV_OTG_STAT_VBUS_VALID) {
777 if ((devctl & MUSB_DEVCTL_VBUS) 772 if ((devctl & MUSB_DEVCTL_VBUS)
778 != MUSB_DEVCTL_VBUS) { 773 != MUSB_DEVCTL_VBUS) {
779 DBG(2, "devctl %02x\n", devctl); 774 dev_dbg(musb->controller, "devctl %02x\n", devctl);
780 break; 775 break;
781 } 776 }
782 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 777 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
@@ -786,7 +781,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
786 } else { 781 } else {
787 /* REVISIT report overcurrent to hub? */ 782 /* REVISIT report overcurrent to hub? */
788 ERR("vbus too slow, devctl %02x\n", devctl); 783 ERR("vbus too slow, devctl %02x\n", devctl);
789 tusb_source_power(musb, 0); 784 tusb_musb_set_vbus(musb, 0);
790 } 785 }
791 break; 786 break;
792 case OTG_STATE_A_WAIT_BCON: 787 case OTG_STATE_A_WAIT_BCON:
@@ -807,7 +802,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
807 return idle_timeout; 802 return idle_timeout;
808} 803}
809 804
810static irqreturn_t tusb_interrupt(int irq, void *__hci) 805static irqreturn_t tusb_musb_interrupt(int irq, void *__hci)
811{ 806{
812 struct musb *musb = __hci; 807 struct musb *musb = __hci;
813 void __iomem *tbase = musb->ctrl_base; 808 void __iomem *tbase = musb->ctrl_base;
@@ -821,7 +816,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
821 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); 816 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS);
822 817
823 int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS; 818 int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS;
824 DBG(3, "TUSB IRQ %08x\n", int_src); 819 dev_dbg(musb->controller, "TUSB IRQ %08x\n", int_src);
825 820
826 musb->int_usb = (u8) int_src; 821 musb->int_usb = (u8) int_src;
827 822
@@ -842,7 +837,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
842 reg = musb_readl(tbase, TUSB_SCRATCH_PAD); 837 reg = musb_readl(tbase, TUSB_SCRATCH_PAD);
843 if (reg == i) 838 if (reg == i)
844 break; 839 break;
845 DBG(6, "TUSB NOR not ready\n"); 840 dev_dbg(musb->controller, "TUSB NOR not ready\n");
846 } 841 }
847 842
848 /* work around issue 13 (2nd half) */ 843 /* work around issue 13 (2nd half) */
@@ -854,7 +849,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
854 musb->is_active = 1; 849 musb->is_active = 1;
855 schedule_work(&musb->irq_work); 850 schedule_work(&musb->irq_work);
856 } 851 }
857 DBG(3, "wake %sactive %02x\n", 852 dev_dbg(musb->controller, "wake %sactive %02x\n",
858 musb->is_active ? "" : "in", reg); 853 musb->is_active ? "" : "in", reg);
859 854
860 /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */ 855 /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
@@ -876,7 +871,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
876 u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC); 871 u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC);
877 u32 real_dma_src = musb_readl(tbase, TUSB_DMA_INT_MASK); 872 u32 real_dma_src = musb_readl(tbase, TUSB_DMA_INT_MASK);
878 873
879 DBG(3, "DMA IRQ %08x\n", dma_src); 874 dev_dbg(musb->controller, "DMA IRQ %08x\n", dma_src);
880 real_dma_src = ~real_dma_src & dma_src; 875 real_dma_src = ~real_dma_src & dma_src;
881 if (tusb_dma_omap() && real_dma_src) { 876 if (tusb_dma_omap() && real_dma_src) {
882 int tx_source = (real_dma_src & 0xffff); 877 int tx_source = (real_dma_src & 0xffff);
@@ -884,7 +879,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
884 879
885 for (i = 1; i <= 15; i++) { 880 for (i = 1; i <= 15; i++) {
886 if (tx_source & (1 << i)) { 881 if (tx_source & (1 << i)) {
887 DBG(3, "completing ep%i %s\n", i, "tx"); 882 dev_dbg(musb->controller, "completing ep%i %s\n", i, "tx");
888 musb_dma_completion(musb, i, 1); 883 musb_dma_completion(musb, i, 1);
889 } 884 }
890 } 885 }
@@ -911,7 +906,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
911 musb_writel(tbase, TUSB_INT_SRC_CLEAR, 906 musb_writel(tbase, TUSB_INT_SRC_CLEAR,
912 int_src & ~TUSB_INT_MASK_RESERVED_BITS); 907 int_src & ~TUSB_INT_MASK_RESERVED_BITS);
913 908
914 musb_platform_try_idle(musb, idle_timeout); 909 tusb_musb_try_idle(musb, idle_timeout);
915 910
916 musb_writel(tbase, TUSB_INT_MASK, int_mask); 911 musb_writel(tbase, TUSB_INT_MASK, int_mask);
917 spin_unlock_irqrestore(&musb->lock, flags); 912 spin_unlock_irqrestore(&musb->lock, flags);
@@ -926,7 +921,7 @@ static int dma_off;
926 * REVISIT: 921 * REVISIT:
927 * - Check what is unnecessary in MGC_HdrcStart() 922 * - Check what is unnecessary in MGC_HdrcStart()
928 */ 923 */
929void musb_platform_enable(struct musb *musb) 924static void tusb_musb_enable(struct musb *musb)
930{ 925{
931 void __iomem *tbase = musb->ctrl_base; 926 void __iomem *tbase = musb->ctrl_base;
932 927
@@ -952,7 +947,7 @@ void musb_platform_enable(struct musb *musb)
952 musb_writel(tbase, TUSB_INT_CTRL_CONF, 947 musb_writel(tbase, TUSB_INT_CTRL_CONF,
953 TUSB_INT_CTRL_CONF_INT_RELCYC(0)); 948 TUSB_INT_CTRL_CONF_INT_RELCYC(0));
954 949
955 set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW); 950 irq_set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW);
956 951
957 /* maybe force into the Default-A OTG state machine */ 952 /* maybe force into the Default-A OTG state machine */
958 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT) 953 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT)
@@ -970,7 +965,7 @@ void musb_platform_enable(struct musb *musb)
970/* 965/*
971 * Disables TUSB6010. Caller must take care of locking. 966 * Disables TUSB6010. Caller must take care of locking.
972 */ 967 */
973void musb_platform_disable(struct musb *musb) 968static void tusb_musb_disable(struct musb *musb)
974{ 969{
975 void __iomem *tbase = musb->ctrl_base; 970 void __iomem *tbase = musb->ctrl_base;
976 971
@@ -995,7 +990,7 @@ void musb_platform_disable(struct musb *musb)
995 * Sets up TUSB6010 CPU interface specific signals and registers 990 * Sets up TUSB6010 CPU interface specific signals and registers
996 * Note: Settings optimized for OMAP24xx 991 * Note: Settings optimized for OMAP24xx
997 */ 992 */
998static void __init tusb_setup_cpu_interface(struct musb *musb) 993static void tusb_setup_cpu_interface(struct musb *musb)
999{ 994{
1000 void __iomem *tbase = musb->ctrl_base; 995 void __iomem *tbase = musb->ctrl_base;
1001 996
@@ -1022,7 +1017,7 @@ static void __init tusb_setup_cpu_interface(struct musb *musb)
1022 musb_writel(tbase, TUSB_WAIT_COUNT, 1); 1017 musb_writel(tbase, TUSB_WAIT_COUNT, 1);
1023} 1018}
1024 1019
1025static int __init tusb_start(struct musb *musb) 1020static int tusb_musb_start(struct musb *musb)
1026{ 1021{
1027 void __iomem *tbase = musb->ctrl_base; 1022 void __iomem *tbase = musb->ctrl_base;
1028 int ret = 0; 1023 int ret = 0;
@@ -1091,7 +1086,7 @@ err:
1091 return -ENODEV; 1086 return -ENODEV;
1092} 1087}
1093 1088
1094int __init musb_platform_init(struct musb *musb, void *board_data) 1089static int tusb_musb_init(struct musb *musb)
1095{ 1090{
1096 struct platform_device *pdev; 1091 struct platform_device *pdev;
1097 struct resource *mem; 1092 struct resource *mem;
@@ -1131,16 +1126,14 @@ int __init musb_platform_init(struct musb *musb, void *board_data)
1131 */ 1126 */
1132 musb->mregs += TUSB_BASE_OFFSET; 1127 musb->mregs += TUSB_BASE_OFFSET;
1133 1128
1134 ret = tusb_start(musb); 1129 ret = tusb_musb_start(musb);
1135 if (ret) { 1130 if (ret) {
1136 printk(KERN_ERR "Could not start tusb6010 (%d)\n", 1131 printk(KERN_ERR "Could not start tusb6010 (%d)\n",
1137 ret); 1132 ret);
1138 goto done; 1133 goto done;
1139 } 1134 }
1140 musb->isr = tusb_interrupt; 1135 musb->isr = tusb_musb_interrupt;
1141 1136
1142 if (is_host_enabled(musb))
1143 musb->board_set_vbus = tusb_source_power;
1144 if (is_peripheral_enabled(musb)) { 1137 if (is_peripheral_enabled(musb)) {
1145 musb->xceiv->set_power = tusb_draw_power; 1138 musb->xceiv->set_power = tusb_draw_power;
1146 the_musb = musb; 1139 the_musb = musb;
@@ -1152,12 +1145,14 @@ done:
1152 if (ret < 0) { 1145 if (ret < 0) {
1153 if (sync) 1146 if (sync)
1154 iounmap(sync); 1147 iounmap(sync);
1148
1149 otg_put_transceiver(musb->xceiv);
1155 usb_nop_xceiv_unregister(); 1150 usb_nop_xceiv_unregister();
1156 } 1151 }
1157 return ret; 1152 return ret;
1158} 1153}
1159 1154
1160int musb_platform_exit(struct musb *musb) 1155static int tusb_musb_exit(struct musb *musb)
1161{ 1156{
1162 del_timer_sync(&musb_idle_timer); 1157 del_timer_sync(&musb_idle_timer);
1163 the_musb = NULL; 1158 the_musb = NULL;
@@ -1166,6 +1161,120 @@ int musb_platform_exit(struct musb *musb)
1166 musb->board_set_power(0); 1161 musb->board_set_power(0);
1167 1162
1168 iounmap(musb->sync_va); 1163 iounmap(musb->sync_va);
1164
1165 otg_put_transceiver(musb->xceiv);
1169 usb_nop_xceiv_unregister(); 1166 usb_nop_xceiv_unregister();
1170 return 0; 1167 return 0;
1171} 1168}
1169
1170static const struct musb_platform_ops tusb_ops = {
1171 .init = tusb_musb_init,
1172 .exit = tusb_musb_exit,
1173
1174 .enable = tusb_musb_enable,
1175 .disable = tusb_musb_disable,
1176
1177 .set_mode = tusb_musb_set_mode,
1178 .try_idle = tusb_musb_try_idle,
1179
1180 .vbus_status = tusb_musb_vbus_status,
1181 .set_vbus = tusb_musb_set_vbus,
1182};
1183
1184static u64 tusb_dmamask = DMA_BIT_MASK(32);
1185
1186static int __init tusb_probe(struct platform_device *pdev)
1187{
1188 struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
1189 struct platform_device *musb;
1190 struct tusb6010_glue *glue;
1191
1192 int ret = -ENOMEM;
1193
1194 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
1195 if (!glue) {
1196 dev_err(&pdev->dev, "failed to allocate glue context\n");
1197 goto err0;
1198 }
1199
1200 musb = platform_device_alloc("musb-hdrc", -1);
1201 if (!musb) {
1202 dev_err(&pdev->dev, "failed to allocate musb device\n");
1203 goto err1;
1204 }
1205
1206 musb->dev.parent = &pdev->dev;
1207 musb->dev.dma_mask = &tusb_dmamask;
1208 musb->dev.coherent_dma_mask = tusb_dmamask;
1209
1210 glue->dev = &pdev->dev;
1211 glue->musb = musb;
1212
1213 pdata->platform_ops = &tusb_ops;
1214
1215 platform_set_drvdata(pdev, glue);
1216
1217 ret = platform_device_add_resources(musb, pdev->resource,
1218 pdev->num_resources);
1219 if (ret) {
1220 dev_err(&pdev->dev, "failed to add resources\n");
1221 goto err2;
1222 }
1223
1224 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
1225 if (ret) {
1226 dev_err(&pdev->dev, "failed to add platform_data\n");
1227 goto err2;
1228 }
1229
1230 ret = platform_device_add(musb);
1231 if (ret) {
1232 dev_err(&pdev->dev, "failed to register musb device\n");
1233 goto err1;
1234 }
1235
1236 return 0;
1237
1238err2:
1239 platform_device_put(musb);
1240
1241err1:
1242 kfree(glue);
1243
1244err0:
1245 return ret;
1246}
1247
1248static int __exit tusb_remove(struct platform_device *pdev)
1249{
1250 struct tusb6010_glue *glue = platform_get_drvdata(pdev);
1251
1252 platform_device_del(glue->musb);
1253 platform_device_put(glue->musb);
1254 kfree(glue);
1255
1256 return 0;
1257}
1258
1259static struct platform_driver tusb_driver = {
1260 .remove = __exit_p(tusb_remove),
1261 .driver = {
1262 .name = "musb-tusb",
1263 },
1264};
1265
1266MODULE_DESCRIPTION("TUSB6010 MUSB Glue Layer");
1267MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
1268MODULE_LICENSE("GPL v2");
1269
1270static int __init tusb_init(void)
1271{
1272 return platform_driver_probe(&tusb_driver, tusb_probe);
1273}
1274subsys_initcall(tusb_init);
1275
1276static void __exit tusb_exit(void)
1277{
1278 platform_driver_unregister(&tusb_driver);
1279}
1280module_exit(tusb_exit);