aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/usb/musb/cppi_dma.c
diff options
context:
space:
mode:
authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/usb/musb/cppi_dma.c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/usb/musb/cppi_dma.c')
-rw-r--r--drivers/usb/musb/cppi_dma.c59
1 files changed, 32 insertions, 27 deletions
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
index 5ab5bb89bae3..149f3f310a0a 100644
--- a/drivers/usb/musb/cppi_dma.c
+++ b/drivers/usb/musb/cppi_dma.c
@@ -236,7 +236,7 @@ static int cppi_controller_stop(struct dma_controller *c)
236 musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG, 236 musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG,
237 DAVINCI_DMA_ALL_CHANNELS_ENABLE); 237 DAVINCI_DMA_ALL_CHANNELS_ENABLE);
238 238
239 DBG(1, "Tearing down RX and TX Channels\n"); 239 dev_dbg(musb->controller, "Tearing down RX and TX Channels\n");
240 for (i = 0; i < ARRAY_SIZE(controller->tx); i++) { 240 for (i = 0; i < ARRAY_SIZE(controller->tx); i++) {
241 /* FIXME restructure of txdma to use bds like rxdma */ 241 /* FIXME restructure of txdma to use bds like rxdma */
242 controller->tx[i].last_processed = NULL; 242 controller->tx[i].last_processed = NULL;
@@ -301,13 +301,13 @@ cppi_channel_allocate(struct dma_controller *c,
301 */ 301 */
302 if (transmit) { 302 if (transmit) {
303 if (index >= ARRAY_SIZE(controller->tx)) { 303 if (index >= ARRAY_SIZE(controller->tx)) {
304 DBG(1, "no %cX%d CPPI channel\n", 'T', index); 304 dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'T', index);
305 return NULL; 305 return NULL;
306 } 306 }
307 cppi_ch = controller->tx + index; 307 cppi_ch = controller->tx + index;
308 } else { 308 } else {
309 if (index >= ARRAY_SIZE(controller->rx)) { 309 if (index >= ARRAY_SIZE(controller->rx)) {
310 DBG(1, "no %cX%d CPPI channel\n", 'R', index); 310 dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'R', index);
311 return NULL; 311 return NULL;
312 } 312 }
313 cppi_ch = controller->rx + index; 313 cppi_ch = controller->rx + index;
@@ -318,13 +318,13 @@ cppi_channel_allocate(struct dma_controller *c,
318 * with the other DMA engine too 318 * with the other DMA engine too
319 */ 319 */
320 if (cppi_ch->hw_ep) 320 if (cppi_ch->hw_ep)
321 DBG(1, "re-allocating DMA%d %cX channel %p\n", 321 dev_dbg(musb->controller, "re-allocating DMA%d %cX channel %p\n",
322 index, transmit ? 'T' : 'R', cppi_ch); 322 index, transmit ? 'T' : 'R', cppi_ch);
323 cppi_ch->hw_ep = ep; 323 cppi_ch->hw_ep = ep;
324 cppi_ch->channel.status = MUSB_DMA_STATUS_FREE; 324 cppi_ch->channel.status = MUSB_DMA_STATUS_FREE;
325 cppi_ch->channel.max_len = 0x7fffffff; 325 cppi_ch->channel.max_len = 0x7fffffff;
326 326
327 DBG(4, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R'); 327 dev_dbg(musb->controller, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R');
328 return &cppi_ch->channel; 328 return &cppi_ch->channel;
329} 329}
330 330
@@ -339,7 +339,7 @@ static void cppi_channel_release(struct dma_channel *channel)
339 c = container_of(channel, struct cppi_channel, channel); 339 c = container_of(channel, struct cppi_channel, channel);
340 tibase = c->controller->tibase; 340 tibase = c->controller->tibase;
341 if (!c->hw_ep) 341 if (!c->hw_ep)
342 DBG(1, "releasing idle DMA channel %p\n", c); 342 dev_dbg(musb->controller, "releasing idle DMA channel %p\n", c);
343 else if (!c->transmit) 343 else if (!c->transmit)
344 core_rxirq_enable(tibase, c->index + 1); 344 core_rxirq_enable(tibase, c->index + 1);
345 345
@@ -597,12 +597,12 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
597 length = min(n_bds * maxpacket, length); 597 length = min(n_bds * maxpacket, length);
598 } 598 }
599 599
600 DBG(4, "TX DMA%d, pktSz %d %s bds %d dma 0x%x len %u\n", 600 dev_dbg(musb->controller, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u\n",
601 tx->index, 601 tx->index,
602 maxpacket, 602 maxpacket,
603 rndis ? "rndis" : "transparent", 603 rndis ? "rndis" : "transparent",
604 n_bds, 604 n_bds,
605 addr, length); 605 (unsigned long long)addr, length);
606 606
607 cppi_rndis_update(tx, 0, musb->ctrl_base, rndis); 607 cppi_rndis_update(tx, 0, musb->ctrl_base, rndis);
608 608
@@ -654,7 +654,7 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
654 bd->hw_options |= CPPI_ZERO_SET; 654 bd->hw_options |= CPPI_ZERO_SET;
655 } 655 }
656 656
657 DBG(5, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n", 657 dev_dbg(musb->controller, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n",
658 bd, bd->hw_next, bd->hw_bufp, 658 bd, bd->hw_next, bd->hw_bufp,
659 bd->hw_off_len, bd->hw_options); 659 bd->hw_off_len, bd->hw_options);
660 660
@@ -819,8 +819,8 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
819 819
820 length = min(n_bds * maxpacket, length); 820 length = min(n_bds * maxpacket, length);
821 821
822 DBG(4, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) " 822 dev_dbg(musb->controller, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) "
823 "dma 0x%x len %u %u/%u\n", 823 "dma 0x%llx len %u %u/%u\n",
824 rx->index, maxpacket, 824 rx->index, maxpacket,
825 onepacket 825 onepacket
826 ? (is_rndis ? "rndis" : "onepacket") 826 ? (is_rndis ? "rndis" : "onepacket")
@@ -829,7 +829,8 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
829 musb_readl(tibase, 829 musb_readl(tibase,
830 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4)) 830 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
831 & 0xffff, 831 & 0xffff,
832 addr, length, rx->channel.actual_len, rx->buf_len); 832 (unsigned long long)addr, length,
833 rx->channel.actual_len, rx->buf_len);
833 834
834 /* only queue one segment at a time, since the hardware prevents 835 /* only queue one segment at a time, since the hardware prevents
835 * correct queue shutdown after unexpected short packets 836 * correct queue shutdown after unexpected short packets
@@ -935,7 +936,7 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
935 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4)) 936 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
936 & 0xffff; 937 & 0xffff;
937 if (i < (2 + n_bds)) { 938 if (i < (2 + n_bds)) {
938 DBG(2, "bufcnt%d underrun - %d (for %d)\n", 939 dev_dbg(musb->controller, "bufcnt%d underrun - %d (for %d)\n",
939 rx->index, i, n_bds); 940 rx->index, i, n_bds);
940 musb_writel(tibase, 941 musb_writel(tibase,
941 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4), 942 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
@@ -984,7 +985,7 @@ static int cppi_channel_program(struct dma_channel *ch,
984 /* WARN_ON(1); */ 985 /* WARN_ON(1); */
985 break; 986 break;
986 case MUSB_DMA_STATUS_UNKNOWN: 987 case MUSB_DMA_STATUS_UNKNOWN:
987 DBG(1, "%cX DMA%d not allocated!\n", 988 dev_dbg(musb->controller, "%cX DMA%d not allocated!\n",
988 cppi_ch->transmit ? 'T' : 'R', 989 cppi_ch->transmit ? 'T' : 'R',
989 cppi_ch->index); 990 cppi_ch->index);
990 /* FALLTHROUGH */ 991 /* FALLTHROUGH */
@@ -1039,9 +1040,9 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1039 if (!completed && (bd->hw_options & CPPI_OWN_SET)) 1040 if (!completed && (bd->hw_options & CPPI_OWN_SET))
1040 break; 1041 break;
1041 1042
1042 DBG(5, "C/RXBD %08x: nxt %08x buf %08x " 1043 dev_dbg(musb->controller, "C/RXBD %llx: nxt %08x buf %08x "
1043 "off.len %08x opt.len %08x (%d)\n", 1044 "off.len %08x opt.len %08x (%d)\n",
1044 bd->dma, bd->hw_next, bd->hw_bufp, 1045 (unsigned long long)bd->dma, bd->hw_next, bd->hw_bufp,
1045 bd->hw_off_len, bd->hw_options, 1046 bd->hw_off_len, bd->hw_options,
1046 rx->channel.actual_len); 1047 rx->channel.actual_len);
1047 1048
@@ -1061,7 +1062,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1061 * CPPI ignores those BDs even though OWN is still set. 1062 * CPPI ignores those BDs even though OWN is still set.
1062 */ 1063 */
1063 completed = true; 1064 completed = true;
1064 DBG(3, "rx short %d/%d (%d)\n", 1065 dev_dbg(musb->controller, "rx short %d/%d (%d)\n",
1065 len, bd->buflen, 1066 len, bd->buflen,
1066 rx->channel.actual_len); 1067 rx->channel.actual_len);
1067 } 1068 }
@@ -1111,11 +1112,12 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
1111 musb_ep_select(cppi->mregs, rx->index + 1); 1112 musb_ep_select(cppi->mregs, rx->index + 1);
1112 csr = musb_readw(regs, MUSB_RXCSR); 1113 csr = musb_readw(regs, MUSB_RXCSR);
1113 if (csr & MUSB_RXCSR_DMAENAB) { 1114 if (csr & MUSB_RXCSR_DMAENAB) {
1114 DBG(4, "list%d %p/%p, last %08x%s, csr %04x\n", 1115 dev_dbg(musb->controller, "list%d %p/%p, last %llx%s, csr %04x\n",
1115 rx->index, 1116 rx->index,
1116 rx->head, rx->tail, 1117 rx->head, rx->tail,
1117 rx->last_processed 1118 rx->last_processed
1118 ? rx->last_processed->dma 1119 ? (unsigned long long)
1120 rx->last_processed->dma
1119 : 0, 1121 : 0,
1120 completed ? ", completed" : "", 1122 completed ? ", completed" : "",
1121 csr); 1123 csr);
@@ -1156,7 +1158,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1156 struct musb_hw_ep *hw_ep = NULL; 1158 struct musb_hw_ep *hw_ep = NULL;
1157 u32 rx, tx; 1159 u32 rx, tx;
1158 int i, index; 1160 int i, index;
1159 unsigned long flags; 1161 unsigned long uninitialized_var(flags);
1160 1162
1161 cppi = container_of(musb->dma_controller, struct cppi, controller); 1163 cppi = container_of(musb->dma_controller, struct cppi, controller);
1162 if (cppi->irq) 1164 if (cppi->irq)
@@ -1167,10 +1169,13 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1167 tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG); 1169 tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG);
1168 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG); 1170 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);
1169 1171
1170 if (!tx && !rx) 1172 if (!tx && !rx) {
1173 if (cppi->irq)
1174 spin_unlock_irqrestore(&musb->lock, flags);
1171 return IRQ_NONE; 1175 return IRQ_NONE;
1176 }
1172 1177
1173 DBG(4, "CPPI IRQ Tx%x Rx%x\n", tx, rx); 1178 dev_dbg(musb->controller, "CPPI IRQ Tx%x Rx%x\n", tx, rx);
1174 1179
1175 /* process TX channels */ 1180 /* process TX channels */
1176 for (index = 0; tx; tx = tx >> 1, index++) { 1181 for (index = 0; tx; tx = tx >> 1, index++) {
@@ -1198,8 +1203,8 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1198 * that needs to be acknowledged. 1203 * that needs to be acknowledged.
1199 */ 1204 */
1200 if (NULL == bd) { 1205 if (NULL == bd) {
1201 DBG(1, "null BD\n"); 1206 dev_dbg(musb->controller, "null BD\n");
1202 tx_ram->tx_complete = 0; 1207 musb_writel(&tx_ram->tx_complete, 0, 0);
1203 continue; 1208 continue;
1204 } 1209 }
1205 1210
@@ -1213,7 +1218,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1213 if (bd->hw_options & CPPI_OWN_SET) 1218 if (bd->hw_options & CPPI_OWN_SET)
1214 break; 1219 break;
1215 1220
1216 DBG(5, "C/TXBD %p n %x b %x off %x opt %x\n", 1221 dev_dbg(musb->controller, "C/TXBD %p n %x b %x off %x opt %x\n",
1217 bd, bd->hw_next, bd->hw_bufp, 1222 bd, bd->hw_next, bd->hw_bufp,
1218 bd->hw_off_len, bd->hw_options); 1223 bd->hw_off_len, bd->hw_options);
1219 1224
@@ -1308,7 +1313,7 @@ dma_controller_create(struct musb *musb, void __iomem *mregs)
1308 struct cppi *controller; 1313 struct cppi *controller;
1309 struct device *dev = musb->controller; 1314 struct device *dev = musb->controller;
1310 struct platform_device *pdev = to_platform_device(dev); 1315 struct platform_device *pdev = to_platform_device(dev);
1311 int irq = platform_get_irq(pdev, 1); 1316 int irq = platform_get_irq_byname(pdev, "dma");
1312 1317
1313 controller = kzalloc(sizeof *controller, GFP_KERNEL); 1318 controller = kzalloc(sizeof *controller, GFP_KERNEL);
1314 if (!controller) 1319 if (!controller)
@@ -1452,7 +1457,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
1452 * compare mode by writing 1 to the tx_complete register. 1457 * compare mode by writing 1 to the tx_complete register.
1453 */ 1458 */
1454 cppi_reset_tx(tx_ram, 1); 1459 cppi_reset_tx(tx_ram, 1);
1455 cppi_ch->head = 0; 1460 cppi_ch->head = NULL;
1456 musb_writel(&tx_ram->tx_complete, 0, 1); 1461 musb_writel(&tx_ram->tx_complete, 0, 1);
1457 cppi_dump_tx(5, cppi_ch, " (done teardown)"); 1462 cppi_dump_tx(5, cppi_ch, " (done teardown)");
1458 1463