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authorArvid Brodin <arvid.brodin@enea.com>2011-02-26 16:02:57 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2011-02-28 22:23:36 -0500
commitbedc0c31ac3db828e6ade7a8c5cb708688f0a7e1 (patch)
tree4d673769f7cc5a7fac603cd3822f644d650c3096 /drivers/usb/host
parent6d42fcdb685e3b7af45c77181537db4bc1a715f9 (diff)
usb/isp1760: Move to native-endian ptds
This helps users with platform-bus-connected isp176xs, big-endian cpu, and missing byteswapping on the data bus. It does so by collecting all SW byteswaps in one place and also fixes a bug with non-32-bit io transfers on this hardware, where payload has to be byteswapped instead of ptds. Signed-off-by: Arvid Brodin <arvid.brodin@enea.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/isp1760-hcd.c663
-rw-r--r--drivers/usb/host/isp1760-hcd.h33
2 files changed, 339 insertions, 357 deletions
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index c470cc83dbb0..47ce0373a3c9 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -114,75 +114,149 @@ struct isp1760_qh {
114 114
115#define ehci_port_speed(priv, portsc) USB_PORT_STAT_HIGH_SPEED 115#define ehci_port_speed(priv, portsc) USB_PORT_STAT_HIGH_SPEED
116 116
117static unsigned int isp1760_readl(__u32 __iomem *regs) 117/*
118 * Access functions for isp176x registers (addresses 0..0x03FF).
119 */
120static u32 reg_read32(void __iomem *base, u32 reg)
118{ 121{
119 return readl(regs); 122 return readl(base + reg);
120} 123}
121 124
122static void isp1760_writel(const unsigned int val, __u32 __iomem *regs) 125static void reg_write32(void __iomem *base, u32 reg, u32 val)
123{ 126{
124 writel(val, regs); 127 writel(val, base + reg);
125} 128}
126 129
127/* 130/*
128 * The next two copy via MMIO data to/from the device. memcpy_{to|from}io() 131 * Access functions for isp176x memory (offset >= 0x0400).
132 *
133 * bank_reads8() reads memory locations prefetched by an earlier write to
134 * HC_MEMORY_REG (see isp176x datasheet). Unless you want to do fancy multi-
135 * bank optimizations, you should use the more generic mem_reads8() below.
136 *
137 * For access to ptd memory, use the specialized ptd_read() and ptd_write()
138 * below.
139 *
140 * These functions copy via MMIO data to/from the device. memcpy_{to|from}io()
129 * doesn't quite work because some people have to enforce 32-bit access 141 * doesn't quite work because some people have to enforce 32-bit access
130 */ 142 */
131static void priv_read_copy(struct isp1760_hcd *priv, u32 *src, 143static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr,
132 __u32 __iomem *dst, u32 len) 144 __u32 *dst, u32 bytes)
133{ 145{
146 __u32 __iomem *src;
134 u32 val; 147 u32 val;
135 u8 *buff8; 148 __u8 *src_byteptr;
149 __u8 *dst_byteptr;
136 150
137 if (!src) { 151 src = src_base + (bank_addr | src_offset);
138 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
139 return;
140 }
141 152
142 while (len >= 4) { 153 if (src_offset < PAYLOAD_OFFSET) {
143 *src = __raw_readl(dst); 154 while (bytes >= 4) {
144 len -= 4; 155 *dst = le32_to_cpu(__raw_readl(src));
145 src++; 156 bytes -= 4;
146 dst++; 157 src++;
158 dst++;
159 }
160 } else {
161 while (bytes >= 4) {
162 *dst = __raw_readl(src);
163 bytes -= 4;
164 src++;
165 dst++;
166 }
147 } 167 }
148 168
149 if (!len) 169 if (!bytes)
150 return; 170 return;
151 171
152 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully 172 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
153 * allocated. 173 * allocated.
154 */ 174 */
155 val = isp1760_readl(dst); 175 if (src_offset < PAYLOAD_OFFSET)
156 176 val = le32_to_cpu(__raw_readl(src));
157 buff8 = (u8 *)src; 177 else
158 while (len) { 178 val = __raw_readl(src);
159 179
160 *buff8 = val; 180 dst_byteptr = (void *) dst;
161 val >>= 8; 181 src_byteptr = (void *) &val;
162 len--; 182 while (bytes > 0) {
163 buff8++; 183 *dst_byteptr = *src_byteptr;
184 dst_byteptr++;
185 src_byteptr++;
186 bytes--;
164 } 187 }
165} 188}
166 189
167static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src, 190static void mem_reads8(void __iomem *src_base, u32 src_offset, void *dst,
168 __u32 __iomem *dst, u32 len) 191 u32 bytes)
169{ 192{
170 while (len >= 4) { 193 reg_write32(src_base, HC_MEMORY_REG, src_offset + ISP_BANK(0));
171 __raw_writel(*src, dst); 194 ndelay(90);
172 len -= 4; 195 bank_reads8(src_base, src_offset, ISP_BANK(0), dst, bytes);
173 src++; 196}
174 dst++; 197
198static void mem_writes8(void __iomem *dst_base, u32 dst_offset,
199 __u32 const *src, u32 bytes)
200{
201 __u32 __iomem *dst;
202
203 dst = dst_base + dst_offset;
204
205 if (dst_offset < PAYLOAD_OFFSET) {
206 while (bytes >= 4) {
207 __raw_writel(cpu_to_le32(*src), dst);
208 bytes -= 4;
209 src++;
210 dst++;
211 }
212 } else {
213 while (bytes >= 4) {
214 __raw_writel(*src, dst);
215 bytes -= 4;
216 src++;
217 dst++;
218 }
175 } 219 }
176 220
177 if (!len) 221 if (!bytes)
178 return; 222 return;
179 /* in case we have 3, 2 or 1 by left. The buffer is allocated and the 223 /* in case we have 3, 2 or 1 bytes left. The buffer is allocated and the
180 * extra bytes should not be read by the HW 224 * extra bytes should not be read by the HW.
181 */ 225 */
182 226
183 __raw_writel(*src, dst); 227 if (dst_offset < PAYLOAD_OFFSET)
228 __raw_writel(cpu_to_le32(*src), dst);
229 else
230 __raw_writel(*src, dst);
184} 231}
185 232
233/*
234 * Read and write ptds. 'ptd_offset' should be one of ISO_PTD_OFFSET,
235 * INT_PTD_OFFSET, and ATL_PTD_OFFSET. 'slot' should be less than 32.
236 */
237static void ptd_read(void __iomem *base, u32 ptd_offset, u32 slot,
238 struct ptd *ptd)
239{
240 reg_write32(base, HC_MEMORY_REG,
241 ISP_BANK(0) + ptd_offset + slot*sizeof(*ptd));
242 ndelay(90);
243 bank_reads8(base, ptd_offset + slot*sizeof(*ptd), ISP_BANK(0),
244 (void *) ptd, sizeof(*ptd));
245}
246
247static void ptd_write(void __iomem *base, u32 ptd_offset, u32 slot,
248 struct ptd *ptd)
249{
250 mem_writes8(base, ptd_offset + slot*sizeof(*ptd) + sizeof(ptd->dw0),
251 &ptd->dw1, 7*sizeof(ptd->dw1));
252 /* Make sure dw0 gets written last (after other dw's and after payload)
253 since it contains the enable bit */
254 wmb();
255 mem_writes8(base, ptd_offset + slot*sizeof(*ptd), &ptd->dw0,
256 sizeof(ptd->dw0));
257}
258
259
186/* memory management of the 60kb on the chip from 0x1000 to 0xffff */ 260/* memory management of the 60kb on the chip from 0x1000 to 0xffff */
187static void init_memory(struct isp1760_hcd *priv) 261static void init_memory(struct isp1760_hcd *priv)
188{ 262{
@@ -269,29 +343,23 @@ static void free_mem(struct isp1760_hcd *priv, u32 mem)
269 343
270static void isp1760_init_regs(struct usb_hcd *hcd) 344static void isp1760_init_regs(struct usb_hcd *hcd)
271{ 345{
272 isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG); 346 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, 0);
273 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 347 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
274 HC_ATL_PTD_SKIPMAP_REG); 348 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
275 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 349 reg_write32(hcd->regs, HC_ISO_PTD_SKIPMAP_REG, NO_TRANSFER_ACTIVE);
276 HC_INT_PTD_SKIPMAP_REG); 350
277 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 351 reg_write32(hcd->regs, HC_ATL_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
278 HC_ISO_PTD_SKIPMAP_REG); 352 reg_write32(hcd->regs, HC_INT_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
279 353 reg_write32(hcd->regs, HC_ISO_PTD_DONEMAP_REG, ~NO_TRANSFER_ACTIVE);
280 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
281 HC_ATL_PTD_DONEMAP_REG);
282 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
283 HC_INT_PTD_DONEMAP_REG);
284 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
285 HC_ISO_PTD_DONEMAP_REG);
286} 354}
287 355
288static int handshake(struct isp1760_hcd *priv, void __iomem *ptr, 356static int handshake(struct usb_hcd *hcd, u32 reg,
289 u32 mask, u32 done, int usec) 357 u32 mask, u32 done, int usec)
290{ 358{
291 u32 result; 359 u32 result;
292 360
293 do { 361 do {
294 result = isp1760_readl(ptr); 362 result = reg_read32(hcd->regs, reg);
295 if (result == ~0) 363 if (result == ~0)
296 return -ENODEV; 364 return -ENODEV;
297 result &= mask; 365 result &= mask;
@@ -308,13 +376,13 @@ static int ehci_reset(struct isp1760_hcd *priv)
308{ 376{
309 int retval; 377 int retval;
310 struct usb_hcd *hcd = priv_to_hcd(priv); 378 struct usb_hcd *hcd = priv_to_hcd(priv);
311 u32 command = isp1760_readl(hcd->regs + HC_USBCMD); 379 u32 command = reg_read32(hcd->regs, HC_USBCMD);
312 380
313 command |= CMD_RESET; 381 command |= CMD_RESET;
314 isp1760_writel(command, hcd->regs + HC_USBCMD); 382 reg_write32(hcd->regs, HC_USBCMD, command);
315 hcd->state = HC_STATE_HALT; 383 hcd->state = HC_STATE_HALT;
316 priv->next_statechange = jiffies; 384 priv->next_statechange = jiffies;
317 retval = handshake(priv, hcd->regs + HC_USBCMD, 385 retval = handshake(hcd, HC_USBCMD,
318 CMD_RESET, 0, 250 * 1000); 386 CMD_RESET, 0, 250 * 1000);
319 return retval; 387 return retval;
320} 388}
@@ -362,7 +430,7 @@ static int priv_init(struct usb_hcd *hcd)
362 priv->periodic_size = DEFAULT_I_TDPS; 430 priv->periodic_size = DEFAULT_I_TDPS;
363 431
364 /* controllers may cache some of the periodic schedule ... */ 432 /* controllers may cache some of the periodic schedule ... */
365 hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS); 433 hcc_params = reg_read32(hcd->regs, HC_HCCPARAMS);
366 /* full frame cache */ 434 /* full frame cache */
367 if (HCC_ISOC_CACHE(hcc_params)) 435 if (HCC_ISOC_CACHE(hcc_params))
368 priv->i_thresh = 8; 436 priv->i_thresh = 8;
@@ -399,13 +467,13 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
399 * Write it twice to ensure correct upper bits if switching 467 * Write it twice to ensure correct upper bits if switching
400 * to 16-bit mode. 468 * to 16-bit mode.
401 */ 469 */
402 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL); 470 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
403 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL); 471 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
404 472
405 isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG); 473 reg_write32(hcd->regs, HC_SCRATCH_REG, 0xdeadbabe);
406 /* Change bus pattern */ 474 /* Change bus pattern */
407 scratch = isp1760_readl(hcd->regs + HC_CHIP_ID_REG); 475 scratch = reg_read32(hcd->regs, HC_CHIP_ID_REG);
408 scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG); 476 scratch = reg_read32(hcd->regs, HC_SCRATCH_REG);
409 if (scratch != 0xdeadbabe) { 477 if (scratch != 0xdeadbabe) {
410 printk(KERN_ERR "ISP1760: Scratch test failed.\n"); 478 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
411 return -ENODEV; 479 return -ENODEV;
@@ -415,10 +483,10 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
415 isp1760_init_regs(hcd); 483 isp1760_init_regs(hcd);
416 484
417 /* reset */ 485 /* reset */
418 isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG); 486 reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_ALL);
419 mdelay(100); 487 mdelay(100);
420 488
421 isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG); 489 reg_write32(hcd->regs, HC_RESET_REG, SW_RESET_RESET_HC);
422 mdelay(100); 490 mdelay(100);
423 491
424 result = ehci_reset(priv); 492 result = ehci_reset(priv);
@@ -433,12 +501,12 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
433 "analog" : "digital"); 501 "analog" : "digital");
434 502
435 /* ATL reset */ 503 /* ATL reset */
436 isp1760_writel(hwmode | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL); 504 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode | ALL_ATX_RESET);
437 mdelay(10); 505 mdelay(10);
438 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL); 506 reg_write32(hcd->regs, HC_HW_MODE_CTRL, hwmode);
439 507
440 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG); 508 reg_write32(hcd->regs, HC_INTERRUPT_REG, INTERRUPT_ENABLE_MASK);
441 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE); 509 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE, INTERRUPT_ENABLE_MASK);
442 510
443 /* 511 /*
444 * PORT 1 Control register of the ISP1760 is the OTG control 512 * PORT 1 Control register of the ISP1760 is the OTG control
@@ -446,11 +514,10 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
446 * support in this driver, we use port 1 as a "normal" USB host port on 514 * support in this driver, we use port 1 as a "normal" USB host port on
447 * both chips. 515 * both chips.
448 */ 516 */
449 isp1760_writel(PORT1_POWER | PORT1_INIT2, 517 reg_write32(hcd->regs, HC_PORT1_CTRL, PORT1_POWER | PORT1_INIT2);
450 hcd->regs + HC_PORT1_CTRL);
451 mdelay(10); 518 mdelay(10);
452 519
453 priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS); 520 priv->hcs_params = reg_read32(hcd->regs, HC_HCSPARAMS);
454 521
455 return priv_init(hcd); 522 return priv_init(hcd);
456} 523}
@@ -458,19 +525,19 @@ static int isp1760_hc_setup(struct usb_hcd *hcd)
458static void isp1760_init_maps(struct usb_hcd *hcd) 525static void isp1760_init_maps(struct usb_hcd *hcd)
459{ 526{
460 /*set last maps, for iso its only 1, else 32 tds bitmap*/ 527 /*set last maps, for iso its only 1, else 32 tds bitmap*/
461 isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG); 528 reg_write32(hcd->regs, HC_ATL_PTD_LASTPTD_REG, 0x80000000);
462 isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG); 529 reg_write32(hcd->regs, HC_INT_PTD_LASTPTD_REG, 0x80000000);
463 isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG); 530 reg_write32(hcd->regs, HC_ISO_PTD_LASTPTD_REG, 0x00000001);
464} 531}
465 532
466static void isp1760_enable_interrupts(struct usb_hcd *hcd) 533static void isp1760_enable_interrupts(struct usb_hcd *hcd)
467{ 534{
468 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG); 535 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_AND_REG, 0);
469 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 536 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, 0);
470 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG); 537 reg_write32(hcd->regs, HC_INT_IRQ_MASK_AND_REG, 0);
471 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG); 538 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, 0);
472 isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG); 539 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_AND_REG, 0);
473 isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG); 540 reg_write32(hcd->regs, HC_ISO_IRQ_MASK_OR_REG, 0xffffffff);
474 /* step 23 passed */ 541 /* step 23 passed */
475} 542}
476 543
@@ -486,15 +553,15 @@ static int isp1760_run(struct usb_hcd *hcd)
486 553
487 hcd->state = HC_STATE_RUNNING; 554 hcd->state = HC_STATE_RUNNING;
488 isp1760_enable_interrupts(hcd); 555 isp1760_enable_interrupts(hcd);
489 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL); 556 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
490 isp1760_writel(temp | HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL); 557 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp | HW_GLOBAL_INTR_EN);
491 558
492 command = isp1760_readl(hcd->regs + HC_USBCMD); 559 command = reg_read32(hcd->regs, HC_USBCMD);
493 command &= ~(CMD_LRESET|CMD_RESET); 560 command &= ~(CMD_LRESET|CMD_RESET);
494 command |= CMD_RUN; 561 command |= CMD_RUN;
495 isp1760_writel(command, hcd->regs + HC_USBCMD); 562 reg_write32(hcd->regs, HC_USBCMD, command);
496 563
497 retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN, 564 retval = handshake(hcd, HC_USBCMD, CMD_RUN, CMD_RUN,
498 250 * 1000); 565 250 * 1000);
499 if (retval) 566 if (retval)
500 return retval; 567 return retval;
@@ -505,15 +572,14 @@ static int isp1760_run(struct usb_hcd *hcd)
505 * the semaphore while doing so. 572 * the semaphore while doing so.
506 */ 573 */
507 down_write(&ehci_cf_port_reset_rwsem); 574 down_write(&ehci_cf_port_reset_rwsem);
508 isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG); 575 reg_write32(hcd->regs, HC_CONFIGFLAG, FLAG_CF);
509 576
510 retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 577 retval = handshake(hcd, HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 250 * 1000);
511 250 * 1000);
512 up_write(&ehci_cf_port_reset_rwsem); 578 up_write(&ehci_cf_port_reset_rwsem);
513 if (retval) 579 if (retval)
514 return retval; 580 return retval;
515 581
516 chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG); 582 chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
517 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff, 583 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
518 chipid >> 16); 584 chipid >> 16);
519 585
@@ -537,87 +603,78 @@ static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
537 struct isp1760_qtd *qtd, struct urb *urb, 603 struct isp1760_qtd *qtd, struct urb *urb,
538 u32 payload, struct ptd *ptd) 604 u32 payload, struct ptd *ptd)
539{ 605{
540 u32 dw0;
541 u32 dw1;
542 u32 dw2;
543 u32 dw3;
544 u32 maxpacket; 606 u32 maxpacket;
545 u32 multi; 607 u32 multi;
546 u32 pid_code; 608 u32 pid_code;
547 u32 rl = RL_COUNTER; 609 u32 rl = RL_COUNTER;
548 u32 nak = NAK_COUNTER; 610 u32 nak = NAK_COUNTER;
549 611
612 memset(ptd, 0, sizeof(*ptd));
613
550 /* according to 3.6.2, max packet len can not be > 0x400 */ 614 /* according to 3.6.2, max packet len can not be > 0x400 */
551 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); 615 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
552 multi = 1 + ((maxpacket >> 11) & 0x3); 616 multi = 1 + ((maxpacket >> 11) & 0x3);
553 maxpacket &= 0x7ff; 617 maxpacket &= 0x7ff;
554 618
555 /* DW0 */ 619 /* DW0 */
556 dw0 = PTD_VALID; 620 ptd->dw0 = PTD_VALID;
557 dw0 |= PTD_LENGTH(qtd->length); 621 ptd->dw0 |= PTD_LENGTH(qtd->length);
558 dw0 |= PTD_MAXPACKET(maxpacket); 622 ptd->dw0 |= PTD_MAXPACKET(maxpacket);
559 dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe)); 623 ptd->dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
560 dw1 = usb_pipeendpoint(urb->pipe) >> 1; 624 ptd->dw1 = usb_pipeendpoint(urb->pipe) >> 1;
561 625
562 /* DW1 */ 626 /* DW1 */
563 dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe)); 627 ptd->dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
564 628
565 pid_code = qtd->packet_type; 629 pid_code = qtd->packet_type;
566 dw1 |= PTD_PID_TOKEN(pid_code); 630 ptd->dw1 |= PTD_PID_TOKEN(pid_code);
567 631
568 if (usb_pipebulk(urb->pipe)) 632 if (usb_pipebulk(urb->pipe))
569 dw1 |= PTD_TRANS_BULK; 633 ptd->dw1 |= PTD_TRANS_BULK;
570 else if (usb_pipeint(urb->pipe)) 634 else if (usb_pipeint(urb->pipe))
571 dw1 |= PTD_TRANS_INT; 635 ptd->dw1 |= PTD_TRANS_INT;
572 636
573 if (urb->dev->speed != USB_SPEED_HIGH) { 637 if (urb->dev->speed != USB_SPEED_HIGH) {
574 /* split transaction */ 638 /* split transaction */
575 639
576 dw1 |= PTD_TRANS_SPLIT; 640 ptd->dw1 |= PTD_TRANS_SPLIT;
577 if (urb->dev->speed == USB_SPEED_LOW) 641 if (urb->dev->speed == USB_SPEED_LOW)
578 dw1 |= PTD_SE_USB_LOSPEED; 642 ptd->dw1 |= PTD_SE_USB_LOSPEED;
579 643
580 dw1 |= PTD_PORT_NUM(urb->dev->ttport); 644 ptd->dw1 |= PTD_PORT_NUM(urb->dev->ttport);
581 dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum); 645 ptd->dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
582 646
583 /* SE bit for Split INT transfers */ 647 /* SE bit for Split INT transfers */
584 if (usb_pipeint(urb->pipe) && 648 if (usb_pipeint(urb->pipe) &&
585 (urb->dev->speed == USB_SPEED_LOW)) 649 (urb->dev->speed == USB_SPEED_LOW))
586 dw1 |= 2 << 16; 650 ptd->dw1 |= 2 << 16;
587 651
588 dw3 = 0; 652 ptd->dw3 = 0;
589 rl = 0; 653 rl = 0;
590 nak = 0; 654 nak = 0;
591 } else { 655 } else {
592 dw0 |= PTD_MULTI(multi); 656 ptd->dw0 |= PTD_MULTI(multi);
593 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) 657 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
594 dw3 = qh->ping; 658 ptd->dw3 = qh->ping;
595 else 659 else
596 dw3 = 0; 660 ptd->dw3 = 0;
597 } 661 }
598 /* DW2 */ 662 /* DW2 */
599 dw2 = 0; 663 ptd->dw2 = 0;
600 dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload)); 664 ptd->dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
601 dw2 |= PTD_RL_CNT(rl); 665 ptd->dw2 |= PTD_RL_CNT(rl);
602 dw3 |= PTD_NAC_CNT(nak); 666 ptd->dw3 |= PTD_NAC_CNT(nak);
603 667
604 /* DW3 */ 668 /* DW3 */
605 if (usb_pipecontrol(urb->pipe)) 669 if (usb_pipecontrol(urb->pipe))
606 dw3 |= PTD_DATA_TOGGLE(qtd->toggle); 670 ptd->dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
607 else 671 else
608 dw3 |= qh->toggle; 672 ptd->dw3 |= qh->toggle;
609 673
610 674
611 dw3 |= PTD_ACTIVE; 675 ptd->dw3 |= PTD_ACTIVE;
612 /* Cerr */ 676 /* Cerr */
613 dw3 |= PTD_CERR(ERR_COUNTER); 677 ptd->dw3 |= PTD_CERR(ERR_COUNTER);
614
615 memset(ptd, 0, sizeof(*ptd));
616
617 ptd->dw0 = cpu_to_le32(dw0);
618 ptd->dw1 = cpu_to_le32(dw1);
619 ptd->dw2 = cpu_to_le32(dw2);
620 ptd->dw3 = cpu_to_le32(dw3);
621} 678}
622 679
623static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh, 680static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
@@ -650,7 +707,7 @@ static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
650 707
651 if (urb->dev->speed != USB_SPEED_HIGH) { 708 if (urb->dev->speed != USB_SPEED_HIGH) {
652 /* split */ 709 /* split */
653 ptd->dw5 = cpu_to_le32(0x1c); 710 ptd->dw5 = 0x1c;
654 711
655 if (qh->period >= 32) 712 if (qh->period >= 32)
656 period = qh->period / 2; 713 period = qh->period / 2;
@@ -677,8 +734,8 @@ static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
677 } 734 }
678 } 735 }
679 736
680 ptd->dw2 |= cpu_to_le32(period); 737 ptd->dw2 |= period;
681 ptd->dw4 = cpu_to_le32(usof); 738 ptd->dw4 = usof;
682} 739}
683 740
684static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh, 741static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
@@ -710,20 +767,18 @@ static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
710static int check_error(struct ptd *ptd) 767static int check_error(struct ptd *ptd)
711{ 768{
712 int error = 0; 769 int error = 0;
713 u32 dw3;
714 770
715 dw3 = le32_to_cpu(ptd->dw3); 771 if (ptd->dw3 & DW3_HALT_BIT) {
716 if (dw3 & DW3_HALT_BIT) {
717 error = -EPIPE; 772 error = -EPIPE;
718 773
719 if (dw3 & DW3_ERROR_BIT) 774 if (ptd->dw3 & DW3_ERROR_BIT)
720 pr_err("error bit is set in DW3\n"); 775 pr_err("error bit is set in DW3\n");
721 } 776 }
722 777
723 if (dw3 & DW3_QTD_ACTIVE) { 778 if (ptd->dw3 & DW3_QTD_ACTIVE) {
724 printk(KERN_ERR "transfer active bit is set DW3\n"); 779 printk(KERN_ERR "transfer active bit is set DW3\n");
725 printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf, 780 printk(KERN_ERR "nak counter: %d, rl: %d\n",
726 (le32_to_cpu(ptd->dw2) >> 25) & 0xf); 781 (ptd->dw3 >> 19) & 0xf, (ptd->dw2 >> 25) & 0xf);
727 } 782 }
728 783
729 return error; 784 return error;
@@ -767,14 +822,13 @@ static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
767 break; 822 break;
768 case OUT_PID: 823 case OUT_PID:
769 case SETUP_PID: 824 case SETUP_PID:
770 priv_write_copy(priv, qtd->data_buffer, 825 mem_writes8(hcd->regs, payload, qtd->data_buffer,
771 hcd->regs + payload, 826 qtd->length);
772 qtd->length);
773 } 827 }
774 } 828 }
775} 829}
776 830
777static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload, 831static void enqueue_one_atl_qtd(u32 payload,
778 struct isp1760_hcd *priv, struct isp1760_qh *qh, 832 struct isp1760_hcd *priv, struct isp1760_qh *qh,
779 struct urb *urb, u32 slot, struct isp1760_qtd *qtd) 833 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
780{ 834{
@@ -782,7 +836,7 @@ static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
782 struct usb_hcd *hcd = priv_to_hcd(priv); 836 struct usb_hcd *hcd = priv_to_hcd(priv);
783 837
784 transform_into_atl(priv, qh, qtd, urb, payload, &ptd); 838 transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
785 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd)); 839 ptd_write(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
786 enqueue_one_qtd(qtd, priv, payload); 840 enqueue_one_qtd(qtd, priv, payload);
787 841
788 priv->atl_ints[slot].urb = urb; 842 priv->atl_ints[slot].urb = urb;
@@ -794,7 +848,7 @@ static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
794 qtd->status |= slot << 16; 848 qtd->status |= slot << 16;
795} 849}
796 850
797static void enqueue_one_int_qtd(u32 int_regs, u32 payload, 851static void enqueue_one_int_qtd(u32 payload,
798 struct isp1760_hcd *priv, struct isp1760_qh *qh, 852 struct isp1760_hcd *priv, struct isp1760_qh *qh,
799 struct urb *urb, u32 slot, struct isp1760_qtd *qtd) 853 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
800{ 854{
@@ -802,7 +856,7 @@ static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
802 struct usb_hcd *hcd = priv_to_hcd(priv); 856 struct usb_hcd *hcd = priv_to_hcd(priv);
803 857
804 transform_into_int(priv, qh, qtd, urb, payload, &ptd); 858 transform_into_int(priv, qh, qtd, urb, payload, &ptd);
805 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd)); 859 ptd_write(hcd->regs, INT_PTD_OFFSET, slot, &ptd);
806 enqueue_one_qtd(qtd, priv, payload); 860 enqueue_one_qtd(qtd, priv, payload);
807 861
808 priv->int_ints[slot].urb = urb; 862 priv->int_ints[slot].urb = urb;
@@ -821,7 +875,7 @@ static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
821 u32 skip_map, or_map; 875 u32 skip_map, or_map;
822 u32 queue_entry; 876 u32 queue_entry;
823 u32 slot; 877 u32 slot;
824 u32 atl_regs, payload; 878 u32 payload;
825 u32 buffstatus; 879 u32 buffstatus;
826 880
827 /* 881 /*
@@ -832,33 +886,31 @@ static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
832 */ 886 */
833 mmiowb(); 887 mmiowb();
834 ndelay(195); 888 ndelay(195);
835 skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG); 889 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
836 890
837 BUG_ON(!skip_map); 891 BUG_ON(!skip_map);
838 slot = __ffs(skip_map); 892 slot = __ffs(skip_map);
839 queue_entry = 1 << slot; 893 queue_entry = 1 << slot;
840 894
841 atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
842
843 payload = alloc_mem(priv, qtd->length); 895 payload = alloc_mem(priv, qtd->length);
844 896
845 enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd); 897 enqueue_one_atl_qtd(payload, priv, qh, qtd->urb, slot, qtd);
846 898
847 or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 899 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
848 or_map |= queue_entry; 900 or_map |= queue_entry;
849 isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 901 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
850 902
851 skip_map &= ~queue_entry; 903 skip_map &= ~queue_entry;
852 isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG); 904 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
853 905
854 priv->atl_queued++; 906 priv->atl_queued++;
855 if (priv->atl_queued == 2) 907 if (priv->atl_queued == 2)
856 isp1760_writel(INTERRUPT_ENABLE_SOT_MASK, 908 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
857 hcd->regs + HC_INTERRUPT_ENABLE); 909 INTERRUPT_ENABLE_SOT_MASK);
858 910
859 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG); 911 buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
860 buffstatus |= ATL_BUFFER; 912 buffstatus |= ATL_BUFFER;
861 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG); 913 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
862} 914}
863 915
864static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh, 916static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
@@ -868,7 +920,7 @@ static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
868 u32 skip_map, or_map; 920 u32 skip_map, or_map;
869 u32 queue_entry; 921 u32 queue_entry;
870 u32 slot; 922 u32 slot;
871 u32 int_regs, payload; 923 u32 payload;
872 u32 buffstatus; 924 u32 buffstatus;
873 925
874 /* 926 /*
@@ -879,31 +931,30 @@ static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
879 */ 931 */
880 mmiowb(); 932 mmiowb();
881 ndelay(195); 933 ndelay(195);
882 skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG); 934 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
883 935
884 BUG_ON(!skip_map); 936 BUG_ON(!skip_map);
885 slot = __ffs(skip_map); 937 slot = __ffs(skip_map);
886 queue_entry = 1 << slot; 938 queue_entry = 1 << slot;
887 939
888 int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
889
890 payload = alloc_mem(priv, qtd->length); 940 payload = alloc_mem(priv, qtd->length);
891 941
892 enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd); 942 enqueue_one_int_qtd(payload, priv, qh, qtd->urb, slot, qtd);
893 943
894 or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG); 944 or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
895 or_map |= queue_entry; 945 or_map |= queue_entry;
896 isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG); 946 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
897 947
898 skip_map &= ~queue_entry; 948 skip_map &= ~queue_entry;
899 isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG); 949 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
900 950
901 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG); 951 buffstatus = reg_read32(hcd->regs, HC_BUFFER_STATUS_REG);
902 buffstatus |= INT_BUFFER; 952 buffstatus |= INT_BUFFER;
903 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG); 953 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG, buffstatus);
904} 954}
905 955
906static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status) 956static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb,
957 int status)
907__releases(priv->lock) 958__releases(priv->lock)
908__acquires(priv->lock) 959__acquires(priv->lock)
909{ 960{
@@ -963,14 +1014,12 @@ static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
963 return qtd; 1014 return qtd;
964} 1015}
965 1016
966static void do_atl_int(struct usb_hcd *usb_hcd) 1017static void do_atl_int(struct usb_hcd *hcd)
967{ 1018{
968 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 1019 struct isp1760_hcd *priv = hcd_to_priv(hcd);
969 u32 done_map, skip_map; 1020 u32 done_map, skip_map;
970 struct ptd ptd; 1021 struct ptd ptd;
971 struct urb *urb = NULL; 1022 struct urb *urb = NULL;
972 u32 atl_regs_base;
973 u32 atl_regs;
974 u32 queue_entry; 1023 u32 queue_entry;
975 u32 payload; 1024 u32 payload;
976 u32 length; 1025 u32 length;
@@ -982,21 +1031,14 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
982 u32 rl; 1031 u32 rl;
983 u32 nakcount; 1032 u32 nakcount;
984 1033
985 done_map = isp1760_readl(usb_hcd->regs + 1034 done_map = reg_read32(hcd->regs, HC_ATL_PTD_DONEMAP_REG);
986 HC_ATL_PTD_DONEMAP_REG); 1035 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
987 skip_map = isp1760_readl(usb_hcd->regs +
988 HC_ATL_PTD_SKIPMAP_REG);
989 1036
990 or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 1037 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
991 or_map &= ~done_map; 1038 or_map &= ~done_map;
992 isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 1039 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
993 1040
994 atl_regs_base = ATL_REGS_OFFSET;
995 while (done_map) { 1041 while (done_map) {
996 u32 dw1;
997 u32 dw2;
998 u32 dw3;
999
1000 status = 0; 1042 status = 0;
1001 priv->atl_queued--; 1043 priv->atl_queued--;
1002 1044
@@ -1004,8 +1046,6 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1004 done_map &= ~(1 << queue_entry); 1046 done_map &= ~(1 << queue_entry);
1005 skip_map |= 1 << queue_entry; 1047 skip_map |= 1 << queue_entry;
1006 1048
1007 atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
1008
1009 urb = priv->atl_ints[queue_entry].urb; 1049 urb = priv->atl_ints[queue_entry].urb;
1010 qtd = priv->atl_ints[queue_entry].qtd; 1050 qtd = priv->atl_ints[queue_entry].qtd;
1011 qh = priv->atl_ints[queue_entry].qh; 1051 qh = priv->atl_ints[queue_entry].qh;
@@ -1015,30 +1055,14 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1015 printk(KERN_ERR "qh is 0\n"); 1055 printk(KERN_ERR "qh is 0\n");
1016 continue; 1056 continue;
1017 } 1057 }
1018 isp1760_writel(atl_regs + ISP_BANK(0), usb_hcd->regs + 1058 ptd_read(hcd->regs, ATL_PTD_OFFSET, queue_entry, &ptd);
1019 HC_MEMORY_REG);
1020 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1021 HC_MEMORY_REG);
1022 /*
1023 * write bank1 address twice to ensure the 90ns delay (time
1024 * between BANK0 write and the priv_read_copy() call is at
1025 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 109ns)
1026 */
1027 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1028 HC_MEMORY_REG);
1029 1059
1030 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs + 1060 rl = (ptd.dw2 >> 25) & 0x0f;
1031 ISP_BANK(0), sizeof(ptd)); 1061 nakcount = (ptd.dw3 >> 19) & 0xf;
1032
1033 dw1 = le32_to_cpu(ptd.dw1);
1034 dw2 = le32_to_cpu(ptd.dw2);
1035 dw3 = le32_to_cpu(ptd.dw3);
1036 rl = (dw2 >> 25) & 0x0f;
1037 nakcount = (dw3 >> 19) & 0xf;
1038 1062
1039 /* Transfer Error, *but* active and no HALT -> reload */ 1063 /* Transfer Error, *but* active and no HALT -> reload */
1040 if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) && 1064 if ((ptd.dw3 & DW3_ERROR_BIT) && (ptd.dw3 & DW3_QTD_ACTIVE) &&
1041 !(dw3 & DW3_HALT_BIT)) { 1065 !(ptd.dw3 & DW3_HALT_BIT)) {
1042 1066
1043 /* according to ppriv code, we have to 1067 /* according to ppriv code, we have to
1044 * reload this one if trasfered bytes != requested bytes 1068 * reload this one if trasfered bytes != requested bytes
@@ -1047,13 +1071,13 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1047 * triggered so far. 1071 * triggered so far.
1048 */ 1072 */
1049 1073
1050 length = PTD_XFERRED_LENGTH(dw3); 1074 length = PTD_XFERRED_LENGTH(ptd.dw3);
1051 printk(KERN_ERR "Should reload now.... transfered %d " 1075 printk(KERN_ERR "Should reload now.... transfered %d "
1052 "of %zu\n", length, qtd->length); 1076 "of %zu\n", length, qtd->length);
1053 BUG(); 1077 BUG();
1054 } 1078 }
1055 1079
1056 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) { 1080 if (!nakcount && (ptd.dw3 & DW3_QTD_ACTIVE)) {
1057 u32 buffstatus; 1081 u32 buffstatus;
1058 1082
1059 /* 1083 /*
@@ -1063,10 +1087,10 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1063 */ 1087 */
1064 1088
1065 /* RL counter = ERR counter */ 1089 /* RL counter = ERR counter */
1066 dw3 &= ~(0xf << 19); 1090 ptd.dw3 &= ~(0xf << 19);
1067 dw3 |= rl << 19; 1091 ptd.dw3 |= rl << 19;
1068 dw3 &= ~(3 << (55 - 32)); 1092 ptd.dw3 &= ~(3 << (55 - 32));
1069 dw3 |= ERR_COUNTER << (55 - 32); 1093 ptd.dw3 |= ERR_COUNTER << (55 - 32);
1070 1094
1071 /* 1095 /*
1072 * It is not needed to write skip map back because it 1096 * It is not needed to write skip map back because it
@@ -1074,30 +1098,23 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1074 * unskipped once it gets written to the HW. 1098 * unskipped once it gets written to the HW.
1075 */ 1099 */
1076 skip_map &= ~(1 << queue_entry); 1100 skip_map &= ~(1 << queue_entry);
1077 or_map = isp1760_readl(usb_hcd->regs + 1101 or_map = reg_read32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG);
1078 HC_ATL_IRQ_MASK_OR_REG);
1079 or_map |= 1 << queue_entry; 1102 or_map |= 1 << queue_entry;
1080 isp1760_writel(or_map, usb_hcd->regs + 1103 reg_write32(hcd->regs, HC_ATL_IRQ_MASK_OR_REG, or_map);
1081 HC_ATL_IRQ_MASK_OR_REG);
1082
1083 ptd.dw3 = cpu_to_le32(dw3);
1084 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1085 atl_regs, sizeof(ptd));
1086 1104
1087 ptd.dw0 |= cpu_to_le32(PTD_VALID); 1105 ptd.dw0 |= PTD_VALID;
1088 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs + 1106 ptd_write(hcd->regs, ATL_PTD_OFFSET, queue_entry, &ptd);
1089 atl_regs, sizeof(ptd));
1090 1107
1091 priv->atl_queued++; 1108 priv->atl_queued++;
1092 if (priv->atl_queued == 2) 1109 if (priv->atl_queued == 2)
1093 isp1760_writel(INTERRUPT_ENABLE_SOT_MASK, 1110 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1094 usb_hcd->regs + HC_INTERRUPT_ENABLE); 1111 INTERRUPT_ENABLE_SOT_MASK);
1095 1112
1096 buffstatus = isp1760_readl(usb_hcd->regs + 1113 buffstatus = reg_read32(hcd->regs,
1097 HC_BUFFER_STATUS_REG); 1114 HC_BUFFER_STATUS_REG);
1098 buffstatus |= ATL_BUFFER; 1115 buffstatus |= ATL_BUFFER;
1099 isp1760_writel(buffstatus, usb_hcd->regs + 1116 reg_write32(hcd->regs, HC_BUFFER_STATUS_REG,
1100 HC_BUFFER_STATUS_REG); 1117 buffstatus);
1101 continue; 1118 continue;
1102 } 1119 }
1103 1120
@@ -1118,20 +1135,19 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1118#endif 1135#endif
1119 } else { 1136 } else {
1120 if (usb_pipetype(urb->pipe) == PIPE_BULK) { 1137 if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1121 priv->atl_ints[queue_entry].qh->toggle = dw3 & 1138 priv->atl_ints[queue_entry].qh->toggle =
1122 (1 << 25); 1139 ptd.dw3 & (1 << 25);
1123 priv->atl_ints[queue_entry].qh->ping = dw3 & 1140 priv->atl_ints[queue_entry].qh->ping =
1124 (1 << 26); 1141 ptd.dw3 & (1 << 26);
1125 } 1142 }
1126 } 1143 }
1127 1144
1128 length = PTD_XFERRED_LENGTH(dw3); 1145 length = PTD_XFERRED_LENGTH(ptd.dw3);
1129 if (length) { 1146 if (length) {
1130 switch (DW1_GET_PID(dw1)) { 1147 switch (DW1_GET_PID(ptd.dw1)) {
1131 case IN_PID: 1148 case IN_PID:
1132 priv_read_copy(priv, 1149 mem_reads8(hcd->regs, payload,
1133 priv->atl_ints[queue_entry].data_buffer, 1150 priv->atl_ints[queue_entry].data_buffer,
1134 usb_hcd->regs + payload + ISP_BANK(1),
1135 length); 1151 length);
1136 1152
1137 case OUT_PID: 1153 case OUT_PID:
@@ -1150,8 +1166,7 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1150 1166
1151 free_mem(priv, payload); 1167 free_mem(priv, payload);
1152 1168
1153 isp1760_writel(skip_map, usb_hcd->regs + 1169 reg_write32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG, skip_map);
1154 HC_ATL_PTD_SKIPMAP_REG);
1155 1170
1156 if (urb->status == -EPIPE) { 1171 if (urb->status == -EPIPE) {
1157 /* HALT was received */ 1172 /* HALT was received */
@@ -1193,24 +1208,21 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1193 } 1208 }
1194 1209
1195 if (qtd) 1210 if (qtd)
1196 enqueue_an_ATL_packet(usb_hcd, qh, qtd); 1211 enqueue_an_ATL_packet(hcd, qh, qtd);
1197 1212
1198 skip_map = isp1760_readl(usb_hcd->regs + 1213 skip_map = reg_read32(hcd->regs, HC_ATL_PTD_SKIPMAP_REG);
1199 HC_ATL_PTD_SKIPMAP_REG);
1200 } 1214 }
1201 if (priv->atl_queued <= 1) 1215 if (priv->atl_queued <= 1)
1202 isp1760_writel(INTERRUPT_ENABLE_MASK, 1216 reg_write32(hcd->regs, HC_INTERRUPT_ENABLE,
1203 usb_hcd->regs + HC_INTERRUPT_ENABLE); 1217 INTERRUPT_ENABLE_MASK);
1204} 1218}
1205 1219
1206static void do_intl_int(struct usb_hcd *usb_hcd) 1220static void do_intl_int(struct usb_hcd *hcd)
1207{ 1221{
1208 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 1222 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1209 u32 done_map, skip_map; 1223 u32 done_map, skip_map;
1210 struct ptd ptd; 1224 struct ptd ptd;
1211 struct urb *urb = NULL; 1225 struct urb *urb = NULL;
1212 u32 int_regs;
1213 u32 int_regs_base;
1214 u32 payload; 1226 u32 payload;
1215 u32 length; 1227 u32 length;
1216 u32 or_map; 1228 u32 or_map;
@@ -1219,26 +1231,18 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
1219 struct isp1760_qtd *qtd; 1231 struct isp1760_qtd *qtd;
1220 struct isp1760_qh *qh; 1232 struct isp1760_qh *qh;
1221 1233
1222 done_map = isp1760_readl(usb_hcd->regs + 1234 done_map = reg_read32(hcd->regs, HC_INT_PTD_DONEMAP_REG);
1223 HC_INT_PTD_DONEMAP_REG); 1235 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1224 skip_map = isp1760_readl(usb_hcd->regs +
1225 HC_INT_PTD_SKIPMAP_REG);
1226 1236
1227 or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG); 1237 or_map = reg_read32(hcd->regs, HC_INT_IRQ_MASK_OR_REG);
1228 or_map &= ~done_map; 1238 or_map &= ~done_map;
1229 isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG); 1239 reg_write32(hcd->regs, HC_INT_IRQ_MASK_OR_REG, or_map);
1230
1231 int_regs_base = INT_REGS_OFFSET;
1232 1240
1233 while (done_map) { 1241 while (done_map) {
1234 u32 dw1;
1235 u32 dw3;
1236
1237 queue_entry = __ffs(done_map); 1242 queue_entry = __ffs(done_map);
1238 done_map &= ~(1 << queue_entry); 1243 done_map &= ~(1 << queue_entry);
1239 skip_map |= 1 << queue_entry; 1244 skip_map |= 1 << queue_entry;
1240 1245
1241 int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
1242 urb = priv->int_ints[queue_entry].urb; 1246 urb = priv->int_ints[queue_entry].urb;
1243 qtd = priv->int_ints[queue_entry].qtd; 1247 qtd = priv->int_ints[queue_entry].qtd;
1244 qh = priv->int_ints[queue_entry].qh; 1248 qh = priv->int_ints[queue_entry].qh;
@@ -1249,23 +1253,8 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
1249 continue; 1253 continue;
1250 } 1254 }
1251 1255
1252 isp1760_writel(int_regs + ISP_BANK(0), usb_hcd->regs + 1256 ptd_read(hcd->regs, INT_PTD_OFFSET, queue_entry, &ptd);
1253 HC_MEMORY_REG); 1257 check_int_err_status(ptd.dw4);
1254 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1255 HC_MEMORY_REG);
1256 /*
1257 * write bank1 address twice to ensure the 90ns delay (time
1258 * between BANK0 write and the priv_read_copy() call is at
1259 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
1260 */
1261 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1262 HC_MEMORY_REG);
1263
1264 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs +
1265 ISP_BANK(0), sizeof(ptd));
1266 dw1 = le32_to_cpu(ptd.dw1);
1267 dw3 = le32_to_cpu(ptd.dw3);
1268 check_int_err_status(le32_to_cpu(ptd.dw4));
1269 1258
1270 error = check_error(&ptd); 1259 error = check_error(&ptd);
1271 if (error) { 1260 if (error) {
@@ -1283,21 +1272,21 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
1283 1272
1284 } else { 1273 } else {
1285 priv->int_ints[queue_entry].qh->toggle = 1274 priv->int_ints[queue_entry].qh->toggle =
1286 dw3 & (1 << 25); 1275 ptd.dw3 & (1 << 25);
1287 priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26); 1276 priv->int_ints[queue_entry].qh->ping =
1277 ptd.dw3 & (1 << 26);
1288 } 1278 }
1289 1279
1290 if (urb->dev->speed != USB_SPEED_HIGH) 1280 if (urb->dev->speed != USB_SPEED_HIGH)
1291 length = PTD_XFERRED_LENGTH_LO(dw3); 1281 length = PTD_XFERRED_LENGTH_LO(ptd.dw3);
1292 else 1282 else
1293 length = PTD_XFERRED_LENGTH(dw3); 1283 length = PTD_XFERRED_LENGTH(ptd.dw3);
1294 1284
1295 if (length) { 1285 if (length) {
1296 switch (DW1_GET_PID(dw1)) { 1286 switch (DW1_GET_PID(ptd.dw1)) {
1297 case IN_PID: 1287 case IN_PID:
1298 priv_read_copy(priv, 1288 mem_reads8(hcd->regs, payload,
1299 priv->int_ints[queue_entry].data_buffer, 1289 priv->int_ints[queue_entry].data_buffer,
1300 usb_hcd->regs + payload + ISP_BANK(1),
1301 length); 1290 length);
1302 case OUT_PID: 1291 case OUT_PID:
1303 1292
@@ -1313,8 +1302,7 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
1313 priv->int_ints[queue_entry].qtd = NULL; 1302 priv->int_ints[queue_entry].qtd = NULL;
1314 priv->int_ints[queue_entry].qh = NULL; 1303 priv->int_ints[queue_entry].qh = NULL;
1315 1304
1316 isp1760_writel(skip_map, usb_hcd->regs + 1305 reg_write32(hcd->regs, HC_INT_PTD_SKIPMAP_REG, skip_map);
1317 HC_INT_PTD_SKIPMAP_REG);
1318 free_mem(priv, payload); 1306 free_mem(priv, payload);
1319 1307
1320 if (urb->status == -EPIPE) { 1308 if (urb->status == -EPIPE) {
@@ -1339,10 +1327,9 @@ static void do_intl_int(struct usb_hcd *usb_hcd)
1339 } 1327 }
1340 1328
1341 if (qtd) 1329 if (qtd)
1342 enqueue_an_INT_packet(usb_hcd, qh, qtd); 1330 enqueue_an_INT_packet(hcd, qh, qtd);
1343 1331
1344 skip_map = isp1760_readl(usb_hcd->regs + 1332 skip_map = reg_read32(hcd->regs, HC_INT_PTD_SKIPMAP_REG);
1345 HC_INT_PTD_SKIPMAP_REG);
1346 } 1333 }
1347} 1334}
1348 1335
@@ -1691,7 +1678,7 @@ static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1691 1678
1692 case PIPE_INTERRUPT: 1679 case PIPE_INTERRUPT:
1693 ints = priv->int_ints; 1680 ints = priv->int_ints;
1694 reg_base = INT_REGS_OFFSET; 1681 reg_base = INT_PTD_OFFSET;
1695 or_reg = HC_INT_IRQ_MASK_OR_REG; 1682 or_reg = HC_INT_IRQ_MASK_OR_REG;
1696 skip_reg = HC_INT_PTD_SKIPMAP_REG; 1683 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1697 pe = enqueue_an_INT_packet; 1684 pe = enqueue_an_INT_packet;
@@ -1699,7 +1686,7 @@ static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1699 1686
1700 default: 1687 default:
1701 ints = priv->atl_ints; 1688 ints = priv->atl_ints;
1702 reg_base = ATL_REGS_OFFSET; 1689 reg_base = ATL_PTD_OFFSET;
1703 or_reg = HC_ATL_IRQ_MASK_OR_REG; 1690 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1704 skip_reg = HC_ATL_PTD_SKIPMAP_REG; 1691 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1705 pe = enqueue_an_ATL_packet; 1692 pe = enqueue_an_ATL_packet;
@@ -1716,16 +1703,16 @@ static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1716 struct isp1760_qtd *qtd; 1703 struct isp1760_qtd *qtd;
1717 struct isp1760_qh *qh = ints->qh; 1704 struct isp1760_qh *qh = ints->qh;
1718 1705
1719 skip_map = isp1760_readl(hcd->regs + skip_reg); 1706 skip_map = reg_read32(hcd->regs, skip_reg);
1720 skip_map |= 1 << i; 1707 skip_map |= 1 << i;
1721 isp1760_writel(skip_map, hcd->regs + skip_reg); 1708 reg_write32(hcd->regs, skip_reg, skip_map);
1722 1709
1723 or_map = isp1760_readl(hcd->regs + or_reg); 1710 or_map = reg_read32(hcd->regs, or_reg);
1724 or_map &= ~(1 << i); 1711 or_map &= ~(1 << i);
1725 isp1760_writel(or_map, hcd->regs + or_reg); 1712 reg_write32(hcd->regs, or_reg, or_map);
1713
1714 ptd_write(hcd->regs, reg_base, i, &ptd);
1726 1715
1727 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
1728 + i * sizeof(ptd), sizeof(ptd));
1729 qtd = ints->qtd; 1716 qtd = ints->qtd;
1730 qtd = clean_up_qtdlist(qtd); 1717 qtd = clean_up_qtdlist(qtd);
1731 1718
@@ -1747,7 +1734,8 @@ static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1747 1734
1748 for (qtd = ints->qtd->hw_next; qtd; qtd = qtd->hw_next) { 1735 for (qtd = ints->qtd->hw_next; qtd; qtd = qtd->hw_next) {
1749 if (qtd->urb == urb) { 1736 if (qtd->urb == urb) {
1750 prev_qtd->hw_next = clean_up_qtdlist(qtd); 1737 prev_qtd->hw_next =
1738 clean_up_qtdlist(qtd);
1751 isp1760_urb_done(priv, urb, status); 1739 isp1760_urb_done(priv, urb, status);
1752 break; 1740 break;
1753 } 1741 }
@@ -1775,11 +1763,11 @@ static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1775 if (!(usb_hcd->state & HC_STATE_RUNNING)) 1763 if (!(usb_hcd->state & HC_STATE_RUNNING))
1776 goto leave; 1764 goto leave;
1777 1765
1778 imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG); 1766 imask = reg_read32(usb_hcd->regs, HC_INTERRUPT_REG);
1779 if (unlikely(!imask)) 1767 if (unlikely(!imask))
1780 goto leave; 1768 goto leave;
1781 1769
1782 isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG); 1770 reg_write32(usb_hcd->regs, HC_INTERRUPT_REG, imask);
1783 if (imask & (HC_ATL_INT | HC_SOT_INT)) 1771 if (imask & (HC_ATL_INT | HC_SOT_INT))
1784 do_atl_int(usb_hcd); 1772 do_atl_int(usb_hcd);
1785 1773
@@ -1809,12 +1797,12 @@ static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1809 mask = PORT_CSC; 1797 mask = PORT_CSC;
1810 1798
1811 spin_lock_irqsave(&priv->lock, flags); 1799 spin_lock_irqsave(&priv->lock, flags);
1812 temp = isp1760_readl(hcd->regs + HC_PORTSC1); 1800 temp = reg_read32(hcd->regs, HC_PORTSC1);
1813 1801
1814 if (temp & PORT_OWNER) { 1802 if (temp & PORT_OWNER) {
1815 if (temp & PORT_CSC) { 1803 if (temp & PORT_CSC) {
1816 temp &= ~PORT_CSC; 1804 temp &= ~PORT_CSC;
1817 isp1760_writel(temp, hcd->regs + HC_PORTSC1); 1805 reg_write32(hcd->regs, HC_PORTSC1, temp);
1818 goto done; 1806 goto done;
1819 } 1807 }
1820 } 1808 }
@@ -1871,8 +1859,8 @@ static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1871 1859
1872#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) 1860#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1873 1861
1874static int check_reset_complete(struct isp1760_hcd *priv, int index, 1862static int check_reset_complete(struct usb_hcd *hcd, int index,
1875 u32 __iomem *status_reg, int port_status) 1863 int port_status)
1876{ 1864{
1877 if (!(port_status & PORT_CONNECT)) 1865 if (!(port_status & PORT_CONNECT))
1878 return port_status; 1866 return port_status;
@@ -1885,7 +1873,7 @@ static int check_reset_complete(struct isp1760_hcd *priv, int index,
1885 1873
1886 port_status |= PORT_OWNER; 1874 port_status |= PORT_OWNER;
1887 port_status &= ~PORT_RWC_BITS; 1875 port_status &= ~PORT_RWC_BITS;
1888 isp1760_writel(port_status, status_reg); 1876 reg_write32(hcd->regs, HC_PORTSC1, port_status);
1889 1877
1890 } else 1878 } else
1891 printk(KERN_ERR "port %d high speed\n", index + 1); 1879 printk(KERN_ERR "port %d high speed\n", index + 1);
@@ -1898,7 +1886,6 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1898{ 1886{
1899 struct isp1760_hcd *priv = hcd_to_priv(hcd); 1887 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1900 int ports = HCS_N_PORTS(priv->hcs_params); 1888 int ports = HCS_N_PORTS(priv->hcs_params);
1901 u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
1902 u32 temp, status; 1889 u32 temp, status;
1903 unsigned long flags; 1890 unsigned long flags;
1904 int retval = 0; 1891 int retval = 0;
@@ -1927,7 +1914,7 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1927 if (!wIndex || wIndex > ports) 1914 if (!wIndex || wIndex > ports)
1928 goto error; 1915 goto error;
1929 wIndex--; 1916 wIndex--;
1930 temp = isp1760_readl(status_reg); 1917 temp = reg_read32(hcd->regs, HC_PORTSC1);
1931 1918
1932 /* 1919 /*
1933 * Even if OWNER is set, so the port is owned by the 1920 * Even if OWNER is set, so the port is owned by the
@@ -1938,7 +1925,7 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1938 1925
1939 switch (wValue) { 1926 switch (wValue) {
1940 case USB_PORT_FEAT_ENABLE: 1927 case USB_PORT_FEAT_ENABLE:
1941 isp1760_writel(temp & ~PORT_PE, status_reg); 1928 reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_PE);
1942 break; 1929 break;
1943 case USB_PORT_FEAT_C_ENABLE: 1930 case USB_PORT_FEAT_C_ENABLE:
1944 /* XXX error? */ 1931 /* XXX error? */
@@ -1952,8 +1939,8 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1952 goto error; 1939 goto error;
1953 /* resume signaling for 20 msec */ 1940 /* resume signaling for 20 msec */
1954 temp &= ~(PORT_RWC_BITS); 1941 temp &= ~(PORT_RWC_BITS);
1955 isp1760_writel(temp | PORT_RESUME, 1942 reg_write32(hcd->regs, HC_PORTSC1,
1956 status_reg); 1943 temp | PORT_RESUME);
1957 priv->reset_done = jiffies + 1944 priv->reset_done = jiffies +
1958 msecs_to_jiffies(20); 1945 msecs_to_jiffies(20);
1959 } 1946 }
@@ -1963,11 +1950,11 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1963 break; 1950 break;
1964 case USB_PORT_FEAT_POWER: 1951 case USB_PORT_FEAT_POWER:
1965 if (HCS_PPC(priv->hcs_params)) 1952 if (HCS_PPC(priv->hcs_params))
1966 isp1760_writel(temp & ~PORT_POWER, status_reg); 1953 reg_write32(hcd->regs, HC_PORTSC1,
1954 temp & ~PORT_POWER);
1967 break; 1955 break;
1968 case USB_PORT_FEAT_C_CONNECTION: 1956 case USB_PORT_FEAT_C_CONNECTION:
1969 isp1760_writel(temp | PORT_CSC, 1957 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_CSC);
1970 status_reg);
1971 break; 1958 break;
1972 case USB_PORT_FEAT_C_OVER_CURRENT: 1959 case USB_PORT_FEAT_C_OVER_CURRENT:
1973 /* XXX error ?*/ 1960 /* XXX error ?*/
@@ -1978,7 +1965,7 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1978 default: 1965 default:
1979 goto error; 1966 goto error;
1980 } 1967 }
1981 isp1760_readl(hcd->regs + HC_USBCMD); 1968 reg_read32(hcd->regs, HC_USBCMD);
1982 break; 1969 break;
1983 case GetHubDescriptor: 1970 case GetHubDescriptor:
1984 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *) 1971 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
@@ -1993,7 +1980,7 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1993 goto error; 1980 goto error;
1994 wIndex--; 1981 wIndex--;
1995 status = 0; 1982 status = 0;
1996 temp = isp1760_readl(status_reg); 1983 temp = reg_read32(hcd->regs, HC_PORTSC1);
1997 1984
1998 /* wPortChange bits */ 1985 /* wPortChange bits */
1999 if (temp & PORT_CSC) 1986 if (temp & PORT_CSC)
@@ -2021,11 +2008,10 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2021 priv->reset_done = 0; 2008 priv->reset_done = 0;
2022 2009
2023 /* stop resume signaling */ 2010 /* stop resume signaling */
2024 temp = isp1760_readl(status_reg); 2011 temp = reg_read32(hcd->regs, HC_PORTSC1);
2025 isp1760_writel( 2012 reg_write32(hcd->regs, HC_PORTSC1,
2026 temp & ~(PORT_RWC_BITS | PORT_RESUME), 2013 temp & ~(PORT_RWC_BITS | PORT_RESUME));
2027 status_reg); 2014 retval = handshake(hcd, HC_PORTSC1,
2028 retval = handshake(priv, status_reg,
2029 PORT_RESUME, 0, 2000 /* 2msec */); 2015 PORT_RESUME, 0, 2000 /* 2msec */);
2030 if (retval != 0) { 2016 if (retval != 0) {
2031 isp1760_err(priv, 2017 isp1760_err(priv,
@@ -2045,12 +2031,11 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2045 priv->reset_done = 0; 2031 priv->reset_done = 0;
2046 2032
2047 /* force reset to complete */ 2033 /* force reset to complete */
2048 isp1760_writel(temp & ~PORT_RESET, 2034 reg_write32(hcd->regs, HC_PORTSC1, temp & ~PORT_RESET);
2049 status_reg);
2050 /* REVISIT: some hardware needs 550+ usec to clear 2035 /* REVISIT: some hardware needs 550+ usec to clear
2051 * this bit; seems too long to spin routinely... 2036 * this bit; seems too long to spin routinely...
2052 */ 2037 */
2053 retval = handshake(priv, status_reg, 2038 retval = handshake(hcd, HC_PORTSC1,
2054 PORT_RESET, 0, 750); 2039 PORT_RESET, 0, 750);
2055 if (retval != 0) { 2040 if (retval != 0) {
2056 isp1760_err(priv, "port %d reset error %d\n", 2041 isp1760_err(priv, "port %d reset error %d\n",
@@ -2059,8 +2044,8 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2059 } 2044 }
2060 2045
2061 /* see what we found out */ 2046 /* see what we found out */
2062 temp = check_reset_complete(priv, wIndex, status_reg, 2047 temp = check_reset_complete(hcd, wIndex,
2063 isp1760_readl(status_reg)); 2048 reg_read32(hcd->regs, HC_PORTSC1));
2064 } 2049 }
2065 /* 2050 /*
2066 * Even if OWNER is set, there's no harm letting khubd 2051 * Even if OWNER is set, there's no harm letting khubd
@@ -2103,14 +2088,14 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2103 if (!wIndex || wIndex > ports) 2088 if (!wIndex || wIndex > ports)
2104 goto error; 2089 goto error;
2105 wIndex--; 2090 wIndex--;
2106 temp = isp1760_readl(status_reg); 2091 temp = reg_read32(hcd->regs, HC_PORTSC1);
2107 if (temp & PORT_OWNER) 2092 if (temp & PORT_OWNER)
2108 break; 2093 break;
2109 2094
2110/* temp &= ~PORT_RWC_BITS; */ 2095/* temp &= ~PORT_RWC_BITS; */
2111 switch (wValue) { 2096 switch (wValue) {
2112 case USB_PORT_FEAT_ENABLE: 2097 case USB_PORT_FEAT_ENABLE:
2113 isp1760_writel(temp | PORT_PE, status_reg); 2098 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_PE);
2114 break; 2099 break;
2115 2100
2116 case USB_PORT_FEAT_SUSPEND: 2101 case USB_PORT_FEAT_SUSPEND:
@@ -2118,12 +2103,12 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2118 || (temp & PORT_RESET) != 0) 2103 || (temp & PORT_RESET) != 0)
2119 goto error; 2104 goto error;
2120 2105
2121 isp1760_writel(temp | PORT_SUSPEND, status_reg); 2106 reg_write32(hcd->regs, HC_PORTSC1, temp | PORT_SUSPEND);
2122 break; 2107 break;
2123 case USB_PORT_FEAT_POWER: 2108 case USB_PORT_FEAT_POWER:
2124 if (HCS_PPC(priv->hcs_params)) 2109 if (HCS_PPC(priv->hcs_params))
2125 isp1760_writel(temp | PORT_POWER, 2110 reg_write32(hcd->regs, HC_PORTSC1,
2126 status_reg); 2111 temp | PORT_POWER);
2127 break; 2112 break;
2128 case USB_PORT_FEAT_RESET: 2113 case USB_PORT_FEAT_RESET:
2129 if (temp & PORT_RESUME) 2114 if (temp & PORT_RESUME)
@@ -2146,12 +2131,12 @@ static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
2146 priv->reset_done = jiffies + 2131 priv->reset_done = jiffies +
2147 msecs_to_jiffies(50); 2132 msecs_to_jiffies(50);
2148 } 2133 }
2149 isp1760_writel(temp, status_reg); 2134 reg_write32(hcd->regs, HC_PORTSC1, temp);
2150 break; 2135 break;
2151 default: 2136 default:
2152 goto error; 2137 goto error;
2153 } 2138 }
2154 isp1760_readl(hcd->regs + HC_USBCMD); 2139 reg_read32(hcd->regs, HC_USBCMD);
2155 break; 2140 break;
2156 2141
2157 default: 2142 default:
@@ -2213,7 +2198,7 @@ static int isp1760_get_frame(struct usb_hcd *hcd)
2213 struct isp1760_hcd *priv = hcd_to_priv(hcd); 2198 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2214 u32 fr; 2199 u32 fr;
2215 2200
2216 fr = isp1760_readl(hcd->regs + HC_FRINDEX); 2201 fr = reg_read32(hcd->regs, HC_FRINDEX);
2217 return (fr >> 3) % priv->periodic_size; 2202 return (fr >> 3) % priv->periodic_size;
2218} 2203}
2219 2204
@@ -2229,11 +2214,11 @@ static void isp1760_stop(struct usb_hcd *hcd)
2229 spin_lock_irq(&priv->lock); 2214 spin_lock_irq(&priv->lock);
2230 ehci_reset(priv); 2215 ehci_reset(priv);
2231 /* Disable IRQ */ 2216 /* Disable IRQ */
2232 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL); 2217 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2233 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL); 2218 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2234 spin_unlock_irq(&priv->lock); 2219 spin_unlock_irq(&priv->lock);
2235 2220
2236 isp1760_writel(0, hcd->regs + HC_CONFIGFLAG); 2221 reg_write32(hcd->regs, HC_CONFIGFLAG, 0);
2237} 2222}
2238 2223
2239static void isp1760_shutdown(struct usb_hcd *hcd) 2224static void isp1760_shutdown(struct usb_hcd *hcd)
@@ -2241,12 +2226,12 @@ static void isp1760_shutdown(struct usb_hcd *hcd)
2241 u32 command, temp; 2226 u32 command, temp;
2242 2227
2243 isp1760_stop(hcd); 2228 isp1760_stop(hcd);
2244 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL); 2229 temp = reg_read32(hcd->regs, HC_HW_MODE_CTRL);
2245 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL); 2230 reg_write32(hcd->regs, HC_HW_MODE_CTRL, temp &= ~HW_GLOBAL_INTR_EN);
2246 2231
2247 command = isp1760_readl(hcd->regs + HC_USBCMD); 2232 command = reg_read32(hcd->regs, HC_USBCMD);
2248 command &= ~CMD_RUN; 2233 command &= ~CMD_RUN;
2249 isp1760_writel(command, hcd->regs + HC_USBCMD); 2234 reg_write32(hcd->regs, HC_USBCMD, command);
2250} 2235}
2251 2236
2252static const struct hc_driver isp1760_hc_driver = { 2237static const struct hc_driver isp1760_hc_driver = {
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
index 612bce5dce03..c01c59171bc7 100644
--- a/drivers/usb/host/isp1760-hcd.h
+++ b/drivers/usb/host/isp1760-hcd.h
@@ -84,30 +84,27 @@ void deinit_kmem_cache(void);
84#define HC_INT_IRQ_MASK_AND_REG 0x328 84#define HC_INT_IRQ_MASK_AND_REG 0x328
85#define HC_ATL_IRQ_MASK_AND_REG 0x32C 85#define HC_ATL_IRQ_MASK_AND_REG 0x32C
86 86
87/* Register sets */
88#define HC_BEGIN_OF_ATL 0x0c00
89#define HC_BEGIN_OF_INT 0x0800
90#define HC_BEGIN_OF_ISO 0x0400
91#define HC_BEGIN_OF_PAYLOAD 0x1000
92
93/* urb state*/ 87/* urb state*/
94#define DELETE_URB (0x0008) 88#define DELETE_URB (0x0008)
95#define NO_TRANSFER_ACTIVE (0xffffffff) 89#define NO_TRANSFER_ACTIVE (0xffffffff)
96 90
97#define ATL_REGS_OFFSET (0xc00) 91/* Philips Proprietary Transfer Descriptor (PTD) */
98#define INT_REGS_OFFSET (0x800) 92typedef __u32 __bitwise __dw;
99
100/* Philips Transfer Descriptor (PTD) */
101struct ptd { 93struct ptd {
102 __le32 dw0; 94 __dw dw0;
103 __le32 dw1; 95 __dw dw1;
104 __le32 dw2; 96 __dw dw2;
105 __le32 dw3; 97 __dw dw3;
106 __le32 dw4; 98 __dw dw4;
107 __le32 dw5; 99 __dw dw5;
108 __le32 dw6; 100 __dw dw6;
109 __le32 dw7; 101 __dw dw7;
110}; 102};
103#define PTD_OFFSET 0x0400
104#define ISO_PTD_OFFSET 0x0400
105#define INT_PTD_OFFSET 0x0800
106#define ATL_PTD_OFFSET 0x0c00
107#define PAYLOAD_OFFSET 0x1000
111 108
112struct inter_packet_info { 109struct inter_packet_info {
113 void *data_buffer; 110 void *data_buffer;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 14:52:10 -0500