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authorAnand Gadiyar <gadiyar@ti.com>2010-11-21 12:53:41 -0500
committerAnand Gadiyar <gadiyar@ti.com>2010-11-30 16:04:53 -0500
commita42ccdc14de388a35ad0e8057543369351395eb9 (patch)
tree069de670eb0b2ea524a4b7ccbe4128a9009ec42d /drivers/usb/host
parentc5dff5545c97ab33bdb2a529a2375966ceb0700c (diff)
usb: ehci-omap: add helpers for checking port mode
Introduce helper functions to test port mode. These checks are performed in several places in the driver, and these helpers improve readability. Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Diffstat (limited to 'drivers/usb/host')
-rw-r--r--drivers/usb/host/ehci-omap.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 7a4682c4ff67..dd9d5c1d9a8f 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -127,6 +127,9 @@
127#define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT 8 127#define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT 8
128#define EHCI_INSNREG05_ULPI_WRDATA_SHIFT 0 128#define EHCI_INSNREG05_ULPI_WRDATA_SHIFT 0
129 129
130#define is_ehci_phy_mode(x) (x == EHCI_HCD_OMAP_MODE_PHY)
131#define is_ehci_tll_mode(x) (x == EHCI_HCD_OMAP_MODE_TLL)
132
130/*-------------------------------------------------------------------------*/ 133/*-------------------------------------------------------------------------*/
131 134
132static inline void ehci_omap_writel(void __iomem *base, u32 reg, u32 val) 135static inline void ehci_omap_writel(void __iomem *base, u32 reg, u32 val)
@@ -387,27 +390,27 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
387 /* Bypass the TLL module for PHY mode operation */ 390 /* Bypass the TLL module for PHY mode operation */
388 if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) { 391 if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) {
389 dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n"); 392 dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n");
390 if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) || 393 if (is_ehci_phy_mode(omap->port_mode[0]) ||
391 (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) || 394 is_ehci_phy_mode(omap->port_mode[1]) ||
392 (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) 395 is_ehci_phy_mode(omap->port_mode[2]))
393 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 396 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
394 else 397 else
395 reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; 398 reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
396 } else { 399 } else {
397 dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n"); 400 dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n");
398 if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) 401 if (is_ehci_phy_mode(omap->port_mode[0]))
399 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 402 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
400 else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) 403 else if (is_ehci_tll_mode(omap->port_mode[0]))
401 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; 404 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
402 405
403 if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) 406 if (is_ehci_phy_mode(omap->port_mode[1]))
404 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; 407 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
405 else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) 408 else if (is_ehci_tll_mode(omap->port_mode[1]))
406 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; 409 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
407 410
408 if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY) 411 if (is_ehci_phy_mode(omap->port_mode[2]))
409 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; 412 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
410 else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL) 413 else if (is_ehci_tll_mode(omap->port_mode[2]))
411 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; 414 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
412 415
413 } 416 }