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authorSarah Sharp <sarah.a.sharp@linux.intel.com>2010-11-23 13:42:22 -0500
committerSarah Sharp <sarah.a.sharp@linux.intel.com>2011-03-13 21:23:42 -0400
commitd30b2a208108a0b0fdeae7006b8824d9be16ca96 (patch)
tree43df86628f31b4ad46d82258c8d8a1a8e88ae625 /drivers/usb/host/xhci-mem.c
parent4bbb0ace9a3de8392527e3c87926309d541d3b00 (diff)
xhci: Limit roothub ports to 15 USB3 & 31 USB2 ports.
The USB core allocates a USB 2.0 roothub descriptor that has room for 31 (USB_MAXCHILDREN) ports' worth of DeviceRemovable and PortPwrCtrlMask fields. Limit the number of USB 2.0 roothub ports accordingly. I don't expect to run into this limitation ever, but this prevents a buffer overflow issue in the roothub descriptor filling code. Similarly, a USB 3.0 hub can only have 15 downstream ports, so limit the USB 3.0 roothub to 15 USB 3.0 ports. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers/usb/host/xhci-mem.c')
-rw-r--r--drivers/usb/host/xhci-mem.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 180a2abbc868..71fd8bd287fe 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1803,6 +1803,20 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1803 } 1803 }
1804 xhci_dbg(xhci, "Found %u USB 2.0 ports and %u USB 3.0 ports.\n", 1804 xhci_dbg(xhci, "Found %u USB 2.0 ports and %u USB 3.0 ports.\n",
1805 xhci->num_usb2_ports, xhci->num_usb3_ports); 1805 xhci->num_usb2_ports, xhci->num_usb3_ports);
1806
1807 /* Place limits on the number of roothub ports so that the hub
1808 * descriptors aren't longer than the USB core will allocate.
1809 */
1810 if (xhci->num_usb3_ports > 15) {
1811 xhci_dbg(xhci, "Limiting USB 3.0 roothub ports to 15.\n");
1812 xhci->num_usb3_ports = 15;
1813 }
1814 if (xhci->num_usb2_ports > USB_MAXCHILDREN) {
1815 xhci_dbg(xhci, "Limiting USB 2.0 roothub ports to %u.\n",
1816 USB_MAXCHILDREN);
1817 xhci->num_usb2_ports = USB_MAXCHILDREN;
1818 }
1819
1806 /* 1820 /*
1807 * Note we could have all USB 3.0 ports, or all USB 2.0 ports. 1821 * Note we could have all USB 3.0 ports, or all USB 2.0 ports.
1808 * Not sure how the USB core will handle a hub with no ports... 1822 * Not sure how the USB core will handle a hub with no ports...
@@ -1827,6 +1841,8 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1827 "addr = %p\n", i, 1841 "addr = %p\n", i,
1828 xhci->usb2_ports[port_index]); 1842 xhci->usb2_ports[port_index]);
1829 port_index++; 1843 port_index++;
1844 if (port_index == xhci->num_usb2_ports)
1845 break;
1830 } 1846 }
1831 } 1847 }
1832 if (xhci->num_usb3_ports) { 1848 if (xhci->num_usb3_ports) {
@@ -1845,6 +1861,8 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1845 "addr = %p\n", i, 1861 "addr = %p\n", i,
1846 xhci->usb3_ports[port_index]); 1862 xhci->usb3_ports[port_index]);
1847 port_index++; 1863 port_index++;
1864 if (port_index == xhci->num_usb3_ports)
1865 break;
1848 } 1866 }
1849 } 1867 }
1850 return 0; 1868 return 0;