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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/usb/host/xhci-mem.c
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'drivers/usb/host/xhci-mem.c')
-rw-r--r--drivers/usb/host/xhci-mem.c517
1 files changed, 407 insertions, 110 deletions
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 4e51343ddffc..fcb7f7efc86d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -89,16 +89,17 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
89 return; 89 return;
90 prev->next = next; 90 prev->next = next;
91 if (link_trbs) { 91 if (link_trbs) {
92 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma; 92 prev->trbs[TRBS_PER_SEGMENT-1].link.
93 segment_ptr = cpu_to_le64(next->dma);
93 94
94 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ 95 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
95 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control; 96 val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);
96 val &= ~TRB_TYPE_BITMASK; 97 val &= ~TRB_TYPE_BITMASK;
97 val |= TRB_TYPE(TRB_LINK); 98 val |= TRB_TYPE(TRB_LINK);
98 /* Always set the chain bit with 0.95 hardware */ 99 /* Always set the chain bit with 0.95 hardware */
99 if (xhci_link_trb_quirk(xhci)) 100 if (xhci_link_trb_quirk(xhci))
100 val |= TRB_CHAIN; 101 val |= TRB_CHAIN;
101 prev->trbs[TRBS_PER_SEGMENT-1].link.control = val; 102 prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
102 } 103 }
103 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n", 104 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
104 (unsigned long long)prev->dma, 105 (unsigned long long)prev->dma,
@@ -186,7 +187,8 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
186 187
187 if (link_trbs) { 188 if (link_trbs) {
188 /* See section 4.9.2.1 and 6.4.4.1 */ 189 /* See section 4.9.2.1 and 6.4.4.1 */
189 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE); 190 prev->trbs[TRBS_PER_SEGMENT-1].link.
191 control |= cpu_to_le32(LINK_TOGGLE);
190 xhci_dbg(xhci, "Wrote link toggle flag to" 192 xhci_dbg(xhci, "Wrote link toggle flag to"
191 " segment %p (virtual), 0x%llx (DMA)\n", 193 " segment %p (virtual), 0x%llx (DMA)\n",
192 prev, (unsigned long long)prev->dma); 194 prev, (unsigned long long)prev->dma);
@@ -207,14 +209,13 @@ void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci,
207 209
208 rings_cached = virt_dev->num_rings_cached; 210 rings_cached = virt_dev->num_rings_cached;
209 if (rings_cached < XHCI_MAX_RINGS_CACHED) { 211 if (rings_cached < XHCI_MAX_RINGS_CACHED) {
210 virt_dev->num_rings_cached++;
211 rings_cached = virt_dev->num_rings_cached;
212 virt_dev->ring_cache[rings_cached] = 212 virt_dev->ring_cache[rings_cached] =
213 virt_dev->eps[ep_index].ring; 213 virt_dev->eps[ep_index].ring;
214 virt_dev->num_rings_cached++;
214 xhci_dbg(xhci, "Cached old ring, " 215 xhci_dbg(xhci, "Cached old ring, "
215 "%d ring%s cached\n", 216 "%d ring%s cached\n",
216 rings_cached, 217 virt_dev->num_rings_cached,
217 (rings_cached > 1) ? "s" : ""); 218 (virt_dev->num_rings_cached > 1) ? "s" : "");
218 } else { 219 } else {
219 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring); 220 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
220 xhci_dbg(xhci, "Ring cache full (%d rings), " 221 xhci_dbg(xhci, "Ring cache full (%d rings), "
@@ -307,7 +308,7 @@ struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
307 308
308/***************** Streams structures manipulation *************************/ 309/***************** Streams structures manipulation *************************/
309 310
310void xhci_free_stream_ctx(struct xhci_hcd *xhci, 311static void xhci_free_stream_ctx(struct xhci_hcd *xhci,
311 unsigned int num_stream_ctxs, 312 unsigned int num_stream_ctxs,
312 struct xhci_stream_ctx *stream_ctx, dma_addr_t dma) 313 struct xhci_stream_ctx *stream_ctx, dma_addr_t dma)
313{ 314{
@@ -335,7 +336,7 @@ void xhci_free_stream_ctx(struct xhci_hcd *xhci,
335 * The stream context array must be a power of 2, and can be as small as 336 * The stream context array must be a power of 2, and can be as small as
336 * 64 bytes or as large as 1MB. 337 * 64 bytes or as large as 1MB.
337 */ 338 */
338struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci, 339static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci,
339 unsigned int num_stream_ctxs, dma_addr_t *dma, 340 unsigned int num_stream_ctxs, dma_addr_t *dma,
340 gfp_t mem_flags) 341 gfp_t mem_flags)
341{ 342{
@@ -548,7 +549,8 @@ struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci,
548 addr = cur_ring->first_seg->dma | 549 addr = cur_ring->first_seg->dma |
549 SCT_FOR_CTX(SCT_PRI_TR) | 550 SCT_FOR_CTX(SCT_PRI_TR) |
550 cur_ring->cycle_state; 551 cur_ring->cycle_state;
551 stream_info->stream_ctx_array[cur_stream].stream_ring = addr; 552 stream_info->stream_ctx_array[cur_stream].
553 stream_ring = cpu_to_le64(addr);
552 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", 554 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n",
553 cur_stream, (unsigned long long) addr); 555 cur_stream, (unsigned long long) addr);
554 556
@@ -614,10 +616,10 @@ void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci,
614 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2; 616 max_primary_streams = fls(stream_info->num_stream_ctxs) - 2;
615 xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n", 617 xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n",
616 1 << (max_primary_streams + 1)); 618 1 << (max_primary_streams + 1));
617 ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; 619 ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK);
618 ep_ctx->ep_info |= EP_MAXPSTREAMS(max_primary_streams); 620 ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams)
619 ep_ctx->ep_info |= EP_HAS_LSA; 621 | EP_HAS_LSA);
620 ep_ctx->deq = stream_info->ctx_array_dma; 622 ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma);
621} 623}
622 624
623/* 625/*
@@ -630,10 +632,9 @@ void xhci_setup_no_streams_ep_input_ctx(struct xhci_hcd *xhci,
630 struct xhci_virt_ep *ep) 632 struct xhci_virt_ep *ep)
631{ 633{
632 dma_addr_t addr; 634 dma_addr_t addr;
633 ep_ctx->ep_info &= ~EP_MAXPSTREAMS_MASK; 635 ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA));
634 ep_ctx->ep_info &= ~EP_HAS_LSA;
635 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue); 636 addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue);
636 ep_ctx->deq = addr | ep->ring->cycle_state; 637 ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state);
637} 638}
638 639
639/* Frees all stream contexts associated with the endpoint, 640/* Frees all stream contexts associated with the endpoint,
@@ -778,13 +779,14 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
778 779
779 init_completion(&dev->cmd_completion); 780 init_completion(&dev->cmd_completion);
780 INIT_LIST_HEAD(&dev->cmd_list); 781 INIT_LIST_HEAD(&dev->cmd_list);
782 dev->udev = udev;
781 783
782 /* Point to output device context in dcbaa. */ 784 /* Point to output device context in dcbaa. */
783 xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma; 785 xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma);
784 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", 786 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
785 slot_id, 787 slot_id,
786 &xhci->dcbaa->dev_context_ptrs[slot_id], 788 &xhci->dcbaa->dev_context_ptrs[slot_id],
787 (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]); 789 (unsigned long long) le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id]));
788 790
789 return 1; 791 return 1;
790fail: 792fail:
@@ -809,8 +811,58 @@ void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
809 * configured device has reset, so all control transfers should have 811 * configured device has reset, so all control transfers should have
810 * been completed or cancelled before the reset. 812 * been completed or cancelled before the reset.
811 */ 813 */
812 ep0_ctx->deq = xhci_trb_virt_to_dma(ep_ring->enq_seg, ep_ring->enqueue); 814 ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg,
813 ep0_ctx->deq |= ep_ring->cycle_state; 815 ep_ring->enqueue)
816 | ep_ring->cycle_state);
817}
818
819/*
820 * The xHCI roothub may have ports of differing speeds in any order in the port
821 * status registers. xhci->port_array provides an array of the port speed for
822 * each offset into the port status registers.
823 *
824 * The xHCI hardware wants to know the roothub port number that the USB device
825 * is attached to (or the roothub port its ancestor hub is attached to). All we
826 * know is the index of that port under either the USB 2.0 or the USB 3.0
827 * roothub, but that doesn't give us the real index into the HW port status
828 * registers. Scan through the xHCI roothub port array, looking for the Nth
829 * entry of the correct port speed. Return the port number of that entry.
830 */
831static u32 xhci_find_real_port_number(struct xhci_hcd *xhci,
832 struct usb_device *udev)
833{
834 struct usb_device *top_dev;
835 unsigned int num_similar_speed_ports;
836 unsigned int faked_port_num;
837 int i;
838
839 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
840 top_dev = top_dev->parent)
841 /* Found device below root hub */;
842 faked_port_num = top_dev->portnum;
843 for (i = 0, num_similar_speed_ports = 0;
844 i < HCS_MAX_PORTS(xhci->hcs_params1); i++) {
845 u8 port_speed = xhci->port_array[i];
846
847 /*
848 * Skip ports that don't have known speeds, or have duplicate
849 * Extended Capabilities port speed entries.
850 */
851 if (port_speed == 0 || port_speed == DUPLICATE_ENTRY)
852 continue;
853
854 /*
855 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
856 * 1.1 ports are under the USB 2.0 hub. If the port speed
857 * matches the device speed, it's a similar speed port.
858 */
859 if ((port_speed == 0x03) == (udev->speed == USB_SPEED_SUPER))
860 num_similar_speed_ports++;
861 if (num_similar_speed_ports == faked_port_num)
862 /* Roothub ports are numbered from 1 to N */
863 return i+1;
864 }
865 return 0;
814} 866}
815 867
816/* Setup an xHCI virtual device for a Set Address command */ 868/* Setup an xHCI virtual device for a Set Address command */
@@ -818,9 +870,10 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
818{ 870{
819 struct xhci_virt_device *dev; 871 struct xhci_virt_device *dev;
820 struct xhci_ep_ctx *ep0_ctx; 872 struct xhci_ep_ctx *ep0_ctx;
821 struct usb_device *top_dev;
822 struct xhci_slot_ctx *slot_ctx; 873 struct xhci_slot_ctx *slot_ctx;
823 struct xhci_input_control_ctx *ctrl_ctx; 874 struct xhci_input_control_ctx *ctrl_ctx;
875 u32 port_num;
876 struct usb_device *top_dev;
824 877
825 dev = xhci->devs[udev->slot_id]; 878 dev = xhci->devs[udev->slot_id];
826 /* Slot ID 0 is reserved */ 879 /* Slot ID 0 is reserved */
@@ -834,24 +887,22 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
834 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); 887 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
835 888
836 /* 2) New slot context and endpoint 0 context are valid*/ 889 /* 2) New slot context and endpoint 0 context are valid*/
837 ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG; 890 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
838 891
839 /* 3) Only the control endpoint is valid - one endpoint context */ 892 /* 3) Only the control endpoint is valid - one endpoint context */
840 slot_ctx->dev_info |= LAST_CTX(1); 893 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | (u32) udev->route);
841
842 slot_ctx->dev_info |= (u32) udev->route;
843 switch (udev->speed) { 894 switch (udev->speed) {
844 case USB_SPEED_SUPER: 895 case USB_SPEED_SUPER:
845 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS; 896 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_SS);
846 break; 897 break;
847 case USB_SPEED_HIGH: 898 case USB_SPEED_HIGH:
848 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS; 899 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_HS);
849 break; 900 break;
850 case USB_SPEED_FULL: 901 case USB_SPEED_FULL:
851 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS; 902 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_FS);
852 break; 903 break;
853 case USB_SPEED_LOW: 904 case USB_SPEED_LOW:
854 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS; 905 slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_LS);
855 break; 906 break;
856 case USB_SPEED_WIRELESS: 907 case USB_SPEED_WIRELESS:
857 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); 908 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
@@ -862,40 +913,45 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
862 BUG(); 913 BUG();
863 } 914 }
864 /* Find the root hub port this device is under */ 915 /* Find the root hub port this device is under */
916 port_num = xhci_find_real_port_number(xhci, udev);
917 if (!port_num)
918 return -EINVAL;
919 slot_ctx->dev_info2 |= cpu_to_le32((u32) ROOT_HUB_PORT(port_num));
920 /* Set the port number in the virtual_device to the faked port number */
865 for (top_dev = udev; top_dev->parent && top_dev->parent->parent; 921 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
866 top_dev = top_dev->parent) 922 top_dev = top_dev->parent)
867 /* Found device below root hub */; 923 /* Found device below root hub */;
868 slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum); 924 dev->port = top_dev->portnum;
869 xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum); 925 xhci_dbg(xhci, "Set root hub portnum to %d\n", port_num);
870 926 xhci_dbg(xhci, "Set fake root hub portnum to %d\n", dev->port);
871 /* Is this a LS/FS device under a HS hub? */ 927
872 if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) && 928 /* Is this a LS/FS device under an external HS hub? */
873 udev->tt) { 929 if (udev->tt && udev->tt->hub->parent) {
874 slot_ctx->tt_info = udev->tt->hub->slot_id; 930 slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id |
875 slot_ctx->tt_info |= udev->ttport << 8; 931 (udev->ttport << 8));
876 if (udev->tt->multi) 932 if (udev->tt->multi)
877 slot_ctx->dev_info |= DEV_MTT; 933 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
878 } 934 }
879 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); 935 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
880 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); 936 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
881 937
882 /* Step 4 - ring already allocated */ 938 /* Step 4 - ring already allocated */
883 /* Step 5 */ 939 /* Step 5 */
884 ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP); 940 ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP));
885 /* 941 /*
886 * XXX: Not sure about wireless USB devices. 942 * XXX: Not sure about wireless USB devices.
887 */ 943 */
888 switch (udev->speed) { 944 switch (udev->speed) {
889 case USB_SPEED_SUPER: 945 case USB_SPEED_SUPER:
890 ep0_ctx->ep_info2 |= MAX_PACKET(512); 946 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(512));
891 break; 947 break;
892 case USB_SPEED_HIGH: 948 case USB_SPEED_HIGH:
893 /* USB core guesses at a 64-byte max packet first for FS devices */ 949 /* USB core guesses at a 64-byte max packet first for FS devices */
894 case USB_SPEED_FULL: 950 case USB_SPEED_FULL:
895 ep0_ctx->ep_info2 |= MAX_PACKET(64); 951 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(64));
896 break; 952 break;
897 case USB_SPEED_LOW: 953 case USB_SPEED_LOW:
898 ep0_ctx->ep_info2 |= MAX_PACKET(8); 954 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(8));
899 break; 955 break;
900 case USB_SPEED_WIRELESS: 956 case USB_SPEED_WIRELESS:
901 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); 957 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
@@ -906,18 +962,67 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
906 BUG(); 962 BUG();
907 } 963 }
908 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */ 964 /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
909 ep0_ctx->ep_info2 |= MAX_BURST(0); 965 ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3));
910 ep0_ctx->ep_info2 |= ERROR_COUNT(3);
911 966
912 ep0_ctx->deq = 967 ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
913 dev->eps[0].ring->first_seg->dma; 968 dev->eps[0].ring->cycle_state);
914 ep0_ctx->deq |= dev->eps[0].ring->cycle_state;
915 969
916 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ 970 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
917 971
918 return 0; 972 return 0;
919} 973}
920 974
975/*
976 * Convert interval expressed as 2^(bInterval - 1) == interval into
977 * straight exponent value 2^n == interval.
978 *
979 */
980static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
981 struct usb_host_endpoint *ep)
982{
983 unsigned int interval;
984
985 interval = clamp_val(ep->desc.bInterval, 1, 16) - 1;
986 if (interval != ep->desc.bInterval - 1)
987 dev_warn(&udev->dev,
988 "ep %#x - rounding interval to %d %sframes\n",
989 ep->desc.bEndpointAddress,
990 1 << interval,
991 udev->speed == USB_SPEED_FULL ? "" : "micro");
992
993 if (udev->speed == USB_SPEED_FULL) {
994 /*
995 * Full speed isoc endpoints specify interval in frames,
996 * not microframes. We are using microframes everywhere,
997 * so adjust accordingly.
998 */
999 interval += 3; /* 1 frame = 2^3 uframes */
1000 }
1001
1002 return interval;
1003}
1004
1005/*
1006 * Convert bInterval expressed in frames (in 1-255 range) to exponent of
1007 * microframes, rounded down to nearest power of 2.
1008 */
1009static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
1010 struct usb_host_endpoint *ep)
1011{
1012 unsigned int interval;
1013
1014 interval = fls(8 * ep->desc.bInterval) - 1;
1015 interval = clamp_val(interval, 3, 10);
1016 if ((1 << interval) != 8 * ep->desc.bInterval)
1017 dev_warn(&udev->dev,
1018 "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n",
1019 ep->desc.bEndpointAddress,
1020 1 << interval,
1021 8 * ep->desc.bInterval);
1022
1023 return interval;
1024}
1025
921/* Return the polling or NAK interval. 1026/* Return the polling or NAK interval.
922 * 1027 *
923 * The polling interval is expressed in "microframes". If xHCI's Interval field 1028 * The polling interval is expressed in "microframes". If xHCI's Interval field
@@ -926,7 +1031,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
926 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval 1031 * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
927 * is set to 0. 1032 * is set to 0.
928 */ 1033 */
929static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev, 1034static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
930 struct usb_host_endpoint *ep) 1035 struct usb_host_endpoint *ep)
931{ 1036{
932 unsigned int interval = 0; 1037 unsigned int interval = 0;
@@ -935,45 +1040,38 @@ static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
935 case USB_SPEED_HIGH: 1040 case USB_SPEED_HIGH:
936 /* Max NAK rate */ 1041 /* Max NAK rate */
937 if (usb_endpoint_xfer_control(&ep->desc) || 1042 if (usb_endpoint_xfer_control(&ep->desc) ||
938 usb_endpoint_xfer_bulk(&ep->desc)) 1043 usb_endpoint_xfer_bulk(&ep->desc)) {
939 interval = ep->desc.bInterval; 1044 interval = ep->desc.bInterval;
1045 break;
1046 }
940 /* Fall through - SS and HS isoc/int have same decoding */ 1047 /* Fall through - SS and HS isoc/int have same decoding */
1048
941 case USB_SPEED_SUPER: 1049 case USB_SPEED_SUPER:
942 if (usb_endpoint_xfer_int(&ep->desc) || 1050 if (usb_endpoint_xfer_int(&ep->desc) ||
943 usb_endpoint_xfer_isoc(&ep->desc)) { 1051 usb_endpoint_xfer_isoc(&ep->desc)) {
944 if (ep->desc.bInterval == 0) 1052 interval = xhci_parse_exponent_interval(udev, ep);
945 interval = 0;
946 else
947 interval = ep->desc.bInterval - 1;
948 if (interval > 15)
949 interval = 15;
950 if (interval != ep->desc.bInterval + 1)
951 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
952 ep->desc.bEndpointAddress, 1 << interval);
953 } 1053 }
954 break; 1054 break;
955 /* Convert bInterval (in 1-255 frames) to microframes and round down to 1055
956 * nearest power of 2.
957 */
958 case USB_SPEED_FULL: 1056 case USB_SPEED_FULL:
1057 if (usb_endpoint_xfer_isoc(&ep->desc)) {
1058 interval = xhci_parse_exponent_interval(udev, ep);
1059 break;
1060 }
1061 /*
1062 * Fall through for interrupt endpoint interval decoding
1063 * since it uses the same rules as low speed interrupt
1064 * endpoints.
1065 */
1066
959 case USB_SPEED_LOW: 1067 case USB_SPEED_LOW:
960 if (usb_endpoint_xfer_int(&ep->desc) || 1068 if (usb_endpoint_xfer_int(&ep->desc) ||
961 usb_endpoint_xfer_isoc(&ep->desc)) { 1069 usb_endpoint_xfer_isoc(&ep->desc)) {
962 interval = fls(8*ep->desc.bInterval) - 1; 1070
963 if (interval > 10) 1071 interval = xhci_parse_frame_interval(udev, ep);
964 interval = 10;
965 if (interval < 3)
966 interval = 3;
967 if ((1 << interval) != 8*ep->desc.bInterval)
968 dev_warn(&udev->dev,
969 "ep %#x - rounding interval"
970 " to %d microframes, "
971 "ep desc says %d microframes\n",
972 ep->desc.bEndpointAddress,
973 1 << interval,
974 8*ep->desc.bInterval);
975 } 1072 }
976 break; 1073 break;
1074
977 default: 1075 default:
978 BUG(); 1076 BUG();
979 } 1077 }
@@ -985,7 +1083,7 @@ static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
985 * transaction opportunities per microframe", but that goes in the Max Burst 1083 * transaction opportunities per microframe", but that goes in the Max Burst
986 * endpoint context field. 1084 * endpoint context field.
987 */ 1085 */
988static inline u32 xhci_get_endpoint_mult(struct usb_device *udev, 1086static u32 xhci_get_endpoint_mult(struct usb_device *udev,
989 struct usb_host_endpoint *ep) 1087 struct usb_host_endpoint *ep)
990{ 1088{
991 if (udev->speed != USB_SPEED_SUPER || 1089 if (udev->speed != USB_SPEED_SUPER ||
@@ -994,7 +1092,7 @@ static inline u32 xhci_get_endpoint_mult(struct usb_device *udev,
994 return ep->ss_ep_comp.bmAttributes; 1092 return ep->ss_ep_comp.bmAttributes;
995} 1093}
996 1094
997static inline u32 xhci_get_endpoint_type(struct usb_device *udev, 1095static u32 xhci_get_endpoint_type(struct usb_device *udev,
998 struct usb_host_endpoint *ep) 1096 struct usb_host_endpoint *ep)
999{ 1097{
1000 int in; 1098 int in;
@@ -1028,7 +1126,7 @@ static inline u32 xhci_get_endpoint_type(struct usb_device *udev,
1028 * Basically, this is the maxpacket size, multiplied by the burst size 1126 * Basically, this is the maxpacket size, multiplied by the burst size
1029 * and mult size. 1127 * and mult size.
1030 */ 1128 */
1031static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci, 1129static u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
1032 struct usb_device *udev, 1130 struct usb_device *udev,
1033 struct usb_host_endpoint *ep) 1131 struct usb_host_endpoint *ep)
1034{ 1132{
@@ -1041,10 +1139,10 @@ static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
1041 return 0; 1139 return 0;
1042 1140
1043 if (udev->speed == USB_SPEED_SUPER) 1141 if (udev->speed == USB_SPEED_SUPER)
1044 return ep->ss_ep_comp.wBytesPerInterval; 1142 return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1045 1143
1046 max_packet = ep->desc.wMaxPacketSize & 0x3ff; 1144 max_packet = GET_MAX_PACKET(le16_to_cpu(ep->desc.wMaxPacketSize));
1047 max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; 1145 max_burst = (le16_to_cpu(ep->desc.wMaxPacketSize) & 0x1800) >> 11;
1048 /* A 0 in max burst means 1 transfer per ESIT */ 1146 /* A 0 in max burst means 1 transfer per ESIT */
1049 return max_packet * (max_burst + 1); 1147 return max_packet * (max_burst + 1);
1050} 1148}
@@ -1093,33 +1191,31 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1093 } 1191 }
1094 virt_dev->eps[ep_index].skip = false; 1192 virt_dev->eps[ep_index].skip = false;
1095 ep_ring = virt_dev->eps[ep_index].new_ring; 1193 ep_ring = virt_dev->eps[ep_index].new_ring;
1096 ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state; 1194 ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma | ep_ring->cycle_state);
1097 1195
1098 ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep); 1196 ep_ctx->ep_info = cpu_to_le32(xhci_get_endpoint_interval(udev, ep)
1099 ep_ctx->ep_info |= EP_MULT(xhci_get_endpoint_mult(udev, ep)); 1197 | EP_MULT(xhci_get_endpoint_mult(udev, ep)));
1100 1198
1101 /* FIXME dig Mult and streams info out of ep companion desc */ 1199 /* FIXME dig Mult and streams info out of ep companion desc */
1102 1200
1103 /* Allow 3 retries for everything but isoc; 1201 /* Allow 3 retries for everything but isoc;
1104 * error count = 0 means infinite retries. 1202 * CErr shall be set to 0 for Isoch endpoints.
1105 */ 1203 */
1106 if (!usb_endpoint_xfer_isoc(&ep->desc)) 1204 if (!usb_endpoint_xfer_isoc(&ep->desc))
1107 ep_ctx->ep_info2 = ERROR_COUNT(3); 1205 ep_ctx->ep_info2 = cpu_to_le32(ERROR_COUNT(3));
1108 else 1206 else
1109 ep_ctx->ep_info2 = ERROR_COUNT(1); 1207 ep_ctx->ep_info2 = cpu_to_le32(ERROR_COUNT(0));
1110 1208
1111 ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep); 1209 ep_ctx->ep_info2 |= cpu_to_le32(xhci_get_endpoint_type(udev, ep));
1112 1210
1113 /* Set the max packet size and max burst */ 1211 /* Set the max packet size and max burst */
1114 switch (udev->speed) { 1212 switch (udev->speed) {
1115 case USB_SPEED_SUPER: 1213 case USB_SPEED_SUPER:
1116 max_packet = ep->desc.wMaxPacketSize; 1214 max_packet = le16_to_cpu(ep->desc.wMaxPacketSize);
1117 ep_ctx->ep_info2 |= MAX_PACKET(max_packet); 1215 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet));
1118 /* dig out max burst from ep companion desc */ 1216 /* dig out max burst from ep companion desc */
1119 max_packet = ep->ss_ep_comp.bMaxBurst; 1217 max_packet = ep->ss_ep_comp.bMaxBurst;
1120 if (!max_packet) 1218 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_packet));
1121 xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n");
1122 ep_ctx->ep_info2 |= MAX_BURST(max_packet);
1123 break; 1219 break;
1124 case USB_SPEED_HIGH: 1220 case USB_SPEED_HIGH:
1125 /* bits 11:12 specify the number of additional transaction 1221 /* bits 11:12 specify the number of additional transaction
@@ -1127,20 +1223,21 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1127 */ 1223 */
1128 if (usb_endpoint_xfer_isoc(&ep->desc) || 1224 if (usb_endpoint_xfer_isoc(&ep->desc) ||
1129 usb_endpoint_xfer_int(&ep->desc)) { 1225 usb_endpoint_xfer_int(&ep->desc)) {
1130 max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11; 1226 max_burst = (le16_to_cpu(ep->desc.wMaxPacketSize)
1131 ep_ctx->ep_info2 |= MAX_BURST(max_burst); 1227 & 0x1800) >> 11;
1228 ep_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(max_burst));
1132 } 1229 }
1133 /* Fall through */ 1230 /* Fall through */
1134 case USB_SPEED_FULL: 1231 case USB_SPEED_FULL:
1135 case USB_SPEED_LOW: 1232 case USB_SPEED_LOW:
1136 max_packet = ep->desc.wMaxPacketSize & 0x3ff; 1233 max_packet = GET_MAX_PACKET(le16_to_cpu(ep->desc.wMaxPacketSize));
1137 ep_ctx->ep_info2 |= MAX_PACKET(max_packet); 1234 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet));
1138 break; 1235 break;
1139 default: 1236 default:
1140 BUG(); 1237 BUG();
1141 } 1238 }
1142 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep); 1239 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep);
1143 ep_ctx->tx_info = MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload); 1240 ep_ctx->tx_info = cpu_to_le32(MAX_ESIT_PAYLOAD_FOR_EP(max_esit_payload));
1144 1241
1145 /* 1242 /*
1146 * XXX no idea how to calculate the average TRB buffer length for bulk 1243 * XXX no idea how to calculate the average TRB buffer length for bulk
@@ -1156,8 +1253,15 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
1156 * including link TRBs, No-op TRBs, and Event data TRBs. Since we don't 1253 * including link TRBs, No-op TRBs, and Event data TRBs. Since we don't
1157 * use Event Data TRBs, and we don't chain in a link TRB on short 1254 * use Event Data TRBs, and we don't chain in a link TRB on short
1158 * transfers, we're basically dividing by 1. 1255 * transfers, we're basically dividing by 1.
1256 *
1257 * xHCI 1.0 specification indicates that the Average TRB Length should
1258 * be set to 8 for control endpoints.
1159 */ 1259 */
1160 ep_ctx->tx_info |= AVG_TRB_LENGTH_FOR_EP(max_esit_payload); 1260 if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version == 0x100)
1261 ep_ctx->tx_info |= cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(8));
1262 else
1263 ep_ctx->tx_info |=
1264 cpu_to_le32(AVG_TRB_LENGTH_FOR_EP(max_esit_payload));
1161 1265
1162 /* FIXME Debug endpoint context */ 1266 /* FIXME Debug endpoint context */
1163 return 0; 1267 return 0;
@@ -1257,7 +1361,7 @@ static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
1257 if (!xhci->scratchpad->sp_dma_buffers) 1361 if (!xhci->scratchpad->sp_dma_buffers)
1258 goto fail_sp4; 1362 goto fail_sp4;
1259 1363
1260 xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma; 1364 xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma);
1261 for (i = 0; i < num_sp; i++) { 1365 for (i = 0; i < num_sp; i++) {
1262 dma_addr_t dma; 1366 dma_addr_t dma;
1263 void *buf = pci_alloc_consistent(to_pci_dev(dev), 1367 void *buf = pci_alloc_consistent(to_pci_dev(dev),
@@ -1441,8 +1545,17 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
1441 xhci->dcbaa = NULL; 1545 xhci->dcbaa = NULL;
1442 1546
1443 scratchpad_free(xhci); 1547 scratchpad_free(xhci);
1548
1549 xhci->num_usb2_ports = 0;
1550 xhci->num_usb3_ports = 0;
1551 kfree(xhci->usb2_ports);
1552 kfree(xhci->usb3_ports);
1553 kfree(xhci->port_array);
1554
1444 xhci->page_size = 0; 1555 xhci->page_size = 0;
1445 xhci->page_shift = 0; 1556 xhci->page_shift = 0;
1557 xhci->bus_state[0].bus_suspended = 0;
1558 xhci->bus_state[1].bus_suspended = 0;
1446} 1559}
1447 1560
1448static int xhci_test_trb_in_td(struct xhci_hcd *xhci, 1561static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
@@ -1624,6 +1737,184 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
1624 &xhci->ir_set->erst_dequeue); 1737 &xhci->ir_set->erst_dequeue);
1625} 1738}
1626 1739
1740static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
1741 __le32 __iomem *addr, u8 major_revision)
1742{
1743 u32 temp, port_offset, port_count;
1744 int i;
1745
1746 if (major_revision > 0x03) {
1747 xhci_warn(xhci, "Ignoring unknown port speed, "
1748 "Ext Cap %p, revision = 0x%x\n",
1749 addr, major_revision);
1750 /* Ignoring port protocol we can't understand. FIXME */
1751 return;
1752 }
1753
1754 /* Port offset and count in the third dword, see section 7.2 */
1755 temp = xhci_readl(xhci, addr + 2);
1756 port_offset = XHCI_EXT_PORT_OFF(temp);
1757 port_count = XHCI_EXT_PORT_COUNT(temp);
1758 xhci_dbg(xhci, "Ext Cap %p, port offset = %u, "
1759 "count = %u, revision = 0x%x\n",
1760 addr, port_offset, port_count, major_revision);
1761 /* Port count includes the current port offset */
1762 if (port_offset == 0 || (port_offset + port_count - 1) > num_ports)
1763 /* WTF? "Valid values are ‘1’ to MaxPorts" */
1764 return;
1765 port_offset--;
1766 for (i = port_offset; i < (port_offset + port_count); i++) {
1767 /* Duplicate entry. Ignore the port if the revisions differ. */
1768 if (xhci->port_array[i] != 0) {
1769 xhci_warn(xhci, "Duplicate port entry, Ext Cap %p,"
1770 " port %u\n", addr, i);
1771 xhci_warn(xhci, "Port was marked as USB %u, "
1772 "duplicated as USB %u\n",
1773 xhci->port_array[i], major_revision);
1774 /* Only adjust the roothub port counts if we haven't
1775 * found a similar duplicate.
1776 */
1777 if (xhci->port_array[i] != major_revision &&
1778 xhci->port_array[i] != DUPLICATE_ENTRY) {
1779 if (xhci->port_array[i] == 0x03)
1780 xhci->num_usb3_ports--;
1781 else
1782 xhci->num_usb2_ports--;
1783 xhci->port_array[i] = DUPLICATE_ENTRY;
1784 }
1785 /* FIXME: Should we disable the port? */
1786 continue;
1787 }
1788 xhci->port_array[i] = major_revision;
1789 if (major_revision == 0x03)
1790 xhci->num_usb3_ports++;
1791 else
1792 xhci->num_usb2_ports++;
1793 }
1794 /* FIXME: Should we disable ports not in the Extended Capabilities? */
1795}
1796
1797/*
1798 * Scan the Extended Capabilities for the "Supported Protocol Capabilities" that
1799 * specify what speeds each port is supposed to be. We can't count on the port
1800 * speed bits in the PORTSC register being correct until a device is connected,
1801 * but we need to set up the two fake roothubs with the correct number of USB
1802 * 3.0 and USB 2.0 ports at host controller initialization time.
1803 */
1804static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1805{
1806 __le32 __iomem *addr;
1807 u32 offset;
1808 unsigned int num_ports;
1809 int i, port_index;
1810
1811 addr = &xhci->cap_regs->hcc_params;
1812 offset = XHCI_HCC_EXT_CAPS(xhci_readl(xhci, addr));
1813 if (offset == 0) {
1814 xhci_err(xhci, "No Extended Capability registers, "
1815 "unable to set up roothub.\n");
1816 return -ENODEV;
1817 }
1818
1819 num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1820 xhci->port_array = kzalloc(sizeof(*xhci->port_array)*num_ports, flags);
1821 if (!xhci->port_array)
1822 return -ENOMEM;
1823
1824 /*
1825 * For whatever reason, the first capability offset is from the
1826 * capability register base, not from the HCCPARAMS register.
1827 * See section 5.3.6 for offset calculation.
1828 */
1829 addr = &xhci->cap_regs->hc_capbase + offset;
1830 while (1) {
1831 u32 cap_id;
1832
1833 cap_id = xhci_readl(xhci, addr);
1834 if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
1835 xhci_add_in_port(xhci, num_ports, addr,
1836 (u8) XHCI_EXT_PORT_MAJOR(cap_id));
1837 offset = XHCI_EXT_CAPS_NEXT(cap_id);
1838 if (!offset || (xhci->num_usb2_ports + xhci->num_usb3_ports)
1839 == num_ports)
1840 break;
1841 /*
1842 * Once you're into the Extended Capabilities, the offset is
1843 * always relative to the register holding the offset.
1844 */
1845 addr += offset;
1846 }
1847
1848 if (xhci->num_usb2_ports == 0 && xhci->num_usb3_ports == 0) {
1849 xhci_warn(xhci, "No ports on the roothubs?\n");
1850 return -ENODEV;
1851 }
1852 xhci_dbg(xhci, "Found %u USB 2.0 ports and %u USB 3.0 ports.\n",
1853 xhci->num_usb2_ports, xhci->num_usb3_ports);
1854
1855 /* Place limits on the number of roothub ports so that the hub
1856 * descriptors aren't longer than the USB core will allocate.
1857 */
1858 if (xhci->num_usb3_ports > 15) {
1859 xhci_dbg(xhci, "Limiting USB 3.0 roothub ports to 15.\n");
1860 xhci->num_usb3_ports = 15;
1861 }
1862 if (xhci->num_usb2_ports > USB_MAXCHILDREN) {
1863 xhci_dbg(xhci, "Limiting USB 2.0 roothub ports to %u.\n",
1864 USB_MAXCHILDREN);
1865 xhci->num_usb2_ports = USB_MAXCHILDREN;
1866 }
1867
1868 /*
1869 * Note we could have all USB 3.0 ports, or all USB 2.0 ports.
1870 * Not sure how the USB core will handle a hub with no ports...
1871 */
1872 if (xhci->num_usb2_ports) {
1873 xhci->usb2_ports = kmalloc(sizeof(*xhci->usb2_ports)*
1874 xhci->num_usb2_ports, flags);
1875 if (!xhci->usb2_ports)
1876 return -ENOMEM;
1877
1878 port_index = 0;
1879 for (i = 0; i < num_ports; i++) {
1880 if (xhci->port_array[i] == 0x03 ||
1881 xhci->port_array[i] == 0 ||
1882 xhci->port_array[i] == DUPLICATE_ENTRY)
1883 continue;
1884
1885 xhci->usb2_ports[port_index] =
1886 &xhci->op_regs->port_status_base +
1887 NUM_PORT_REGS*i;
1888 xhci_dbg(xhci, "USB 2.0 port at index %u, "
1889 "addr = %p\n", i,
1890 xhci->usb2_ports[port_index]);
1891 port_index++;
1892 if (port_index == xhci->num_usb2_ports)
1893 break;
1894 }
1895 }
1896 if (xhci->num_usb3_ports) {
1897 xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)*
1898 xhci->num_usb3_ports, flags);
1899 if (!xhci->usb3_ports)
1900 return -ENOMEM;
1901
1902 port_index = 0;
1903 for (i = 0; i < num_ports; i++)
1904 if (xhci->port_array[i] == 0x03) {
1905 xhci->usb3_ports[port_index] =
1906 &xhci->op_regs->port_status_base +
1907 NUM_PORT_REGS*i;
1908 xhci_dbg(xhci, "USB 3.0 port at index %u, "
1909 "addr = %p\n", i,
1910 xhci->usb3_ports[port_index]);
1911 port_index++;
1912 if (port_index == xhci->num_usb3_ports)
1913 break;
1914 }
1915 }
1916 return 0;
1917}
1627 1918
1628int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 1919int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1629{ 1920{
@@ -1730,11 +2021,11 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1730 val &= DBOFF_MASK; 2021 val &= DBOFF_MASK;
1731 xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x" 2022 xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
1732 " from cap regs base addr\n", val); 2023 " from cap regs base addr\n", val);
1733 xhci->dba = (void *) xhci->cap_regs + val; 2024 xhci->dba = (void __iomem *) xhci->cap_regs + val;
1734 xhci_dbg_regs(xhci); 2025 xhci_dbg_regs(xhci);
1735 xhci_print_run_regs(xhci); 2026 xhci_print_run_regs(xhci);
1736 /* Set ir_set to interrupt register set 0 */ 2027 /* Set ir_set to interrupt register set 0 */
1737 xhci->ir_set = (void *) xhci->run_regs->ir_set; 2028 xhci->ir_set = &xhci->run_regs->ir_set[0];
1738 2029
1739 /* 2030 /*
1740 * Event ring setup: Allocate a normal ring, but also setup 2031 * Event ring setup: Allocate a normal ring, but also setup
@@ -1765,8 +2056,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1765 /* set ring base address and size for each segment table entry */ 2056 /* set ring base address and size for each segment table entry */
1766 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { 2057 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
1767 struct xhci_erst_entry *entry = &xhci->erst.entries[val]; 2058 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
1768 entry->seg_addr = seg->dma; 2059 entry->seg_addr = cpu_to_le64(seg->dma);
1769 entry->seg_size = TRBS_PER_SEGMENT; 2060 entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
1770 entry->rsvd = 0; 2061 entry->rsvd = 0;
1771 seg = seg->next; 2062 seg = seg->next;
1772 } 2063 }
@@ -1791,7 +2082,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1791 /* Set the event ring dequeue address */ 2082 /* Set the event ring dequeue address */
1792 xhci_set_hc_event_deq(xhci); 2083 xhci_set_hc_event_deq(xhci);
1793 xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n"); 2084 xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
1794 xhci_print_ir_set(xhci, xhci->ir_set, 0); 2085 xhci_print_ir_set(xhci, 0);
1795 2086
1796 /* 2087 /*
1797 * XXX: Might need to set the Interrupter Moderation Register to 2088 * XXX: Might need to set the Interrupter Moderation Register to
@@ -1801,9 +2092,15 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1801 init_completion(&xhci->addr_dev); 2092 init_completion(&xhci->addr_dev);
1802 for (i = 0; i < MAX_HC_SLOTS; ++i) 2093 for (i = 0; i < MAX_HC_SLOTS; ++i)
1803 xhci->devs[i] = NULL; 2094 xhci->devs[i] = NULL;
2095 for (i = 0; i < USB_MAXCHILDREN; ++i) {
2096 xhci->bus_state[0].resume_done[i] = 0;
2097 xhci->bus_state[1].resume_done[i] = 0;
2098 }
1804 2099
1805 if (scratchpad_alloc(xhci, flags)) 2100 if (scratchpad_alloc(xhci, flags))
1806 goto fail; 2101 goto fail;
2102 if (xhci_setup_port_arrays(xhci, flags))
2103 goto fail;
1807 2104
1808 return 0; 2105 return 0;
1809 2106