diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
---|---|---|
committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /drivers/usb/host/xhci-dbg.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'drivers/usb/host/xhci-dbg.c')
-rw-r--r-- | drivers/usb/host/xhci-dbg.c | 68 |
1 files changed, 35 insertions, 33 deletions
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index fcbf4abbf381..1f50b4468e87 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c | |||
@@ -147,7 +147,7 @@ static void xhci_print_op_regs(struct xhci_hcd *xhci) | |||
147 | 147 | ||
148 | static void xhci_print_ports(struct xhci_hcd *xhci) | 148 | static void xhci_print_ports(struct xhci_hcd *xhci) |
149 | { | 149 | { |
150 | u32 __iomem *addr; | 150 | __le32 __iomem *addr; |
151 | int i, j; | 151 | int i, j; |
152 | int ports; | 152 | int ports; |
153 | char *names[NUM_PORT_REGS] = { | 153 | char *names[NUM_PORT_REGS] = { |
@@ -169,9 +169,10 @@ static void xhci_print_ports(struct xhci_hcd *xhci) | |||
169 | } | 169 | } |
170 | } | 170 | } |
171 | 171 | ||
172 | void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num) | 172 | void xhci_print_ir_set(struct xhci_hcd *xhci, int set_num) |
173 | { | 173 | { |
174 | void *addr; | 174 | struct xhci_intr_reg __iomem *ir_set = &xhci->run_regs->ir_set[set_num]; |
175 | void __iomem *addr; | ||
175 | u32 temp; | 176 | u32 temp; |
176 | u64 temp_64; | 177 | u64 temp_64; |
177 | 178 | ||
@@ -252,27 +253,27 @@ void xhci_print_trb_offsets(struct xhci_hcd *xhci, union xhci_trb *trb) | |||
252 | void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) | 253 | void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) |
253 | { | 254 | { |
254 | u64 address; | 255 | u64 address; |
255 | u32 type = xhci_readl(xhci, &trb->link.control) & TRB_TYPE_BITMASK; | 256 | u32 type = le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK; |
256 | 257 | ||
257 | switch (type) { | 258 | switch (type) { |
258 | case TRB_TYPE(TRB_LINK): | 259 | case TRB_TYPE(TRB_LINK): |
259 | xhci_dbg(xhci, "Link TRB:\n"); | 260 | xhci_dbg(xhci, "Link TRB:\n"); |
260 | xhci_print_trb_offsets(xhci, trb); | 261 | xhci_print_trb_offsets(xhci, trb); |
261 | 262 | ||
262 | address = trb->link.segment_ptr; | 263 | address = le64_to_cpu(trb->link.segment_ptr); |
263 | xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address); | 264 | xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address); |
264 | 265 | ||
265 | xhci_dbg(xhci, "Interrupter target = 0x%x\n", | 266 | xhci_dbg(xhci, "Interrupter target = 0x%x\n", |
266 | GET_INTR_TARGET(trb->link.intr_target)); | 267 | GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target))); |
267 | xhci_dbg(xhci, "Cycle bit = %u\n", | 268 | xhci_dbg(xhci, "Cycle bit = %u\n", |
268 | (unsigned int) (trb->link.control & TRB_CYCLE)); | 269 | (unsigned int) (le32_to_cpu(trb->link.control) & TRB_CYCLE)); |
269 | xhci_dbg(xhci, "Toggle cycle bit = %u\n", | 270 | xhci_dbg(xhci, "Toggle cycle bit = %u\n", |
270 | (unsigned int) (trb->link.control & LINK_TOGGLE)); | 271 | (unsigned int) (le32_to_cpu(trb->link.control) & LINK_TOGGLE)); |
271 | xhci_dbg(xhci, "No Snoop bit = %u\n", | 272 | xhci_dbg(xhci, "No Snoop bit = %u\n", |
272 | (unsigned int) (trb->link.control & TRB_NO_SNOOP)); | 273 | (unsigned int) (le32_to_cpu(trb->link.control) & TRB_NO_SNOOP)); |
273 | break; | 274 | break; |
274 | case TRB_TYPE(TRB_TRANSFER): | 275 | case TRB_TYPE(TRB_TRANSFER): |
275 | address = trb->trans_event.buffer; | 276 | address = le64_to_cpu(trb->trans_event.buffer); |
276 | /* | 277 | /* |
277 | * FIXME: look at flags to figure out if it's an address or if | 278 | * FIXME: look at flags to figure out if it's an address or if |
278 | * the data is directly in the buffer field. | 279 | * the data is directly in the buffer field. |
@@ -280,11 +281,12 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) | |||
280 | xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address); | 281 | xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address); |
281 | break; | 282 | break; |
282 | case TRB_TYPE(TRB_COMPLETION): | 283 | case TRB_TYPE(TRB_COMPLETION): |
283 | address = trb->event_cmd.cmd_trb; | 284 | address = le64_to_cpu(trb->event_cmd.cmd_trb); |
284 | xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); | 285 | xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); |
285 | xhci_dbg(xhci, "Completion status = %u\n", | 286 | xhci_dbg(xhci, "Completion status = %u\n", |
286 | (unsigned int) GET_COMP_CODE(trb->event_cmd.status)); | 287 | (unsigned int) GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status))); |
287 | xhci_dbg(xhci, "Flags = 0x%x\n", (unsigned int) trb->event_cmd.flags); | 288 | xhci_dbg(xhci, "Flags = 0x%x\n", |
289 | (unsigned int) le32_to_cpu(trb->event_cmd.flags)); | ||
288 | break; | 290 | break; |
289 | default: | 291 | default: |
290 | xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", | 292 | xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", |
@@ -310,16 +312,16 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) | |||
310 | void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) | 312 | void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) |
311 | { | 313 | { |
312 | int i; | 314 | int i; |
313 | u32 addr = (u32) seg->dma; | 315 | u64 addr = seg->dma; |
314 | union xhci_trb *trb = seg->trbs; | 316 | union xhci_trb *trb = seg->trbs; |
315 | 317 | ||
316 | for (i = 0; i < TRBS_PER_SEGMENT; ++i) { | 318 | for (i = 0; i < TRBS_PER_SEGMENT; ++i) { |
317 | trb = &seg->trbs[i]; | 319 | trb = &seg->trbs[i]; |
318 | xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", addr, | 320 | xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr, |
319 | lower_32_bits(trb->link.segment_ptr), | 321 | (u32)lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), |
320 | upper_32_bits(trb->link.segment_ptr), | 322 | (u32)upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), |
321 | (unsigned int) trb->link.intr_target, | 323 | (unsigned int) le32_to_cpu(trb->link.intr_target), |
322 | (unsigned int) trb->link.control); | 324 | (unsigned int) le32_to_cpu(trb->link.control)); |
323 | addr += sizeof(*trb); | 325 | addr += sizeof(*trb); |
324 | } | 326 | } |
325 | } | 327 | } |
@@ -390,18 +392,18 @@ void xhci_dbg_ep_rings(struct xhci_hcd *xhci, | |||
390 | 392 | ||
391 | void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst) | 393 | void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst) |
392 | { | 394 | { |
393 | u32 addr = (u32) erst->erst_dma_addr; | 395 | u64 addr = erst->erst_dma_addr; |
394 | int i; | 396 | int i; |
395 | struct xhci_erst_entry *entry; | 397 | struct xhci_erst_entry *entry; |
396 | 398 | ||
397 | for (i = 0; i < erst->num_entries; ++i) { | 399 | for (i = 0; i < erst->num_entries; ++i) { |
398 | entry = &erst->entries[i]; | 400 | entry = &erst->entries[i]; |
399 | xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", | 401 | xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", |
400 | (unsigned int) addr, | 402 | addr, |
401 | lower_32_bits(entry->seg_addr), | 403 | lower_32_bits(le64_to_cpu(entry->seg_addr)), |
402 | upper_32_bits(entry->seg_addr), | 404 | upper_32_bits(le64_to_cpu(entry->seg_addr)), |
403 | (unsigned int) entry->seg_size, | 405 | (unsigned int) le32_to_cpu(entry->seg_size), |
404 | (unsigned int) entry->rsvd); | 406 | (unsigned int) le32_to_cpu(entry->rsvd)); |
405 | addr += sizeof(*entry); | 407 | addr += sizeof(*entry); |
406 | } | 408 | } |
407 | } | 409 | } |
@@ -435,21 +437,21 @@ char *xhci_get_slot_state(struct xhci_hcd *xhci, | |||
435 | { | 437 | { |
436 | struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); | 438 | struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); |
437 | 439 | ||
438 | switch (GET_SLOT_STATE(slot_ctx->dev_state)) { | 440 | switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) { |
439 | case 0: | 441 | case SLOT_STATE_ENABLED: |
440 | return "enabled/disabled"; | 442 | return "enabled/disabled"; |
441 | case 1: | 443 | case SLOT_STATE_DEFAULT: |
442 | return "default"; | 444 | return "default"; |
443 | case 2: | 445 | case SLOT_STATE_ADDRESSED: |
444 | return "addressed"; | 446 | return "addressed"; |
445 | case 3: | 447 | case SLOT_STATE_CONFIGURED: |
446 | return "configured"; | 448 | return "configured"; |
447 | default: | 449 | default: |
448 | return "reserved"; | 450 | return "reserved"; |
449 | } | 451 | } |
450 | } | 452 | } |
451 | 453 | ||
452 | void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) | 454 | static void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) |
453 | { | 455 | { |
454 | /* Fields are 32 bits wide, DMA addresses are in bytes */ | 456 | /* Fields are 32 bits wide, DMA addresses are in bytes */ |
455 | int field_size = 32 / 8; | 457 | int field_size = 32 / 8; |
@@ -488,7 +490,7 @@ void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx) | |||
488 | dbg_rsvd64(xhci, (u64 *)slot_ctx, dma); | 490 | dbg_rsvd64(xhci, (u64 *)slot_ctx, dma); |
489 | } | 491 | } |
490 | 492 | ||
491 | void xhci_dbg_ep_ctx(struct xhci_hcd *xhci, | 493 | static void xhci_dbg_ep_ctx(struct xhci_hcd *xhci, |
492 | struct xhci_container_ctx *ctx, | 494 | struct xhci_container_ctx *ctx, |
493 | unsigned int last_ep) | 495 | unsigned int last_ep) |
494 | { | 496 | { |